1 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c: Enable functions commented out in previous patch.
4 (SKIP_SPACE_TABS): Move further up file.
5 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
6 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
7 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
8 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
9 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
10 (micromips_imm_b_map, micromips_imm_c_map): Delete.
11 (mips_lookup_reg_pair): Delete.
12 (macro): Use report_bad_range and report_bad_field.
13 (mips_immed, expr_const_in_range): Delete.
14 (mips_ip): Rewrite main parsing loop to use new functions.
16 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
18 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
19 Change return type to bfd_boolean.
20 (report_bad_range, report_bad_field): New functions.
21 (mips_arg_info): New structure.
22 (match_const_int, convert_reg_type, check_regno, match_int_operand)
23 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
24 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
25 (match_addiusp_operand, match_clo_clz_dest_operand)
26 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
27 (match_pc_operand, match_tied_reg_operand, match_operand)
28 (check_completed_insn): New functions, commented out for now.
30 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
32 * config/tc-mips.c (insn_insert_operand): New function.
33 (macro_build, mips16_macro_build): Put null character check
34 in the for loop and convert continues to breaks. Use operand
35 structures to handle constant operands.
37 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
39 * config/tc-mips.c (validate_mips_insn): Move further up file.
40 Add insn_bits and decode_operand arguments. Use the mips_operand
41 fields to work out which bits an operand occupies. Detect double
43 (validate_micromips_insn): Move further up file. Call into
46 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
48 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
50 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
52 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
54 (macro): Update accordingly.
56 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
58 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
60 (md_assemble): Remove imm_reloc handling.
61 (mips_ip): Update commentary. Use offset_expr and offset_reloc
62 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
63 Use a temporary array rather than imm_reloc when parsing
64 constant expressions. Remove imm_reloc initialization.
65 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
66 for the relaxable field. Use a relax_char variable to track the
67 type of this field. Remove imm_reloc initialization.
69 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
71 * config/tc-mips.c (mips16_ip): Handle "I".
73 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
75 * config/tc-mips.c (mips_flag_nan2008): New variable.
76 (options): Add OPTION_NAN enum value.
77 (md_longopts): Handle it.
78 (md_parse_option): Likewise.
79 (s_nan): New function.
80 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
81 (md_show_usage): Add -mnan.
83 * doc/as.texinfo (Overview): Add -mnan.
84 * doc/c-mips.texi (MIPS Opts): Document -mnan.
85 (MIPS NaN Encodings): New node. Document .nan directive.
86 (MIPS-Dependent): List the new node.
88 2013-07-09 Tristan Gingold <gingold@adacore.com>
90 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
92 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
94 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
95 for 'A' and assume that the constant has been elided if the result
98 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
100 * config/tc-mips.c (gprel16_reloc_p): New function.
101 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
103 (offset_high_part, small_offset_p): New functions.
104 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
105 register load and store macros, handle the 16-bit offset case first.
106 If a 16-bit offset is not suitable for the instruction we're
107 generating, load it into the temporary register using
108 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
109 M_L_DAB code once the address has been constructed. For double load
110 and store macros, again handle the 16-bit offset case first.
111 If the second register cannot be accessed from the same high
112 part as the first, load it into AT using ADDRESS_ADDI_INSN.
113 Fix the handling of LD in cases where the first register is the
114 same as the base. Also handle the case where the offset is
115 not 16 bits and the second register cannot be accessed from the
116 same high part as the first. For unaligned loads and stores,
117 fuse the offbits == 12 and old "ab" handling. Apply this handling
118 whenever the second offset needs a different high part from the first.
119 Construct the offset using ADDRESS_ADDI_INSN where possible,
120 for offbits == 16 as well as offbits == 12. Use offset_reloc
121 when constructing the individual loads and stores.
122 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
123 and offset_reloc before matching against a particular opcode.
124 Handle elided 'A' constants. Allow 'A' constants to use
125 relocation operators.
127 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
129 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
130 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
131 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
133 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
135 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
136 Require the msb to be <= 31 for "+s". Check that the size is <= 31
137 for both "+s" and "+S".
139 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
141 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
142 (mips_ip, mips16_ip): Handle "+i".
144 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
146 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
147 (micromips_to_32_reg_h_map): Rename to...
148 (micromips_to_32_reg_h_map1): ...this.
149 (micromips_to_32_reg_i_map): Rename to...
150 (micromips_to_32_reg_h_map2): ...this.
151 (mips_lookup_reg_pair): New function.
152 (gpr_write_mask, macro): Adjust after above renaming.
153 (validate_micromips_insn): Remove "mi" handling.
154 (mips_ip): Likewise. Parse both registers in a pair for "mh".
156 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
158 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
159 (mips_ip): Remove "+D" and "+T" handling.
161 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
163 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
166 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
168 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
170 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
172 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
173 (aarch64_force_relocation): Likewise.
175 2013-07-02 Alan Modra <amodra@gmail.com>
177 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
179 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
181 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
182 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
183 Replace @sc{mips16} with literal `MIPS16'.
184 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
186 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
188 * config/tc-aarch64.c (reloc_table): Replace
189 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
190 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
191 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
192 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
193 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
194 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
195 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
196 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
197 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
198 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
199 (aarch64_force_relocation): Likewise.
201 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
203 * config/tc-aarch64.c (ilp32_p): New static variable.
204 (elf64_aarch64_target_format): Return the target according to the
206 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
207 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
208 (aarch64_dwarf2_addr_size): New function.
209 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
210 (DWARF2_ADDR_SIZE): New define.
212 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
214 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
216 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
218 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
220 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
222 * config/tc-mips.c (mips_set_options): Add insn32 member.
223 (mips_opts): Initialize it.
224 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
225 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
226 (md_longopts): Add "minsn32" and "mno-insn32" options.
227 (is_size_valid): Handle insn32 mode.
228 (md_assemble): Pass instruction string down to macro.
229 (brk_fmt): Add second dimension and insn32 mode initializers.
230 (mfhl_fmt): Likewise.
231 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
232 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
233 (macro_build_jalr, move_register): Handle insn32 mode.
234 (macro_build_branch_rs): Likewise.
235 (macro): Handle insn32 mode.
236 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
237 (mips_ip): Handle insn32 mode.
238 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
239 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
240 (mips_handle_align): Handle insn32 mode.
241 (md_show_usage): Add -minsn32 and -mno-insn32.
243 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
245 (-minsn32, -mno-insn32): New options.
246 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
248 (MIPS assembly options): New node. Document .set insn32 and
250 (MIPS-Dependent): List the new node.
252 2013-06-25 Nick Clifton <nickc@redhat.com>
254 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
255 the PC in indirect addressing on 430xv2 parts.
256 (msp430_operands): Add version test to hardware bug encoding
259 2013-06-24 Roland McGrath <mcgrathr@google.com>
261 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
262 so it skips whitespace before it.
263 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
265 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
266 (arm_reg_parse_multi): Skip whitespace first.
267 (parse_reg_list): Likewise.
268 (parse_vfp_reg_list): Likewise.
269 (s_arm_unwind_save_mmxwcg): Likewise.
271 2013-06-24 Nick Clifton <nickc@redhat.com>
274 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
276 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
278 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
280 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
282 * config/tc-mips.c: Assert that offsetT and valueT are at least
284 (GPR_SMIN, GPR_SMAX): New macros.
285 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
287 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
289 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
290 conditions. Remove any code deselected by them.
291 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
293 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
295 * NEWS: Note removal of ECOFF support.
296 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
297 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
298 (MULTI_CFILES): Remove config/e-mipsecoff.c.
299 * Makefile.in: Regenerate.
300 * configure.in: Remove MIPS ECOFF references.
301 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
303 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
304 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
305 (mips-*-*): ...this single case.
306 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
307 MIPS emulations to be e-mipself*.
308 * configure: Regenerate.
309 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
310 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
311 (mips-*-sysv*): Remove coff and ecoff cases.
312 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
313 * ecoff.c: Remove reference to MIPS ECOFF.
314 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
315 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
316 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
317 (mips_hi_fixup): Tweak comment.
318 (append_insn): Require a howto.
319 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
321 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
323 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
324 Use "CPU" instead of "cpu".
325 * doc/c-mips.texi: Likewise.
326 (MIPS Opts): Rename to MIPS Options.
327 (MIPS option stack): Rename to MIPS Option Stack.
328 (MIPS ASE instruction generation overrides): Rename to
329 MIPS ASE Instruction Generation Overrides (for now).
330 (MIPS floating-point): Rename to MIPS Floating-Point.
332 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
334 * doc/c-mips.texi (MIPS Macros): New section.
335 (MIPS Object): Replace with...
336 (MIPS Small Data): ...this new section.
338 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
340 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
341 Capitalize name. Use @kindex instead of @cindex for .set entries.
343 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
345 * doc/c-mips.texi (MIPS Stabs): Remove section.
347 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
349 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
350 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
351 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
352 (ISA_SUPPORTS_VIRT64_ASE): Delete.
353 (mips_ase): New structure.
354 (mips_ases): New table.
355 (FP64_ASES): New macro.
356 (mips_ase_groups): New array.
357 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
358 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
360 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
361 (md_parse_option): Use mips_ases and mips_set_ase instead of
362 separate case statements for each ASE option.
363 (mips_after_parse_args): Use FP64_ASES. Use
364 mips_check_isa_supports_ases to check the ASEs against
366 (s_mipsset): Use mips_ases and mips_set_ase instead of
367 separate if statements for each ASE option. Use
368 mips_check_isa_supports_ases, even when a non-ASE option
371 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
373 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
375 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
377 * config/tc-mips.c (md_shortopts, options, md_longopts)
378 (md_longopts_size): Move earlier in file.
380 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
382 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
383 with a single "ase" bitmask.
384 (mips_opts): Update accordingly.
385 (file_ase, file_ase_explicit): New variables.
386 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
387 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
388 (ISA_HAS_ROR): Adjust for mips_set_options change.
389 (is_opcode_valid): Take the base ase mask directly from mips_opts.
390 (mips_ip): Adjust for mips_set_options change.
391 (md_parse_option): Likewise. Update file_ase_explicit.
392 (mips_after_parse_args): Adjust for mips_set_options change.
393 Use bitmask operations to select the default ASEs. Set file_ase
394 rather than individual per-ASE variables.
395 (s_mipsset): Adjust for mips_set_options change.
396 (mips_elf_final_processing): Test file_ase rather than
397 file_ase_mdmx. Remove commented-out code.
399 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
401 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
402 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
403 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
404 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
405 (mips_after_parse_args): Use the new "ase" field to choose
407 (mips_cpu_info_table): Move ASEs from the "flags" field to the
410 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
412 * config/tc-arm.c (symbol_preemptible): New function.
413 (relax_branch): Use it.
415 2013-06-17 Catherine Moore <clm@codesourcery.com>
416 Maciej W. Rozycki <macro@codesourcery.com>
417 Chao-Ying Fu <fu@mips.com>
419 * config/tc-mips.c (mips_set_options): Add ase_eva.
420 (mips_set_options mips_opts): Add ase_eva.
421 (file_ase_eva): Declare.
422 (ISA_SUPPORTS_EVA_ASE): Define.
423 (IS_SEXT_9BIT_NUM): Define.
424 (MIPS_CPU_ASE_EVA): Define.
425 (is_opcode_valid): Add support for ase_eva.
426 (macro_build): Likewise.
428 (validate_mips_insn): Likewise.
429 (validate_micromips_insn): Likewise.
431 (options): Add OPTION_EVA and OPTION_NO_EVA.
432 (md_longopts): Add -meva and -mno-eva.
433 (md_parse_option): Process new options.
434 (mips_after_parse_args): Check for valid EVA combinations.
435 (s_mipsset): Likewise.
437 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
439 * dwarf2dbg.h (dwarf2_move_insn): Declare.
440 * dwarf2dbg.c (line_subseg): Add pmove_tail.
441 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
442 (dwarf2_gen_line_info_1): Update call accordingly.
443 (dwarf2_move_insn): New function.
444 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
446 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
450 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
453 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
454 (dwarf2_gen_line_info_1): Delete.
455 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
456 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
457 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
458 (dwarf2_directive_loc): Push previous .locs instead of generating
461 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
463 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
464 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
466 2013-06-13 Nick Clifton <nickc@redhat.com>
469 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
470 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
471 function. Generates an error if the adjusted offset is out of a
474 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
476 * config/tc-nios2.c (md_apply_fix): Mask constant
477 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
479 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
481 * config/tc-mips.c (append_insn): Don't do branch relaxation for
482 MIPS-3D instructions either.
483 (md_convert_frag): Update the COPx branch mask accordingly.
485 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
487 * doc/as.texinfo (Overview): Add --relax-branch and
489 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
492 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
494 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
497 2013-06-08 Catherine Moore <clm@codesourcery.com>
499 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
500 (is_opcode_valid_16): Pass ase value to opcode_is_member.
501 (append_insn): Change INSN_xxxx to ASE_xxxx.
503 2013-06-01 George Thomas <george.thomas@atmel.com>
505 * gas/config/tc-avr.c: Change ISA for devices with USB support to
508 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
510 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
513 2013-05-31 Paul Brook <paul@codesourcery.com>
516 * config/tc-mips.c (s_ehword): New.
518 2013-05-30 Paul Brook <paul@codesourcery.com>
520 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
522 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
524 * write.c (resolve_reloc_expr_symbols): On REL targets don't
525 convert relocs who have no relocatable field either. Rephrase
526 the conditional so that the PC-relative check is only applied
529 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
531 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
534 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
536 * config/tc-aarch64.c (reloc_table): Update to use
537 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
538 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
539 (md_apply_fix): Likewise.
540 (aarch64_force_relocation): Likewise.
542 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
544 * config/tc-arm.c (it_fsm_post_encode): Improve
545 warning messages about deprecated IT block formats.
547 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
549 * config/tc-aarch64.c (md_apply_fix): Move value range checking
550 inside fx_done condition.
552 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
554 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
556 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
558 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
559 and clean up warning when using PRINT_OPCODE_TABLE.
561 2013-05-20 Alan Modra <amodra@gmail.com>
563 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
564 and data fixups performing shift/high adjust/sign extension on
565 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
566 when writing data fixups rather than recalculating size.
568 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
570 * doc/c-msp430.texi: Fix typo.
572 2013-05-16 Tristan Gingold <gingold@adacore.com>
574 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
575 are also TOC symbols.
577 2013-05-16 Nick Clifton <nickc@redhat.com>
579 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
580 Add -mcpu command to specify core type.
581 * doc/c-msp430.texi: Update documentation.
583 2013-05-09 Andrew Pinski <apinski@cavium.com>
585 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
586 (mips_opts): Update for the new field.
587 (file_ase_virt): New variable.
588 (ISA_SUPPORTS_VIRT_ASE): New macro.
589 (ISA_SUPPORTS_VIRT64_ASE): New macro.
590 (MIPS_CPU_ASE_VIRT): New define.
591 (is_opcode_valid): Handle ase_virt.
592 (macro_build): Handle "+J".
593 (validate_mips_insn): Likewise.
595 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
596 (md_longopts): Add mvirt and mnovirt
597 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
598 (mips_after_parse_args): Handle ase_virt field.
599 (s_mipsset): Handle "virt" and "novirt".
600 (mips_elf_final_processing): Add a comment about virt ASE might need
602 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
603 * doc/c-mips.texi: Document -mvirt and -mno-virt.
604 Document ".set virt" and ".set novirt".
606 2013-05-09 Alan Modra <amodra@gmail.com>
608 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
609 control of operand flag bits.
611 2013-05-07 Alan Modra <amodra@gmail.com>
613 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
614 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
615 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
616 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
617 (md_apply_fix): Set fx_no_overflow for assorted relocations.
618 Shift and sign-extend fieldval for use by some VLE reloc
619 operand->insert functions.
621 2013-05-06 Paul Brook <paul@codesourcery.com>
622 Catherine Moore <clm@codesourcery.com>
624 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
625 (limited_pcrel_reloc_p): Likewise.
626 (md_apply_fix): Likewise.
627 (tc_gen_reloc): Likewise.
629 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
631 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
632 (mips_fix_adjustable): Adjust pc-relative check to use
635 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
637 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
638 (s_mips_stab): Do not restrict to stabn only.
640 2013-05-02 Nick Clifton <nickc@redhat.com>
642 * config/tc-msp430.c: Add support for the MSP430X architecture.
643 Add code to insert a NOP instruction after any instruction that
644 might change the interrupt state.
645 Add support for the LARGE memory model.
646 Add code to initialise the .MSP430.attributes section.
647 * config/tc-msp430.h: Add support for the MSP430X architecture.
648 * doc/c-msp430.texi: Document the new -mL and -mN command line
650 * NEWS: Mention support for the MSP430X architecture.
652 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
654 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
655 alpha*-*-linux*ecoff*.
657 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
659 * config/tc-mips.c (mips_ip): Add sizelo.
660 For "+C", "+G", and "+H", set sizelo and compare against it.
662 2013-04-29 Nick Clifton <nickc@redhat.com>
664 * as.c (Options): Add -gdwarf-sections.
665 (parse_args): Likewise.
666 * as.h (flag_dwarf_sections): Declare.
667 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
668 (process_entries): When -gdwarf-sections is enabled generate
669 fragmentary .debug_line sections.
670 (out_debug_line): Set the section for the .debug_line section end
672 * doc/as.texinfo: Document -gdwarf-sections.
673 * NEWS: Mention -gdwarf-sections.
675 2013-04-26 Christian Groessler <chris@groessler.org>
677 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
678 according to the target parameter. Don't call s_segm since s_segm
679 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
681 (md_begin): Call s_segm according to target parameter from command
684 2013-04-25 Alan Modra <amodra@gmail.com>
686 * configure.in: Allow little-endian linux.
687 * configure: Regenerate.
689 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
691 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
692 "fstatus" control register to "eccinj".
694 2013-04-19 Kai Tietz <ktietz@redhat.com>
696 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
698 2013-04-15 Julian Brown <julian@codesourcery.com>
700 * expr.c (add_to_result, subtract_from_result): Make global.
701 * expr.h (add_to_result, subtract_from_result): Add prototypes.
702 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
703 subtract_from_result to handle extra bit of precision for .sleb128
706 2013-04-10 Julian Brown <julian@codesourcery.com>
708 * read.c (convert_to_bignum): Add sign parameter. Use it
709 instead of X_unsigned to determine sign of resulting bignum.
710 (emit_expr): Pass extra argument to convert_to_bignum.
711 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
712 X_extrabit to convert_to_bignum.
713 (parse_bitfield_cons): Set X_extrabit.
714 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
715 Initialise X_extrabit field as appropriate.
716 (add_to_result): New.
717 (subtract_from_result): New.
719 * expr.h (expressionS): Add X_extrabit field.
721 2013-04-10 Jan Beulich <jbeulich@suse.com>
723 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
724 register being PC when is_t or writeback, and use distinct
725 diagnostic for the latter case.
727 2013-04-10 Jan Beulich <jbeulich@suse.com>
729 * gas/config/tc-arm.c (parse_operands): Re-write
731 (do_barrier): Remove bogus constraint().
732 (do_t_barrier): Remove.
734 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
736 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
737 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
739 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
741 2013-04-09 Jan Beulich <jbeulich@suse.com>
743 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
744 Use local variable Rt in more places.
745 (do_vmsr): Accept all control registers.
747 2013-04-09 Jan Beulich <jbeulich@suse.com>
749 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
750 if there was none specified for moves between scalar and core
753 2013-04-09 Jan Beulich <jbeulich@suse.com>
755 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
758 2013-04-08 Jan Beulich <jbeulich@suse.com>
760 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
763 2013-04-08 Jan Beulich <jbeulich@suse.com>
765 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
768 2013-04-03 Alan Modra <amodra@gmail.com>
770 * doc/as.texinfo: Add support to generate man options for h8300.
771 * doc/c-h8300.texi: Likewise.
773 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
775 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
778 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
781 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
783 2013-03-26 Nick Clifton <nickc@redhat.com>
786 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
787 start of the file each time.
790 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
793 2013-03-26 Douglas B Rupp <rupp@gnat.com>
795 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
798 2013-03-21 Will Newton <will.newton@linaro.org>
800 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
801 pc-relative str instructions in Thumb mode.
803 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
805 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
806 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
808 * config/tc-h8300.h: Remove duplicated defines.
810 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
813 * tc-avr.c (mcu_has_3_byte_pc): New function.
814 (tc_cfi_frame_initial_instructions): Call it to find return
817 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
820 * config/tc-tic6x.c (tic6x_try_encode): Handle
821 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
822 encode register pair numbers when required.
824 2013-03-15 Will Newton <will.newton@linaro.org>
826 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
827 in vstr in Thumb mode for pre-ARMv7 cores.
829 2013-03-14 Andreas Schwab <schwab@suse.de>
831 * doc/c-arc.texi (ARC Directives): Revert last change and use
832 @itemize instead of @table.
833 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
835 2013-03-14 Nick Clifton <nickc@redhat.com>
838 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
839 NULL message, instead just check ARM_CPU_IS_ANY directly.
841 2013-03-14 Nick Clifton <nickc@redhat.com>
844 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
846 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
847 to the @item directives.
848 (ARM-Neon-Alignment): Move to correct place in the document.
849 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
851 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
854 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
856 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
857 case. Add default BAD_CASE to switch.
859 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
861 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
862 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
864 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
866 * config/tc-arm.c (crc_ext_armv8): New feature set.
867 (UNPRED_REG): New macro.
868 (do_crc32_1): New function.
869 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
870 do_crc32ch, do_crc32cw): Likewise.
872 (insns): Add entries for crc32 mnemonics.
873 (arm_extensions): Add entry for crc.
875 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
877 * write.h (struct fix): Add fx_dot_frag field.
879 * write.c (dot_frag): New variable.
880 (fix_new_internal): Set fx_dot_frag field with dot_frag.
881 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
882 * expr.c (expr): Save value of frag_now in dot_frag when setting
884 * read.c (emit_expr): Likewise. Delete comments.
886 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
888 * config/tc-i386.c (flag_code_names): Removed.
889 (i386_index_check): Rewrote.
891 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
893 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
895 (aarch64_double_precision_fmovable): New function.
896 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
897 function; handle hexadecimal representation of IEEE754 encoding.
898 (parse_operands): Update the call to parse_aarch64_imm_float.
900 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
902 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
903 (check_hle): Updated.
904 (md_assemble): Likewise.
905 (parse_insn): Likewise.
907 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
909 * config/tc-i386.c (_i386_insn): Add rep_prefix.
910 (md_assemble): Check if REP prefix is OK.
911 (parse_insn): Remove expecting_string_instruction. Set
914 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
916 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
918 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
920 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
921 for system registers.
923 2013-02-27 DJ Delorie <dj@redhat.com>
925 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
926 (rl78_op): Handle %code().
927 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
928 (tc_gen_reloc): Likwise; convert to a computed reloc.
929 (md_apply_fix): Likewise.
931 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
933 * config/rl78-parse.y: Fix encoding of DIVWU insn.
935 2013-02-25 Terry Guo <terry.guo@arm.com>
937 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
938 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
939 list of accepted CPUs.
941 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
944 * config/tc-i386.c (cpu_arch): Add ".smap".
946 * doc/c-i386.texi: Document smap.
948 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
950 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
951 mips_assembling_insn appropriately.
952 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
954 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
956 * config/tc-mips.c (append_insn): Correct indentation, remove
959 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
961 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
963 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
965 * configure.tgt: Add nios2-*-rtems*.
967 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
969 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
972 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
974 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
975 (macro): Use it. Assert that trunc.w.s is not used for r5900.
977 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
979 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
982 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
983 Andrew Jenner <andrew@codesourcery.com>
985 Based on patches from Altera Corporation.
987 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
988 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
989 * Makefile.in: Regenerated.
990 * configure.tgt: Add case for nios2*-linux*.
991 * config/obj-elf.c: Conditionally include elf/nios2.h.
992 * config/tc-nios2.c: New file.
993 * config/tc-nios2.h: New file.
994 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
995 * doc/Makefile.in: Regenerated.
996 * doc/all.texi: Set NIOSII.
997 * doc/as.texinfo (Overview): Add Nios II options.
998 (Machine Dependencies): Include c-nios2.texi.
999 * doc/c-nios2.texi: New file.
1000 * NEWS: Note Altera Nios II support.
1002 2013-02-06 Alan Modra <amodra@gmail.com>
1005 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1006 Don't skip fixups with fx_subsy non-NULL.
1007 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1008 with fx_subsy non-NULL.
1010 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1012 * doc/c-metag.texi: Add "@c man" markers.
1014 2013-02-04 Alan Modra <amodra@gmail.com>
1016 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1018 (TC_ADJUST_RELOC_COUNT): Delete.
1019 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1021 2013-02-04 Alan Modra <amodra@gmail.com>
1023 * po/POTFILES.in: Regenerate.
1025 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1027 * config/tc-metag.c: Make SWAP instruction less permissive with
1030 2013-01-29 DJ Delorie <dj@redhat.com>
1032 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1033 relocs in .word/.etc statements.
1035 2013-01-29 Roland McGrath <mcgrathr@google.com>
1037 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1038 immediate value for 8-bit offset" error so it shows line info.
1040 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1042 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1045 2013-01-24 Nick Clifton <nickc@redhat.com>
1047 * config/tc-v850.c: Add support for e3v5 architecture.
1048 * doc/c-v850.texi: Mention new support.
1050 2013-01-23 Nick Clifton <nickc@redhat.com>
1053 * config/tc-avr.c: Include dwarf2dbg.h.
1055 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1057 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1058 (tc_i386_fix_adjustable): Likewise.
1059 (lex_got): Likewise.
1060 (tc_gen_reloc): Likewise.
1062 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1064 * config/tc-aarch64.c (output_operand_error_record): Change to output
1065 the out-of-range error message as value-expected message if there is
1066 only one single value in the expected range.
1067 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1068 LSL #0 as a programmer-friendly feature.
1070 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1072 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1073 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1074 BFD_RELOC_64_SIZE relocations.
1075 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1077 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1078 relocations against local symbols.
1080 2013-01-16 Alan Modra <amodra@gmail.com>
1082 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1083 finding some sort of toc syntax error, and break to avoid
1084 compiler uninit warning.
1086 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1089 * config/tc-i386.c (lex_got): Increment length by 1 if the
1090 relocation token is removed.
1092 2013-01-15 Nick Clifton <nickc@redhat.com>
1094 * config/tc-v850.c (md_assemble): Allow signed values for
1097 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1099 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1102 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1104 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1105 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1106 * config/tc-ppc.c (md_show_usage): Likewise.
1107 (ppc_handle_align): Handle power8's group ending nop.
1109 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1111 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1112 that the assember exits after the opcodes have been printed.
1114 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1116 * app.c: Remove trailing white spaces.
1120 * dw2gencfi.c: Likewise.
1121 * dwarf2dbg.h: Likewise.
1122 * ecoff.c: Likewise.
1123 * input-file.c: Likewise.
1124 * itbl-lex.h: Likewise.
1125 * output-file.c: Likewise.
1128 * subsegs.c: Likewise.
1129 * symbols.c: Likewise.
1130 * write.c: Likewise.
1131 * config/tc-i386.c: Likewise.
1132 * doc/Makefile.am: Likewise.
1133 * doc/Makefile.in: Likewise.
1134 * doc/c-aarch64.texi: Likewise.
1135 * doc/c-alpha.texi: Likewise.
1136 * doc/c-arc.texi: Likewise.
1137 * doc/c-arm.texi: Likewise.
1138 * doc/c-avr.texi: Likewise.
1139 * doc/c-bfin.texi: Likewise.
1140 * doc/c-cr16.texi: Likewise.
1141 * doc/c-d10v.texi: Likewise.
1142 * doc/c-d30v.texi: Likewise.
1143 * doc/c-h8300.texi: Likewise.
1144 * doc/c-hppa.texi: Likewise.
1145 * doc/c-i370.texi: Likewise.
1146 * doc/c-i386.texi: Likewise.
1147 * doc/c-i860.texi: Likewise.
1148 * doc/c-m32c.texi: Likewise.
1149 * doc/c-m32r.texi: Likewise.
1150 * doc/c-m68hc11.texi: Likewise.
1151 * doc/c-m68k.texi: Likewise.
1152 * doc/c-microblaze.texi: Likewise.
1153 * doc/c-mips.texi: Likewise.
1154 * doc/c-msp430.texi: Likewise.
1155 * doc/c-mt.texi: Likewise.
1156 * doc/c-s390.texi: Likewise.
1157 * doc/c-score.texi: Likewise.
1158 * doc/c-sh.texi: Likewise.
1159 * doc/c-sh64.texi: Likewise.
1160 * doc/c-tic54x.texi: Likewise.
1161 * doc/c-tic6x.texi: Likewise.
1162 * doc/c-v850.texi: Likewise.
1163 * doc/c-xc16x.texi: Likewise.
1164 * doc/c-xgate.texi: Likewise.
1165 * doc/c-xtensa.texi: Likewise.
1166 * doc/c-z80.texi: Likewise.
1167 * doc/internals.texi: Likewise.
1169 2013-01-10 Roland McGrath <mcgrathr@google.com>
1171 * hash.c (hash_new_sized): Make it global.
1172 * hash.h: Declare it.
1173 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1176 2013-01-10 Will Newton <will.newton@imgtec.com>
1178 * Makefile.am: Add Meta.
1179 * Makefile.in: Regenerate.
1180 * config/tc-metag.c: New file.
1181 * config/tc-metag.h: New file.
1182 * configure.tgt: Add Meta.
1183 * doc/Makefile.am: Add Meta.
1184 * doc/Makefile.in: Regenerate.
1185 * doc/all.texi: Add Meta.
1186 * doc/as.texiinfo: Document Meta options.
1187 * doc/c-metag.texi: New file.
1189 2013-01-09 Steve Ellcey <sellcey@mips.com>
1191 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1193 * config/tc-mips.c (internalError): Remove, replace with abort.
1195 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1197 * config/tc-aarch64.c (parse_operands): Change to compare the result
1198 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1200 2013-01-07 Nick Clifton <nickc@redhat.com>
1203 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1204 anticipated character.
1205 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1206 here as it is no longer needed.
1208 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1210 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1211 * doc/c-score.texi (SCORE-Opts): Likewise.
1212 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1214 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1216 * config/tc-mips.c: Add support for MIPS r5900.
1217 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1219 (can_swap_branch_p, get_append_method): Detect some conditional
1220 short loops to fix a bug on the r5900 by NOP in the branch delay
1222 (M_MUL): Support 3 operands in multu on r5900.
1223 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1224 (s_mipsset): Force 32 bit floating point on r5900.
1225 (mips_ip): Check parameter range of instructions mfps and mtps on
1227 * configure.in: Detect CPU type when target string contains r5900
1228 (e.g. mips64r5900el-linux-gnu).
1230 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1232 * as.c (parse_args): Update copyright year to 2013.
1234 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1236 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1239 2013-01-02 Nick Clifton <nickc@redhat.com>
1242 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1245 For older changes see ChangeLog-2012
1247 Copyright (C) 2013 Free Software Foundation, Inc.
1249 Copying and distribution of this file, with or without modification,
1250 are permitted in any medium without royalty provided the copyright
1251 notice and this notice are preserved.
1257 version-control: never