1 2006-06-17 Nick Clifton <nickc@redhat.com>
3 * config/tc-arm.c (enum parse_operand_result): Move outside of
4 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
6 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
8 * config/tc-i386.h (processor_type): New.
9 (arch_entry): Add type.
11 * config/tc-i386.c (cpu_arch_tune): New.
12 (cpu_arch_tune_flags): Likewise.
13 (cpu_arch_isa_flags): Likewise.
15 (set_cpu_arch): Also update cpu_arch_isa_flags.
16 (md_assemble): Update cpu_arch_isa_flags.
18 (OPTION_MTUNE): Likewise.
19 (md_longopts): Add -march= and -mtune=.
20 (md_parse_option): Support -march= and -mtune=.
21 (md_show_usage): Add -march=CPU/-mtune=CPU.
22 (i386_target_format): Also update cpu_arch_isa_flags,
23 cpu_arch_tune and cpu_arch_tune_flags.
25 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
27 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
29 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
31 * config/tc-arm.c (enum parse_operand_result): New.
32 (struct group_reloc_table_entry): New.
33 (enum group_reloc_type): New.
34 (group_reloc_table): New array.
35 (find_group_reloc_table_entry): New function.
36 (parse_shifter_operand_group_reloc): New function.
37 (parse_address_main): New function, incorporating code
38 from the old parse_address function. To be used via...
39 (parse_address): wrapper for parse_address_main; and
40 (parse_address_group_reloc): new function, likewise.
41 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
42 OP_ADDRGLDRS, OP_ADDRGLDC.
43 (parse_operands): Support for these new operand codes.
44 New macro po_misc_or_fail_no_backtrack.
45 (encode_arm_cp_address): Preserve group relocations.
46 (insns): Modify to use the above operand codes where group
47 relocations are permitted.
48 (md_apply_fix): Handle the group relocations
49 ALU_PC_G0_NC through LDC_SB_G2.
50 (tc_gen_reloc): Likewise.
51 (arm_force_relocation): Leave group relocations for the linker.
52 (arm_fix_adjustable): Likewise.
54 2006-06-15 Julian Brown <julian@codesourcery.com>
56 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
57 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
60 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
62 * config/tc-i386.c (process_suffix): Don't add rex64 for
65 2006-06-09 Thiemo Seufer <ths@mips.com>
67 * config/tc-mips.c (mips_ip): Maintain argument count.
69 2006-06-09 Alan Modra <amodra@bigpond.net.au>
71 * config/tc-iq2000.c: Include sb.h.
73 2006-06-08 Nigel Stephens <nigel@mips.com>
75 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
76 aliases for better compatibility with SGI tools.
78 2006-06-08 Alan Modra <amodra@bigpond.net.au>
80 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
81 * Makefile.am (GASLIBS): Expand @BFDLIB@.
83 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
84 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
85 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
87 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
88 * Makefile.in: Regenerate.
89 * doc/Makefile.in: Regenerate.
90 * configure: Regenerate.
92 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
94 * po/Make-in (pdf, ps): New dummy targets.
96 2006-06-07 Julian Brown <julian@codesourcery.com>
98 * config/tc-arm.c (stdarg.h): include.
99 (arm_it): Add uncond_value field. Add isvec and issingle to operand
101 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
102 REG_TYPE_NSDQ (single, double or quad vector reg).
103 (reg_expected_msgs): Update.
104 (BAD_FPU): Add macro for unsupported FPU instruction error.
105 (parse_neon_type): Support 'd' as an alias for .f64.
106 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
108 (parse_vfp_reg_list): Don't update first arg on error.
109 (parse_neon_mov): Support extra syntax for VFP moves.
110 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
111 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
112 (parse_operands): Support isvec, issingle operands fields, new parse
114 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
116 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
117 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
118 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
119 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
121 (neon_shape): Redefine in terms of above.
122 (neon_shape_class): New enumeration, table of shape classes.
123 (neon_shape_el): New enumeration. One element of a shape.
124 (neon_shape_el_size): Register widths of above, where appropriate.
125 (neon_shape_info): New struct. Info for shape table.
126 (neon_shape_tab): New array.
127 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
128 (neon_check_shape): Rewrite as...
129 (neon_select_shape): New function to classify instruction shapes,
130 driven by new table neon_shape_tab array.
131 (neon_quad): New function. Return 1 if shape should set Q flag in
132 instructions (or equivalent), 0 otherwise.
133 (type_chk_of_el_type): Support F64.
134 (el_type_of_type_chk): Likewise.
135 (neon_check_type): Add support for VFP type checking (VFP data
136 elements fill their containing registers).
137 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
138 in thumb mode for VFP instructions.
139 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
140 and encode the current instruction as if it were that opcode.
141 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
142 arguments, call function in PFN.
143 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
144 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
145 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
146 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
147 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
148 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
149 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
150 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
151 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
152 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
153 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
154 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
155 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
156 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
157 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
159 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
160 between VFP and Neon turns out to belong to Neon. Perform
161 architecture check and fill in condition field if appropriate.
162 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
163 (do_neon_cvt): Add support for VFP variants of instructions.
164 (neon_cvt_flavour): Extend to cover VFP conversions.
165 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
167 (do_neon_ldr_str): Handle single-precision VFP load/store.
168 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
169 NS_NULL not NS_IGNORE.
170 (opcode_tag): Add OT_csuffixF for operands which either take a
171 conditional suffix, or have 0xF in the condition field.
172 (md_assemble): Add support for OT_csuffixF.
173 (NCE): Replace macro with...
174 (NCE_tag, NCE, NCEF): New macros.
175 (nCE): Replace macro with...
176 (nCE_tag, nCE, nCEF): New macros.
177 (insns): Add support for VFP insns or VFP versions of insns msr,
178 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
179 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
180 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
181 VFP/Neon insns together.
183 2006-06-07 Alan Modra <amodra@bigpond.net.au>
184 Ladislav Michl <ladis@linux-mips.org>
186 * app.c: Don't include headers already included by as.h.
188 * atof-generic.c: Likewise.
190 * dwarf2dbg.c: Likewise.
192 * input-file.c: Likewise.
193 * input-scrub.c: Likewise.
195 * output-file.c: Likewise.
198 * config/bfin-lex.l: Likewise.
199 * config/obj-coff.h: Likewise.
200 * config/obj-elf.h: Likewise.
201 * config/obj-som.h: Likewise.
202 * config/tc-arc.c: Likewise.
203 * config/tc-arm.c: Likewise.
204 * config/tc-avr.c: Likewise.
205 * config/tc-bfin.c: Likewise.
206 * config/tc-cris.c: Likewise.
207 * config/tc-d10v.c: Likewise.
208 * config/tc-d30v.c: Likewise.
209 * config/tc-dlx.h: Likewise.
210 * config/tc-fr30.c: Likewise.
211 * config/tc-frv.c: Likewise.
212 * config/tc-h8300.c: Likewise.
213 * config/tc-hppa.c: Likewise.
214 * config/tc-i370.c: Likewise.
215 * config/tc-i860.c: Likewise.
216 * config/tc-i960.c: Likewise.
217 * config/tc-ip2k.c: Likewise.
218 * config/tc-iq2000.c: Likewise.
219 * config/tc-m32c.c: Likewise.
220 * config/tc-m32r.c: Likewise.
221 * config/tc-maxq.c: Likewise.
222 * config/tc-mcore.c: Likewise.
223 * config/tc-mips.c: Likewise.
224 * config/tc-mmix.c: Likewise.
225 * config/tc-mn10200.c: Likewise.
226 * config/tc-mn10300.c: Likewise.
227 * config/tc-msp430.c: Likewise.
228 * config/tc-mt.c: Likewise.
229 * config/tc-ns32k.c: Likewise.
230 * config/tc-openrisc.c: Likewise.
231 * config/tc-ppc.c: Likewise.
232 * config/tc-s390.c: Likewise.
233 * config/tc-sh.c: Likewise.
234 * config/tc-sh64.c: Likewise.
235 * config/tc-sparc.c: Likewise.
236 * config/tc-tic30.c: Likewise.
237 * config/tc-tic4x.c: Likewise.
238 * config/tc-tic54x.c: Likewise.
239 * config/tc-v850.c: Likewise.
240 * config/tc-vax.c: Likewise.
241 * config/tc-xc16x.c: Likewise.
242 * config/tc-xstormy16.c: Likewise.
243 * config/tc-xtensa.c: Likewise.
244 * config/tc-z80.c: Likewise.
245 * config/tc-z8k.c: Likewise.
246 * macro.h: Don't include sb.h or ansidecl.h.
247 * sb.h: Don't include stdio.h or ansidecl.h.
248 * cond.c: Include sb.h.
249 * itbl-lex.l: Include as.h instead of other system headers.
250 * itbl-parse.y: Likewise.
251 * itbl-ops.c: Similarly.
252 * itbl-ops.h: Don't include as.h or ansidecl.h.
253 * config/bfin-defs.h: Don't include bfd.h or as.h.
254 * config/bfin-parse.y: Include as.h instead of other system headers.
256 2006-06-06 Ben Elliston <bje@au.ibm.com>
257 Anton Blanchard <anton@samba.org>
259 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
260 (md_show_usage): Document it.
261 (ppc_setup_opcodes): Test power6 opcode flag bits.
262 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
264 2006-06-06 Thiemo Seufer <ths@mips.com>
265 Chao-ying Fu <fu@mips.com>
267 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
268 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
269 (macro_build): Update comment.
270 (mips_ip): Allow DSP64 instructions for MIPS64R2.
271 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
273 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
274 MIPS_CPU_ASE_MDMX flags for sb1.
276 2006-06-05 Thiemo Seufer <ths@mips.com>
278 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
280 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
281 (mips_ip): Make overflowed/underflowed constant arguments in DSP
282 and MT instructions a fatal error. Use INSERT_OPERAND where
283 appropriate. Improve warnings for break and wait code overflows.
284 Use symbolic constant of OP_MASK_COPZ.
285 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
287 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
289 * po/Make-in (top_builddir): Define.
291 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
293 * doc/Makefile.am (TEXI2DVI): Define.
294 * doc/Makefile.in: Regenerate.
295 * doc/c-arc.texi: Fix typo.
297 2006-06-01 Alan Modra <amodra@bigpond.net.au>
299 * config/obj-ieee.c: Delete.
300 * config/obj-ieee.h: Delete.
301 * Makefile.am (OBJ_FORMATS): Remove ieee.
302 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
303 (obj-ieee.o): Remove rule.
304 * Makefile.in: Regenerate.
305 * configure.in (atof): Remove tahoe.
306 (OBJ_MAYBE_IEEE): Don't define.
307 * configure: Regenerate.
308 * config.in: Regenerate.
309 * doc/Makefile.in: Regenerate.
310 * po/POTFILES.in: Regenerate.
312 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
314 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
315 and LIBINTL_DEP everywhere.
317 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
318 * acinclude.m4: Include new gettext macros.
319 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
320 Remove local code for po/Makefile.
321 * Makefile.in, configure, doc/Makefile.in: Regenerated.
323 2006-05-30 Nick Clifton <nickc@redhat.com>
325 * po/es.po: Updated Spanish translation.
327 2006-05-06 Denis Chertykov <denisc@overta.ru>
329 * doc/c-avr.texi: New file.
330 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
331 * doc/all.texi: Set AVR
332 * doc/as.texinfo: Include c-avr.texi
334 2006-05-28 Jie Zhang <jie.zhang@analog.com>
336 * config/bfin-parse.y (check_macfunc): Loose the condition of
337 calling check_multiply_halfregs ().
339 2006-05-25 Jie Zhang <jie.zhang@analog.com>
341 * config/bfin-parse.y (asm_1): Better check and deal with
342 vector and scalar Multiply 16-Bit Operands instructions.
344 2006-05-24 Nick Clifton <nickc@redhat.com>
346 * config/tc-hppa.c: Convert to ISO C90 format.
347 * config/tc-hppa.h: Likewise.
349 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
350 Randolph Chung <randolph@tausq.org>
352 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
353 is_tls_ieoff, is_tls_leoff): Define.
354 (fix_new_hppa): Handle TLS.
355 (cons_fix_new_hppa): Likewise.
357 (md_apply_fix): Handle TLS relocs.
358 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
360 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
362 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
364 2006-05-23 Thiemo Seufer <ths@mips.com>
365 David Ung <davidu@mips.com>
366 Nigel Stephens <nigel@mips.com>
369 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
370 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
371 ISA_HAS_MXHC1): New macros.
372 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
373 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
374 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
375 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
376 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
377 (mips_after_parse_args): Change default handling of float register
378 size to account for 32bit code with 64bit FP. Better sanity checking
379 of ISA/ASE/ABI option combinations.
380 (s_mipsset): Support switching of GPR and FPR sizes via
381 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
383 (mips_elf_final_processing): We should record the use of 64bit FP
384 registers in 32bit code but we don't, because ELF header flags are
386 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
387 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
388 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
389 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
390 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
391 missing -march options. Document .set arch=CPU. Move .set smartmips
392 to ASE page. Use @code for .set FOO examples.
394 2006-05-23 Jie Zhang <jie.zhang@analog.com>
396 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
399 2006-05-23 Jie Zhang <jie.zhang@analog.com>
401 * config/bfin-defs.h (bfin_equals): Remove declaration.
402 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
403 * config/tc-bfin.c (bfin_name_is_register): Remove.
404 (bfin_equals): Remove.
405 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
406 (bfin_name_is_register): Remove declaration.
408 2006-05-19 Thiemo Seufer <ths@mips.com>
409 Nigel Stephens <nigel@mips.com>
411 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
412 (mips_oddfpreg_ok): New function.
415 2006-05-19 Thiemo Seufer <ths@mips.com>
416 David Ung <davidu@mips.com>
418 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
419 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
420 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
421 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
422 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
423 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
424 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
425 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
426 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
427 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
428 reg_names_o32, reg_names_n32n64): Define register classes.
429 (reg_lookup): New function, use register classes.
430 (md_begin): Reserve register names in the symbol table. Simplify
432 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
434 (mips16_ip): Use reg_lookup.
435 (tc_get_register): Likewise.
436 (tc_mips_regname_to_dw2regnum): New function.
438 2006-05-19 Thiemo Seufer <ths@mips.com>
440 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
441 Un-constify string argument.
442 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
444 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
446 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
448 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
450 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
452 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
455 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
457 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
458 cfloat/m68881 to correct architecture before using it.
460 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
462 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
465 2006-05-15 Paul Brook <paul@codesourcery.com>
467 * config/tc-arm.c (arm_adjust_symtab): Use
468 bfd_is_arm_special_symbol_name.
470 2006-05-15 Bob Wilson <bob.wilson@acm.org>
472 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
473 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
474 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
475 Handle errors from calls to xtensa_opcode_is_* functions.
477 2006-05-14 Thiemo Seufer <ths@mips.com>
479 * config/tc-mips.c (macro_build): Test for currently active
481 (mips16_ip): Reject invalid opcodes.
483 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
485 * doc/as.texinfo: Rename "Index" to "AS Index",
486 and "ABORT" to "ABORT (COFF)".
488 2006-05-11 Paul Brook <paul@codesourcery.com>
490 * config/tc-arm.c (parse_half): New function.
491 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
492 (parse_operands): Ditto.
493 (do_mov16): Reject invalid relocations.
494 (do_t_mov16): Ditto. Use Thumb reloc numbers.
495 (insns): Replace Iffff with HALF.
496 (md_apply_fix): Add MOVW and MOVT relocs.
497 (tc_gen_reloc): Ditto.
498 * doc/c-arm.texi: Document relocation operators
500 2006-05-11 Paul Brook <paul@codesourcery.com>
502 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
504 2006-05-11 Thiemo Seufer <ths@mips.com>
506 * config/tc-mips.c (append_insn): Don't check the range of j or
509 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
511 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
512 relocs against external symbols for WinCE targets.
513 (md_apply_fix): Likewise.
515 2006-05-09 David Ung <davidu@mips.com>
517 * config/tc-mips.c (append_insn): Only warn about an out-of-range
520 2006-05-09 Nick Clifton <nickc@redhat.com>
522 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
523 against symbols which are not going to be placed into the symbol
526 2006-05-09 Ben Elliston <bje@au.ibm.com>
528 * expr.c (operand): Remove `if (0 && ..)' statement and
529 subsequently unused target_op label. Collapse `if (1 || ..)'
531 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
532 separately above the switch.
534 2006-05-08 Nick Clifton <nickc@redhat.com>
537 * config/tc-msp430.c (line_separator_character): Define as |.
539 2006-05-08 Thiemo Seufer <ths@mips.com>
540 Nigel Stephens <nigel@mips.com>
541 David Ung <davidu@mips.com>
543 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
544 (mips_opts): Likewise.
545 (file_ase_smartmips): New variable.
546 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
547 (macro_build): Handle SmartMIPS instructions.
549 (md_longopts): Add argument handling for smartmips.
550 (md_parse_options, mips_after_parse_args): Likewise.
551 (s_mipsset): Add .set smartmips support.
552 (md_show_usage): Document -msmartmips/-mno-smartmips.
553 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
555 * doc/c-mips.texi: Likewise.
557 2006-05-08 Alan Modra <amodra@bigpond.net.au>
559 * write.c (relax_segment): Add pass count arg. Don't error on
560 negative org/space on first two passes.
561 (relax_seg_info): New struct.
562 (relax_seg, write_object_file): Adjust.
563 * write.h (relax_segment): Update prototype.
565 2006-05-05 Julian Brown <julian@codesourcery.com>
567 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
569 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
570 architecture version checks.
571 (insns): Allow overlapping instructions to be used in VFP mode.
573 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
576 * config/obj-elf.c (obj_elf_change_section): Allow user
577 specified SHF_ALPHA_GPREL.
579 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
581 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
582 for PMEM related expressions.
584 2006-05-05 Nick Clifton <nickc@redhat.com>
587 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
588 insertion of a directory separator character into a string at a
589 given offset. Uses heuristics to decide when to use a backslash
590 character rather than a forward-slash character.
591 (dwarf2_directive_loc): Use the macro.
592 (out_debug_info): Likewise.
594 2006-05-05 Thiemo Seufer <ths@mips.com>
595 David Ung <davidu@mips.com>
597 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
599 (macro): Add new case M_CACHE_AB.
601 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
603 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
604 (opcode_lookup): Issue a warning for opcode with
605 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
606 identical to OT_cinfix3.
607 (TxC3w, TC3w, tC3w): New.
608 (insns): Use tC3w and TC3w for comparison instructions with
611 2006-05-04 Alan Modra <amodra@bigpond.net.au>
613 * subsegs.h (struct frchain): Delete frch_seg.
614 (frchain_root): Delete.
615 (seg_info): Define as macro.
616 * subsegs.c (frchain_root): Delete.
617 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
618 (subsegs_begin, subseg_change): Adjust for above.
619 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
620 rather than to one big list.
621 (subseg_get): Don't special case abs, und sections.
622 (subseg_new, subseg_force_new): Don't set frchainP here.
624 (subsegs_print_statistics): Adjust frag chain control list traversal.
625 * debug.c (dmp_frags): Likewise.
626 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
627 at frchain_root. Make use of known frchain ordering.
628 (last_frag_for_seg): Likewise.
629 (get_frag_fix): Likewise. Add seg param.
630 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
631 * write.c (chain_frchains_together_1): Adjust for struct frchain.
632 (SUB_SEGMENT_ALIGN): Likewise.
633 (subsegs_finish): Adjust frchain list traversal.
634 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
635 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
636 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
637 (xtensa_fix_b_j_loop_end_frags): Likewise.
638 (xtensa_fix_close_loop_end_frags): Likewise.
639 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
640 (retrieve_segment_info): Delete frch_seg initialisation.
642 2006-05-03 Alan Modra <amodra@bigpond.net.au>
644 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
645 * config/obj-elf.h (obj_sec_set_private_data): Delete.
646 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
647 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
649 2006-05-02 Joseph Myers <joseph@codesourcery.com>
651 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
653 (md_apply_fix3): Multiply offset by 4 here for
654 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
656 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
657 Jan Beulich <jbeulich@novell.com>
659 * config/tc-i386.c (output_invalid_buf): Change size for
661 * config/tc-tic30.c (output_invalid_buf): Likewise.
663 * config/tc-i386.c (output_invalid): Cast none-ascii char to
665 * config/tc-tic30.c (output_invalid): Likewise.
667 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
669 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
670 (TEXI2POD): Use AM_MAKEINFOFLAGS.
671 (asconfig.texi): Don't set top_srcdir.
672 * doc/as.texinfo: Don't use top_srcdir.
673 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
675 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
677 * config/tc-i386.c (output_invalid_buf): Change size to 16.
678 * config/tc-tic30.c (output_invalid_buf): Likewise.
680 * config/tc-i386.c (output_invalid): Use snprintf instead of
682 * config/tc-ia64.c (declare_register_set): Likewise.
683 (emit_one_bundle): Likewise.
684 (check_dependencies): Likewise.
685 * config/tc-tic30.c (output_invalid): Likewise.
687 2006-05-02 Paul Brook <paul@codesourcery.com>
689 * config/tc-arm.c (arm_optimize_expr): New function.
690 * config/tc-arm.h (md_optimize_expr): Define
691 (arm_optimize_expr): Add prototype.
692 (TC_FORCE_RELOCATION_SUB_SAME): Define.
694 2006-05-02 Ben Elliston <bje@au.ibm.com>
696 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
699 * sb.h (sb_list_vector): Move to sb.c.
700 * sb.c (free_list): Use type of sb_list_vector directly.
701 (sb_build): Fix off-by-one error in assertion about `size'.
703 2006-05-01 Ben Elliston <bje@au.ibm.com>
705 * listing.c (listing_listing): Remove useless loop.
706 * macro.c (macro_expand): Remove is_positional local variable.
707 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
708 and simplify surrounding expressions, where possible.
709 (assign_symbol): Likewise.
710 (s_weakref): Likewise.
711 * symbols.c (colon): Likewise.
713 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
715 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
717 2006-04-30 Thiemo Seufer <ths@mips.com>
718 David Ung <davidu@mips.com>
720 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
721 (mips_immed): New table that records various handling of udi
722 instruction patterns.
723 (mips_ip): Adds udi handling.
725 2006-04-28 Alan Modra <amodra@bigpond.net.au>
727 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
728 of list rather than beginning.
730 2006-04-26 Julian Brown <julian@codesourcery.com>
732 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
733 (is_quarter_float): Rename from above. Simplify slightly.
734 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
736 (parse_neon_mov): Parse floating-point constants.
737 (neon_qfloat_bits): Fix encoding.
738 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
739 preference to integer encoding when using the F32 type.
741 2006-04-26 Julian Brown <julian@codesourcery.com>
743 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
744 zero-initialising structures containing it will lead to invalid types).
745 (arm_it): Add vectype to each operand.
746 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
748 (neon_typed_alias): New structure. Extra information for typed
750 (reg_entry): Add neon type info field.
751 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
752 Break out alternative syntax for coprocessor registers, etc. into...
753 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
754 out from arm_reg_parse.
755 (parse_neon_type): Move. Return SUCCESS/FAIL.
756 (first_error): New function. Call to ensure first error which occurs is
758 (parse_neon_operand_type): Parse exactly one type.
759 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
760 (parse_typed_reg_or_scalar): New function. Handle core of both
761 arm_typed_reg_parse and parse_scalar.
762 (arm_typed_reg_parse): Parse a register with an optional type.
763 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
765 (parse_scalar): Parse a Neon scalar with optional type.
766 (parse_reg_list): Use first_error.
767 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
768 (neon_alias_types_same): New function. Return true if two (alias) types
770 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
772 (insert_reg_alias): Return new reg_entry not void.
773 (insert_neon_reg_alias): New function. Insert type/index information as
774 well as register for alias.
775 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
776 make typed register aliases accordingly.
777 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
779 (s_unreq): Delete type information if present.
780 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
781 (s_arm_unwind_save_mmxwcg): Likewise.
782 (s_arm_unwind_movsp): Likewise.
783 (s_arm_unwind_setfp): Likewise.
784 (parse_shift): Likewise.
785 (parse_shifter_operand): Likewise.
786 (parse_address): Likewise.
787 (parse_tb): Likewise.
788 (tc_arm_regname_to_dw2regnum): Likewise.
789 (md_pseudo_table): Add dn, qn.
790 (parse_neon_mov): Handle typed operands.
791 (parse_operands): Likewise.
792 (neon_type_mask): Add N_SIZ.
793 (N_ALLMODS): New macro.
794 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
795 (el_type_of_type_chk): Add some safeguards.
796 (modify_types_allowed): Fix logic bug.
797 (neon_check_type): Handle operands with types.
798 (neon_three_same): Remove redundant optional arg handling.
799 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
800 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
801 (do_neon_step): Adjust accordingly.
802 (neon_cmode_for_logic_imm): Use first_error.
803 (do_neon_bitfield): Call neon_check_type.
804 (neon_dyadic): Rename to...
805 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
806 to allow modification of type of the destination.
807 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
808 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
809 (do_neon_compare): Make destination be an untyped bitfield.
810 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
811 (neon_mul_mac): Return early in case of errors.
812 (neon_move_immediate): Use first_error.
813 (neon_mac_reg_scalar_long): Fix type to include scalar.
814 (do_neon_dup): Likewise.
815 (do_neon_mov): Likewise (in several places).
816 (do_neon_tbl_tbx): Fix type.
817 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
818 (do_neon_ld_dup): Exit early in case of errors and/or use
820 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
821 Handle .dn/.qn directives.
822 (REGDEF): Add zero for reg_entry neon field.
824 2006-04-26 Julian Brown <julian@codesourcery.com>
826 * config/tc-arm.c (limits.h): Include.
827 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
828 (fpu_vfp_v3_or_neon_ext): Declare constants.
829 (neon_el_type): New enumeration of types for Neon vector elements.
830 (neon_type_el): New struct. Define type and size of a vector element.
831 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
833 (neon_type): Define struct. The type of an instruction.
834 (arm_it): Add 'vectype' for the current instruction.
835 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
836 (vfp_sp_reg_pos): Rename to...
837 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
839 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
840 (Neon D or Q register).
841 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
843 (GE_OPT_PREFIX_BIG): Define constant, for use in...
844 (my_get_expression): Allow above constant as argument to accept
845 64-bit constants with optional prefix.
846 (arm_reg_parse): Add extra argument to return the specific type of
847 register in when either a D or Q register (REG_TYPE_NDQ) is
848 requested. Can be NULL.
849 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
850 (parse_reg_list): Update for new arm_reg_parse args.
851 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
852 (parse_neon_el_struct_list): New function. Parse element/structure
853 register lists for VLD<n>/VST<n> instructions.
854 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
855 (s_arm_unwind_save_mmxwr): Likewise.
856 (s_arm_unwind_save_mmxwcg): Likewise.
857 (s_arm_unwind_movsp): Likewise.
858 (s_arm_unwind_setfp): Likewise.
859 (parse_big_immediate): New function. Parse an immediate, which may be
860 64 bits wide. Put results in inst.operands[i].
861 (parse_shift): Update for new arm_reg_parse args.
862 (parse_address): Likewise. Add parsing of alignment specifiers.
863 (parse_neon_mov): Parse the operands of a VMOV instruction.
864 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
865 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
866 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
867 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
868 (parse_operands): Handle new codes above.
869 (encode_arm_vfp_sp_reg): Rename to...
870 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
871 selected VFP version only supports D0-D15.
872 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
873 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
874 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
875 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
876 encode_arm_vfp_reg name, and allow 32 D regs.
877 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
878 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
880 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
881 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
882 constant-load and conversion insns introduced with VFPv3.
883 (neon_tab_entry): New struct.
884 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
885 those which are the targets of pseudo-instructions.
886 (neon_opc): Enumerate opcodes, use as indices into...
887 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
888 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
889 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
890 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
892 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
894 (neon_type_mask): New. Compact type representation for type checking.
895 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
896 permitted type combinations.
897 (N_IGNORE_TYPE): New macro.
898 (neon_check_shape): New function. Check an instruction shape for
899 multiple alternatives. Return the specific shape for the current
901 (neon_modify_type_size): New function. Modify a vector type and size,
902 depending on the bit mask in argument 1.
903 (neon_type_promote): New function. Convert a given "key" type (of an
904 operand) into the correct type for a different operand, based on a bit
906 (type_chk_of_el_type): New function. Convert a type and size into the
907 compact representation used for type checking.
908 (el_type_of_type_ckh): New function. Reverse of above (only when a
909 single bit is set in the bit mask).
910 (modify_types_allowed): New function. Alter a mask of allowed types
911 based on a bit mask of modifications.
912 (neon_check_type): New function. Check the type of the current
913 instruction against the variable argument list. The "key" type of the
914 instruction is returned.
915 (neon_dp_fixup): New function. Fill in and modify instruction bits for
916 a Neon data-processing instruction depending on whether we're in ARM
917 mode or Thumb-2 mode.
918 (neon_logbits): New function.
919 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
920 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
921 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
922 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
923 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
924 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
925 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
926 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
927 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
928 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
929 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
930 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
931 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
932 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
933 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
934 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
935 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
936 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
937 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
938 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
939 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
940 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
941 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
942 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
943 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
945 (parse_neon_type): New function. Parse Neon type specifier.
946 (opcode_lookup): Allow parsing of Neon type specifiers.
947 (REGNUM2, REGSETH, REGSET2): New macros.
948 (reg_names): Add new VFPv3 and Neon registers.
949 (NUF, nUF, NCE, nCE): New macros for opcode table.
950 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
951 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
952 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
953 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
954 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
955 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
956 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
957 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
958 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
959 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
960 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
961 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
962 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
963 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
965 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
966 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
967 (arm_option_cpu_value): Add vfp3 and neon.
968 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
971 2006-04-25 Bob Wilson <bob.wilson@acm.org>
973 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
974 syntax instead of hardcoded opcodes with ".w18" suffixes.
975 (wide_branch_opcode): New.
976 (build_transition): Use it to check for wide branch opcodes with
977 either ".w18" or ".w15" suffixes.
979 2006-04-25 Bob Wilson <bob.wilson@acm.org>
981 * config/tc-xtensa.c (xtensa_create_literal_symbol,
982 xg_assemble_literal, xg_assemble_literal_space): Do not set the
983 frag's is_literal flag.
985 2006-04-25 Bob Wilson <bob.wilson@acm.org>
987 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
989 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
991 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
992 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
993 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
994 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
995 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
997 2005-04-20 Paul Brook <paul@codesourcery.com>
999 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1001 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1003 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1005 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1006 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1007 Make some cpus unsupported on ELF. Run "make dep-am".
1008 * Makefile.in: Regenerate.
1010 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1012 * configure.in (--enable-targets): Indent help message.
1013 * configure: Regenerate.
1015 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1018 * config/tc-i386.c (i386_immediate): Check illegal immediate
1021 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1023 * config/tc-i386.c: Formatting.
1024 (output_disp, output_imm): ISO C90 params.
1026 * frags.c (frag_offset_fixed_p): Constify args.
1027 * frags.h (frag_offset_fixed_p): Ditto.
1029 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1030 (COFF_MAGIC): Delete.
1032 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1034 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1036 * po/POTFILES.in: Regenerated.
1038 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1040 * doc/as.texinfo: Mention that some .type syntaxes are not
1041 supported on all architectures.
1043 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1045 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1046 instructions when such transformations have been disabled.
1048 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1050 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1051 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1052 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1053 decoding the loop instructions. Remove current_offset variable.
1054 (xtensa_fix_short_loop_frags): Likewise.
1055 (min_bytes_to_other_loop_end): Remove current_offset argument.
1057 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1059 * config/tc-z80.c (z80_optimize_expr): Removed.
1060 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1062 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1064 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1065 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1066 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1067 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1068 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1069 at90can64, at90usb646, at90usb647, at90usb1286 and
1071 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1073 2006-04-07 Paul Brook <paul@codesourcery.com>
1075 * config/tc-arm.c (parse_operands): Set default error message.
1077 2006-04-07 Paul Brook <paul@codesourcery.com>
1079 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1081 2006-04-07 Paul Brook <paul@codesourcery.com>
1083 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1085 2006-04-07 Paul Brook <paul@codesourcery.com>
1087 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1088 (move_or_literal_pool): Handle Thumb-2 instructions.
1089 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1091 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1094 * config/tc-i386.c (match_template): Move 64-bit operand tests
1097 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1099 * po/Make-in: Add install-html target.
1100 * Makefile.am: Add install-html and install-html-recursive targets.
1101 * Makefile.in: Regenerate.
1102 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1103 * configure: Regenerate.
1104 * doc/Makefile.am: Add install-html and install-html-am targets.
1105 * doc/Makefile.in: Regenerate.
1107 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1109 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1112 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1113 Daniel Jacobowitz <dan@codesourcery.com>
1115 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1116 (GOTT_BASE, GOTT_INDEX): New.
1117 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1118 GOTT_INDEX when generating VxWorks PIC.
1119 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1120 use the generic *-*-vxworks* stanza instead.
1122 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1125 * frags.c (frag_offset_fixed_p): New function.
1126 * frags.h (frag_offset_fixed_p): Declare.
1127 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1128 (resolve_expression): Likewise.
1130 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1132 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1133 of the same length but different numbers of slots.
1135 2006-03-30 Andreas Schwab <schwab@suse.de>
1137 * configure.in: Fix help string for --enable-targets option.
1138 * configure: Regenerate.
1140 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1142 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1143 (m68k_ip): ... here. Use for all chips. Protect against buffer
1144 overrun and avoid excessive copying.
1146 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1147 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1148 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1149 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1150 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1151 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1152 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1153 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1154 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1155 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1156 (struct m68k_cpu): Change chip field to control_regs.
1157 (current_chip): Remove.
1158 (control_regs): New.
1159 (m68k_archs, m68k_extensions): Adjust.
1160 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1161 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1162 (find_cf_chip): Reimplement for new organization of cpu table.
1163 (select_control_regs): Remove.
1165 (struct save_opts): Save control regs, not chip.
1166 (s_save, s_restore): Adjust.
1167 (m68k_lookup_cpu): Give deprecated warning when necessary.
1168 (m68k_init_arch): Adjust.
1169 (md_show_usage): Adjust for new cpu table organization.
1171 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1173 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1174 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1175 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1177 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1178 (any_gotrel): New rule.
1179 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1180 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1182 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1183 (bfin_pic_ptr): New function.
1184 (md_pseudo_table): Add it for ".picptr".
1185 (OPTION_FDPIC): New macro.
1186 (md_longopts): Add -mfdpic.
1187 (md_parse_option): Handle it.
1188 (md_begin): Set BFD flags.
1189 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1190 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1192 * Makefile.am (bfin-parse.o): Update dependencies.
1193 (DEPTC_bfin_elf): Likewise.
1194 * Makefile.in: Regenerate.
1196 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1198 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1199 mcfemac instead of mcfmac.
1201 2006-03-23 Michael Matz <matz@suse.de>
1203 * config/tc-i386.c (type_names): Correct placement of 'static'.
1204 (reloc): Map some more relocs to their 64 bit counterpart when
1206 (output_insn): Work around breakage if DEBUG386 is defined.
1207 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1208 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1209 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1210 different from i386.
1211 (output_imm): Ditto.
1212 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1214 (md_convert_frag): Jumps can now be larger than 2GB away, error
1216 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1217 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1219 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1220 Daniel Jacobowitz <dan@codesourcery.com>
1221 Phil Edwards <phil@codesourcery.com>
1222 Zack Weinberg <zack@codesourcery.com>
1223 Mark Mitchell <mark@codesourcery.com>
1224 Nathan Sidwell <nathan@codesourcery.com>
1226 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1227 (md_begin): Complain about -G being used for PIC. Don't change
1228 the text, data and bss alignments on VxWorks.
1229 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1230 generating VxWorks PIC.
1231 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1232 (macro): Likewise, but do not treat la $25 specially for
1233 VxWorks PIC, and do not handle jal.
1234 (OPTION_MVXWORKS_PIC): New macro.
1235 (md_longopts): Add -mvxworks-pic.
1236 (md_parse_option): Don't complain about using PIC and -G together here.
1237 Handle OPTION_MVXWORKS_PIC.
1238 (md_estimate_size_before_relax): Always use the first relaxation
1239 sequence on VxWorks.
1240 * config/tc-mips.h (VXWORKS_PIC): New.
1242 2006-03-21 Paul Brook <paul@codesourcery.com>
1244 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1246 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1248 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1249 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1250 (get_loop_align_size): New.
1251 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1252 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1253 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1254 (get_noop_aligned_address): Use get_loop_align_size.
1255 (get_aligned_diff): Likewise.
1257 2006-03-21 Paul Brook <paul@codesourcery.com>
1259 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1261 2006-03-20 Paul Brook <paul@codesourcery.com>
1263 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1264 (do_t_branch): Encode branches inside IT blocks as unconditional.
1265 (do_t_cps): New function.
1266 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1267 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1268 (opcode_lookup): Allow conditional suffixes on all instructions in
1270 (md_assemble): Advance condexec state before checking for errors.
1271 (insns): Use do_t_cps.
1273 2006-03-20 Paul Brook <paul@codesourcery.com>
1275 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1276 outputting the insn.
1278 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1280 * config/tc-vax.c: Update copyright year.
1281 * config/tc-vax.h: Likewise.
1283 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1285 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1287 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1289 2006-03-17 Paul Brook <paul@codesourcery.com>
1291 * config/tc-arm.c (insns): Add ldm and stm.
1293 2006-03-17 Ben Elliston <bje@au.ibm.com>
1296 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1298 2006-03-16 Paul Brook <paul@codesourcery.com>
1300 * config/tc-arm.c (insns): Add "svc".
1302 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1304 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1305 flag and avoid double underscore prefixes.
1307 2006-03-10 Paul Brook <paul@codesourcery.com>
1309 * config/tc-arm.c (md_begin): Handle EABIv5.
1310 (arm_eabis): Add EF_ARM_EABI_VER5.
1311 * doc/c-arm.texi: Document -meabi=5.
1313 2006-03-10 Ben Elliston <bje@au.ibm.com>
1315 * app.c (do_scrub_chars): Simplify string handling.
1317 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1318 Daniel Jacobowitz <dan@codesourcery.com>
1319 Zack Weinberg <zack@codesourcery.com>
1320 Nathan Sidwell <nathan@codesourcery.com>
1321 Paul Brook <paul@codesourcery.com>
1322 Ricardo Anguiano <anguiano@codesourcery.com>
1323 Phil Edwards <phil@codesourcery.com>
1325 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1326 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1328 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1329 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1330 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1332 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1334 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1335 even when using the text-section-literals option.
1337 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1339 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1341 (m68k_ip): <case 'J'> Check we have some control regs.
1342 (md_parse_option): Allow raw arch switch.
1343 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1344 whether 68881 or cfloat was meant by -mfloat.
1345 (md_show_usage): Adjust extension display.
1346 (m68k_elf_final_processing): Adjust.
1348 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1350 * config/tc-avr.c (avr_mod_hash_value): New function.
1351 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1352 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1353 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1354 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1356 (tc_gen_reloc): Handle substractions of symbols, if possible do
1357 fixups, abort otherwise.
1358 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1359 tc_fix_adjustable): Define.
1361 2006-03-02 James E Wilson <wilson@specifix.com>
1363 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1364 change the template, then clear md.slot[curr].end_of_insn_group.
1366 2006-02-28 Jan Beulich <jbeulich@novell.com>
1368 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1370 2006-02-28 Jan Beulich <jbeulich@novell.com>
1373 * macro.c (getstring): Don't treat parentheses special anymore.
1374 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1375 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1378 2006-02-28 Mat <mat@csail.mit.edu>
1380 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1382 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1384 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1386 (CFI_signal_frame): Define.
1387 (cfi_pseudo_table): Add .cfi_signal_frame.
1388 (dot_cfi): Handle CFI_signal_frame.
1389 (output_cie): Handle cie->signal_frame.
1390 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1391 different. Copy signal_frame from FDE to newly created CIE.
1392 * doc/as.texinfo: Document .cfi_signal_frame.
1394 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1396 * doc/Makefile.am: Add html target.
1397 * doc/Makefile.in: Regenerate.
1398 * po/Make-in: Add html target.
1400 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1402 * config/tc-i386.c (output_insn): Support Intel Merom New
1405 * config/tc-i386.h (CpuMNI): New.
1406 (CpuUnknownFlags): Add CpuMNI.
1408 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1410 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1411 (hpriv_reg_table): New table for hyperprivileged registers.
1412 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1415 2006-02-24 DJ Delorie <dj@redhat.com>
1417 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1418 (tc_gen_reloc): Don't define.
1419 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1420 (OPTION_LINKRELAX): New.
1421 (md_longopts): Add it.
1423 (md_parse_options): Set it.
1424 (md_assemble): Emit relaxation relocs as needed.
1425 (md_convert_frag): Emit relaxation relocs as needed.
1426 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1427 (m32c_apply_fix): New.
1428 (tc_gen_reloc): New.
1429 (m32c_force_relocation): Force out jump relocs when relaxing.
1430 (m32c_fix_adjustable): Return false if relaxing.
1432 2006-02-24 Paul Brook <paul@codesourcery.com>
1434 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1435 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1436 (struct asm_barrier_opt): Define.
1437 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1438 (parse_psr): Accept V7M psr names.
1439 (parse_barrier): New function.
1440 (enum operand_parse_code): Add OP_oBARRIER.
1441 (parse_operands): Implement OP_oBARRIER.
1442 (do_barrier): New function.
1443 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1444 (do_t_cpsi): Add V7M restrictions.
1445 (do_t_mrs, do_t_msr): Validate V7M variants.
1446 (md_assemble): Check for NULL variants.
1447 (v7m_psrs, barrier_opt_names): New tables.
1448 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1449 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1450 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1451 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1452 (struct cpu_arch_ver_table): Define.
1453 (cpu_arch_ver): New.
1454 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1455 Tag_CPU_arch_profile.
1456 * doc/c-arm.texi: Document new cpu and arch options.
1458 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1460 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1462 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1464 * config/tc-ia64.c: Update copyright years.
1466 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1468 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1471 2005-02-22 Paul Brook <paul@codesourcery.com>
1473 * config/tc-arm.c (do_pld): Remove incorrect write to
1475 (encode_thumb32_addr_mode): Use correct operand.
1477 2006-02-21 Paul Brook <paul@codesourcery.com>
1479 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1481 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1482 Anil Paranjape <anilp1@kpitcummins.com>
1483 Shilin Shakti <shilins@kpitcummins.com>
1485 * Makefile.am: Add xc16x related entry.
1486 * Makefile.in: Regenerate.
1487 * configure.in: Added xc16x related entry.
1488 * configure: Regenerate.
1489 * config/tc-xc16x.h: New file
1490 * config/tc-xc16x.c: New file
1491 * doc/c-xc16x.texi: New file for xc16x
1492 * doc/all.texi: Entry for xc16x
1493 * doc/Makefile.texi: Added c-xc16x.texi
1494 * NEWS: Announce the support for the new target.
1496 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1498 * configure.tgt: set emulation for mips-*-netbsd*
1500 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1502 * config.in: Rebuilt.
1504 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1506 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1507 from 1, not 0, in error messages.
1508 (md_assemble): Simplify special-case check for ENTRY instructions.
1509 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1510 operand in error message.
1512 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1514 * configure.tgt (arm-*-linux-gnueabi*): Change to
1517 2006-02-10 Nick Clifton <nickc@redhat.com>
1519 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1520 32-bit value is propagated into the upper bits of a 64-bit long.
1522 * config/tc-arc.c (init_opcode_tables): Fix cast.
1523 (arc_extoper, md_operand): Likewise.
1525 2006-02-09 David Heine <dlheine@tensilica.com>
1527 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1528 each relaxation step.
1530 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1532 * configure.in (CHECK_DECLS): Add vsnprintf.
1533 * configure: Regenerate.
1534 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1535 include/declare here, but...
1536 * as.h: Move code detecting VARARGS idiom to the top.
1537 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1538 (vsnprintf): Declare if not already declared.
1540 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1542 * as.c (close_output_file): New.
1543 (main): Register close_output_file with xatexit before
1544 dump_statistics. Don't call output_file_close.
1546 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1548 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1549 mcf5329_control_regs): New.
1550 (not_current_architecture, selected_arch, selected_cpu): New.
1551 (m68k_archs, m68k_extensions): New.
1552 (archs): Renamed to ...
1553 (m68k_cpus): ... here. Adjust.
1555 (md_pseudo_table): Add arch and cpu directives.
1556 (find_cf_chip, m68k_ip): Adjust table scanning.
1557 (no_68851, no_68881): Remove.
1558 (md_assemble): Lazily initialize.
1559 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1560 (md_init_after_args): Move functionality to m68k_init_arch.
1561 (mri_chip): Adjust table scanning.
1562 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1563 options with saner parsing.
1564 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1565 m68k_init_arch): New.
1566 (s_m68k_cpu, s_m68k_arch): New.
1567 (md_show_usage): Adjust.
1568 (m68k_elf_final_processing): Set CF EF flags.
1569 * config/tc-m68k.h (m68k_init_after_args): Remove.
1570 (tc_init_after_args): Remove.
1571 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1572 (M68k-Directives): Document .arch and .cpu directives.
1574 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1576 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1577 synonyms for equ and defl.
1578 (z80_cons_fix_new): New function.
1579 (emit_byte): Disallow relative jumps to absolute locations.
1580 (emit_data): Only handle defb, prototype changed, because defb is
1581 now handled as pseudo-op rather than an instruction.
1582 (instab): Entries for defb,defw,db,dw moved from here...
1583 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1584 Add entries for def24,def32,d24,d32.
1585 (md_assemble): Improved error handling.
1586 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1587 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1588 (z80_cons_fix_new): Declare.
1589 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1590 (def24,d24,def32,d32): New pseudo-ops.
1592 2006-02-02 Paul Brook <paul@codesourcery.com>
1594 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1596 2005-02-02 Paul Brook <paul@codesourcery.com>
1598 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1599 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1600 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1601 T2_OPCODE_RSB): Define.
1602 (thumb32_negate_data_op): New function.
1603 (md_apply_fix): Use it.
1605 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1607 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1609 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1610 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1612 (relaxation_requirements): Add pfinish_frag argument and use it to
1613 replace setting tinsn->record_fix fields.
1614 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1615 and vinsn_to_insnbuf. Remove references to record_fix and
1616 slot_sub_symbols fields.
1617 (xtensa_mark_narrow_branches): Delete unused code.
1618 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1620 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1622 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1623 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1624 of the record_fix field. Simplify error messages for unexpected
1626 (set_expr_symbol_offset_diff): Delete.
1628 2006-01-31 Paul Brook <paul@codesourcery.com>
1630 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1632 2006-01-31 Paul Brook <paul@codesourcery.com>
1633 Richard Earnshaw <rearnsha@arm.com>
1635 * config/tc-arm.c: Use arm_feature_set.
1636 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1637 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1638 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1641 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1642 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1643 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1644 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1646 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1647 (arm_opts): Move old cpu/arch options from here...
1648 (arm_legacy_opts): ... to here.
1649 (md_parse_option): Search arm_legacy_opts.
1650 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1651 (arm_float_abis, arm_eabis): Make const.
1653 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1655 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1657 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1659 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1660 in load immediate intruction.
1662 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1664 * config/bfin-parse.y (value_match): Use correct conversion
1665 specifications in template string for __FILE__ and __LINE__.
1669 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1671 Introduce TLS descriptors for i386 and x86_64.
1672 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1673 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1674 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1675 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1676 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1678 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1679 (lex_got): Handle @tlsdesc and @tlscall.
1680 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1682 2006-01-11 Nick Clifton <nickc@redhat.com>
1684 Fixes for building on 64-bit hosts:
1685 * config/tc-avr.c (mod_index): New union to allow conversion
1686 between pointers and integers.
1687 (md_begin, avr_ldi_expression): Use it.
1688 * config/tc-i370.c (md_assemble): Add cast for argument to print
1690 * config/tc-tic54x.c (subsym_substitute): Likewise.
1691 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1692 opindex field of fr_cgen structure into a pointer so that it can
1693 be stored in a frag.
1694 * config/tc-mn10300.c (md_assemble): Likewise.
1695 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1697 * config/tc-v850.c: Replace uses of (int) casts with correct
1700 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1703 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1705 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1708 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1709 a local-label reference.
1711 For older changes see ChangeLog-2005
1717 version-control: never
projects / external / binutils.git / blob