1 2013-09-04 Roland McGrath <mcgrathr@google.com>
4 * config/tc-arm.c (T16_32_TAB): Add _udf.
5 (do_t_udf): New function.
8 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
10 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
11 assembler errors at correct position.
13 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
16 * config/tc-ia64.c: Fix typos.
17 * config/tc-sparc.c: Likewise.
18 * config/tc-z80.c: Likewise.
19 * doc/c-i386.texi: Likewise.
20 * doc/c-m32r.texi: Likewise.
22 2013-08-23 Will Newton <will.newton@linaro.org>
24 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
25 for pre-indexed addressing modes.
27 2013-08-21 Alan Modra <amodra@gmail.com>
29 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
30 range check label number for use with fb_low_counter array.
32 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
34 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
35 (mips_parse_argument_token, validate_micromips_insn, md_begin)
36 (check_regno, match_float_constant, check_completed_insn, append_insn)
37 (match_insn, match_mips16_insn, match_insns, macro_start)
38 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
39 (mips16_ip, mips_set_option_string, md_parse_option)
40 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
41 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
42 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
43 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
44 Start error messages with a lower-case letter. Do not end error
45 messages with a period. Wrap long messages to 80 character-lines.
46 Use "cannot" instead of "can't" and "can not".
48 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
50 * config/tc-mips.c (imm_expr): Expand comment.
51 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
54 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
56 * config/tc-mips.c (imm2_expr): Delete.
57 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
59 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
61 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
62 (macro): Remove M_DEXT and M_DINS handling.
64 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
66 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
67 lax_max with lax_match.
68 (match_int_operand): Update accordingly. Don't report an error
69 for !lax_match-only cases.
70 (match_insn): Replace more_alts with lax_match and use it to
71 initialize the mips_arg_info field. Add a complete_p parameter.
72 Handle implicit VU0 suffixes here.
73 (match_invalid_for_isa, match_insns, match_mips16_insns): New
75 (mips_ip, mips16_ip): Use them.
77 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
79 * config/tc-mips.c (match_expression): Report uses of registers here.
80 Add a "must be an immediate expression" error. Handle elided offsets
82 (match_int_operand): ...here.
84 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
86 * config/tc-mips.c (mips_arg_info): Remove soft_match.
87 (match_out_of_range, match_not_constant): New functions.
88 (match_const_int): Remove fallback parameter and check for soft_match.
89 Use match_not_constant.
90 (match_mapped_int_operand, match_addiusp_operand)
91 (match_perf_reg_operand, match_save_restore_list_operand)
92 (match_mdmx_imm_reg_operand): Update accordingly. Use
93 match_out_of_range and set_insn_error* instead of as_bad.
94 (match_int_operand): Likewise. Use match_not_constant in the
95 !allows_nonconst case.
96 (match_float_constant): Report invalid float constants.
97 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
98 match_float_constant to check for invalid constants. Fail the
99 match if match_const_int or match_float_constant return false.
100 (mips_ip): Update accordingly.
101 (mips16_ip): Likewise. Undo null termination of instruction name
102 once lookup is complete.
104 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
106 * config/tc-mips.c (mips_insn_error_format): New enum.
107 (mips_insn_error): New struct.
108 (insn_error): Change to a mips_insn_error.
109 (clear_insn_error, set_insn_error_format, set_insn_error)
110 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
112 (mips_parse_argument_token, md_assemble, match_insn)
113 (match_mips16_insn): Use them instead of manipulating insn_error
115 (mips_ip, mips16_ip): Likewise. Simplify control flow.
117 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
119 * config/tc-mips.c (normalize_constant_expr): Move further up file.
120 (normalize_address_expr): Likewise.
121 (match_insn, match_mips16_insn): New functions, split out from...
122 (mips_ip, mips16_ip): ...here.
124 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
126 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
128 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
129 for optional operands.
131 2013-08-16 Alan Modra <amodra@gmail.com>
133 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
136 2013-08-16 Alan Modra <amodra@gmail.com>
138 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
140 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
142 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
143 argument as alignment.
145 2013-08-09 Nick Clifton <nickc@redhat.com>
147 * config/tc-rl78.c (elf_flags): New variable.
148 (enum options): Add OPTION_G10.
149 (md_longopts): Add mg10.
150 (md_parse_option): Parse -mg10.
151 (rl78_elf_final_processing): New function.
152 * config/tc-rl78.c (tc_final_processing): Define.
153 * doc/c-rl78.texi: Document -mg10 option.
155 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
157 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
158 suffixes to be elided too.
159 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
160 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
163 2013-08-05 John Tytgat <john@bass-software.com>
165 * po/POTFILES.in: Regenerate.
167 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
168 Konrad Eisele <konrad@gaisler.com>
170 * config/tc-sparc.c (sparc_arch_types): Add leon.
171 (sparc_arch): Move sparc4 around and add leon.
172 (sparc_target_format): Document -Aleon.
173 * doc/c-sparc.texi: Likewise.
175 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
177 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
179 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
180 Richard Sandiford <rdsandiford@googlemail.com>
182 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
183 (RWARN): Bump to 0x8000000.
184 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
185 (RTYPE_R5900_ACC): New register types.
186 (RTYPE_MASK): Include them.
187 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
189 (reg_names): Include them.
190 (mips_parse_register_1): New function, split out from...
191 (mips_parse_register): ...here. Add a channels_ptr parameter.
192 Look for VU0 channel suffixes when nonnull.
193 (reg_lookup): Update the call to mips_parse_register.
194 (mips_parse_vu0_channels): New function.
195 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
196 (mips_operand_token): Add a "channels" field to the union.
197 Extend the comment above "ch" to OT_DOUBLE_CHAR.
198 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
199 (mips_parse_argument_token): Handle channel suffixes here too.
200 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
201 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
203 (md_begin): Register $vfN and $vfI registers.
204 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
205 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
206 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
207 (match_vu0_suffix_operand): New function.
208 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
209 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
210 (mips_lookup_insn): New function.
211 (mips_ip): Use it. Allow "+K" operands to be elided at the end
212 of an instruction. Handle '#' sequences.
214 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
216 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
217 values and use it instead of sreg, treg, xreg, etc.
219 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
221 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
222 and mips_int_operand_max.
223 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
225 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
226 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
227 instead of mips16_immed_operand.
229 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
231 * config/tc-mips.c (mips16_macro): Don't use move_register.
232 (mips16_ip): Allow macros to use 'p'.
234 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
236 * config/tc-mips.c (MAX_OPERANDS): New macro.
237 (mips_operand_array): New structure.
238 (mips_operands, mips16_operands, micromips_operands): New arrays.
239 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
240 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
241 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
242 (micromips_to_32_reg_q_map): Delete.
243 (insn_operands, insn_opno, insn_extract_operand): New functions.
244 (validate_mips_insn): Take a mips_operand_array as argument and
245 use it to build up a list of operands. Extend to handle INSN_MACRO
247 (validate_mips16_insn): New function.
248 (validate_micromips_insn): Take a mips_operand_array as argument.
250 (md_begin): Initialize mips_operands, mips16_operands and
251 micromips_operands. Call validate_mips_insn and
252 validate_micromips_insn for macro instructions too.
253 Call validate_mips16_insn for MIPS16 instructions.
254 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
256 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
257 them. Handle INSN_UDI.
258 (get_append_method): Use gpr_read_mask.
260 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
262 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
263 flags for MIPS16 and non-MIPS16 instructions.
264 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
265 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
266 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
267 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
268 and non-MIPS16 instructions. Fix formatting.
270 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
272 * config/tc-mips.c (reg_needs_delay): Move later in file.
274 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
276 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
277 Alexander Ivchenko <alexander.ivchenko@intel.com>
278 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
279 Sergey Lega <sergey.s.lega@intel.com>
280 Anna Tikhonova <anna.tikhonova@intel.com>
281 Ilya Tocar <ilya.tocar@intel.com>
282 Andrey Turetskiy <andrey.turetskiy@intel.com>
283 Ilya Verbin <ilya.verbin@intel.com>
284 Kirill Yukhin <kirill.yukhin@intel.com>
285 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
287 * config/tc-i386-intel.c (O_zmmword_ptr): New.
288 (i386_types): Add zmmword.
289 (i386_intel_simplify_register): Allow regzmm.
290 (i386_intel_simplify): Handle zmmwords.
291 (i386_intel_operand): Handle RC/SAE, vector operations and
293 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
294 (struct RC_Operation): New.
295 (struct Mask_Operation): New.
296 (struct Broadcast_Operation): New.
297 (vex_prefix): Size of bytes increased to 4 to support EVEX
299 (enum i386_error): Add new error codes: unsupported_broadcast,
300 broadcast_not_on_src_operand, broadcast_needed,
301 unsupported_masking, mask_not_on_destination, no_default_mask,
302 unsupported_rc_sae, rc_sae_operand_not_last_imm,
303 invalid_register_operand, try_vector_disp8.
304 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
305 rounding, broadcast, memshift.
306 (struct RC_name): New.
307 (RC_NamesTable): New.
310 (extra_symbol_chars): Add '{'.
311 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
312 (i386_operand_type): Add regzmm, regmask and vec_disp8.
313 (match_mem_size): Handle zmmwords.
314 (operand_type_match): Handle zmm-registers.
315 (mode_from_disp_size): Handle vec_disp8.
316 (fits_in_vec_disp8): New.
317 (md_begin): Handle {} properly.
318 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
319 (build_vex_prefix): Handle vrex.
320 (build_evex_prefix): New.
321 (process_immext): Adjust to properly handle EVEX.
322 (md_assemble): Add EVEX encoding support.
323 (swap_2_operands): Correctly handle operands with masking,
324 broadcasting or RC/SAE.
325 (check_VecOperands): Support EVEX features.
326 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
327 (match_template): Support regzmm and handle new error codes.
328 (process_suffix): Handle zmmwords and zmm-registers.
329 (check_byte_reg): Extend to zmm-registers.
330 (process_operands): Extend to zmm-registers.
331 (build_modrm_byte): Handle EVEX.
332 (output_insn): Adjust to properly handle EVEX case.
333 (disp_size): Handle vec_disp8.
334 (output_disp): Support compressed disp8*N evex feature.
335 (output_imm): Handle RC/SAE immediates properly.
336 (check_VecOperations): New.
337 (i386_immediate): Handle EVEX features.
338 (i386_index_check): Handle zmmwords and zmm-registers.
339 (RC_SAE_immediate): New.
340 (i386_att_operand): Handle EVEX features.
341 (parse_real_register): Add a check for ZMM/Mask registers.
342 (OPTION_MEVEXLIG): New.
343 (OPTION_MEVEXWIG): New.
344 (md_longopts): Add mevexlig and mevexwig.
345 (md_parse_option): Handle mevexlig and mevexwig options.
346 (md_show_usage): Add description for mevexlig and mevexwig.
347 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
348 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
350 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
352 * config/tc-i386.c (cpu_arch): Add .sha.
353 * doc/c-i386.texi: Document sha/.sha.
355 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
356 Kirill Yukhin <kirill.yukhin@intel.com>
357 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
359 * config/tc-i386.c (BND_PREFIX): New.
360 (struct _i386_insn): Add new field bnd_prefix.
361 (add_bnd_prefix): New.
363 (i386_operand_type): Add regbnd.
364 (md_assemble): Handle BND prefixes.
365 (parse_insn): Likewise.
366 (output_branch): Likewise.
367 (output_jump): Likewise.
368 (build_modrm_byte): Handle regbnd.
369 (OPTION_MADD_BND_PREFIX): New.
370 (md_longopts): Add entry for 'madd-bnd-prefix'.
371 (md_parse_option): Handle madd-bnd-prefix option.
372 (md_show_usage): Add description for madd-bnd-prefix
374 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
376 2013-07-24 Tristan Gingold <gingold@adacore.com>
378 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
381 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
383 * config/tc-s390.c (s390_machine): Don't force the .machine
384 argument to lower case.
386 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
388 * config/tc-arm.c (s_arm_arch_extension): Improve error message
389 for invalid extension.
391 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
393 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
394 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
395 (aarch64_abi): New variable.
396 (ilp32_p): Change to be a macro.
397 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
398 (struct aarch64_option_abi_value_table): New struct.
399 (aarch64_abis): New table.
400 (aarch64_parse_abi): New function.
401 (aarch64_long_opts): Add entry for -mabi=.
402 * doc/as.texinfo (Target AArch64 options): Document -mabi.
403 * doc/c-aarch64.texi: Likewise.
405 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
407 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
410 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
412 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
414 * config/rx-parse.y: (rx_check_float_support): Add function to
415 check floating point operation support for target RX100 and
417 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
418 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
419 RX200, RX600, and RX610
421 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
423 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
425 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
427 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
428 * doc/c-avr.texi: Likewise.
430 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
432 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
433 error with older GCCs.
434 (mips16_macro_build): Dereference args.
436 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
438 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
439 New functions, split out from...
440 (reg_lookup): ...here. Remove itbl support.
441 (reglist_lookup): Delete.
442 (mips_operand_token_type): New enum.
443 (mips_operand_token): New structure.
444 (mips_operand_tokens): New variable.
445 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
446 (mips_parse_arguments): New functions.
447 (md_begin): Initialize mips_operand_tokens.
448 (mips_arg_info): Add a token field. Remove optional_reg field.
449 (match_char, match_expression): New functions.
450 (match_const_int): Use match_expression. Remove "s" argument
451 and return a boolean result. Remove O_register handling.
452 (match_regno, match_reg, match_reg_range): New functions.
453 (match_int_operand, match_mapped_int_operand, match_msb_operand)
454 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
455 (match_addiusp_operand, match_clo_clz_dest_operand)
456 (match_lwm_swm_list_operand, match_entry_exit_operand)
457 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
458 (match_tied_reg_operand): Remove "s" argument and return a boolean
459 result. Match tokens rather than text. Update calls to
460 match_const_int. Rely on match_regno to call check_regno.
461 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
462 "arg" argument. Return a boolean result.
463 (parse_float_constant): Replace with...
464 (match_float_constant): ...this new function.
465 (match_operand): Remove "s" argument and return a boolean result.
466 Update calls to subfunctions.
467 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
468 rather than string-parsing routines. Update handling of optional
469 registers for token scheme.
471 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
473 * config/tc-mips.c (parse_float_constant): Split out from...
476 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
478 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
481 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
483 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
484 (match_entry_exit_operand): New function.
485 (match_save_restore_list_operand): Likewise.
486 (match_operand): Use them.
487 (check_absolute_expr): Delete.
488 (mips16_ip): Rewrite main parsing loop to use mips_operands.
490 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
492 * config/tc-mips.c: Enable functions commented out in previous patch.
493 (SKIP_SPACE_TABS): Move further up file.
494 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
495 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
496 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
497 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
498 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
499 (micromips_imm_b_map, micromips_imm_c_map): Delete.
500 (mips_lookup_reg_pair): Delete.
501 (macro): Use report_bad_range and report_bad_field.
502 (mips_immed, expr_const_in_range): Delete.
503 (mips_ip): Rewrite main parsing loop to use new functions.
505 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
507 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
508 Change return type to bfd_boolean.
509 (report_bad_range, report_bad_field): New functions.
510 (mips_arg_info): New structure.
511 (match_const_int, convert_reg_type, check_regno, match_int_operand)
512 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
513 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
514 (match_addiusp_operand, match_clo_clz_dest_operand)
515 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
516 (match_pc_operand, match_tied_reg_operand, match_operand)
517 (check_completed_insn): New functions, commented out for now.
519 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
521 * config/tc-mips.c (insn_insert_operand): New function.
522 (macro_build, mips16_macro_build): Put null character check
523 in the for loop and convert continues to breaks. Use operand
524 structures to handle constant operands.
526 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
528 * config/tc-mips.c (validate_mips_insn): Move further up file.
529 Add insn_bits and decode_operand arguments. Use the mips_operand
530 fields to work out which bits an operand occupies. Detect double
532 (validate_micromips_insn): Move further up file. Call into
535 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
537 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
539 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
541 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
543 (macro): Update accordingly.
545 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
547 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
549 (md_assemble): Remove imm_reloc handling.
550 (mips_ip): Update commentary. Use offset_expr and offset_reloc
551 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
552 Use a temporary array rather than imm_reloc when parsing
553 constant expressions. Remove imm_reloc initialization.
554 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
555 for the relaxable field. Use a relax_char variable to track the
556 type of this field. Remove imm_reloc initialization.
558 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
560 * config/tc-mips.c (mips16_ip): Handle "I".
562 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
564 * config/tc-mips.c (mips_flag_nan2008): New variable.
565 (options): Add OPTION_NAN enum value.
566 (md_longopts): Handle it.
567 (md_parse_option): Likewise.
568 (s_nan): New function.
569 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
570 (md_show_usage): Add -mnan.
572 * doc/as.texinfo (Overview): Add -mnan.
573 * doc/c-mips.texi (MIPS Opts): Document -mnan.
574 (MIPS NaN Encodings): New node. Document .nan directive.
575 (MIPS-Dependent): List the new node.
577 2013-07-09 Tristan Gingold <gingold@adacore.com>
579 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
581 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
583 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
584 for 'A' and assume that the constant has been elided if the result
587 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
589 * config/tc-mips.c (gprel16_reloc_p): New function.
590 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
592 (offset_high_part, small_offset_p): New functions.
593 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
594 register load and store macros, handle the 16-bit offset case first.
595 If a 16-bit offset is not suitable for the instruction we're
596 generating, load it into the temporary register using
597 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
598 M_L_DAB code once the address has been constructed. For double load
599 and store macros, again handle the 16-bit offset case first.
600 If the second register cannot be accessed from the same high
601 part as the first, load it into AT using ADDRESS_ADDI_INSN.
602 Fix the handling of LD in cases where the first register is the
603 same as the base. Also handle the case where the offset is
604 not 16 bits and the second register cannot be accessed from the
605 same high part as the first. For unaligned loads and stores,
606 fuse the offbits == 12 and old "ab" handling. Apply this handling
607 whenever the second offset needs a different high part from the first.
608 Construct the offset using ADDRESS_ADDI_INSN where possible,
609 for offbits == 16 as well as offbits == 12. Use offset_reloc
610 when constructing the individual loads and stores.
611 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
612 and offset_reloc before matching against a particular opcode.
613 Handle elided 'A' constants. Allow 'A' constants to use
614 relocation operators.
616 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
618 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
619 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
620 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
622 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
624 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
625 Require the msb to be <= 31 for "+s". Check that the size is <= 31
626 for both "+s" and "+S".
628 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
630 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
631 (mips_ip, mips16_ip): Handle "+i".
633 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
635 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
636 (micromips_to_32_reg_h_map): Rename to...
637 (micromips_to_32_reg_h_map1): ...this.
638 (micromips_to_32_reg_i_map): Rename to...
639 (micromips_to_32_reg_h_map2): ...this.
640 (mips_lookup_reg_pair): New function.
641 (gpr_write_mask, macro): Adjust after above renaming.
642 (validate_micromips_insn): Remove "mi" handling.
643 (mips_ip): Likewise. Parse both registers in a pair for "mh".
645 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
647 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
648 (mips_ip): Remove "+D" and "+T" handling.
650 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
652 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
655 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
657 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
659 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
661 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
662 (aarch64_force_relocation): Likewise.
664 2013-07-02 Alan Modra <amodra@gmail.com>
666 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
668 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
670 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
671 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
672 Replace @sc{mips16} with literal `MIPS16'.
673 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
675 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
677 * config/tc-aarch64.c (reloc_table): Replace
678 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
679 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
680 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
681 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
682 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
683 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
684 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
685 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
686 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
687 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
688 (aarch64_force_relocation): Likewise.
690 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
692 * config/tc-aarch64.c (ilp32_p): New static variable.
693 (elf64_aarch64_target_format): Return the target according to the
695 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
696 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
697 (aarch64_dwarf2_addr_size): New function.
698 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
699 (DWARF2_ADDR_SIZE): New define.
701 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
703 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
705 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
707 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
709 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
711 * config/tc-mips.c (mips_set_options): Add insn32 member.
712 (mips_opts): Initialize it.
713 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
714 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
715 (md_longopts): Add "minsn32" and "mno-insn32" options.
716 (is_size_valid): Handle insn32 mode.
717 (md_assemble): Pass instruction string down to macro.
718 (brk_fmt): Add second dimension and insn32 mode initializers.
719 (mfhl_fmt): Likewise.
720 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
721 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
722 (macro_build_jalr, move_register): Handle insn32 mode.
723 (macro_build_branch_rs): Likewise.
724 (macro): Handle insn32 mode.
725 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
726 (mips_ip): Handle insn32 mode.
727 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
728 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
729 (mips_handle_align): Handle insn32 mode.
730 (md_show_usage): Add -minsn32 and -mno-insn32.
732 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
734 (-minsn32, -mno-insn32): New options.
735 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
737 (MIPS assembly options): New node. Document .set insn32 and
739 (MIPS-Dependent): List the new node.
741 2013-06-25 Nick Clifton <nickc@redhat.com>
743 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
744 the PC in indirect addressing on 430xv2 parts.
745 (msp430_operands): Add version test to hardware bug encoding
748 2013-06-24 Roland McGrath <mcgrathr@google.com>
750 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
751 so it skips whitespace before it.
752 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
754 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
755 (arm_reg_parse_multi): Skip whitespace first.
756 (parse_reg_list): Likewise.
757 (parse_vfp_reg_list): Likewise.
758 (s_arm_unwind_save_mmxwcg): Likewise.
760 2013-06-24 Nick Clifton <nickc@redhat.com>
763 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
765 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
767 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
769 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
771 * config/tc-mips.c: Assert that offsetT and valueT are at least
773 (GPR_SMIN, GPR_SMAX): New macros.
774 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
776 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
778 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
779 conditions. Remove any code deselected by them.
780 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
782 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
784 * NEWS: Note removal of ECOFF support.
785 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
786 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
787 (MULTI_CFILES): Remove config/e-mipsecoff.c.
788 * Makefile.in: Regenerate.
789 * configure.in: Remove MIPS ECOFF references.
790 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
792 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
793 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
794 (mips-*-*): ...this single case.
795 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
796 MIPS emulations to be e-mipself*.
797 * configure: Regenerate.
798 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
799 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
800 (mips-*-sysv*): Remove coff and ecoff cases.
801 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
802 * ecoff.c: Remove reference to MIPS ECOFF.
803 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
804 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
805 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
806 (mips_hi_fixup): Tweak comment.
807 (append_insn): Require a howto.
808 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
810 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
812 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
813 Use "CPU" instead of "cpu".
814 * doc/c-mips.texi: Likewise.
815 (MIPS Opts): Rename to MIPS Options.
816 (MIPS option stack): Rename to MIPS Option Stack.
817 (MIPS ASE instruction generation overrides): Rename to
818 MIPS ASE Instruction Generation Overrides (for now).
819 (MIPS floating-point): Rename to MIPS Floating-Point.
821 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
823 * doc/c-mips.texi (MIPS Macros): New section.
824 (MIPS Object): Replace with...
825 (MIPS Small Data): ...this new section.
827 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
829 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
830 Capitalize name. Use @kindex instead of @cindex for .set entries.
832 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
834 * doc/c-mips.texi (MIPS Stabs): Remove section.
836 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
838 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
839 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
840 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
841 (ISA_SUPPORTS_VIRT64_ASE): Delete.
842 (mips_ase): New structure.
843 (mips_ases): New table.
844 (FP64_ASES): New macro.
845 (mips_ase_groups): New array.
846 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
847 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
849 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
850 (md_parse_option): Use mips_ases and mips_set_ase instead of
851 separate case statements for each ASE option.
852 (mips_after_parse_args): Use FP64_ASES. Use
853 mips_check_isa_supports_ases to check the ASEs against
855 (s_mipsset): Use mips_ases and mips_set_ase instead of
856 separate if statements for each ASE option. Use
857 mips_check_isa_supports_ases, even when a non-ASE option
860 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
862 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
864 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
866 * config/tc-mips.c (md_shortopts, options, md_longopts)
867 (md_longopts_size): Move earlier in file.
869 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
871 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
872 with a single "ase" bitmask.
873 (mips_opts): Update accordingly.
874 (file_ase, file_ase_explicit): New variables.
875 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
876 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
877 (ISA_HAS_ROR): Adjust for mips_set_options change.
878 (is_opcode_valid): Take the base ase mask directly from mips_opts.
879 (mips_ip): Adjust for mips_set_options change.
880 (md_parse_option): Likewise. Update file_ase_explicit.
881 (mips_after_parse_args): Adjust for mips_set_options change.
882 Use bitmask operations to select the default ASEs. Set file_ase
883 rather than individual per-ASE variables.
884 (s_mipsset): Adjust for mips_set_options change.
885 (mips_elf_final_processing): Test file_ase rather than
886 file_ase_mdmx. Remove commented-out code.
888 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
890 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
891 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
892 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
893 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
894 (mips_after_parse_args): Use the new "ase" field to choose
896 (mips_cpu_info_table): Move ASEs from the "flags" field to the
899 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
901 * config/tc-arm.c (symbol_preemptible): New function.
902 (relax_branch): Use it.
904 2013-06-17 Catherine Moore <clm@codesourcery.com>
905 Maciej W. Rozycki <macro@codesourcery.com>
906 Chao-Ying Fu <fu@mips.com>
908 * config/tc-mips.c (mips_set_options): Add ase_eva.
909 (mips_set_options mips_opts): Add ase_eva.
910 (file_ase_eva): Declare.
911 (ISA_SUPPORTS_EVA_ASE): Define.
912 (IS_SEXT_9BIT_NUM): Define.
913 (MIPS_CPU_ASE_EVA): Define.
914 (is_opcode_valid): Add support for ase_eva.
915 (macro_build): Likewise.
917 (validate_mips_insn): Likewise.
918 (validate_micromips_insn): Likewise.
920 (options): Add OPTION_EVA and OPTION_NO_EVA.
921 (md_longopts): Add -meva and -mno-eva.
922 (md_parse_option): Process new options.
923 (mips_after_parse_args): Check for valid EVA combinations.
924 (s_mipsset): Likewise.
926 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
928 * dwarf2dbg.h (dwarf2_move_insn): Declare.
929 * dwarf2dbg.c (line_subseg): Add pmove_tail.
930 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
931 (dwarf2_gen_line_info_1): Update call accordingly.
932 (dwarf2_move_insn): New function.
933 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
935 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
939 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
942 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
943 (dwarf2_gen_line_info_1): Delete.
944 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
945 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
946 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
947 (dwarf2_directive_loc): Push previous .locs instead of generating
950 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
952 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
953 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
955 2013-06-13 Nick Clifton <nickc@redhat.com>
958 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
959 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
960 function. Generates an error if the adjusted offset is out of a
963 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
965 * config/tc-nios2.c (md_apply_fix): Mask constant
966 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
968 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
970 * config/tc-mips.c (append_insn): Don't do branch relaxation for
971 MIPS-3D instructions either.
972 (md_convert_frag): Update the COPx branch mask accordingly.
974 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
976 * doc/as.texinfo (Overview): Add --relax-branch and
978 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
981 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
983 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
986 2013-06-08 Catherine Moore <clm@codesourcery.com>
988 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
989 (is_opcode_valid_16): Pass ase value to opcode_is_member.
990 (append_insn): Change INSN_xxxx to ASE_xxxx.
992 2013-06-01 George Thomas <george.thomas@atmel.com>
994 * gas/config/tc-avr.c: Change ISA for devices with USB support to
997 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
999 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1002 2013-05-31 Paul Brook <paul@codesourcery.com>
1004 * config/tc-mips.c (s_ehword): New.
1006 2013-05-30 Paul Brook <paul@codesourcery.com>
1008 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1010 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1012 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1013 convert relocs who have no relocatable field either. Rephrase
1014 the conditional so that the PC-relative check is only applied
1017 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1019 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1022 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1024 * config/tc-aarch64.c (reloc_table): Update to use
1025 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1026 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1027 (md_apply_fix): Likewise.
1028 (aarch64_force_relocation): Likewise.
1030 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1032 * config/tc-arm.c (it_fsm_post_encode): Improve
1033 warning messages about deprecated IT block formats.
1035 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1037 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1038 inside fx_done condition.
1040 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1042 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1044 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1046 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1047 and clean up warning when using PRINT_OPCODE_TABLE.
1049 2013-05-20 Alan Modra <amodra@gmail.com>
1051 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1052 and data fixups performing shift/high adjust/sign extension on
1053 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1054 when writing data fixups rather than recalculating size.
1056 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1058 * doc/c-msp430.texi: Fix typo.
1060 2013-05-16 Tristan Gingold <gingold@adacore.com>
1062 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1063 are also TOC symbols.
1065 2013-05-16 Nick Clifton <nickc@redhat.com>
1067 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1068 Add -mcpu command to specify core type.
1069 * doc/c-msp430.texi: Update documentation.
1071 2013-05-09 Andrew Pinski <apinski@cavium.com>
1073 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1074 (mips_opts): Update for the new field.
1075 (file_ase_virt): New variable.
1076 (ISA_SUPPORTS_VIRT_ASE): New macro.
1077 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1078 (MIPS_CPU_ASE_VIRT): New define.
1079 (is_opcode_valid): Handle ase_virt.
1080 (macro_build): Handle "+J".
1081 (validate_mips_insn): Likewise.
1082 (mips_ip): Likewise.
1083 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1084 (md_longopts): Add mvirt and mnovirt
1085 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1086 (mips_after_parse_args): Handle ase_virt field.
1087 (s_mipsset): Handle "virt" and "novirt".
1088 (mips_elf_final_processing): Add a comment about virt ASE might need
1090 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1091 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1092 Document ".set virt" and ".set novirt".
1094 2013-05-09 Alan Modra <amodra@gmail.com>
1096 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1097 control of operand flag bits.
1099 2013-05-07 Alan Modra <amodra@gmail.com>
1101 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1102 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1103 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1104 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1105 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1106 Shift and sign-extend fieldval for use by some VLE reloc
1107 operand->insert functions.
1109 2013-05-06 Paul Brook <paul@codesourcery.com>
1110 Catherine Moore <clm@codesourcery.com>
1112 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1113 (limited_pcrel_reloc_p): Likewise.
1114 (md_apply_fix): Likewise.
1115 (tc_gen_reloc): Likewise.
1117 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1119 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1120 (mips_fix_adjustable): Adjust pc-relative check to use
1123 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1125 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1126 (s_mips_stab): Do not restrict to stabn only.
1128 2013-05-02 Nick Clifton <nickc@redhat.com>
1130 * config/tc-msp430.c: Add support for the MSP430X architecture.
1131 Add code to insert a NOP instruction after any instruction that
1132 might change the interrupt state.
1133 Add support for the LARGE memory model.
1134 Add code to initialise the .MSP430.attributes section.
1135 * config/tc-msp430.h: Add support for the MSP430X architecture.
1136 * doc/c-msp430.texi: Document the new -mL and -mN command line
1138 * NEWS: Mention support for the MSP430X architecture.
1140 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1142 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1143 alpha*-*-linux*ecoff*.
1145 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1147 * config/tc-mips.c (mips_ip): Add sizelo.
1148 For "+C", "+G", and "+H", set sizelo and compare against it.
1150 2013-04-29 Nick Clifton <nickc@redhat.com>
1152 * as.c (Options): Add -gdwarf-sections.
1153 (parse_args): Likewise.
1154 * as.h (flag_dwarf_sections): Declare.
1155 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1156 (process_entries): When -gdwarf-sections is enabled generate
1157 fragmentary .debug_line sections.
1158 (out_debug_line): Set the section for the .debug_line section end
1160 * doc/as.texinfo: Document -gdwarf-sections.
1161 * NEWS: Mention -gdwarf-sections.
1163 2013-04-26 Christian Groessler <chris@groessler.org>
1165 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1166 according to the target parameter. Don't call s_segm since s_segm
1167 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1169 (md_begin): Call s_segm according to target parameter from command
1172 2013-04-25 Alan Modra <amodra@gmail.com>
1174 * configure.in: Allow little-endian linux.
1175 * configure: Regenerate.
1177 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1179 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1180 "fstatus" control register to "eccinj".
1182 2013-04-19 Kai Tietz <ktietz@redhat.com>
1184 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1186 2013-04-15 Julian Brown <julian@codesourcery.com>
1188 * expr.c (add_to_result, subtract_from_result): Make global.
1189 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1190 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1191 subtract_from_result to handle extra bit of precision for .sleb128
1194 2013-04-10 Julian Brown <julian@codesourcery.com>
1196 * read.c (convert_to_bignum): Add sign parameter. Use it
1197 instead of X_unsigned to determine sign of resulting bignum.
1198 (emit_expr): Pass extra argument to convert_to_bignum.
1199 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1200 X_extrabit to convert_to_bignum.
1201 (parse_bitfield_cons): Set X_extrabit.
1202 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1203 Initialise X_extrabit field as appropriate.
1204 (add_to_result): New.
1205 (subtract_from_result): New.
1207 * expr.h (expressionS): Add X_extrabit field.
1209 2013-04-10 Jan Beulich <jbeulich@suse.com>
1211 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1212 register being PC when is_t or writeback, and use distinct
1213 diagnostic for the latter case.
1215 2013-04-10 Jan Beulich <jbeulich@suse.com>
1217 * gas/config/tc-arm.c (parse_operands): Re-write
1218 po_barrier_or_imm().
1219 (do_barrier): Remove bogus constraint().
1220 (do_t_barrier): Remove.
1222 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1224 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1225 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1227 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1229 2013-04-09 Jan Beulich <jbeulich@suse.com>
1231 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1232 Use local variable Rt in more places.
1233 (do_vmsr): Accept all control registers.
1235 2013-04-09 Jan Beulich <jbeulich@suse.com>
1237 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1238 if there was none specified for moves between scalar and core
1241 2013-04-09 Jan Beulich <jbeulich@suse.com>
1243 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1244 NEON_ALL_LANES case.
1246 2013-04-08 Jan Beulich <jbeulich@suse.com>
1248 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1251 2013-04-08 Jan Beulich <jbeulich@suse.com>
1253 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1256 2013-04-03 Alan Modra <amodra@gmail.com>
1258 * doc/as.texinfo: Add support to generate man options for h8300.
1259 * doc/c-h8300.texi: Likewise.
1261 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1263 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1266 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1269 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1271 2013-03-26 Nick Clifton <nickc@redhat.com>
1274 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1275 start of the file each time.
1278 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1281 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1283 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1286 2013-03-21 Will Newton <will.newton@linaro.org>
1288 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1289 pc-relative str instructions in Thumb mode.
1291 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1293 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1294 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1296 * config/tc-h8300.h: Remove duplicated defines.
1298 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1301 * tc-avr.c (mcu_has_3_byte_pc): New function.
1302 (tc_cfi_frame_initial_instructions): Call it to find return
1305 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1308 * config/tc-tic6x.c (tic6x_try_encode): Handle
1309 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1310 encode register pair numbers when required.
1312 2013-03-15 Will Newton <will.newton@linaro.org>
1314 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1315 in vstr in Thumb mode for pre-ARMv7 cores.
1317 2013-03-14 Andreas Schwab <schwab@suse.de>
1319 * doc/c-arc.texi (ARC Directives): Revert last change and use
1320 @itemize instead of @table.
1321 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1323 2013-03-14 Nick Clifton <nickc@redhat.com>
1326 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1327 NULL message, instead just check ARM_CPU_IS_ANY directly.
1329 2013-03-14 Nick Clifton <nickc@redhat.com>
1332 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1334 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1335 to the @item directives.
1336 (ARM-Neon-Alignment): Move to correct place in the document.
1337 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1339 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1342 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1344 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1345 case. Add default BAD_CASE to switch.
1347 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1349 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1350 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1352 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1354 * config/tc-arm.c (crc_ext_armv8): New feature set.
1355 (UNPRED_REG): New macro.
1356 (do_crc32_1): New function.
1357 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1358 do_crc32ch, do_crc32cw): Likewise.
1360 (insns): Add entries for crc32 mnemonics.
1361 (arm_extensions): Add entry for crc.
1363 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1365 * write.h (struct fix): Add fx_dot_frag field.
1366 (dot_frag): Declare.
1367 * write.c (dot_frag): New variable.
1368 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1369 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1370 * expr.c (expr): Save value of frag_now in dot_frag when setting
1372 * read.c (emit_expr): Likewise. Delete comments.
1374 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1376 * config/tc-i386.c (flag_code_names): Removed.
1377 (i386_index_check): Rewrote.
1379 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1381 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1383 (aarch64_double_precision_fmovable): New function.
1384 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1385 function; handle hexadecimal representation of IEEE754 encoding.
1386 (parse_operands): Update the call to parse_aarch64_imm_float.
1388 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1390 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1391 (check_hle): Updated.
1392 (md_assemble): Likewise.
1393 (parse_insn): Likewise.
1395 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1397 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1398 (md_assemble): Check if REP prefix is OK.
1399 (parse_insn): Remove expecting_string_instruction. Set
1402 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1404 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1406 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1408 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1409 for system registers.
1411 2013-02-27 DJ Delorie <dj@redhat.com>
1413 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1414 (rl78_op): Handle %code().
1415 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1416 (tc_gen_reloc): Likwise; convert to a computed reloc.
1417 (md_apply_fix): Likewise.
1419 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1421 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1423 2013-02-25 Terry Guo <terry.guo@arm.com>
1425 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1426 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1427 list of accepted CPUs.
1429 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1432 * config/tc-i386.c (cpu_arch): Add ".smap".
1434 * doc/c-i386.texi: Document smap.
1436 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1438 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1439 mips_assembling_insn appropriately.
1440 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1442 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1444 * config/tc-mips.c (append_insn): Correct indentation, remove
1447 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1449 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1451 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1453 * configure.tgt: Add nios2-*-rtems*.
1455 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1457 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1460 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1462 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1463 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1465 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1467 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1470 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1471 Andrew Jenner <andrew@codesourcery.com>
1473 Based on patches from Altera Corporation.
1475 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1476 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1477 * Makefile.in: Regenerated.
1478 * configure.tgt: Add case for nios2*-linux*.
1479 * config/obj-elf.c: Conditionally include elf/nios2.h.
1480 * config/tc-nios2.c: New file.
1481 * config/tc-nios2.h: New file.
1482 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1483 * doc/Makefile.in: Regenerated.
1484 * doc/all.texi: Set NIOSII.
1485 * doc/as.texinfo (Overview): Add Nios II options.
1486 (Machine Dependencies): Include c-nios2.texi.
1487 * doc/c-nios2.texi: New file.
1488 * NEWS: Note Altera Nios II support.
1490 2013-02-06 Alan Modra <amodra@gmail.com>
1493 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1494 Don't skip fixups with fx_subsy non-NULL.
1495 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1496 with fx_subsy non-NULL.
1498 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1500 * doc/c-metag.texi: Add "@c man" markers.
1502 2013-02-04 Alan Modra <amodra@gmail.com>
1504 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1506 (TC_ADJUST_RELOC_COUNT): Delete.
1507 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1509 2013-02-04 Alan Modra <amodra@gmail.com>
1511 * po/POTFILES.in: Regenerate.
1513 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1515 * config/tc-metag.c: Make SWAP instruction less permissive with
1518 2013-01-29 DJ Delorie <dj@redhat.com>
1520 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1521 relocs in .word/.etc statements.
1523 2013-01-29 Roland McGrath <mcgrathr@google.com>
1525 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1526 immediate value for 8-bit offset" error so it shows line info.
1528 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1530 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1533 2013-01-24 Nick Clifton <nickc@redhat.com>
1535 * config/tc-v850.c: Add support for e3v5 architecture.
1536 * doc/c-v850.texi: Mention new support.
1538 2013-01-23 Nick Clifton <nickc@redhat.com>
1541 * config/tc-avr.c: Include dwarf2dbg.h.
1543 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1545 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1546 (tc_i386_fix_adjustable): Likewise.
1547 (lex_got): Likewise.
1548 (tc_gen_reloc): Likewise.
1550 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1552 * config/tc-aarch64.c (output_operand_error_record): Change to output
1553 the out-of-range error message as value-expected message if there is
1554 only one single value in the expected range.
1555 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1556 LSL #0 as a programmer-friendly feature.
1558 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1560 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1561 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1562 BFD_RELOC_64_SIZE relocations.
1563 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1565 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1566 relocations against local symbols.
1568 2013-01-16 Alan Modra <amodra@gmail.com>
1570 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1571 finding some sort of toc syntax error, and break to avoid
1572 compiler uninit warning.
1574 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1577 * config/tc-i386.c (lex_got): Increment length by 1 if the
1578 relocation token is removed.
1580 2013-01-15 Nick Clifton <nickc@redhat.com>
1582 * config/tc-v850.c (md_assemble): Allow signed values for
1585 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1587 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1590 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1592 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1593 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1594 * config/tc-ppc.c (md_show_usage): Likewise.
1595 (ppc_handle_align): Handle power8's group ending nop.
1597 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1599 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1600 that the assember exits after the opcodes have been printed.
1602 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1604 * app.c: Remove trailing white spaces.
1608 * dw2gencfi.c: Likewise.
1609 * dwarf2dbg.h: Likewise.
1610 * ecoff.c: Likewise.
1611 * input-file.c: Likewise.
1612 * itbl-lex.h: Likewise.
1613 * output-file.c: Likewise.
1616 * subsegs.c: Likewise.
1617 * symbols.c: Likewise.
1618 * write.c: Likewise.
1619 * config/tc-i386.c: Likewise.
1620 * doc/Makefile.am: Likewise.
1621 * doc/Makefile.in: Likewise.
1622 * doc/c-aarch64.texi: Likewise.
1623 * doc/c-alpha.texi: Likewise.
1624 * doc/c-arc.texi: Likewise.
1625 * doc/c-arm.texi: Likewise.
1626 * doc/c-avr.texi: Likewise.
1627 * doc/c-bfin.texi: Likewise.
1628 * doc/c-cr16.texi: Likewise.
1629 * doc/c-d10v.texi: Likewise.
1630 * doc/c-d30v.texi: Likewise.
1631 * doc/c-h8300.texi: Likewise.
1632 * doc/c-hppa.texi: Likewise.
1633 * doc/c-i370.texi: Likewise.
1634 * doc/c-i386.texi: Likewise.
1635 * doc/c-i860.texi: Likewise.
1636 * doc/c-m32c.texi: Likewise.
1637 * doc/c-m32r.texi: Likewise.
1638 * doc/c-m68hc11.texi: Likewise.
1639 * doc/c-m68k.texi: Likewise.
1640 * doc/c-microblaze.texi: Likewise.
1641 * doc/c-mips.texi: Likewise.
1642 * doc/c-msp430.texi: Likewise.
1643 * doc/c-mt.texi: Likewise.
1644 * doc/c-s390.texi: Likewise.
1645 * doc/c-score.texi: Likewise.
1646 * doc/c-sh.texi: Likewise.
1647 * doc/c-sh64.texi: Likewise.
1648 * doc/c-tic54x.texi: Likewise.
1649 * doc/c-tic6x.texi: Likewise.
1650 * doc/c-v850.texi: Likewise.
1651 * doc/c-xc16x.texi: Likewise.
1652 * doc/c-xgate.texi: Likewise.
1653 * doc/c-xtensa.texi: Likewise.
1654 * doc/c-z80.texi: Likewise.
1655 * doc/internals.texi: Likewise.
1657 2013-01-10 Roland McGrath <mcgrathr@google.com>
1659 * hash.c (hash_new_sized): Make it global.
1660 * hash.h: Declare it.
1661 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1664 2013-01-10 Will Newton <will.newton@imgtec.com>
1666 * Makefile.am: Add Meta.
1667 * Makefile.in: Regenerate.
1668 * config/tc-metag.c: New file.
1669 * config/tc-metag.h: New file.
1670 * configure.tgt: Add Meta.
1671 * doc/Makefile.am: Add Meta.
1672 * doc/Makefile.in: Regenerate.
1673 * doc/all.texi: Add Meta.
1674 * doc/as.texiinfo: Document Meta options.
1675 * doc/c-metag.texi: New file.
1677 2013-01-09 Steve Ellcey <sellcey@mips.com>
1679 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1681 * config/tc-mips.c (internalError): Remove, replace with abort.
1683 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1685 * config/tc-aarch64.c (parse_operands): Change to compare the result
1686 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1688 2013-01-07 Nick Clifton <nickc@redhat.com>
1691 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1692 anticipated character.
1693 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1694 here as it is no longer needed.
1696 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1698 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1699 * doc/c-score.texi (SCORE-Opts): Likewise.
1700 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1702 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1704 * config/tc-mips.c: Add support for MIPS r5900.
1705 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1707 (can_swap_branch_p, get_append_method): Detect some conditional
1708 short loops to fix a bug on the r5900 by NOP in the branch delay
1710 (M_MUL): Support 3 operands in multu on r5900.
1711 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1712 (s_mipsset): Force 32 bit floating point on r5900.
1713 (mips_ip): Check parameter range of instructions mfps and mtps on
1715 * configure.in: Detect CPU type when target string contains r5900
1716 (e.g. mips64r5900el-linux-gnu).
1718 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1720 * as.c (parse_args): Update copyright year to 2013.
1722 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1724 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1727 2013-01-02 Nick Clifton <nickc@redhat.com>
1730 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1733 For older changes see ChangeLog-2012
1735 Copyright (C) 2013 Free Software Foundation, Inc.
1737 Copying and distribution of this file, with or without modification,
1738 are permitted in any medium without royalty provided the copyright
1739 notice and this notice are preserved.
1745 version-control: never