1 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
4 lax_max with lax_match.
5 (match_int_operand): Update accordingly. Don't report an error
6 for !lax_match-only cases.
7 (match_insn): Replace more_alts with lax_match and use it to
8 initialize the mips_arg_info field. Add a complete_p parameter.
9 Handle implicit VU0 suffixes here.
10 (match_invalid_for_isa, match_insns, match_mips16_insns): New
12 (mips_ip, mips16_ip): Use them.
14 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
16 * config/tc-mips.c (match_expression): Report uses of registers here.
17 Add a "must be an immediate expression" error. Handle elided offsets
19 (match_int_operand): ...here.
21 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
23 * config/tc-mips.c (mips_arg_info): Remove soft_match.
24 (match_out_of_range, match_not_constant): New functions.
25 (match_const_int): Remove fallback parameter and check for soft_match.
26 Use match_not_constant.
27 (match_mapped_int_operand, match_addiusp_operand)
28 (match_perf_reg_operand, match_save_restore_list_operand)
29 (match_mdmx_imm_reg_operand): Update accordingly. Use
30 match_out_of_range and set_insn_error* instead of as_bad.
31 (match_int_operand): Likewise. Use match_not_constant in the
32 !allows_nonconst case.
33 (match_float_constant): Report invalid float constants.
34 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
35 match_float_constant to check for invalid constants. Fail the
36 match if match_const_int or match_float_constant return false.
37 (mips_ip): Update accordingly.
38 (mips16_ip): Likewise. Undo null termination of instruction name
39 once lookup is complete.
41 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
43 * config/tc-mips.c (mips_insn_error_format): New enum.
44 (mips_insn_error): New struct.
45 (insn_error): Change to a mips_insn_error.
46 (clear_insn_error, set_insn_error_format, set_insn_error)
47 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
49 (mips_parse_argument_token, md_assemble, match_insn)
50 (match_mips16_insn): Use them instead of manipulating insn_error
52 (mips_ip, mips16_ip): Likewise. Simplify control flow.
54 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
56 * config/tc-mips.c (normalize_constant_expr): Move further up file.
57 (normalize_address_expr): Likewise.
58 (match_insn, match_mips16_insn): New functions, split out from...
59 (mips_ip, mips16_ip): ...here.
61 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
63 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
65 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
66 for optional operands.
68 2013-08-16 Alan Modra <amodra@gmail.com>
70 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
73 2013-08-16 Alan Modra <amodra@gmail.com>
75 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
77 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
79 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
80 argument as alignment.
82 2013-08-09 Nick Clifton <nickc@redhat.com>
84 * config/tc-rl78.c (elf_flags): New variable.
85 (enum options): Add OPTION_G10.
86 (md_longopts): Add mg10.
87 (md_parse_option): Parse -mg10.
88 (rl78_elf_final_processing): New function.
89 * config/tc-rl78.c (tc_final_processing): Define.
90 * doc/c-rl78.texi: Document -mg10 option.
92 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
94 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
95 suffixes to be elided too.
96 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
97 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
100 2013-08-05 John Tytgat <john@bass-software.com>
102 * po/POTFILES.in: Regenerate.
104 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
105 Konrad Eisele <konrad@gaisler.com>
107 * config/tc-sparc.c (sparc_arch_types): Add leon.
108 (sparc_arch): Move sparc4 around and add leon.
109 (sparc_target_format): Document -Aleon.
110 * doc/c-sparc.texi: Likewise.
112 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
114 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
116 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
117 Richard Sandiford <rdsandiford@googlemail.com>
119 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
120 (RWARN): Bump to 0x8000000.
121 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
122 (RTYPE_R5900_ACC): New register types.
123 (RTYPE_MASK): Include them.
124 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
126 (reg_names): Include them.
127 (mips_parse_register_1): New function, split out from...
128 (mips_parse_register): ...here. Add a channels_ptr parameter.
129 Look for VU0 channel suffixes when nonnull.
130 (reg_lookup): Update the call to mips_parse_register.
131 (mips_parse_vu0_channels): New function.
132 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
133 (mips_operand_token): Add a "channels" field to the union.
134 Extend the comment above "ch" to OT_DOUBLE_CHAR.
135 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
136 (mips_parse_argument_token): Handle channel suffixes here too.
137 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
138 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
140 (md_begin): Register $vfN and $vfI registers.
141 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
142 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
143 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
144 (match_vu0_suffix_operand): New function.
145 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
146 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
147 (mips_lookup_insn): New function.
148 (mips_ip): Use it. Allow "+K" operands to be elided at the end
149 of an instruction. Handle '#' sequences.
151 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
153 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
154 values and use it instead of sreg, treg, xreg, etc.
156 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
158 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
159 and mips_int_operand_max.
160 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
162 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
163 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
164 instead of mips16_immed_operand.
166 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
168 * config/tc-mips.c (mips16_macro): Don't use move_register.
169 (mips16_ip): Allow macros to use 'p'.
171 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
173 * config/tc-mips.c (MAX_OPERANDS): New macro.
174 (mips_operand_array): New structure.
175 (mips_operands, mips16_operands, micromips_operands): New arrays.
176 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
177 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
178 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
179 (micromips_to_32_reg_q_map): Delete.
180 (insn_operands, insn_opno, insn_extract_operand): New functions.
181 (validate_mips_insn): Take a mips_operand_array as argument and
182 use it to build up a list of operands. Extend to handle INSN_MACRO
184 (validate_mips16_insn): New function.
185 (validate_micromips_insn): Take a mips_operand_array as argument.
187 (md_begin): Initialize mips_operands, mips16_operands and
188 micromips_operands. Call validate_mips_insn and
189 validate_micromips_insn for macro instructions too.
190 Call validate_mips16_insn for MIPS16 instructions.
191 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
193 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
194 them. Handle INSN_UDI.
195 (get_append_method): Use gpr_read_mask.
197 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
199 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
200 flags for MIPS16 and non-MIPS16 instructions.
201 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
202 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
203 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
204 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
205 and non-MIPS16 instructions. Fix formatting.
207 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
209 * config/tc-mips.c (reg_needs_delay): Move later in file.
211 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
213 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
214 Alexander Ivchenko <alexander.ivchenko@intel.com>
215 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
216 Sergey Lega <sergey.s.lega@intel.com>
217 Anna Tikhonova <anna.tikhonova@intel.com>
218 Ilya Tocar <ilya.tocar@intel.com>
219 Andrey Turetskiy <andrey.turetskiy@intel.com>
220 Ilya Verbin <ilya.verbin@intel.com>
221 Kirill Yukhin <kirill.yukhin@intel.com>
222 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
224 * config/tc-i386-intel.c (O_zmmword_ptr): New.
225 (i386_types): Add zmmword.
226 (i386_intel_simplify_register): Allow regzmm.
227 (i386_intel_simplify): Handle zmmwords.
228 (i386_intel_operand): Handle RC/SAE, vector operations and
230 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
231 (struct RC_Operation): New.
232 (struct Mask_Operation): New.
233 (struct Broadcast_Operation): New.
234 (vex_prefix): Size of bytes increased to 4 to support EVEX
236 (enum i386_error): Add new error codes: unsupported_broadcast,
237 broadcast_not_on_src_operand, broadcast_needed,
238 unsupported_masking, mask_not_on_destination, no_default_mask,
239 unsupported_rc_sae, rc_sae_operand_not_last_imm,
240 invalid_register_operand, try_vector_disp8.
241 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
242 rounding, broadcast, memshift.
243 (struct RC_name): New.
244 (RC_NamesTable): New.
247 (extra_symbol_chars): Add '{'.
248 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
249 (i386_operand_type): Add regzmm, regmask and vec_disp8.
250 (match_mem_size): Handle zmmwords.
251 (operand_type_match): Handle zmm-registers.
252 (mode_from_disp_size): Handle vec_disp8.
253 (fits_in_vec_disp8): New.
254 (md_begin): Handle {} properly.
255 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
256 (build_vex_prefix): Handle vrex.
257 (build_evex_prefix): New.
258 (process_immext): Adjust to properly handle EVEX.
259 (md_assemble): Add EVEX encoding support.
260 (swap_2_operands): Correctly handle operands with masking,
261 broadcasting or RC/SAE.
262 (check_VecOperands): Support EVEX features.
263 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
264 (match_template): Support regzmm and handle new error codes.
265 (process_suffix): Handle zmmwords and zmm-registers.
266 (check_byte_reg): Extend to zmm-registers.
267 (process_operands): Extend to zmm-registers.
268 (build_modrm_byte): Handle EVEX.
269 (output_insn): Adjust to properly handle EVEX case.
270 (disp_size): Handle vec_disp8.
271 (output_disp): Support compressed disp8*N evex feature.
272 (output_imm): Handle RC/SAE immediates properly.
273 (check_VecOperations): New.
274 (i386_immediate): Handle EVEX features.
275 (i386_index_check): Handle zmmwords and zmm-registers.
276 (RC_SAE_immediate): New.
277 (i386_att_operand): Handle EVEX features.
278 (parse_real_register): Add a check for ZMM/Mask registers.
279 (OPTION_MEVEXLIG): New.
280 (OPTION_MEVEXWIG): New.
281 (md_longopts): Add mevexlig and mevexwig.
282 (md_parse_option): Handle mevexlig and mevexwig options.
283 (md_show_usage): Add description for mevexlig and mevexwig.
284 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
285 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
287 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
289 * config/tc-i386.c (cpu_arch): Add .sha.
290 * doc/c-i386.texi: Document sha/.sha.
292 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
293 Kirill Yukhin <kirill.yukhin@intel.com>
294 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
296 * config/tc-i386.c (BND_PREFIX): New.
297 (struct _i386_insn): Add new field bnd_prefix.
298 (add_bnd_prefix): New.
300 (i386_operand_type): Add regbnd.
301 (md_assemble): Handle BND prefixes.
302 (parse_insn): Likewise.
303 (output_branch): Likewise.
304 (output_jump): Likewise.
305 (build_modrm_byte): Handle regbnd.
306 (OPTION_MADD_BND_PREFIX): New.
307 (md_longopts): Add entry for 'madd-bnd-prefix'.
308 (md_parse_option): Handle madd-bnd-prefix option.
309 (md_show_usage): Add description for madd-bnd-prefix
311 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
313 2013-07-24 Tristan Gingold <gingold@adacore.com>
315 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
318 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
320 * config/tc-s390.c (s390_machine): Don't force the .machine
321 argument to lower case.
323 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
325 * config/tc-arm.c (s_arm_arch_extension): Improve error message
326 for invalid extension.
328 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
330 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
331 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
332 (aarch64_abi): New variable.
333 (ilp32_p): Change to be a macro.
334 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
335 (struct aarch64_option_abi_value_table): New struct.
336 (aarch64_abis): New table.
337 (aarch64_parse_abi): New function.
338 (aarch64_long_opts): Add entry for -mabi=.
339 * doc/as.texinfo (Target AArch64 options): Document -mabi.
340 * doc/c-aarch64.texi: Likewise.
342 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
344 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
347 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
349 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
351 * config/rx-parse.y: (rx_check_float_support): Add function to
352 check floating point operation support for target RX100 and
354 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
355 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
356 RX200, RX600, and RX610
358 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
360 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
362 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
364 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
365 * doc/c-avr.texi: Likewise.
367 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
369 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
370 error with older GCCs.
371 (mips16_macro_build): Dereference args.
373 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
375 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
376 New functions, split out from...
377 (reg_lookup): ...here. Remove itbl support.
378 (reglist_lookup): Delete.
379 (mips_operand_token_type): New enum.
380 (mips_operand_token): New structure.
381 (mips_operand_tokens): New variable.
382 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
383 (mips_parse_arguments): New functions.
384 (md_begin): Initialize mips_operand_tokens.
385 (mips_arg_info): Add a token field. Remove optional_reg field.
386 (match_char, match_expression): New functions.
387 (match_const_int): Use match_expression. Remove "s" argument
388 and return a boolean result. Remove O_register handling.
389 (match_regno, match_reg, match_reg_range): New functions.
390 (match_int_operand, match_mapped_int_operand, match_msb_operand)
391 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
392 (match_addiusp_operand, match_clo_clz_dest_operand)
393 (match_lwm_swm_list_operand, match_entry_exit_operand)
394 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
395 (match_tied_reg_operand): Remove "s" argument and return a boolean
396 result. Match tokens rather than text. Update calls to
397 match_const_int. Rely on match_regno to call check_regno.
398 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
399 "arg" argument. Return a boolean result.
400 (parse_float_constant): Replace with...
401 (match_float_constant): ...this new function.
402 (match_operand): Remove "s" argument and return a boolean result.
403 Update calls to subfunctions.
404 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
405 rather than string-parsing routines. Update handling of optional
406 registers for token scheme.
408 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
410 * config/tc-mips.c (parse_float_constant): Split out from...
413 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
415 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
418 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
420 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
421 (match_entry_exit_operand): New function.
422 (match_save_restore_list_operand): Likewise.
423 (match_operand): Use them.
424 (check_absolute_expr): Delete.
425 (mips16_ip): Rewrite main parsing loop to use mips_operands.
427 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
429 * config/tc-mips.c: Enable functions commented out in previous patch.
430 (SKIP_SPACE_TABS): Move further up file.
431 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
432 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
433 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
434 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
435 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
436 (micromips_imm_b_map, micromips_imm_c_map): Delete.
437 (mips_lookup_reg_pair): Delete.
438 (macro): Use report_bad_range and report_bad_field.
439 (mips_immed, expr_const_in_range): Delete.
440 (mips_ip): Rewrite main parsing loop to use new functions.
442 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
444 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
445 Change return type to bfd_boolean.
446 (report_bad_range, report_bad_field): New functions.
447 (mips_arg_info): New structure.
448 (match_const_int, convert_reg_type, check_regno, match_int_operand)
449 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
450 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
451 (match_addiusp_operand, match_clo_clz_dest_operand)
452 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
453 (match_pc_operand, match_tied_reg_operand, match_operand)
454 (check_completed_insn): New functions, commented out for now.
456 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
458 * config/tc-mips.c (insn_insert_operand): New function.
459 (macro_build, mips16_macro_build): Put null character check
460 in the for loop and convert continues to breaks. Use operand
461 structures to handle constant operands.
463 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
465 * config/tc-mips.c (validate_mips_insn): Move further up file.
466 Add insn_bits and decode_operand arguments. Use the mips_operand
467 fields to work out which bits an operand occupies. Detect double
469 (validate_micromips_insn): Move further up file. Call into
472 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
474 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
476 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
478 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
480 (macro): Update accordingly.
482 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
484 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
486 (md_assemble): Remove imm_reloc handling.
487 (mips_ip): Update commentary. Use offset_expr and offset_reloc
488 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
489 Use a temporary array rather than imm_reloc when parsing
490 constant expressions. Remove imm_reloc initialization.
491 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
492 for the relaxable field. Use a relax_char variable to track the
493 type of this field. Remove imm_reloc initialization.
495 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
497 * config/tc-mips.c (mips16_ip): Handle "I".
499 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
501 * config/tc-mips.c (mips_flag_nan2008): New variable.
502 (options): Add OPTION_NAN enum value.
503 (md_longopts): Handle it.
504 (md_parse_option): Likewise.
505 (s_nan): New function.
506 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
507 (md_show_usage): Add -mnan.
509 * doc/as.texinfo (Overview): Add -mnan.
510 * doc/c-mips.texi (MIPS Opts): Document -mnan.
511 (MIPS NaN Encodings): New node. Document .nan directive.
512 (MIPS-Dependent): List the new node.
514 2013-07-09 Tristan Gingold <gingold@adacore.com>
516 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
518 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
520 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
521 for 'A' and assume that the constant has been elided if the result
524 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
526 * config/tc-mips.c (gprel16_reloc_p): New function.
527 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
529 (offset_high_part, small_offset_p): New functions.
530 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
531 register load and store macros, handle the 16-bit offset case first.
532 If a 16-bit offset is not suitable for the instruction we're
533 generating, load it into the temporary register using
534 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
535 M_L_DAB code once the address has been constructed. For double load
536 and store macros, again handle the 16-bit offset case first.
537 If the second register cannot be accessed from the same high
538 part as the first, load it into AT using ADDRESS_ADDI_INSN.
539 Fix the handling of LD in cases where the first register is the
540 same as the base. Also handle the case where the offset is
541 not 16 bits and the second register cannot be accessed from the
542 same high part as the first. For unaligned loads and stores,
543 fuse the offbits == 12 and old "ab" handling. Apply this handling
544 whenever the second offset needs a different high part from the first.
545 Construct the offset using ADDRESS_ADDI_INSN where possible,
546 for offbits == 16 as well as offbits == 12. Use offset_reloc
547 when constructing the individual loads and stores.
548 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
549 and offset_reloc before matching against a particular opcode.
550 Handle elided 'A' constants. Allow 'A' constants to use
551 relocation operators.
553 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
555 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
556 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
557 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
559 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
561 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
562 Require the msb to be <= 31 for "+s". Check that the size is <= 31
563 for both "+s" and "+S".
565 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
567 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
568 (mips_ip, mips16_ip): Handle "+i".
570 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
572 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
573 (micromips_to_32_reg_h_map): Rename to...
574 (micromips_to_32_reg_h_map1): ...this.
575 (micromips_to_32_reg_i_map): Rename to...
576 (micromips_to_32_reg_h_map2): ...this.
577 (mips_lookup_reg_pair): New function.
578 (gpr_write_mask, macro): Adjust after above renaming.
579 (validate_micromips_insn): Remove "mi" handling.
580 (mips_ip): Likewise. Parse both registers in a pair for "mh".
582 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
584 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
585 (mips_ip): Remove "+D" and "+T" handling.
587 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
589 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
592 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
594 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
596 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
598 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
599 (aarch64_force_relocation): Likewise.
601 2013-07-02 Alan Modra <amodra@gmail.com>
603 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
605 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
607 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
608 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
609 Replace @sc{mips16} with literal `MIPS16'.
610 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
612 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
614 * config/tc-aarch64.c (reloc_table): Replace
615 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
616 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
617 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
618 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
619 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
620 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
621 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
622 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
623 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
624 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
625 (aarch64_force_relocation): Likewise.
627 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
629 * config/tc-aarch64.c (ilp32_p): New static variable.
630 (elf64_aarch64_target_format): Return the target according to the
632 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
633 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
634 (aarch64_dwarf2_addr_size): New function.
635 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
636 (DWARF2_ADDR_SIZE): New define.
638 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
640 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
642 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
644 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
646 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
648 * config/tc-mips.c (mips_set_options): Add insn32 member.
649 (mips_opts): Initialize it.
650 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
651 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
652 (md_longopts): Add "minsn32" and "mno-insn32" options.
653 (is_size_valid): Handle insn32 mode.
654 (md_assemble): Pass instruction string down to macro.
655 (brk_fmt): Add second dimension and insn32 mode initializers.
656 (mfhl_fmt): Likewise.
657 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
658 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
659 (macro_build_jalr, move_register): Handle insn32 mode.
660 (macro_build_branch_rs): Likewise.
661 (macro): Handle insn32 mode.
662 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
663 (mips_ip): Handle insn32 mode.
664 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
665 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
666 (mips_handle_align): Handle insn32 mode.
667 (md_show_usage): Add -minsn32 and -mno-insn32.
669 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
671 (-minsn32, -mno-insn32): New options.
672 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
674 (MIPS assembly options): New node. Document .set insn32 and
676 (MIPS-Dependent): List the new node.
678 2013-06-25 Nick Clifton <nickc@redhat.com>
680 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
681 the PC in indirect addressing on 430xv2 parts.
682 (msp430_operands): Add version test to hardware bug encoding
685 2013-06-24 Roland McGrath <mcgrathr@google.com>
687 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
688 so it skips whitespace before it.
689 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
691 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
692 (arm_reg_parse_multi): Skip whitespace first.
693 (parse_reg_list): Likewise.
694 (parse_vfp_reg_list): Likewise.
695 (s_arm_unwind_save_mmxwcg): Likewise.
697 2013-06-24 Nick Clifton <nickc@redhat.com>
700 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
702 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
704 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
706 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
708 * config/tc-mips.c: Assert that offsetT and valueT are at least
710 (GPR_SMIN, GPR_SMAX): New macros.
711 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
713 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
715 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
716 conditions. Remove any code deselected by them.
717 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
719 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
721 * NEWS: Note removal of ECOFF support.
722 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
723 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
724 (MULTI_CFILES): Remove config/e-mipsecoff.c.
725 * Makefile.in: Regenerate.
726 * configure.in: Remove MIPS ECOFF references.
727 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
729 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
730 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
731 (mips-*-*): ...this single case.
732 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
733 MIPS emulations to be e-mipself*.
734 * configure: Regenerate.
735 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
736 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
737 (mips-*-sysv*): Remove coff and ecoff cases.
738 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
739 * ecoff.c: Remove reference to MIPS ECOFF.
740 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
741 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
742 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
743 (mips_hi_fixup): Tweak comment.
744 (append_insn): Require a howto.
745 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
747 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
749 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
750 Use "CPU" instead of "cpu".
751 * doc/c-mips.texi: Likewise.
752 (MIPS Opts): Rename to MIPS Options.
753 (MIPS option stack): Rename to MIPS Option Stack.
754 (MIPS ASE instruction generation overrides): Rename to
755 MIPS ASE Instruction Generation Overrides (for now).
756 (MIPS floating-point): Rename to MIPS Floating-Point.
758 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
760 * doc/c-mips.texi (MIPS Macros): New section.
761 (MIPS Object): Replace with...
762 (MIPS Small Data): ...this new section.
764 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
766 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
767 Capitalize name. Use @kindex instead of @cindex for .set entries.
769 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
771 * doc/c-mips.texi (MIPS Stabs): Remove section.
773 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
775 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
776 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
777 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
778 (ISA_SUPPORTS_VIRT64_ASE): Delete.
779 (mips_ase): New structure.
780 (mips_ases): New table.
781 (FP64_ASES): New macro.
782 (mips_ase_groups): New array.
783 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
784 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
786 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
787 (md_parse_option): Use mips_ases and mips_set_ase instead of
788 separate case statements for each ASE option.
789 (mips_after_parse_args): Use FP64_ASES. Use
790 mips_check_isa_supports_ases to check the ASEs against
792 (s_mipsset): Use mips_ases and mips_set_ase instead of
793 separate if statements for each ASE option. Use
794 mips_check_isa_supports_ases, even when a non-ASE option
797 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
799 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
801 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
803 * config/tc-mips.c (md_shortopts, options, md_longopts)
804 (md_longopts_size): Move earlier in file.
806 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
808 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
809 with a single "ase" bitmask.
810 (mips_opts): Update accordingly.
811 (file_ase, file_ase_explicit): New variables.
812 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
813 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
814 (ISA_HAS_ROR): Adjust for mips_set_options change.
815 (is_opcode_valid): Take the base ase mask directly from mips_opts.
816 (mips_ip): Adjust for mips_set_options change.
817 (md_parse_option): Likewise. Update file_ase_explicit.
818 (mips_after_parse_args): Adjust for mips_set_options change.
819 Use bitmask operations to select the default ASEs. Set file_ase
820 rather than individual per-ASE variables.
821 (s_mipsset): Adjust for mips_set_options change.
822 (mips_elf_final_processing): Test file_ase rather than
823 file_ase_mdmx. Remove commented-out code.
825 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
827 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
828 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
829 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
830 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
831 (mips_after_parse_args): Use the new "ase" field to choose
833 (mips_cpu_info_table): Move ASEs from the "flags" field to the
836 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
838 * config/tc-arm.c (symbol_preemptible): New function.
839 (relax_branch): Use it.
841 2013-06-17 Catherine Moore <clm@codesourcery.com>
842 Maciej W. Rozycki <macro@codesourcery.com>
843 Chao-Ying Fu <fu@mips.com>
845 * config/tc-mips.c (mips_set_options): Add ase_eva.
846 (mips_set_options mips_opts): Add ase_eva.
847 (file_ase_eva): Declare.
848 (ISA_SUPPORTS_EVA_ASE): Define.
849 (IS_SEXT_9BIT_NUM): Define.
850 (MIPS_CPU_ASE_EVA): Define.
851 (is_opcode_valid): Add support for ase_eva.
852 (macro_build): Likewise.
854 (validate_mips_insn): Likewise.
855 (validate_micromips_insn): Likewise.
857 (options): Add OPTION_EVA and OPTION_NO_EVA.
858 (md_longopts): Add -meva and -mno-eva.
859 (md_parse_option): Process new options.
860 (mips_after_parse_args): Check for valid EVA combinations.
861 (s_mipsset): Likewise.
863 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
865 * dwarf2dbg.h (dwarf2_move_insn): Declare.
866 * dwarf2dbg.c (line_subseg): Add pmove_tail.
867 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
868 (dwarf2_gen_line_info_1): Update call accordingly.
869 (dwarf2_move_insn): New function.
870 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
872 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
876 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
879 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
880 (dwarf2_gen_line_info_1): Delete.
881 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
882 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
883 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
884 (dwarf2_directive_loc): Push previous .locs instead of generating
887 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
889 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
890 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
892 2013-06-13 Nick Clifton <nickc@redhat.com>
895 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
896 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
897 function. Generates an error if the adjusted offset is out of a
900 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
902 * config/tc-nios2.c (md_apply_fix): Mask constant
903 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
905 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
907 * config/tc-mips.c (append_insn): Don't do branch relaxation for
908 MIPS-3D instructions either.
909 (md_convert_frag): Update the COPx branch mask accordingly.
911 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
913 * doc/as.texinfo (Overview): Add --relax-branch and
915 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
918 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
920 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
923 2013-06-08 Catherine Moore <clm@codesourcery.com>
925 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
926 (is_opcode_valid_16): Pass ase value to opcode_is_member.
927 (append_insn): Change INSN_xxxx to ASE_xxxx.
929 2013-06-01 George Thomas <george.thomas@atmel.com>
931 * gas/config/tc-avr.c: Change ISA for devices with USB support to
934 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
936 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
939 2013-05-31 Paul Brook <paul@codesourcery.com>
941 * config/tc-mips.c (s_ehword): New.
943 2013-05-30 Paul Brook <paul@codesourcery.com>
945 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
947 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
949 * write.c (resolve_reloc_expr_symbols): On REL targets don't
950 convert relocs who have no relocatable field either. Rephrase
951 the conditional so that the PC-relative check is only applied
954 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
956 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
959 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
961 * config/tc-aarch64.c (reloc_table): Update to use
962 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
963 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
964 (md_apply_fix): Likewise.
965 (aarch64_force_relocation): Likewise.
967 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
969 * config/tc-arm.c (it_fsm_post_encode): Improve
970 warning messages about deprecated IT block formats.
972 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
974 * config/tc-aarch64.c (md_apply_fix): Move value range checking
975 inside fx_done condition.
977 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
979 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
981 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
983 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
984 and clean up warning when using PRINT_OPCODE_TABLE.
986 2013-05-20 Alan Modra <amodra@gmail.com>
988 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
989 and data fixups performing shift/high adjust/sign extension on
990 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
991 when writing data fixups rather than recalculating size.
993 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
995 * doc/c-msp430.texi: Fix typo.
997 2013-05-16 Tristan Gingold <gingold@adacore.com>
999 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1000 are also TOC symbols.
1002 2013-05-16 Nick Clifton <nickc@redhat.com>
1004 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1005 Add -mcpu command to specify core type.
1006 * doc/c-msp430.texi: Update documentation.
1008 2013-05-09 Andrew Pinski <apinski@cavium.com>
1010 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1011 (mips_opts): Update for the new field.
1012 (file_ase_virt): New variable.
1013 (ISA_SUPPORTS_VIRT_ASE): New macro.
1014 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1015 (MIPS_CPU_ASE_VIRT): New define.
1016 (is_opcode_valid): Handle ase_virt.
1017 (macro_build): Handle "+J".
1018 (validate_mips_insn): Likewise.
1019 (mips_ip): Likewise.
1020 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1021 (md_longopts): Add mvirt and mnovirt
1022 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1023 (mips_after_parse_args): Handle ase_virt field.
1024 (s_mipsset): Handle "virt" and "novirt".
1025 (mips_elf_final_processing): Add a comment about virt ASE might need
1027 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1028 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1029 Document ".set virt" and ".set novirt".
1031 2013-05-09 Alan Modra <amodra@gmail.com>
1033 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1034 control of operand flag bits.
1036 2013-05-07 Alan Modra <amodra@gmail.com>
1038 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1039 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1040 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1041 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1042 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1043 Shift and sign-extend fieldval for use by some VLE reloc
1044 operand->insert functions.
1046 2013-05-06 Paul Brook <paul@codesourcery.com>
1047 Catherine Moore <clm@codesourcery.com>
1049 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1050 (limited_pcrel_reloc_p): Likewise.
1051 (md_apply_fix): Likewise.
1052 (tc_gen_reloc): Likewise.
1054 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1056 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1057 (mips_fix_adjustable): Adjust pc-relative check to use
1060 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1062 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1063 (s_mips_stab): Do not restrict to stabn only.
1065 2013-05-02 Nick Clifton <nickc@redhat.com>
1067 * config/tc-msp430.c: Add support for the MSP430X architecture.
1068 Add code to insert a NOP instruction after any instruction that
1069 might change the interrupt state.
1070 Add support for the LARGE memory model.
1071 Add code to initialise the .MSP430.attributes section.
1072 * config/tc-msp430.h: Add support for the MSP430X architecture.
1073 * doc/c-msp430.texi: Document the new -mL and -mN command line
1075 * NEWS: Mention support for the MSP430X architecture.
1077 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1079 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1080 alpha*-*-linux*ecoff*.
1082 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1084 * config/tc-mips.c (mips_ip): Add sizelo.
1085 For "+C", "+G", and "+H", set sizelo and compare against it.
1087 2013-04-29 Nick Clifton <nickc@redhat.com>
1089 * as.c (Options): Add -gdwarf-sections.
1090 (parse_args): Likewise.
1091 * as.h (flag_dwarf_sections): Declare.
1092 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1093 (process_entries): When -gdwarf-sections is enabled generate
1094 fragmentary .debug_line sections.
1095 (out_debug_line): Set the section for the .debug_line section end
1097 * doc/as.texinfo: Document -gdwarf-sections.
1098 * NEWS: Mention -gdwarf-sections.
1100 2013-04-26 Christian Groessler <chris@groessler.org>
1102 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1103 according to the target parameter. Don't call s_segm since s_segm
1104 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1106 (md_begin): Call s_segm according to target parameter from command
1109 2013-04-25 Alan Modra <amodra@gmail.com>
1111 * configure.in: Allow little-endian linux.
1112 * configure: Regenerate.
1114 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1116 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1117 "fstatus" control register to "eccinj".
1119 2013-04-19 Kai Tietz <ktietz@redhat.com>
1121 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1123 2013-04-15 Julian Brown <julian@codesourcery.com>
1125 * expr.c (add_to_result, subtract_from_result): Make global.
1126 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1127 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1128 subtract_from_result to handle extra bit of precision for .sleb128
1131 2013-04-10 Julian Brown <julian@codesourcery.com>
1133 * read.c (convert_to_bignum): Add sign parameter. Use it
1134 instead of X_unsigned to determine sign of resulting bignum.
1135 (emit_expr): Pass extra argument to convert_to_bignum.
1136 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1137 X_extrabit to convert_to_bignum.
1138 (parse_bitfield_cons): Set X_extrabit.
1139 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1140 Initialise X_extrabit field as appropriate.
1141 (add_to_result): New.
1142 (subtract_from_result): New.
1144 * expr.h (expressionS): Add X_extrabit field.
1146 2013-04-10 Jan Beulich <jbeulich@suse.com>
1148 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1149 register being PC when is_t or writeback, and use distinct
1150 diagnostic for the latter case.
1152 2013-04-10 Jan Beulich <jbeulich@suse.com>
1154 * gas/config/tc-arm.c (parse_operands): Re-write
1155 po_barrier_or_imm().
1156 (do_barrier): Remove bogus constraint().
1157 (do_t_barrier): Remove.
1159 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1161 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1162 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1164 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1166 2013-04-09 Jan Beulich <jbeulich@suse.com>
1168 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1169 Use local variable Rt in more places.
1170 (do_vmsr): Accept all control registers.
1172 2013-04-09 Jan Beulich <jbeulich@suse.com>
1174 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1175 if there was none specified for moves between scalar and core
1178 2013-04-09 Jan Beulich <jbeulich@suse.com>
1180 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1181 NEON_ALL_LANES case.
1183 2013-04-08 Jan Beulich <jbeulich@suse.com>
1185 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1188 2013-04-08 Jan Beulich <jbeulich@suse.com>
1190 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1193 2013-04-03 Alan Modra <amodra@gmail.com>
1195 * doc/as.texinfo: Add support to generate man options for h8300.
1196 * doc/c-h8300.texi: Likewise.
1198 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1200 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1203 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1206 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1208 2013-03-26 Nick Clifton <nickc@redhat.com>
1211 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1212 start of the file each time.
1215 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1218 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1220 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1223 2013-03-21 Will Newton <will.newton@linaro.org>
1225 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1226 pc-relative str instructions in Thumb mode.
1228 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1230 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1231 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1233 * config/tc-h8300.h: Remove duplicated defines.
1235 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1238 * tc-avr.c (mcu_has_3_byte_pc): New function.
1239 (tc_cfi_frame_initial_instructions): Call it to find return
1242 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1245 * config/tc-tic6x.c (tic6x_try_encode): Handle
1246 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1247 encode register pair numbers when required.
1249 2013-03-15 Will Newton <will.newton@linaro.org>
1251 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1252 in vstr in Thumb mode for pre-ARMv7 cores.
1254 2013-03-14 Andreas Schwab <schwab@suse.de>
1256 * doc/c-arc.texi (ARC Directives): Revert last change and use
1257 @itemize instead of @table.
1258 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1260 2013-03-14 Nick Clifton <nickc@redhat.com>
1263 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1264 NULL message, instead just check ARM_CPU_IS_ANY directly.
1266 2013-03-14 Nick Clifton <nickc@redhat.com>
1269 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1271 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1272 to the @item directives.
1273 (ARM-Neon-Alignment): Move to correct place in the document.
1274 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1276 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1279 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1281 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1282 case. Add default BAD_CASE to switch.
1284 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1286 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1287 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1289 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1291 * config/tc-arm.c (crc_ext_armv8): New feature set.
1292 (UNPRED_REG): New macro.
1293 (do_crc32_1): New function.
1294 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1295 do_crc32ch, do_crc32cw): Likewise.
1297 (insns): Add entries for crc32 mnemonics.
1298 (arm_extensions): Add entry for crc.
1300 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1302 * write.h (struct fix): Add fx_dot_frag field.
1303 (dot_frag): Declare.
1304 * write.c (dot_frag): New variable.
1305 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1306 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1307 * expr.c (expr): Save value of frag_now in dot_frag when setting
1309 * read.c (emit_expr): Likewise. Delete comments.
1311 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1313 * config/tc-i386.c (flag_code_names): Removed.
1314 (i386_index_check): Rewrote.
1316 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1318 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1320 (aarch64_double_precision_fmovable): New function.
1321 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1322 function; handle hexadecimal representation of IEEE754 encoding.
1323 (parse_operands): Update the call to parse_aarch64_imm_float.
1325 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1327 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1328 (check_hle): Updated.
1329 (md_assemble): Likewise.
1330 (parse_insn): Likewise.
1332 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1334 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1335 (md_assemble): Check if REP prefix is OK.
1336 (parse_insn): Remove expecting_string_instruction. Set
1339 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1341 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1343 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1345 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1346 for system registers.
1348 2013-02-27 DJ Delorie <dj@redhat.com>
1350 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1351 (rl78_op): Handle %code().
1352 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1353 (tc_gen_reloc): Likwise; convert to a computed reloc.
1354 (md_apply_fix): Likewise.
1356 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1358 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1360 2013-02-25 Terry Guo <terry.guo@arm.com>
1362 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1363 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1364 list of accepted CPUs.
1366 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1369 * config/tc-i386.c (cpu_arch): Add ".smap".
1371 * doc/c-i386.texi: Document smap.
1373 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1375 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1376 mips_assembling_insn appropriately.
1377 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1379 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1381 * config/tc-mips.c (append_insn): Correct indentation, remove
1384 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1386 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1388 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1390 * configure.tgt: Add nios2-*-rtems*.
1392 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1394 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1397 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1399 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1400 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1402 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1404 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1407 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1408 Andrew Jenner <andrew@codesourcery.com>
1410 Based on patches from Altera Corporation.
1412 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1413 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1414 * Makefile.in: Regenerated.
1415 * configure.tgt: Add case for nios2*-linux*.
1416 * config/obj-elf.c: Conditionally include elf/nios2.h.
1417 * config/tc-nios2.c: New file.
1418 * config/tc-nios2.h: New file.
1419 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1420 * doc/Makefile.in: Regenerated.
1421 * doc/all.texi: Set NIOSII.
1422 * doc/as.texinfo (Overview): Add Nios II options.
1423 (Machine Dependencies): Include c-nios2.texi.
1424 * doc/c-nios2.texi: New file.
1425 * NEWS: Note Altera Nios II support.
1427 2013-02-06 Alan Modra <amodra@gmail.com>
1430 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1431 Don't skip fixups with fx_subsy non-NULL.
1432 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1433 with fx_subsy non-NULL.
1435 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1437 * doc/c-metag.texi: Add "@c man" markers.
1439 2013-02-04 Alan Modra <amodra@gmail.com>
1441 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1443 (TC_ADJUST_RELOC_COUNT): Delete.
1444 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1446 2013-02-04 Alan Modra <amodra@gmail.com>
1448 * po/POTFILES.in: Regenerate.
1450 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1452 * config/tc-metag.c: Make SWAP instruction less permissive with
1455 2013-01-29 DJ Delorie <dj@redhat.com>
1457 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1458 relocs in .word/.etc statements.
1460 2013-01-29 Roland McGrath <mcgrathr@google.com>
1462 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1463 immediate value for 8-bit offset" error so it shows line info.
1465 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1467 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1470 2013-01-24 Nick Clifton <nickc@redhat.com>
1472 * config/tc-v850.c: Add support for e3v5 architecture.
1473 * doc/c-v850.texi: Mention new support.
1475 2013-01-23 Nick Clifton <nickc@redhat.com>
1478 * config/tc-avr.c: Include dwarf2dbg.h.
1480 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1482 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1483 (tc_i386_fix_adjustable): Likewise.
1484 (lex_got): Likewise.
1485 (tc_gen_reloc): Likewise.
1487 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1489 * config/tc-aarch64.c (output_operand_error_record): Change to output
1490 the out-of-range error message as value-expected message if there is
1491 only one single value in the expected range.
1492 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1493 LSL #0 as a programmer-friendly feature.
1495 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1497 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1498 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1499 BFD_RELOC_64_SIZE relocations.
1500 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1502 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1503 relocations against local symbols.
1505 2013-01-16 Alan Modra <amodra@gmail.com>
1507 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1508 finding some sort of toc syntax error, and break to avoid
1509 compiler uninit warning.
1511 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1514 * config/tc-i386.c (lex_got): Increment length by 1 if the
1515 relocation token is removed.
1517 2013-01-15 Nick Clifton <nickc@redhat.com>
1519 * config/tc-v850.c (md_assemble): Allow signed values for
1522 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1524 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1527 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1529 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1530 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1531 * config/tc-ppc.c (md_show_usage): Likewise.
1532 (ppc_handle_align): Handle power8's group ending nop.
1534 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1536 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1537 that the assember exits after the opcodes have been printed.
1539 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1541 * app.c: Remove trailing white spaces.
1545 * dw2gencfi.c: Likewise.
1546 * dwarf2dbg.h: Likewise.
1547 * ecoff.c: Likewise.
1548 * input-file.c: Likewise.
1549 * itbl-lex.h: Likewise.
1550 * output-file.c: Likewise.
1553 * subsegs.c: Likewise.
1554 * symbols.c: Likewise.
1555 * write.c: Likewise.
1556 * config/tc-i386.c: Likewise.
1557 * doc/Makefile.am: Likewise.
1558 * doc/Makefile.in: Likewise.
1559 * doc/c-aarch64.texi: Likewise.
1560 * doc/c-alpha.texi: Likewise.
1561 * doc/c-arc.texi: Likewise.
1562 * doc/c-arm.texi: Likewise.
1563 * doc/c-avr.texi: Likewise.
1564 * doc/c-bfin.texi: Likewise.
1565 * doc/c-cr16.texi: Likewise.
1566 * doc/c-d10v.texi: Likewise.
1567 * doc/c-d30v.texi: Likewise.
1568 * doc/c-h8300.texi: Likewise.
1569 * doc/c-hppa.texi: Likewise.
1570 * doc/c-i370.texi: Likewise.
1571 * doc/c-i386.texi: Likewise.
1572 * doc/c-i860.texi: Likewise.
1573 * doc/c-m32c.texi: Likewise.
1574 * doc/c-m32r.texi: Likewise.
1575 * doc/c-m68hc11.texi: Likewise.
1576 * doc/c-m68k.texi: Likewise.
1577 * doc/c-microblaze.texi: Likewise.
1578 * doc/c-mips.texi: Likewise.
1579 * doc/c-msp430.texi: Likewise.
1580 * doc/c-mt.texi: Likewise.
1581 * doc/c-s390.texi: Likewise.
1582 * doc/c-score.texi: Likewise.
1583 * doc/c-sh.texi: Likewise.
1584 * doc/c-sh64.texi: Likewise.
1585 * doc/c-tic54x.texi: Likewise.
1586 * doc/c-tic6x.texi: Likewise.
1587 * doc/c-v850.texi: Likewise.
1588 * doc/c-xc16x.texi: Likewise.
1589 * doc/c-xgate.texi: Likewise.
1590 * doc/c-xtensa.texi: Likewise.
1591 * doc/c-z80.texi: Likewise.
1592 * doc/internals.texi: Likewise.
1594 2013-01-10 Roland McGrath <mcgrathr@google.com>
1596 * hash.c (hash_new_sized): Make it global.
1597 * hash.h: Declare it.
1598 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1601 2013-01-10 Will Newton <will.newton@imgtec.com>
1603 * Makefile.am: Add Meta.
1604 * Makefile.in: Regenerate.
1605 * config/tc-metag.c: New file.
1606 * config/tc-metag.h: New file.
1607 * configure.tgt: Add Meta.
1608 * doc/Makefile.am: Add Meta.
1609 * doc/Makefile.in: Regenerate.
1610 * doc/all.texi: Add Meta.
1611 * doc/as.texiinfo: Document Meta options.
1612 * doc/c-metag.texi: New file.
1614 2013-01-09 Steve Ellcey <sellcey@mips.com>
1616 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1618 * config/tc-mips.c (internalError): Remove, replace with abort.
1620 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1622 * config/tc-aarch64.c (parse_operands): Change to compare the result
1623 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1625 2013-01-07 Nick Clifton <nickc@redhat.com>
1628 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1629 anticipated character.
1630 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1631 here as it is no longer needed.
1633 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1635 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1636 * doc/c-score.texi (SCORE-Opts): Likewise.
1637 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1639 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1641 * config/tc-mips.c: Add support for MIPS r5900.
1642 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1644 (can_swap_branch_p, get_append_method): Detect some conditional
1645 short loops to fix a bug on the r5900 by NOP in the branch delay
1647 (M_MUL): Support 3 operands in multu on r5900.
1648 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1649 (s_mipsset): Force 32 bit floating point on r5900.
1650 (mips_ip): Check parameter range of instructions mfps and mtps on
1652 * configure.in: Detect CPU type when target string contains r5900
1653 (e.g. mips64r5900el-linux-gnu).
1655 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1657 * as.c (parse_args): Update copyright year to 2013.
1659 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1661 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1664 2013-01-02 Nick Clifton <nickc@redhat.com>
1667 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1670 For older changes see ChangeLog-2012
1672 Copyright (C) 2013 Free Software Foundation, Inc.
1674 Copying and distribution of this file, with or without modification,
1675 are permitted in any medium without royalty provided the copyright
1676 notice and this notice are preserved.
1682 version-control: never