1 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
2 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
4 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
5 (md_longopts): Add mmsa and mno-msa.
8 (RTYPE_MSA): New define.
9 (OT_REG_ELEMENT): Replace with...
10 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
11 (mips_operand_token): Replace reg_element with index.
12 (mips_parse_argument_token): Treat vector indices as separate tokens.
13 Handle register indices.
14 (md_begin): Add MSA register names.
15 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
16 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
17 (match_mdmx_imm_reg_operand): Update accordingly.
18 (match_imm_index_operand): New function.
19 (match_reg_index_operand): New function.
20 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
21 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
22 (md_show_usage): Print -mmsa and -mno-msa.
23 * doc/as.texinfo: Document -mmsa and -mno-msa.
24 * doc/c-mips.texi: Document -mmsa and -mno-msa.
25 Document .set msa and .set nomsa.
27 2013-10-14 Nick Clifton <nickc@redhat.com>
29 * read.c (add_include_dir): Use xrealloc.
30 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
31 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
33 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
35 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
36 also test/refer to "sstatus". Reformat the warning message.
38 2013-10-10 Sean Keys <skeys@ipdatasys.com>
40 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
42 2013-10-10 Jan Beulich <jbeulich@suse.com>
44 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
45 swapping for bndmk, bndldx, and bndstx.
47 2013-10-09 Nick Clifton <nickc@redhat.com>
50 * config/tc-epiphany.c (md_convert_frag): Add missing break
54 * config/tc-mn10200.c (md_convert_frag): Add missing break
57 2013-10-08 Jan Beulich <jbeulich@suse.com>
59 * tc-i386.c (check_word_reg): Remove misplaced "else".
60 (check_long_reg): Restore symmetry with check_word_reg.
62 2013-10-08 Jan Beulich <jbeulich@suse.com>
64 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
67 2013-10-08 Nick Clifton <nickc@redhat.com>
69 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
70 for "<foo>a". Issue error messages for unrecognised or corrrupt
73 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
75 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
78 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
80 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
81 * doc/c-i386.texi: Add -march=bdver4 option.
83 2013-09-20 Alan Modra <amodra@gmail.com>
85 * configure: Regenerate.
87 2013-09-18 Tristan Gingold <gingold@adacore.com>
89 * NEWS: Add marker for 2.24.
91 2013-09-18 Nick Clifton <nickc@redhat.com>
93 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
94 (move_data): New variable.
95 (md_parse_option): Parse -md.
96 (msp430_section): New function. Catch references to the .bss or
97 .data sections and generate a special symbol for use by the libcrt
99 (md_pseudo_table): Intercept .section directives.
100 (md_longopt): Add -md
101 (md_show_usage): Likewise.
102 (msp430_operands): Generate a warning message if a NOP is inserted
103 into the instruction stream.
104 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
106 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
108 * config/tc-mips.c (mips_elf_final_processing): Set
109 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
111 2013-09-16 Will Newton <will.newton@linaro.org>
113 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
114 disallowing element size 64 with interleave other than 1.
116 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
118 * config/tc-mips.c (match_insn): Set error when $31 is used for
121 2013-09-04 Tristan Gingold <gingold@adacore.com>
123 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
126 2013-09-04 Roland McGrath <mcgrathr@google.com>
129 * config/tc-arm.c (T16_32_TAB): Add _udf.
130 (do_t_udf): New function.
133 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
135 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
136 assembler errors at correct position.
138 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
141 * config/tc-ia64.c: Fix typos.
142 * config/tc-sparc.c: Likewise.
143 * config/tc-z80.c: Likewise.
144 * doc/c-i386.texi: Likewise.
145 * doc/c-m32r.texi: Likewise.
147 2013-08-23 Will Newton <will.newton@linaro.org>
149 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
150 for pre-indexed addressing modes.
152 2013-08-21 Alan Modra <amodra@gmail.com>
154 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
155 range check label number for use with fb_low_counter array.
157 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
159 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
160 (mips_parse_argument_token, validate_micromips_insn, md_begin)
161 (check_regno, match_float_constant, check_completed_insn, append_insn)
162 (match_insn, match_mips16_insn, match_insns, macro_start)
163 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
164 (mips16_ip, mips_set_option_string, md_parse_option)
165 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
166 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
167 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
168 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
169 Start error messages with a lower-case letter. Do not end error
170 messages with a period. Wrap long messages to 80 character-lines.
171 Use "cannot" instead of "can't" and "can not".
173 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
175 * config/tc-mips.c (imm_expr): Expand comment.
176 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
179 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
181 * config/tc-mips.c (imm2_expr): Delete.
182 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
184 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
186 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
187 (macro): Remove M_DEXT and M_DINS handling.
189 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
191 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
192 lax_max with lax_match.
193 (match_int_operand): Update accordingly. Don't report an error
194 for !lax_match-only cases.
195 (match_insn): Replace more_alts with lax_match and use it to
196 initialize the mips_arg_info field. Add a complete_p parameter.
197 Handle implicit VU0 suffixes here.
198 (match_invalid_for_isa, match_insns, match_mips16_insns): New
200 (mips_ip, mips16_ip): Use them.
202 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
204 * config/tc-mips.c (match_expression): Report uses of registers here.
205 Add a "must be an immediate expression" error. Handle elided offsets
207 (match_int_operand): ...here.
209 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
211 * config/tc-mips.c (mips_arg_info): Remove soft_match.
212 (match_out_of_range, match_not_constant): New functions.
213 (match_const_int): Remove fallback parameter and check for soft_match.
214 Use match_not_constant.
215 (match_mapped_int_operand, match_addiusp_operand)
216 (match_perf_reg_operand, match_save_restore_list_operand)
217 (match_mdmx_imm_reg_operand): Update accordingly. Use
218 match_out_of_range and set_insn_error* instead of as_bad.
219 (match_int_operand): Likewise. Use match_not_constant in the
220 !allows_nonconst case.
221 (match_float_constant): Report invalid float constants.
222 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
223 match_float_constant to check for invalid constants. Fail the
224 match if match_const_int or match_float_constant return false.
225 (mips_ip): Update accordingly.
226 (mips16_ip): Likewise. Undo null termination of instruction name
227 once lookup is complete.
229 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
231 * config/tc-mips.c (mips_insn_error_format): New enum.
232 (mips_insn_error): New struct.
233 (insn_error): Change to a mips_insn_error.
234 (clear_insn_error, set_insn_error_format, set_insn_error)
235 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
237 (mips_parse_argument_token, md_assemble, match_insn)
238 (match_mips16_insn): Use them instead of manipulating insn_error
240 (mips_ip, mips16_ip): Likewise. Simplify control flow.
242 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
244 * config/tc-mips.c (normalize_constant_expr): Move further up file.
245 (normalize_address_expr): Likewise.
246 (match_insn, match_mips16_insn): New functions, split out from...
247 (mips_ip, mips16_ip): ...here.
249 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
251 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
253 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
254 for optional operands.
256 2013-08-16 Alan Modra <amodra@gmail.com>
258 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
261 2013-08-16 Alan Modra <amodra@gmail.com>
263 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
265 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
267 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
268 argument as alignment.
270 2013-08-09 Nick Clifton <nickc@redhat.com>
272 * config/tc-rl78.c (elf_flags): New variable.
273 (enum options): Add OPTION_G10.
274 (md_longopts): Add mg10.
275 (md_parse_option): Parse -mg10.
276 (rl78_elf_final_processing): New function.
277 * config/tc-rl78.c (tc_final_processing): Define.
278 * doc/c-rl78.texi: Document -mg10 option.
280 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
282 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
283 suffixes to be elided too.
284 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
285 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
288 2013-08-05 John Tytgat <john@bass-software.com>
290 * po/POTFILES.in: Regenerate.
292 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
293 Konrad Eisele <konrad@gaisler.com>
295 * config/tc-sparc.c (sparc_arch_types): Add leon.
296 (sparc_arch): Move sparc4 around and add leon.
297 (sparc_target_format): Document -Aleon.
298 * doc/c-sparc.texi: Likewise.
300 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
302 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
304 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
305 Richard Sandiford <rdsandiford@googlemail.com>
307 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
308 (RWARN): Bump to 0x8000000.
309 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
310 (RTYPE_R5900_ACC): New register types.
311 (RTYPE_MASK): Include them.
312 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
314 (reg_names): Include them.
315 (mips_parse_register_1): New function, split out from...
316 (mips_parse_register): ...here. Add a channels_ptr parameter.
317 Look for VU0 channel suffixes when nonnull.
318 (reg_lookup): Update the call to mips_parse_register.
319 (mips_parse_vu0_channels): New function.
320 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
321 (mips_operand_token): Add a "channels" field to the union.
322 Extend the comment above "ch" to OT_DOUBLE_CHAR.
323 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
324 (mips_parse_argument_token): Handle channel suffixes here too.
325 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
326 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
328 (md_begin): Register $vfN and $vfI registers.
329 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
330 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
331 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
332 (match_vu0_suffix_operand): New function.
333 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
334 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
335 (mips_lookup_insn): New function.
336 (mips_ip): Use it. Allow "+K" operands to be elided at the end
337 of an instruction. Handle '#' sequences.
339 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
341 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
342 values and use it instead of sreg, treg, xreg, etc.
344 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
346 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
347 and mips_int_operand_max.
348 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
350 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
351 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
352 instead of mips16_immed_operand.
354 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
356 * config/tc-mips.c (mips16_macro): Don't use move_register.
357 (mips16_ip): Allow macros to use 'p'.
359 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
361 * config/tc-mips.c (MAX_OPERANDS): New macro.
362 (mips_operand_array): New structure.
363 (mips_operands, mips16_operands, micromips_operands): New arrays.
364 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
365 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
366 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
367 (micromips_to_32_reg_q_map): Delete.
368 (insn_operands, insn_opno, insn_extract_operand): New functions.
369 (validate_mips_insn): Take a mips_operand_array as argument and
370 use it to build up a list of operands. Extend to handle INSN_MACRO
372 (validate_mips16_insn): New function.
373 (validate_micromips_insn): Take a mips_operand_array as argument.
375 (md_begin): Initialize mips_operands, mips16_operands and
376 micromips_operands. Call validate_mips_insn and
377 validate_micromips_insn for macro instructions too.
378 Call validate_mips16_insn for MIPS16 instructions.
379 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
381 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
382 them. Handle INSN_UDI.
383 (get_append_method): Use gpr_read_mask.
385 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
387 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
388 flags for MIPS16 and non-MIPS16 instructions.
389 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
390 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
391 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
392 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
393 and non-MIPS16 instructions. Fix formatting.
395 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
397 * config/tc-mips.c (reg_needs_delay): Move later in file.
399 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
401 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
402 Alexander Ivchenko <alexander.ivchenko@intel.com>
403 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
404 Sergey Lega <sergey.s.lega@intel.com>
405 Anna Tikhonova <anna.tikhonova@intel.com>
406 Ilya Tocar <ilya.tocar@intel.com>
407 Andrey Turetskiy <andrey.turetskiy@intel.com>
408 Ilya Verbin <ilya.verbin@intel.com>
409 Kirill Yukhin <kirill.yukhin@intel.com>
410 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
412 * config/tc-i386-intel.c (O_zmmword_ptr): New.
413 (i386_types): Add zmmword.
414 (i386_intel_simplify_register): Allow regzmm.
415 (i386_intel_simplify): Handle zmmwords.
416 (i386_intel_operand): Handle RC/SAE, vector operations and
418 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
419 (struct RC_Operation): New.
420 (struct Mask_Operation): New.
421 (struct Broadcast_Operation): New.
422 (vex_prefix): Size of bytes increased to 4 to support EVEX
424 (enum i386_error): Add new error codes: unsupported_broadcast,
425 broadcast_not_on_src_operand, broadcast_needed,
426 unsupported_masking, mask_not_on_destination, no_default_mask,
427 unsupported_rc_sae, rc_sae_operand_not_last_imm,
428 invalid_register_operand, try_vector_disp8.
429 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
430 rounding, broadcast, memshift.
431 (struct RC_name): New.
432 (RC_NamesTable): New.
435 (extra_symbol_chars): Add '{'.
436 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
437 (i386_operand_type): Add regzmm, regmask and vec_disp8.
438 (match_mem_size): Handle zmmwords.
439 (operand_type_match): Handle zmm-registers.
440 (mode_from_disp_size): Handle vec_disp8.
441 (fits_in_vec_disp8): New.
442 (md_begin): Handle {} properly.
443 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
444 (build_vex_prefix): Handle vrex.
445 (build_evex_prefix): New.
446 (process_immext): Adjust to properly handle EVEX.
447 (md_assemble): Add EVEX encoding support.
448 (swap_2_operands): Correctly handle operands with masking,
449 broadcasting or RC/SAE.
450 (check_VecOperands): Support EVEX features.
451 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
452 (match_template): Support regzmm and handle new error codes.
453 (process_suffix): Handle zmmwords and zmm-registers.
454 (check_byte_reg): Extend to zmm-registers.
455 (process_operands): Extend to zmm-registers.
456 (build_modrm_byte): Handle EVEX.
457 (output_insn): Adjust to properly handle EVEX case.
458 (disp_size): Handle vec_disp8.
459 (output_disp): Support compressed disp8*N evex feature.
460 (output_imm): Handle RC/SAE immediates properly.
461 (check_VecOperations): New.
462 (i386_immediate): Handle EVEX features.
463 (i386_index_check): Handle zmmwords and zmm-registers.
464 (RC_SAE_immediate): New.
465 (i386_att_operand): Handle EVEX features.
466 (parse_real_register): Add a check for ZMM/Mask registers.
467 (OPTION_MEVEXLIG): New.
468 (OPTION_MEVEXWIG): New.
469 (md_longopts): Add mevexlig and mevexwig.
470 (md_parse_option): Handle mevexlig and mevexwig options.
471 (md_show_usage): Add description for mevexlig and mevexwig.
472 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
473 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
475 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
477 * config/tc-i386.c (cpu_arch): Add .sha.
478 * doc/c-i386.texi: Document sha/.sha.
480 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
481 Kirill Yukhin <kirill.yukhin@intel.com>
482 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
484 * config/tc-i386.c (BND_PREFIX): New.
485 (struct _i386_insn): Add new field bnd_prefix.
486 (add_bnd_prefix): New.
488 (i386_operand_type): Add regbnd.
489 (md_assemble): Handle BND prefixes.
490 (parse_insn): Likewise.
491 (output_branch): Likewise.
492 (output_jump): Likewise.
493 (build_modrm_byte): Handle regbnd.
494 (OPTION_MADD_BND_PREFIX): New.
495 (md_longopts): Add entry for 'madd-bnd-prefix'.
496 (md_parse_option): Handle madd-bnd-prefix option.
497 (md_show_usage): Add description for madd-bnd-prefix
499 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
501 2013-07-24 Tristan Gingold <gingold@adacore.com>
503 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
506 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
508 * config/tc-s390.c (s390_machine): Don't force the .machine
509 argument to lower case.
511 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
513 * config/tc-arm.c (s_arm_arch_extension): Improve error message
514 for invalid extension.
516 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
518 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
519 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
520 (aarch64_abi): New variable.
521 (ilp32_p): Change to be a macro.
522 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
523 (struct aarch64_option_abi_value_table): New struct.
524 (aarch64_abis): New table.
525 (aarch64_parse_abi): New function.
526 (aarch64_long_opts): Add entry for -mabi=.
527 * doc/as.texinfo (Target AArch64 options): Document -mabi.
528 * doc/c-aarch64.texi: Likewise.
530 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
532 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
535 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
537 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
539 * config/rx-parse.y: (rx_check_float_support): Add function to
540 check floating point operation support for target RX100 and
542 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
543 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
544 RX200, RX600, and RX610
546 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
548 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
550 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
552 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
553 * doc/c-avr.texi: Likewise.
555 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
557 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
558 error with older GCCs.
559 (mips16_macro_build): Dereference args.
561 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
563 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
564 New functions, split out from...
565 (reg_lookup): ...here. Remove itbl support.
566 (reglist_lookup): Delete.
567 (mips_operand_token_type): New enum.
568 (mips_operand_token): New structure.
569 (mips_operand_tokens): New variable.
570 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
571 (mips_parse_arguments): New functions.
572 (md_begin): Initialize mips_operand_tokens.
573 (mips_arg_info): Add a token field. Remove optional_reg field.
574 (match_char, match_expression): New functions.
575 (match_const_int): Use match_expression. Remove "s" argument
576 and return a boolean result. Remove O_register handling.
577 (match_regno, match_reg, match_reg_range): New functions.
578 (match_int_operand, match_mapped_int_operand, match_msb_operand)
579 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
580 (match_addiusp_operand, match_clo_clz_dest_operand)
581 (match_lwm_swm_list_operand, match_entry_exit_operand)
582 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
583 (match_tied_reg_operand): Remove "s" argument and return a boolean
584 result. Match tokens rather than text. Update calls to
585 match_const_int. Rely on match_regno to call check_regno.
586 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
587 "arg" argument. Return a boolean result.
588 (parse_float_constant): Replace with...
589 (match_float_constant): ...this new function.
590 (match_operand): Remove "s" argument and return a boolean result.
591 Update calls to subfunctions.
592 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
593 rather than string-parsing routines. Update handling of optional
594 registers for token scheme.
596 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
598 * config/tc-mips.c (parse_float_constant): Split out from...
601 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
603 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
606 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
608 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
609 (match_entry_exit_operand): New function.
610 (match_save_restore_list_operand): Likewise.
611 (match_operand): Use them.
612 (check_absolute_expr): Delete.
613 (mips16_ip): Rewrite main parsing loop to use mips_operands.
615 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
617 * config/tc-mips.c: Enable functions commented out in previous patch.
618 (SKIP_SPACE_TABS): Move further up file.
619 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
620 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
621 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
622 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
623 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
624 (micromips_imm_b_map, micromips_imm_c_map): Delete.
625 (mips_lookup_reg_pair): Delete.
626 (macro): Use report_bad_range and report_bad_field.
627 (mips_immed, expr_const_in_range): Delete.
628 (mips_ip): Rewrite main parsing loop to use new functions.
630 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
632 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
633 Change return type to bfd_boolean.
634 (report_bad_range, report_bad_field): New functions.
635 (mips_arg_info): New structure.
636 (match_const_int, convert_reg_type, check_regno, match_int_operand)
637 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
638 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
639 (match_addiusp_operand, match_clo_clz_dest_operand)
640 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
641 (match_pc_operand, match_tied_reg_operand, match_operand)
642 (check_completed_insn): New functions, commented out for now.
644 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
646 * config/tc-mips.c (insn_insert_operand): New function.
647 (macro_build, mips16_macro_build): Put null character check
648 in the for loop and convert continues to breaks. Use operand
649 structures to handle constant operands.
651 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
653 * config/tc-mips.c (validate_mips_insn): Move further up file.
654 Add insn_bits and decode_operand arguments. Use the mips_operand
655 fields to work out which bits an operand occupies. Detect double
657 (validate_micromips_insn): Move further up file. Call into
660 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
662 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
664 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
666 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
668 (macro): Update accordingly.
670 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
672 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
674 (md_assemble): Remove imm_reloc handling.
675 (mips_ip): Update commentary. Use offset_expr and offset_reloc
676 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
677 Use a temporary array rather than imm_reloc when parsing
678 constant expressions. Remove imm_reloc initialization.
679 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
680 for the relaxable field. Use a relax_char variable to track the
681 type of this field. Remove imm_reloc initialization.
683 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
685 * config/tc-mips.c (mips16_ip): Handle "I".
687 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
689 * config/tc-mips.c (mips_flag_nan2008): New variable.
690 (options): Add OPTION_NAN enum value.
691 (md_longopts): Handle it.
692 (md_parse_option): Likewise.
693 (s_nan): New function.
694 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
695 (md_show_usage): Add -mnan.
697 * doc/as.texinfo (Overview): Add -mnan.
698 * doc/c-mips.texi (MIPS Opts): Document -mnan.
699 (MIPS NaN Encodings): New node. Document .nan directive.
700 (MIPS-Dependent): List the new node.
702 2013-07-09 Tristan Gingold <gingold@adacore.com>
704 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
706 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
708 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
709 for 'A' and assume that the constant has been elided if the result
712 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
714 * config/tc-mips.c (gprel16_reloc_p): New function.
715 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
717 (offset_high_part, small_offset_p): New functions.
718 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
719 register load and store macros, handle the 16-bit offset case first.
720 If a 16-bit offset is not suitable for the instruction we're
721 generating, load it into the temporary register using
722 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
723 M_L_DAB code once the address has been constructed. For double load
724 and store macros, again handle the 16-bit offset case first.
725 If the second register cannot be accessed from the same high
726 part as the first, load it into AT using ADDRESS_ADDI_INSN.
727 Fix the handling of LD in cases where the first register is the
728 same as the base. Also handle the case where the offset is
729 not 16 bits and the second register cannot be accessed from the
730 same high part as the first. For unaligned loads and stores,
731 fuse the offbits == 12 and old "ab" handling. Apply this handling
732 whenever the second offset needs a different high part from the first.
733 Construct the offset using ADDRESS_ADDI_INSN where possible,
734 for offbits == 16 as well as offbits == 12. Use offset_reloc
735 when constructing the individual loads and stores.
736 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
737 and offset_reloc before matching against a particular opcode.
738 Handle elided 'A' constants. Allow 'A' constants to use
739 relocation operators.
741 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
743 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
744 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
745 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
747 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
749 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
750 Require the msb to be <= 31 for "+s". Check that the size is <= 31
751 for both "+s" and "+S".
753 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
755 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
756 (mips_ip, mips16_ip): Handle "+i".
758 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
760 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
761 (micromips_to_32_reg_h_map): Rename to...
762 (micromips_to_32_reg_h_map1): ...this.
763 (micromips_to_32_reg_i_map): Rename to...
764 (micromips_to_32_reg_h_map2): ...this.
765 (mips_lookup_reg_pair): New function.
766 (gpr_write_mask, macro): Adjust after above renaming.
767 (validate_micromips_insn): Remove "mi" handling.
768 (mips_ip): Likewise. Parse both registers in a pair for "mh".
770 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
772 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
773 (mips_ip): Remove "+D" and "+T" handling.
775 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
777 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
780 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
782 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
784 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
786 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
787 (aarch64_force_relocation): Likewise.
789 2013-07-02 Alan Modra <amodra@gmail.com>
791 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
793 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
795 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
796 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
797 Replace @sc{mips16} with literal `MIPS16'.
798 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
800 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
802 * config/tc-aarch64.c (reloc_table): Replace
803 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
804 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
805 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
806 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
807 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
808 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
809 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
810 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
811 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
812 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
813 (aarch64_force_relocation): Likewise.
815 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
817 * config/tc-aarch64.c (ilp32_p): New static variable.
818 (elf64_aarch64_target_format): Return the target according to the
820 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
821 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
822 (aarch64_dwarf2_addr_size): New function.
823 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
824 (DWARF2_ADDR_SIZE): New define.
826 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
828 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
830 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
832 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
834 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
836 * config/tc-mips.c (mips_set_options): Add insn32 member.
837 (mips_opts): Initialize it.
838 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
839 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
840 (md_longopts): Add "minsn32" and "mno-insn32" options.
841 (is_size_valid): Handle insn32 mode.
842 (md_assemble): Pass instruction string down to macro.
843 (brk_fmt): Add second dimension and insn32 mode initializers.
844 (mfhl_fmt): Likewise.
845 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
846 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
847 (macro_build_jalr, move_register): Handle insn32 mode.
848 (macro_build_branch_rs): Likewise.
849 (macro): Handle insn32 mode.
850 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
851 (mips_ip): Handle insn32 mode.
852 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
853 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
854 (mips_handle_align): Handle insn32 mode.
855 (md_show_usage): Add -minsn32 and -mno-insn32.
857 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
859 (-minsn32, -mno-insn32): New options.
860 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
862 (MIPS assembly options): New node. Document .set insn32 and
864 (MIPS-Dependent): List the new node.
866 2013-06-25 Nick Clifton <nickc@redhat.com>
868 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
869 the PC in indirect addressing on 430xv2 parts.
870 (msp430_operands): Add version test to hardware bug encoding
873 2013-06-24 Roland McGrath <mcgrathr@google.com>
875 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
876 so it skips whitespace before it.
877 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
879 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
880 (arm_reg_parse_multi): Skip whitespace first.
881 (parse_reg_list): Likewise.
882 (parse_vfp_reg_list): Likewise.
883 (s_arm_unwind_save_mmxwcg): Likewise.
885 2013-06-24 Nick Clifton <nickc@redhat.com>
888 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
890 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
892 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
894 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
896 * config/tc-mips.c: Assert that offsetT and valueT are at least
898 (GPR_SMIN, GPR_SMAX): New macros.
899 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
901 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
903 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
904 conditions. Remove any code deselected by them.
905 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
907 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
909 * NEWS: Note removal of ECOFF support.
910 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
911 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
912 (MULTI_CFILES): Remove config/e-mipsecoff.c.
913 * Makefile.in: Regenerate.
914 * configure.in: Remove MIPS ECOFF references.
915 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
917 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
918 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
919 (mips-*-*): ...this single case.
920 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
921 MIPS emulations to be e-mipself*.
922 * configure: Regenerate.
923 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
924 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
925 (mips-*-sysv*): Remove coff and ecoff cases.
926 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
927 * ecoff.c: Remove reference to MIPS ECOFF.
928 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
929 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
930 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
931 (mips_hi_fixup): Tweak comment.
932 (append_insn): Require a howto.
933 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
935 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
937 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
938 Use "CPU" instead of "cpu".
939 * doc/c-mips.texi: Likewise.
940 (MIPS Opts): Rename to MIPS Options.
941 (MIPS option stack): Rename to MIPS Option Stack.
942 (MIPS ASE instruction generation overrides): Rename to
943 MIPS ASE Instruction Generation Overrides (for now).
944 (MIPS floating-point): Rename to MIPS Floating-Point.
946 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
948 * doc/c-mips.texi (MIPS Macros): New section.
949 (MIPS Object): Replace with...
950 (MIPS Small Data): ...this new section.
952 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
954 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
955 Capitalize name. Use @kindex instead of @cindex for .set entries.
957 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
959 * doc/c-mips.texi (MIPS Stabs): Remove section.
961 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
963 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
964 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
965 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
966 (ISA_SUPPORTS_VIRT64_ASE): Delete.
967 (mips_ase): New structure.
968 (mips_ases): New table.
969 (FP64_ASES): New macro.
970 (mips_ase_groups): New array.
971 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
972 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
974 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
975 (md_parse_option): Use mips_ases and mips_set_ase instead of
976 separate case statements for each ASE option.
977 (mips_after_parse_args): Use FP64_ASES. Use
978 mips_check_isa_supports_ases to check the ASEs against
980 (s_mipsset): Use mips_ases and mips_set_ase instead of
981 separate if statements for each ASE option. Use
982 mips_check_isa_supports_ases, even when a non-ASE option
985 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
987 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
989 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
991 * config/tc-mips.c (md_shortopts, options, md_longopts)
992 (md_longopts_size): Move earlier in file.
994 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
996 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
997 with a single "ase" bitmask.
998 (mips_opts): Update accordingly.
999 (file_ase, file_ase_explicit): New variables.
1000 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1001 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1002 (ISA_HAS_ROR): Adjust for mips_set_options change.
1003 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1004 (mips_ip): Adjust for mips_set_options change.
1005 (md_parse_option): Likewise. Update file_ase_explicit.
1006 (mips_after_parse_args): Adjust for mips_set_options change.
1007 Use bitmask operations to select the default ASEs. Set file_ase
1008 rather than individual per-ASE variables.
1009 (s_mipsset): Adjust for mips_set_options change.
1010 (mips_elf_final_processing): Test file_ase rather than
1011 file_ase_mdmx. Remove commented-out code.
1013 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1015 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1016 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1017 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1018 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1019 (mips_after_parse_args): Use the new "ase" field to choose
1021 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1024 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1026 * config/tc-arm.c (symbol_preemptible): New function.
1027 (relax_branch): Use it.
1029 2013-06-17 Catherine Moore <clm@codesourcery.com>
1030 Maciej W. Rozycki <macro@codesourcery.com>
1031 Chao-Ying Fu <fu@mips.com>
1033 * config/tc-mips.c (mips_set_options): Add ase_eva.
1034 (mips_set_options mips_opts): Add ase_eva.
1035 (file_ase_eva): Declare.
1036 (ISA_SUPPORTS_EVA_ASE): Define.
1037 (IS_SEXT_9BIT_NUM): Define.
1038 (MIPS_CPU_ASE_EVA): Define.
1039 (is_opcode_valid): Add support for ase_eva.
1040 (macro_build): Likewise.
1042 (validate_mips_insn): Likewise.
1043 (validate_micromips_insn): Likewise.
1044 (mips_ip): Likewise.
1045 (options): Add OPTION_EVA and OPTION_NO_EVA.
1046 (md_longopts): Add -meva and -mno-eva.
1047 (md_parse_option): Process new options.
1048 (mips_after_parse_args): Check for valid EVA combinations.
1049 (s_mipsset): Likewise.
1051 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1053 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1054 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1055 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1056 (dwarf2_gen_line_info_1): Update call accordingly.
1057 (dwarf2_move_insn): New function.
1058 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1060 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1064 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1067 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1068 (dwarf2_gen_line_info_1): Delete.
1069 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1070 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1071 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1072 (dwarf2_directive_loc): Push previous .locs instead of generating
1075 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1077 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1078 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1080 2013-06-13 Nick Clifton <nickc@redhat.com>
1083 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1084 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1085 function. Generates an error if the adjusted offset is out of a
1088 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1090 * config/tc-nios2.c (md_apply_fix): Mask constant
1091 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1093 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1095 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1096 MIPS-3D instructions either.
1097 (md_convert_frag): Update the COPx branch mask accordingly.
1099 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1101 * doc/as.texinfo (Overview): Add --relax-branch and
1103 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1106 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1108 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1111 2013-06-08 Catherine Moore <clm@codesourcery.com>
1113 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1114 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1115 (append_insn): Change INSN_xxxx to ASE_xxxx.
1117 2013-06-01 George Thomas <george.thomas@atmel.com>
1119 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1122 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1124 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1127 2013-05-31 Paul Brook <paul@codesourcery.com>
1129 * config/tc-mips.c (s_ehword): New.
1131 2013-05-30 Paul Brook <paul@codesourcery.com>
1133 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1135 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1137 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1138 convert relocs who have no relocatable field either. Rephrase
1139 the conditional so that the PC-relative check is only applied
1142 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1144 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1147 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1149 * config/tc-aarch64.c (reloc_table): Update to use
1150 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1151 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1152 (md_apply_fix): Likewise.
1153 (aarch64_force_relocation): Likewise.
1155 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1157 * config/tc-arm.c (it_fsm_post_encode): Improve
1158 warning messages about deprecated IT block formats.
1160 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1162 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1163 inside fx_done condition.
1165 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1167 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1169 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1171 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1172 and clean up warning when using PRINT_OPCODE_TABLE.
1174 2013-05-20 Alan Modra <amodra@gmail.com>
1176 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1177 and data fixups performing shift/high adjust/sign extension on
1178 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1179 when writing data fixups rather than recalculating size.
1181 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1183 * doc/c-msp430.texi: Fix typo.
1185 2013-05-16 Tristan Gingold <gingold@adacore.com>
1187 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1188 are also TOC symbols.
1190 2013-05-16 Nick Clifton <nickc@redhat.com>
1192 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1193 Add -mcpu command to specify core type.
1194 * doc/c-msp430.texi: Update documentation.
1196 2013-05-09 Andrew Pinski <apinski@cavium.com>
1198 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1199 (mips_opts): Update for the new field.
1200 (file_ase_virt): New variable.
1201 (ISA_SUPPORTS_VIRT_ASE): New macro.
1202 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1203 (MIPS_CPU_ASE_VIRT): New define.
1204 (is_opcode_valid): Handle ase_virt.
1205 (macro_build): Handle "+J".
1206 (validate_mips_insn): Likewise.
1207 (mips_ip): Likewise.
1208 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1209 (md_longopts): Add mvirt and mnovirt
1210 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1211 (mips_after_parse_args): Handle ase_virt field.
1212 (s_mipsset): Handle "virt" and "novirt".
1213 (mips_elf_final_processing): Add a comment about virt ASE might need
1215 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1216 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1217 Document ".set virt" and ".set novirt".
1219 2013-05-09 Alan Modra <amodra@gmail.com>
1221 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1222 control of operand flag bits.
1224 2013-05-07 Alan Modra <amodra@gmail.com>
1226 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1227 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1228 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1229 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1230 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1231 Shift and sign-extend fieldval for use by some VLE reloc
1232 operand->insert functions.
1234 2013-05-06 Paul Brook <paul@codesourcery.com>
1235 Catherine Moore <clm@codesourcery.com>
1237 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1238 (limited_pcrel_reloc_p): Likewise.
1239 (md_apply_fix): Likewise.
1240 (tc_gen_reloc): Likewise.
1242 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1244 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1245 (mips_fix_adjustable): Adjust pc-relative check to use
1248 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1250 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1251 (s_mips_stab): Do not restrict to stabn only.
1253 2013-05-02 Nick Clifton <nickc@redhat.com>
1255 * config/tc-msp430.c: Add support for the MSP430X architecture.
1256 Add code to insert a NOP instruction after any instruction that
1257 might change the interrupt state.
1258 Add support for the LARGE memory model.
1259 Add code to initialise the .MSP430.attributes section.
1260 * config/tc-msp430.h: Add support for the MSP430X architecture.
1261 * doc/c-msp430.texi: Document the new -mL and -mN command line
1263 * NEWS: Mention support for the MSP430X architecture.
1265 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1267 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1268 alpha*-*-linux*ecoff*.
1270 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1272 * config/tc-mips.c (mips_ip): Add sizelo.
1273 For "+C", "+G", and "+H", set sizelo and compare against it.
1275 2013-04-29 Nick Clifton <nickc@redhat.com>
1277 * as.c (Options): Add -gdwarf-sections.
1278 (parse_args): Likewise.
1279 * as.h (flag_dwarf_sections): Declare.
1280 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1281 (process_entries): When -gdwarf-sections is enabled generate
1282 fragmentary .debug_line sections.
1283 (out_debug_line): Set the section for the .debug_line section end
1285 * doc/as.texinfo: Document -gdwarf-sections.
1286 * NEWS: Mention -gdwarf-sections.
1288 2013-04-26 Christian Groessler <chris@groessler.org>
1290 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1291 according to the target parameter. Don't call s_segm since s_segm
1292 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1294 (md_begin): Call s_segm according to target parameter from command
1297 2013-04-25 Alan Modra <amodra@gmail.com>
1299 * configure.in: Allow little-endian linux.
1300 * configure: Regenerate.
1302 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1304 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1305 "fstatus" control register to "eccinj".
1307 2013-04-19 Kai Tietz <ktietz@redhat.com>
1309 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1311 2013-04-15 Julian Brown <julian@codesourcery.com>
1313 * expr.c (add_to_result, subtract_from_result): Make global.
1314 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1315 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1316 subtract_from_result to handle extra bit of precision for .sleb128
1319 2013-04-10 Julian Brown <julian@codesourcery.com>
1321 * read.c (convert_to_bignum): Add sign parameter. Use it
1322 instead of X_unsigned to determine sign of resulting bignum.
1323 (emit_expr): Pass extra argument to convert_to_bignum.
1324 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1325 X_extrabit to convert_to_bignum.
1326 (parse_bitfield_cons): Set X_extrabit.
1327 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1328 Initialise X_extrabit field as appropriate.
1329 (add_to_result): New.
1330 (subtract_from_result): New.
1332 * expr.h (expressionS): Add X_extrabit field.
1334 2013-04-10 Jan Beulich <jbeulich@suse.com>
1336 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1337 register being PC when is_t or writeback, and use distinct
1338 diagnostic for the latter case.
1340 2013-04-10 Jan Beulich <jbeulich@suse.com>
1342 * gas/config/tc-arm.c (parse_operands): Re-write
1343 po_barrier_or_imm().
1344 (do_barrier): Remove bogus constraint().
1345 (do_t_barrier): Remove.
1347 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1349 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1350 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1352 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1354 2013-04-09 Jan Beulich <jbeulich@suse.com>
1356 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1357 Use local variable Rt in more places.
1358 (do_vmsr): Accept all control registers.
1360 2013-04-09 Jan Beulich <jbeulich@suse.com>
1362 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1363 if there was none specified for moves between scalar and core
1366 2013-04-09 Jan Beulich <jbeulich@suse.com>
1368 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1369 NEON_ALL_LANES case.
1371 2013-04-08 Jan Beulich <jbeulich@suse.com>
1373 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1376 2013-04-08 Jan Beulich <jbeulich@suse.com>
1378 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1381 2013-04-03 Alan Modra <amodra@gmail.com>
1383 * doc/as.texinfo: Add support to generate man options for h8300.
1384 * doc/c-h8300.texi: Likewise.
1386 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1388 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1391 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1394 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1396 2013-03-26 Nick Clifton <nickc@redhat.com>
1399 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1400 start of the file each time.
1403 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1406 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1408 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1411 2013-03-21 Will Newton <will.newton@linaro.org>
1413 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1414 pc-relative str instructions in Thumb mode.
1416 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1418 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1419 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1421 * config/tc-h8300.h: Remove duplicated defines.
1423 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1426 * tc-avr.c (mcu_has_3_byte_pc): New function.
1427 (tc_cfi_frame_initial_instructions): Call it to find return
1430 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1433 * config/tc-tic6x.c (tic6x_try_encode): Handle
1434 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1435 encode register pair numbers when required.
1437 2013-03-15 Will Newton <will.newton@linaro.org>
1439 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1440 in vstr in Thumb mode for pre-ARMv7 cores.
1442 2013-03-14 Andreas Schwab <schwab@suse.de>
1444 * doc/c-arc.texi (ARC Directives): Revert last change and use
1445 @itemize instead of @table.
1446 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1448 2013-03-14 Nick Clifton <nickc@redhat.com>
1451 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1452 NULL message, instead just check ARM_CPU_IS_ANY directly.
1454 2013-03-14 Nick Clifton <nickc@redhat.com>
1457 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1459 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1460 to the @item directives.
1461 (ARM-Neon-Alignment): Move to correct place in the document.
1462 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1464 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1467 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1469 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1470 case. Add default BAD_CASE to switch.
1472 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1474 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1475 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1477 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1479 * config/tc-arm.c (crc_ext_armv8): New feature set.
1480 (UNPRED_REG): New macro.
1481 (do_crc32_1): New function.
1482 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1483 do_crc32ch, do_crc32cw): Likewise.
1485 (insns): Add entries for crc32 mnemonics.
1486 (arm_extensions): Add entry for crc.
1488 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1490 * write.h (struct fix): Add fx_dot_frag field.
1491 (dot_frag): Declare.
1492 * write.c (dot_frag): New variable.
1493 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1494 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1495 * expr.c (expr): Save value of frag_now in dot_frag when setting
1497 * read.c (emit_expr): Likewise. Delete comments.
1499 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1501 * config/tc-i386.c (flag_code_names): Removed.
1502 (i386_index_check): Rewrote.
1504 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1506 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1508 (aarch64_double_precision_fmovable): New function.
1509 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1510 function; handle hexadecimal representation of IEEE754 encoding.
1511 (parse_operands): Update the call to parse_aarch64_imm_float.
1513 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1515 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1516 (check_hle): Updated.
1517 (md_assemble): Likewise.
1518 (parse_insn): Likewise.
1520 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1522 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1523 (md_assemble): Check if REP prefix is OK.
1524 (parse_insn): Remove expecting_string_instruction. Set
1527 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1529 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1531 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1533 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1534 for system registers.
1536 2013-02-27 DJ Delorie <dj@redhat.com>
1538 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1539 (rl78_op): Handle %code().
1540 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1541 (tc_gen_reloc): Likwise; convert to a computed reloc.
1542 (md_apply_fix): Likewise.
1544 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1546 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1548 2013-02-25 Terry Guo <terry.guo@arm.com>
1550 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1551 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1552 list of accepted CPUs.
1554 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1557 * config/tc-i386.c (cpu_arch): Add ".smap".
1559 * doc/c-i386.texi: Document smap.
1561 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1563 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1564 mips_assembling_insn appropriately.
1565 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1567 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1569 * config/tc-mips.c (append_insn): Correct indentation, remove
1572 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1574 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1576 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1578 * configure.tgt: Add nios2-*-rtems*.
1580 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1582 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1585 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1587 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1588 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1590 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1592 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1595 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1596 Andrew Jenner <andrew@codesourcery.com>
1598 Based on patches from Altera Corporation.
1600 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1601 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1602 * Makefile.in: Regenerated.
1603 * configure.tgt: Add case for nios2*-linux*.
1604 * config/obj-elf.c: Conditionally include elf/nios2.h.
1605 * config/tc-nios2.c: New file.
1606 * config/tc-nios2.h: New file.
1607 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1608 * doc/Makefile.in: Regenerated.
1609 * doc/all.texi: Set NIOSII.
1610 * doc/as.texinfo (Overview): Add Nios II options.
1611 (Machine Dependencies): Include c-nios2.texi.
1612 * doc/c-nios2.texi: New file.
1613 * NEWS: Note Altera Nios II support.
1615 2013-02-06 Alan Modra <amodra@gmail.com>
1618 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1619 Don't skip fixups with fx_subsy non-NULL.
1620 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1621 with fx_subsy non-NULL.
1623 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1625 * doc/c-metag.texi: Add "@c man" markers.
1627 2013-02-04 Alan Modra <amodra@gmail.com>
1629 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1631 (TC_ADJUST_RELOC_COUNT): Delete.
1632 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1634 2013-02-04 Alan Modra <amodra@gmail.com>
1636 * po/POTFILES.in: Regenerate.
1638 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1640 * config/tc-metag.c: Make SWAP instruction less permissive with
1643 2013-01-29 DJ Delorie <dj@redhat.com>
1645 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1646 relocs in .word/.etc statements.
1648 2013-01-29 Roland McGrath <mcgrathr@google.com>
1650 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1651 immediate value for 8-bit offset" error so it shows line info.
1653 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1655 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1658 2013-01-24 Nick Clifton <nickc@redhat.com>
1660 * config/tc-v850.c: Add support for e3v5 architecture.
1661 * doc/c-v850.texi: Mention new support.
1663 2013-01-23 Nick Clifton <nickc@redhat.com>
1666 * config/tc-avr.c: Include dwarf2dbg.h.
1668 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1670 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1671 (tc_i386_fix_adjustable): Likewise.
1672 (lex_got): Likewise.
1673 (tc_gen_reloc): Likewise.
1675 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1677 * config/tc-aarch64.c (output_operand_error_record): Change to output
1678 the out-of-range error message as value-expected message if there is
1679 only one single value in the expected range.
1680 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1681 LSL #0 as a programmer-friendly feature.
1683 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1685 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1686 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1687 BFD_RELOC_64_SIZE relocations.
1688 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1690 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1691 relocations against local symbols.
1693 2013-01-16 Alan Modra <amodra@gmail.com>
1695 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1696 finding some sort of toc syntax error, and break to avoid
1697 compiler uninit warning.
1699 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1702 * config/tc-i386.c (lex_got): Increment length by 1 if the
1703 relocation token is removed.
1705 2013-01-15 Nick Clifton <nickc@redhat.com>
1707 * config/tc-v850.c (md_assemble): Allow signed values for
1710 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1712 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1715 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1717 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1718 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1719 * config/tc-ppc.c (md_show_usage): Likewise.
1720 (ppc_handle_align): Handle power8's group ending nop.
1722 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1724 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1725 that the assember exits after the opcodes have been printed.
1727 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1729 * app.c: Remove trailing white spaces.
1733 * dw2gencfi.c: Likewise.
1734 * dwarf2dbg.h: Likewise.
1735 * ecoff.c: Likewise.
1736 * input-file.c: Likewise.
1737 * itbl-lex.h: Likewise.
1738 * output-file.c: Likewise.
1741 * subsegs.c: Likewise.
1742 * symbols.c: Likewise.
1743 * write.c: Likewise.
1744 * config/tc-i386.c: Likewise.
1745 * doc/Makefile.am: Likewise.
1746 * doc/Makefile.in: Likewise.
1747 * doc/c-aarch64.texi: Likewise.
1748 * doc/c-alpha.texi: Likewise.
1749 * doc/c-arc.texi: Likewise.
1750 * doc/c-arm.texi: Likewise.
1751 * doc/c-avr.texi: Likewise.
1752 * doc/c-bfin.texi: Likewise.
1753 * doc/c-cr16.texi: Likewise.
1754 * doc/c-d10v.texi: Likewise.
1755 * doc/c-d30v.texi: Likewise.
1756 * doc/c-h8300.texi: Likewise.
1757 * doc/c-hppa.texi: Likewise.
1758 * doc/c-i370.texi: Likewise.
1759 * doc/c-i386.texi: Likewise.
1760 * doc/c-i860.texi: Likewise.
1761 * doc/c-m32c.texi: Likewise.
1762 * doc/c-m32r.texi: Likewise.
1763 * doc/c-m68hc11.texi: Likewise.
1764 * doc/c-m68k.texi: Likewise.
1765 * doc/c-microblaze.texi: Likewise.
1766 * doc/c-mips.texi: Likewise.
1767 * doc/c-msp430.texi: Likewise.
1768 * doc/c-mt.texi: Likewise.
1769 * doc/c-s390.texi: Likewise.
1770 * doc/c-score.texi: Likewise.
1771 * doc/c-sh.texi: Likewise.
1772 * doc/c-sh64.texi: Likewise.
1773 * doc/c-tic54x.texi: Likewise.
1774 * doc/c-tic6x.texi: Likewise.
1775 * doc/c-v850.texi: Likewise.
1776 * doc/c-xc16x.texi: Likewise.
1777 * doc/c-xgate.texi: Likewise.
1778 * doc/c-xtensa.texi: Likewise.
1779 * doc/c-z80.texi: Likewise.
1780 * doc/internals.texi: Likewise.
1782 2013-01-10 Roland McGrath <mcgrathr@google.com>
1784 * hash.c (hash_new_sized): Make it global.
1785 * hash.h: Declare it.
1786 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1789 2013-01-10 Will Newton <will.newton@imgtec.com>
1791 * Makefile.am: Add Meta.
1792 * Makefile.in: Regenerate.
1793 * config/tc-metag.c: New file.
1794 * config/tc-metag.h: New file.
1795 * configure.tgt: Add Meta.
1796 * doc/Makefile.am: Add Meta.
1797 * doc/Makefile.in: Regenerate.
1798 * doc/all.texi: Add Meta.
1799 * doc/as.texiinfo: Document Meta options.
1800 * doc/c-metag.texi: New file.
1802 2013-01-09 Steve Ellcey <sellcey@mips.com>
1804 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1806 * config/tc-mips.c (internalError): Remove, replace with abort.
1808 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1810 * config/tc-aarch64.c (parse_operands): Change to compare the result
1811 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1813 2013-01-07 Nick Clifton <nickc@redhat.com>
1816 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1817 anticipated character.
1818 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1819 here as it is no longer needed.
1821 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1823 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1824 * doc/c-score.texi (SCORE-Opts): Likewise.
1825 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1827 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1829 * config/tc-mips.c: Add support for MIPS r5900.
1830 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1832 (can_swap_branch_p, get_append_method): Detect some conditional
1833 short loops to fix a bug on the r5900 by NOP in the branch delay
1835 (M_MUL): Support 3 operands in multu on r5900.
1836 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1837 (s_mipsset): Force 32 bit floating point on r5900.
1838 (mips_ip): Check parameter range of instructions mfps and mtps on
1840 * configure.in: Detect CPU type when target string contains r5900
1841 (e.g. mips64r5900el-linux-gnu).
1843 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1845 * as.c (parse_args): Update copyright year to 2013.
1847 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1849 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1852 2013-01-02 Nick Clifton <nickc@redhat.com>
1855 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1858 For older changes see ChangeLog-2012
1860 Copyright (C) 2013 Free Software Foundation, Inc.
1862 Copying and distribution of this file, with or without modification,
1863 are permitted in any medium without royalty provided the copyright
1864 notice and this notice are preserved.
1870 version-control: never