1 2013-12-18 Yufeng Zhang <yufeng.zhang@arm.com>
3 * config/tc-aarch64.c (md_assemble): Defer the feature checking until
6 2013-12-18 Nick Clifton <nickc@redhat.com>
8 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' in
9 order to avoid conflict with same named variable in MinGW system
12 2013-12-13 Nick Clifton <nickc@redhat.com>
14 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
15 (OPTION_INTR_NOPS): Define.
16 (gen_interrupt_nops): Default to FALSE.
17 (md_parse_opton): Add support for OPTION_INTR_NOPS.
18 (md_longopts): Add -mn.
19 (md_show_usage): Add -mn.
20 (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
21 * doc/c-msp430.c: Document -mn.
23 2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
24 Wei-Cheng Wang <cole945@gmail.com>
25 Hsiang-Kai Wang <hsiangkai@gmail.com>
26 Hui-Wen Ni <sabrinanitw@gmail.com>
28 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
29 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
30 * Makefile.in: Regenerate.
31 * configure.in (nds32): Add nds32 target extension config support.
32 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
33 * configure: Regenerate.
34 * config/tc-nds32.c: New file for nds32.
35 * config/tc-nds32.h: New file for nds32.
36 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
37 * doc/Makefile.in: Regenerate.
38 * doc/as.texinfo: Add nds32 options.
39 * doc/all.texi: Set NDS32.
40 * doc/c-nds32.texi: New file dor nds32 document.
41 * NEWS: Announce Andes nds32 support.
43 2013-12-10 Roland McGrath <mcgrathr@google.com>
45 * Makefile.am (install-exec-bindir): Prefix libtool invocation
46 with $(INSTALL_PROGRAM_ENV).
47 (install-exec-tooldir): Likewise.
48 * Makefile.in: Regenerate.
50 2013-12-07 Mike Frysinger <vapier@gentoo.org>
52 * config/bfin-aux.h: Remove +x file mode.
53 * config/tc-epiphany.c: Likewise.
54 * config/tc-epiphany.h: Likewise.
56 2013-12-03 Tristan Gingold <gingold@adacore.com>
58 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
61 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
65 2013-11-19 Nick Clifton <nickc@redhat.com>
67 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
68 for deprecated system registers when parsing pstate fields.
70 2013-11-19 Nick Clifton <nickc@redhat.com>
72 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
73 for deprecated system registers when parsing pstate fields.
75 2013-11-19 Catherine Moore <clm@codesourcery.com>
77 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
78 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
79 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
81 (INSN_DMULTU): Define.
82 (insns_between): Detect PMC RM7000 errata.
83 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
84 OPTION_NO_FIX_PMC_RM7000.
85 * doc/as.texinfo: Document new options.
86 * doc/c-mips.texi: Likewise.
88 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
91 * app.c (do_scrub_chars): Only insert a newline character if
92 end-of-file has been reached.
94 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
96 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
99 2013-11-18 Renlin Li <Renlin.Li@arm.com>
101 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
102 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
103 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
104 (cpu_arch_ver): Likewise.
105 * doc/c-arm.texi: Document armv7ve.
107 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
109 * config/tc-aarch64.c (parse_sys_reg): Support
110 S2_<op1>_<Cn>_<Cm>_<op2>.
112 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
116 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
118 * config/tc-aarch64.c (set_other_error): New function.
119 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
120 the variable to which it points with 'o'.
121 (parse_operands): Update; check for write to read-only system
122 registers or read from write-only ones.
124 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
126 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
127 indicate if instruction has the BND prefix. Return
128 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
129 bnd_prefix isn't zero.
130 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
132 (output_jump): Update reloc call.
133 (output_interseg_jump): Likewise.
134 (output_disp): Likewise.
135 (output_imm): Likewise.
136 (x86_cons_fix_new): Likewise.
137 (lex_got): Add an argument, bnd_prefix, to indicate if
138 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
140 (x86_cons): Update lex_got call.
141 (i386_immediate): Likewise.
142 (i386_displacement): Likewise.
143 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
144 BFD_RELOC_X86_64_PLT32_BND.
145 (tc_gen_reloc): Likewise.
146 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
148 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
150 * config/tc-aarch64.c (set_other_error): New function.
151 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
152 the variable to which it points with 'o'.
153 (parse_operands): Update; check for write to read-only system
154 registers or read from write-only ones.
156 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
158 * config/tc-i386.c (check_VecOperands): Reorder checks.
160 2013-11-11 Catherine Moore <clm@codesourcery.com>
162 * config/mips/tc-mips.c (convert_reg_type): Use
163 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
164 (reg_needs_delay): Likewise.
165 (insns_between): Likewise.
167 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
169 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
171 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
173 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
174 call aarch64_sys_reg_deprecated_p and warn about the deprecated
177 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
179 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
181 2013-11-05 Will Newton <will.newton@linaro.org>
184 * config/tc-aarch64.c (parse_operands): Avoid trying to
185 parse a vector register as an immediate.
187 2013-11-04 Jan Beulich <jbeulich@suse.com>
189 * config/tc-i386.c (check_long_reg): Correct comment indentation.
190 (check_qword_reg): Correct comment and its indentation.
191 (check_word_reg): Extend comment and correct its indentation. Also
192 check for 64-bit register.
194 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
196 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
197 (ppc_elf_localentry): New function.
198 (ppc_force_relocation): Force relocs on all branches to localenty
200 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
202 2013-10-30 Alan Modra <amodra@gmail.com>
204 * config/tc-ppc.c: Include elf/ppc64.h.
205 (ppc_abiversion): New variable.
206 (md_pseudo_table): Add .abiversion.
207 (ppc_elf_abiversion, ppc_elf_end): New functions.
208 * config/tc-ppc.h (md_end): Define.
210 2013-10-30 Alan Modra <amodra@gmail.com>
212 * config/tc-ppc.c (SEX16): Don't mask.
213 (REPORT_OVERFLOW_HI): Define as zero.
214 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
215 @tprel@high, and @tprel@higha modifiers.
216 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
217 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
219 (md_apply_fix): Similarly.
221 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
223 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
224 (fpr_write_mask): Test MSA registers.
225 (can_swap_branch_p): Check fpr write followed by fpr read.
227 2013-10-18 Nick Clifton <nickc@redhat.com>
229 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
231 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
232 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
234 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
235 (md_longopts): Add mmsa and mno-msa.
236 (mips_ases): Add msa.
237 (RTYPE_MASK): Update.
238 (RTYPE_MSA): New define.
239 (OT_REG_ELEMENT): Replace with...
240 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
241 (mips_operand_token): Replace reg_element with index.
242 (mips_parse_argument_token): Treat vector indices as separate tokens.
243 Handle register indices.
244 (md_begin): Add MSA register names.
245 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
246 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
247 (match_mdmx_imm_reg_operand): Update accordingly.
248 (match_imm_index_operand): New function.
249 (match_reg_index_operand): New function.
250 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
251 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
252 (md_show_usage): Print -mmsa and -mno-msa.
253 * doc/as.texinfo: Document -mmsa and -mno-msa.
254 * doc/c-mips.texi: Document -mmsa and -mno-msa.
255 Document .set msa and .set nomsa.
257 2013-10-14 Nick Clifton <nickc@redhat.com>
259 * read.c (add_include_dir): Use xrealloc.
260 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
261 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
263 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
265 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
266 also test/refer to "sstatus". Reformat the warning message.
268 2013-10-10 Sean Keys <skeys@ipdatasys.com>
270 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
272 2013-10-10 Jan Beulich <jbeulich@suse.com>
274 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
275 swapping for bndmk, bndldx, and bndstx.
277 2013-10-09 Nick Clifton <nickc@redhat.com>
280 * config/tc-epiphany.c (md_convert_frag): Add missing break
284 * config/tc-mn10200.c (md_convert_frag): Add missing break
287 2013-10-08 Jan Beulich <jbeulich@suse.com>
289 * tc-i386.c (check_word_reg): Remove misplaced "else".
290 (check_long_reg): Restore symmetry with check_word_reg.
292 2013-10-08 Jan Beulich <jbeulich@suse.com>
294 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
297 2013-10-08 Nick Clifton <nickc@redhat.com>
299 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
300 for "<foo>a". Issue error messages for unrecognised or corrrupt
303 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
305 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
308 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
310 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
311 * doc/c-i386.texi: Add -march=bdver4 option.
313 2013-09-20 Alan Modra <amodra@gmail.com>
315 * configure: Regenerate.
317 2013-09-18 Tristan Gingold <gingold@adacore.com>
319 * NEWS: Add marker for 2.24.
321 2013-09-18 Nick Clifton <nickc@redhat.com>
323 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
324 (move_data): New variable.
325 (md_parse_option): Parse -md.
326 (msp430_section): New function. Catch references to the .bss or
327 .data sections and generate a special symbol for use by the libcrt
329 (md_pseudo_table): Intercept .section directives.
330 (md_longopt): Add -md
331 (md_show_usage): Likewise.
332 (msp430_operands): Generate a warning message if a NOP is inserted
333 into the instruction stream.
334 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
336 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
338 * config/tc-mips.c (mips_elf_final_processing): Set
339 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
341 2013-09-16 Will Newton <will.newton@linaro.org>
343 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
344 disallowing element size 64 with interleave other than 1.
346 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
348 * config/tc-mips.c (match_insn): Set error when $31 is used for
351 2013-09-04 Tristan Gingold <gingold@adacore.com>
353 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
356 2013-09-04 Roland McGrath <mcgrathr@google.com>
359 * config/tc-arm.c (T16_32_TAB): Add _udf.
360 (do_t_udf): New function.
363 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
365 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
366 assembler errors at correct position.
368 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
371 * config/tc-ia64.c: Fix typos.
372 * config/tc-sparc.c: Likewise.
373 * config/tc-z80.c: Likewise.
374 * doc/c-i386.texi: Likewise.
375 * doc/c-m32r.texi: Likewise.
377 2013-08-23 Will Newton <will.newton@linaro.org>
379 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
380 for pre-indexed addressing modes.
382 2013-08-21 Alan Modra <amodra@gmail.com>
384 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
385 range check label number for use with fb_low_counter array.
387 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
389 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
390 (mips_parse_argument_token, validate_micromips_insn, md_begin)
391 (check_regno, match_float_constant, check_completed_insn, append_insn)
392 (match_insn, match_mips16_insn, match_insns, macro_start)
393 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
394 (mips16_ip, mips_set_option_string, md_parse_option)
395 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
396 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
397 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
398 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
399 Start error messages with a lower-case letter. Do not end error
400 messages with a period. Wrap long messages to 80 character-lines.
401 Use "cannot" instead of "can't" and "can not".
403 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
405 * config/tc-mips.c (imm_expr): Expand comment.
406 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
409 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
411 * config/tc-mips.c (imm2_expr): Delete.
412 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
414 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
416 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
417 (macro): Remove M_DEXT and M_DINS handling.
419 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
421 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
422 lax_max with lax_match.
423 (match_int_operand): Update accordingly. Don't report an error
424 for !lax_match-only cases.
425 (match_insn): Replace more_alts with lax_match and use it to
426 initialize the mips_arg_info field. Add a complete_p parameter.
427 Handle implicit VU0 suffixes here.
428 (match_invalid_for_isa, match_insns, match_mips16_insns): New
430 (mips_ip, mips16_ip): Use them.
432 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
434 * config/tc-mips.c (match_expression): Report uses of registers here.
435 Add a "must be an immediate expression" error. Handle elided offsets
437 (match_int_operand): ...here.
439 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
441 * config/tc-mips.c (mips_arg_info): Remove soft_match.
442 (match_out_of_range, match_not_constant): New functions.
443 (match_const_int): Remove fallback parameter and check for soft_match.
444 Use match_not_constant.
445 (match_mapped_int_operand, match_addiusp_operand)
446 (match_perf_reg_operand, match_save_restore_list_operand)
447 (match_mdmx_imm_reg_operand): Update accordingly. Use
448 match_out_of_range and set_insn_error* instead of as_bad.
449 (match_int_operand): Likewise. Use match_not_constant in the
450 !allows_nonconst case.
451 (match_float_constant): Report invalid float constants.
452 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
453 match_float_constant to check for invalid constants. Fail the
454 match if match_const_int or match_float_constant return false.
455 (mips_ip): Update accordingly.
456 (mips16_ip): Likewise. Undo null termination of instruction name
457 once lookup is complete.
459 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
461 * config/tc-mips.c (mips_insn_error_format): New enum.
462 (mips_insn_error): New struct.
463 (insn_error): Change to a mips_insn_error.
464 (clear_insn_error, set_insn_error_format, set_insn_error)
465 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
467 (mips_parse_argument_token, md_assemble, match_insn)
468 (match_mips16_insn): Use them instead of manipulating insn_error
470 (mips_ip, mips16_ip): Likewise. Simplify control flow.
472 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
474 * config/tc-mips.c (normalize_constant_expr): Move further up file.
475 (normalize_address_expr): Likewise.
476 (match_insn, match_mips16_insn): New functions, split out from...
477 (mips_ip, mips16_ip): ...here.
479 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
481 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
483 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
484 for optional operands.
486 2013-08-16 Alan Modra <amodra@gmail.com>
488 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
491 2013-08-16 Alan Modra <amodra@gmail.com>
493 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
495 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
497 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
498 argument as alignment.
500 2013-08-09 Nick Clifton <nickc@redhat.com>
502 * config/tc-rl78.c (elf_flags): New variable.
503 (enum options): Add OPTION_G10.
504 (md_longopts): Add mg10.
505 (md_parse_option): Parse -mg10.
506 (rl78_elf_final_processing): New function.
507 * config/tc-rl78.c (tc_final_processing): Define.
508 * doc/c-rl78.texi: Document -mg10 option.
510 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
512 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
513 suffixes to be elided too.
514 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
515 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
518 2013-08-05 John Tytgat <john@bass-software.com>
520 * po/POTFILES.in: Regenerate.
522 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
523 Konrad Eisele <konrad@gaisler.com>
525 * config/tc-sparc.c (sparc_arch_types): Add leon.
526 (sparc_arch): Move sparc4 around and add leon.
527 (sparc_target_format): Document -Aleon.
528 * doc/c-sparc.texi: Likewise.
530 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
532 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
534 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
535 Richard Sandiford <rdsandiford@googlemail.com>
537 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
538 (RWARN): Bump to 0x8000000.
539 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
540 (RTYPE_R5900_ACC): New register types.
541 (RTYPE_MASK): Include them.
542 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
544 (reg_names): Include them.
545 (mips_parse_register_1): New function, split out from...
546 (mips_parse_register): ...here. Add a channels_ptr parameter.
547 Look for VU0 channel suffixes when nonnull.
548 (reg_lookup): Update the call to mips_parse_register.
549 (mips_parse_vu0_channels): New function.
550 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
551 (mips_operand_token): Add a "channels" field to the union.
552 Extend the comment above "ch" to OT_DOUBLE_CHAR.
553 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
554 (mips_parse_argument_token): Handle channel suffixes here too.
555 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
556 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
558 (md_begin): Register $vfN and $vfI registers.
559 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
560 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
561 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
562 (match_vu0_suffix_operand): New function.
563 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
564 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
565 (mips_lookup_insn): New function.
566 (mips_ip): Use it. Allow "+K" operands to be elided at the end
567 of an instruction. Handle '#' sequences.
569 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
571 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
572 values and use it instead of sreg, treg, xreg, etc.
574 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
576 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
577 and mips_int_operand_max.
578 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
580 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
581 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
582 instead of mips16_immed_operand.
584 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
586 * config/tc-mips.c (mips16_macro): Don't use move_register.
587 (mips16_ip): Allow macros to use 'p'.
589 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
591 * config/tc-mips.c (MAX_OPERANDS): New macro.
592 (mips_operand_array): New structure.
593 (mips_operands, mips16_operands, micromips_operands): New arrays.
594 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
595 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
596 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
597 (micromips_to_32_reg_q_map): Delete.
598 (insn_operands, insn_opno, insn_extract_operand): New functions.
599 (validate_mips_insn): Take a mips_operand_array as argument and
600 use it to build up a list of operands. Extend to handle INSN_MACRO
602 (validate_mips16_insn): New function.
603 (validate_micromips_insn): Take a mips_operand_array as argument.
605 (md_begin): Initialize mips_operands, mips16_operands and
606 micromips_operands. Call validate_mips_insn and
607 validate_micromips_insn for macro instructions too.
608 Call validate_mips16_insn for MIPS16 instructions.
609 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
611 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
612 them. Handle INSN_UDI.
613 (get_append_method): Use gpr_read_mask.
615 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
617 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
618 flags for MIPS16 and non-MIPS16 instructions.
619 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
620 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
621 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
622 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
623 and non-MIPS16 instructions. Fix formatting.
625 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
627 * config/tc-mips.c (reg_needs_delay): Move later in file.
629 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
631 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
632 Alexander Ivchenko <alexander.ivchenko@intel.com>
633 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
634 Sergey Lega <sergey.s.lega@intel.com>
635 Anna Tikhonova <anna.tikhonova@intel.com>
636 Ilya Tocar <ilya.tocar@intel.com>
637 Andrey Turetskiy <andrey.turetskiy@intel.com>
638 Ilya Verbin <ilya.verbin@intel.com>
639 Kirill Yukhin <kirill.yukhin@intel.com>
640 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
642 * config/tc-i386-intel.c (O_zmmword_ptr): New.
643 (i386_types): Add zmmword.
644 (i386_intel_simplify_register): Allow regzmm.
645 (i386_intel_simplify): Handle zmmwords.
646 (i386_intel_operand): Handle RC/SAE, vector operations and
648 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
649 (struct RC_Operation): New.
650 (struct Mask_Operation): New.
651 (struct Broadcast_Operation): New.
652 (vex_prefix): Size of bytes increased to 4 to support EVEX
654 (enum i386_error): Add new error codes: unsupported_broadcast,
655 broadcast_not_on_src_operand, broadcast_needed,
656 unsupported_masking, mask_not_on_destination, no_default_mask,
657 unsupported_rc_sae, rc_sae_operand_not_last_imm,
658 invalid_register_operand, try_vector_disp8.
659 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
660 rounding, broadcast, memshift.
661 (struct RC_name): New.
662 (RC_NamesTable): New.
665 (extra_symbol_chars): Add '{'.
666 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
667 (i386_operand_type): Add regzmm, regmask and vec_disp8.
668 (match_mem_size): Handle zmmwords.
669 (operand_type_match): Handle zmm-registers.
670 (mode_from_disp_size): Handle vec_disp8.
671 (fits_in_vec_disp8): New.
672 (md_begin): Handle {} properly.
673 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
674 (build_vex_prefix): Handle vrex.
675 (build_evex_prefix): New.
676 (process_immext): Adjust to properly handle EVEX.
677 (md_assemble): Add EVEX encoding support.
678 (swap_2_operands): Correctly handle operands with masking,
679 broadcasting or RC/SAE.
680 (check_VecOperands): Support EVEX features.
681 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
682 (match_template): Support regzmm and handle new error codes.
683 (process_suffix): Handle zmmwords and zmm-registers.
684 (check_byte_reg): Extend to zmm-registers.
685 (process_operands): Extend to zmm-registers.
686 (build_modrm_byte): Handle EVEX.
687 (output_insn): Adjust to properly handle EVEX case.
688 (disp_size): Handle vec_disp8.
689 (output_disp): Support compressed disp8*N evex feature.
690 (output_imm): Handle RC/SAE immediates properly.
691 (check_VecOperations): New.
692 (i386_immediate): Handle EVEX features.
693 (i386_index_check): Handle zmmwords and zmm-registers.
694 (RC_SAE_immediate): New.
695 (i386_att_operand): Handle EVEX features.
696 (parse_real_register): Add a check for ZMM/Mask registers.
697 (OPTION_MEVEXLIG): New.
698 (OPTION_MEVEXWIG): New.
699 (md_longopts): Add mevexlig and mevexwig.
700 (md_parse_option): Handle mevexlig and mevexwig options.
701 (md_show_usage): Add description for mevexlig and mevexwig.
702 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
703 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
705 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
707 * config/tc-i386.c (cpu_arch): Add .sha.
708 * doc/c-i386.texi: Document sha/.sha.
710 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
711 Kirill Yukhin <kirill.yukhin@intel.com>
712 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
714 * config/tc-i386.c (BND_PREFIX): New.
715 (struct _i386_insn): Add new field bnd_prefix.
716 (add_bnd_prefix): New.
718 (i386_operand_type): Add regbnd.
719 (md_assemble): Handle BND prefixes.
720 (parse_insn): Likewise.
721 (output_branch): Likewise.
722 (output_jump): Likewise.
723 (build_modrm_byte): Handle regbnd.
724 (OPTION_MADD_BND_PREFIX): New.
725 (md_longopts): Add entry for 'madd-bnd-prefix'.
726 (md_parse_option): Handle madd-bnd-prefix option.
727 (md_show_usage): Add description for madd-bnd-prefix
729 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
731 2013-07-24 Tristan Gingold <gingold@adacore.com>
733 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
736 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
738 * config/tc-s390.c (s390_machine): Don't force the .machine
739 argument to lower case.
741 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
743 * config/tc-arm.c (s_arm_arch_extension): Improve error message
744 for invalid extension.
746 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
748 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
749 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
750 (aarch64_abi): New variable.
751 (ilp32_p): Change to be a macro.
752 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
753 (struct aarch64_option_abi_value_table): New struct.
754 (aarch64_abis): New table.
755 (aarch64_parse_abi): New function.
756 (aarch64_long_opts): Add entry for -mabi=.
757 * doc/as.texinfo (Target AArch64 options): Document -mabi.
758 * doc/c-aarch64.texi: Likewise.
760 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
762 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
765 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
767 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
769 * config/rx-parse.y: (rx_check_float_support): Add function to
770 check floating point operation support for target RX100 and
772 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
773 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
774 RX200, RX600, and RX610
776 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
778 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
780 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
782 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
783 * doc/c-avr.texi: Likewise.
785 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
787 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
788 error with older GCCs.
789 (mips16_macro_build): Dereference args.
791 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
793 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
794 New functions, split out from...
795 (reg_lookup): ...here. Remove itbl support.
796 (reglist_lookup): Delete.
797 (mips_operand_token_type): New enum.
798 (mips_operand_token): New structure.
799 (mips_operand_tokens): New variable.
800 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
801 (mips_parse_arguments): New functions.
802 (md_begin): Initialize mips_operand_tokens.
803 (mips_arg_info): Add a token field. Remove optional_reg field.
804 (match_char, match_expression): New functions.
805 (match_const_int): Use match_expression. Remove "s" argument
806 and return a boolean result. Remove O_register handling.
807 (match_regno, match_reg, match_reg_range): New functions.
808 (match_int_operand, match_mapped_int_operand, match_msb_operand)
809 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
810 (match_addiusp_operand, match_clo_clz_dest_operand)
811 (match_lwm_swm_list_operand, match_entry_exit_operand)
812 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
813 (match_tied_reg_operand): Remove "s" argument and return a boolean
814 result. Match tokens rather than text. Update calls to
815 match_const_int. Rely on match_regno to call check_regno.
816 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
817 "arg" argument. Return a boolean result.
818 (parse_float_constant): Replace with...
819 (match_float_constant): ...this new function.
820 (match_operand): Remove "s" argument and return a boolean result.
821 Update calls to subfunctions.
822 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
823 rather than string-parsing routines. Update handling of optional
824 registers for token scheme.
826 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
828 * config/tc-mips.c (parse_float_constant): Split out from...
831 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
833 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
836 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
838 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
839 (match_entry_exit_operand): New function.
840 (match_save_restore_list_operand): Likewise.
841 (match_operand): Use them.
842 (check_absolute_expr): Delete.
843 (mips16_ip): Rewrite main parsing loop to use mips_operands.
845 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
847 * config/tc-mips.c: Enable functions commented out in previous patch.
848 (SKIP_SPACE_TABS): Move further up file.
849 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
850 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
851 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
852 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
853 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
854 (micromips_imm_b_map, micromips_imm_c_map): Delete.
855 (mips_lookup_reg_pair): Delete.
856 (macro): Use report_bad_range and report_bad_field.
857 (mips_immed, expr_const_in_range): Delete.
858 (mips_ip): Rewrite main parsing loop to use new functions.
860 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
862 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
863 Change return type to bfd_boolean.
864 (report_bad_range, report_bad_field): New functions.
865 (mips_arg_info): New structure.
866 (match_const_int, convert_reg_type, check_regno, match_int_operand)
867 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
868 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
869 (match_addiusp_operand, match_clo_clz_dest_operand)
870 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
871 (match_pc_operand, match_tied_reg_operand, match_operand)
872 (check_completed_insn): New functions, commented out for now.
874 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
876 * config/tc-mips.c (insn_insert_operand): New function.
877 (macro_build, mips16_macro_build): Put null character check
878 in the for loop and convert continues to breaks. Use operand
879 structures to handle constant operands.
881 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
883 * config/tc-mips.c (validate_mips_insn): Move further up file.
884 Add insn_bits and decode_operand arguments. Use the mips_operand
885 fields to work out which bits an operand occupies. Detect double
887 (validate_micromips_insn): Move further up file. Call into
890 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
892 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
894 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
896 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
898 (macro): Update accordingly.
900 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
902 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
904 (md_assemble): Remove imm_reloc handling.
905 (mips_ip): Update commentary. Use offset_expr and offset_reloc
906 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
907 Use a temporary array rather than imm_reloc when parsing
908 constant expressions. Remove imm_reloc initialization.
909 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
910 for the relaxable field. Use a relax_char variable to track the
911 type of this field. Remove imm_reloc initialization.
913 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
915 * config/tc-mips.c (mips16_ip): Handle "I".
917 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
919 * config/tc-mips.c (mips_flag_nan2008): New variable.
920 (options): Add OPTION_NAN enum value.
921 (md_longopts): Handle it.
922 (md_parse_option): Likewise.
923 (s_nan): New function.
924 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
925 (md_show_usage): Add -mnan.
927 * doc/as.texinfo (Overview): Add -mnan.
928 * doc/c-mips.texi (MIPS Opts): Document -mnan.
929 (MIPS NaN Encodings): New node. Document .nan directive.
930 (MIPS-Dependent): List the new node.
932 2013-07-09 Tristan Gingold <gingold@adacore.com>
934 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
936 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
938 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
939 for 'A' and assume that the constant has been elided if the result
942 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
944 * config/tc-mips.c (gprel16_reloc_p): New function.
945 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
947 (offset_high_part, small_offset_p): New functions.
948 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
949 register load and store macros, handle the 16-bit offset case first.
950 If a 16-bit offset is not suitable for the instruction we're
951 generating, load it into the temporary register using
952 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
953 M_L_DAB code once the address has been constructed. For double load
954 and store macros, again handle the 16-bit offset case first.
955 If the second register cannot be accessed from the same high
956 part as the first, load it into AT using ADDRESS_ADDI_INSN.
957 Fix the handling of LD in cases where the first register is the
958 same as the base. Also handle the case where the offset is
959 not 16 bits and the second register cannot be accessed from the
960 same high part as the first. For unaligned loads and stores,
961 fuse the offbits == 12 and old "ab" handling. Apply this handling
962 whenever the second offset needs a different high part from the first.
963 Construct the offset using ADDRESS_ADDI_INSN where possible,
964 for offbits == 16 as well as offbits == 12. Use offset_reloc
965 when constructing the individual loads and stores.
966 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
967 and offset_reloc before matching against a particular opcode.
968 Handle elided 'A' constants. Allow 'A' constants to use
969 relocation operators.
971 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
973 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
974 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
975 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
977 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
979 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
980 Require the msb to be <= 31 for "+s". Check that the size is <= 31
981 for both "+s" and "+S".
983 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
985 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
986 (mips_ip, mips16_ip): Handle "+i".
988 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
990 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
991 (micromips_to_32_reg_h_map): Rename to...
992 (micromips_to_32_reg_h_map1): ...this.
993 (micromips_to_32_reg_i_map): Rename to...
994 (micromips_to_32_reg_h_map2): ...this.
995 (mips_lookup_reg_pair): New function.
996 (gpr_write_mask, macro): Adjust after above renaming.
997 (validate_micromips_insn): Remove "mi" handling.
998 (mips_ip): Likewise. Parse both registers in a pair for "mh".
1000 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
1002 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
1003 (mips_ip): Remove "+D" and "+T" handling.
1005 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
1007 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
1010 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
1012 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
1014 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
1016 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
1017 (aarch64_force_relocation): Likewise.
1019 2013-07-02 Alan Modra <amodra@gmail.com>
1021 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1023 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1025 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1026 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1027 Replace @sc{mips16} with literal `MIPS16'.
1028 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1030 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1032 * config/tc-aarch64.c (reloc_table): Replace
1033 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1034 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1035 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1036 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1037 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1038 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1039 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1040 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1041 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1042 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1043 (aarch64_force_relocation): Likewise.
1045 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1047 * config/tc-aarch64.c (ilp32_p): New static variable.
1048 (elf64_aarch64_target_format): Return the target according to the
1050 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1051 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1052 (aarch64_dwarf2_addr_size): New function.
1053 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1054 (DWARF2_ADDR_SIZE): New define.
1056 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1058 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1060 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1062 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1064 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1066 * config/tc-mips.c (mips_set_options): Add insn32 member.
1067 (mips_opts): Initialize it.
1068 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1069 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1070 (md_longopts): Add "minsn32" and "mno-insn32" options.
1071 (is_size_valid): Handle insn32 mode.
1072 (md_assemble): Pass instruction string down to macro.
1073 (brk_fmt): Add second dimension and insn32 mode initializers.
1074 (mfhl_fmt): Likewise.
1075 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1076 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1077 (macro_build_jalr, move_register): Handle insn32 mode.
1078 (macro_build_branch_rs): Likewise.
1079 (macro): Handle insn32 mode.
1080 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1081 (mips_ip): Handle insn32 mode.
1082 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1083 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1084 (mips_handle_align): Handle insn32 mode.
1085 (md_show_usage): Add -minsn32 and -mno-insn32.
1087 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1088 -mno-insn32 options.
1089 (-minsn32, -mno-insn32): New options.
1090 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1092 (MIPS assembly options): New node. Document .set insn32 and
1094 (MIPS-Dependent): List the new node.
1096 2013-06-25 Nick Clifton <nickc@redhat.com>
1098 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1099 the PC in indirect addressing on 430xv2 parts.
1100 (msp430_operands): Add version test to hardware bug encoding
1103 2013-06-24 Roland McGrath <mcgrathr@google.com>
1105 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1106 so it skips whitespace before it.
1107 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1109 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1110 (arm_reg_parse_multi): Skip whitespace first.
1111 (parse_reg_list): Likewise.
1112 (parse_vfp_reg_list): Likewise.
1113 (s_arm_unwind_save_mmxwcg): Likewise.
1115 2013-06-24 Nick Clifton <nickc@redhat.com>
1118 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1120 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1122 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1124 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1126 * config/tc-mips.c: Assert that offsetT and valueT are at least
1128 (GPR_SMIN, GPR_SMAX): New macros.
1129 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1131 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1133 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1134 conditions. Remove any code deselected by them.
1135 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1137 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1139 * NEWS: Note removal of ECOFF support.
1140 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1141 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1142 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1143 * Makefile.in: Regenerate.
1144 * configure.in: Remove MIPS ECOFF references.
1145 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1147 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1148 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1149 (mips-*-*): ...this single case.
1150 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1151 MIPS emulations to be e-mipself*.
1152 * configure: Regenerate.
1153 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1154 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1155 (mips-*-sysv*): Remove coff and ecoff cases.
1156 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1157 * ecoff.c: Remove reference to MIPS ECOFF.
1158 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1159 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1160 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1161 (mips_hi_fixup): Tweak comment.
1162 (append_insn): Require a howto.
1163 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1165 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1167 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1168 Use "CPU" instead of "cpu".
1169 * doc/c-mips.texi: Likewise.
1170 (MIPS Opts): Rename to MIPS Options.
1171 (MIPS option stack): Rename to MIPS Option Stack.
1172 (MIPS ASE instruction generation overrides): Rename to
1173 MIPS ASE Instruction Generation Overrides (for now).
1174 (MIPS floating-point): Rename to MIPS Floating-Point.
1176 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1178 * doc/c-mips.texi (MIPS Macros): New section.
1179 (MIPS Object): Replace with...
1180 (MIPS Small Data): ...this new section.
1182 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1184 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1185 Capitalize name. Use @kindex instead of @cindex for .set entries.
1187 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1189 * doc/c-mips.texi (MIPS Stabs): Remove section.
1191 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1193 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1194 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1195 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1196 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1197 (mips_ase): New structure.
1198 (mips_ases): New table.
1199 (FP64_ASES): New macro.
1200 (mips_ase_groups): New array.
1201 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1202 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1204 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1205 (md_parse_option): Use mips_ases and mips_set_ase instead of
1206 separate case statements for each ASE option.
1207 (mips_after_parse_args): Use FP64_ASES. Use
1208 mips_check_isa_supports_ases to check the ASEs against
1210 (s_mipsset): Use mips_ases and mips_set_ase instead of
1211 separate if statements for each ASE option. Use
1212 mips_check_isa_supports_ases, even when a non-ASE option
1215 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1217 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1219 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1221 * config/tc-mips.c (md_shortopts, options, md_longopts)
1222 (md_longopts_size): Move earlier in file.
1224 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1226 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1227 with a single "ase" bitmask.
1228 (mips_opts): Update accordingly.
1229 (file_ase, file_ase_explicit): New variables.
1230 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1231 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1232 (ISA_HAS_ROR): Adjust for mips_set_options change.
1233 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1234 (mips_ip): Adjust for mips_set_options change.
1235 (md_parse_option): Likewise. Update file_ase_explicit.
1236 (mips_after_parse_args): Adjust for mips_set_options change.
1237 Use bitmask operations to select the default ASEs. Set file_ase
1238 rather than individual per-ASE variables.
1239 (s_mipsset): Adjust for mips_set_options change.
1240 (mips_elf_final_processing): Test file_ase rather than
1241 file_ase_mdmx. Remove commented-out code.
1243 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1245 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1246 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1247 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1248 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1249 (mips_after_parse_args): Use the new "ase" field to choose
1251 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1254 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1256 * config/tc-arm.c (symbol_preemptible): New function.
1257 (relax_branch): Use it.
1259 2013-06-17 Catherine Moore <clm@codesourcery.com>
1260 Maciej W. Rozycki <macro@codesourcery.com>
1261 Chao-Ying Fu <fu@mips.com>
1263 * config/tc-mips.c (mips_set_options): Add ase_eva.
1264 (mips_set_options mips_opts): Add ase_eva.
1265 (file_ase_eva): Declare.
1266 (ISA_SUPPORTS_EVA_ASE): Define.
1267 (IS_SEXT_9BIT_NUM): Define.
1268 (MIPS_CPU_ASE_EVA): Define.
1269 (is_opcode_valid): Add support for ase_eva.
1270 (macro_build): Likewise.
1272 (validate_mips_insn): Likewise.
1273 (validate_micromips_insn): Likewise.
1274 (mips_ip): Likewise.
1275 (options): Add OPTION_EVA and OPTION_NO_EVA.
1276 (md_longopts): Add -meva and -mno-eva.
1277 (md_parse_option): Process new options.
1278 (mips_after_parse_args): Check for valid EVA combinations.
1279 (s_mipsset): Likewise.
1281 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1283 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1284 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1285 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1286 (dwarf2_gen_line_info_1): Update call accordingly.
1287 (dwarf2_move_insn): New function.
1288 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1290 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1294 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1297 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1298 (dwarf2_gen_line_info_1): Delete.
1299 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1300 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1301 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1302 (dwarf2_directive_loc): Push previous .locs instead of generating
1305 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1307 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1308 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1310 2013-06-13 Nick Clifton <nickc@redhat.com>
1313 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1314 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1315 function. Generates an error if the adjusted offset is out of a
1318 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1320 * config/tc-nios2.c (md_apply_fix): Mask constant
1321 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1323 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1325 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1326 MIPS-3D instructions either.
1327 (md_convert_frag): Update the COPx branch mask accordingly.
1329 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1331 * doc/as.texinfo (Overview): Add --relax-branch and
1333 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1336 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1338 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1341 2013-06-08 Catherine Moore <clm@codesourcery.com>
1343 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1344 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1345 (append_insn): Change INSN_xxxx to ASE_xxxx.
1347 2013-06-01 George Thomas <george.thomas@atmel.com>
1349 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1352 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1354 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1357 2013-05-31 Paul Brook <paul@codesourcery.com>
1359 * config/tc-mips.c (s_ehword): New.
1361 2013-05-30 Paul Brook <paul@codesourcery.com>
1363 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1365 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1367 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1368 convert relocs who have no relocatable field either. Rephrase
1369 the conditional so that the PC-relative check is only applied
1372 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1374 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1377 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1379 * config/tc-aarch64.c (reloc_table): Update to use
1380 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1381 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1382 (md_apply_fix): Likewise.
1383 (aarch64_force_relocation): Likewise.
1385 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1387 * config/tc-arm.c (it_fsm_post_encode): Improve
1388 warning messages about deprecated IT block formats.
1390 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1392 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1393 inside fx_done condition.
1395 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1397 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1399 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1401 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1402 and clean up warning when using PRINT_OPCODE_TABLE.
1404 2013-05-20 Alan Modra <amodra@gmail.com>
1406 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1407 and data fixups performing shift/high adjust/sign extension on
1408 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1409 when writing data fixups rather than recalculating size.
1411 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1413 * doc/c-msp430.texi: Fix typo.
1415 2013-05-16 Tristan Gingold <gingold@adacore.com>
1417 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1418 are also TOC symbols.
1420 2013-05-16 Nick Clifton <nickc@redhat.com>
1422 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1423 Add -mcpu command to specify core type.
1424 * doc/c-msp430.texi: Update documentation.
1426 2013-05-09 Andrew Pinski <apinski@cavium.com>
1428 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1429 (mips_opts): Update for the new field.
1430 (file_ase_virt): New variable.
1431 (ISA_SUPPORTS_VIRT_ASE): New macro.
1432 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1433 (MIPS_CPU_ASE_VIRT): New define.
1434 (is_opcode_valid): Handle ase_virt.
1435 (macro_build): Handle "+J".
1436 (validate_mips_insn): Likewise.
1437 (mips_ip): Likewise.
1438 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1439 (md_longopts): Add mvirt and mnovirt
1440 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1441 (mips_after_parse_args): Handle ase_virt field.
1442 (s_mipsset): Handle "virt" and "novirt".
1443 (mips_elf_final_processing): Add a comment about virt ASE might need
1445 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1446 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1447 Document ".set virt" and ".set novirt".
1449 2013-05-09 Alan Modra <amodra@gmail.com>
1451 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1452 control of operand flag bits.
1454 2013-05-07 Alan Modra <amodra@gmail.com>
1456 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1457 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1458 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1459 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1460 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1461 Shift and sign-extend fieldval for use by some VLE reloc
1462 operand->insert functions.
1464 2013-05-06 Paul Brook <paul@codesourcery.com>
1465 Catherine Moore <clm@codesourcery.com>
1467 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1468 (limited_pcrel_reloc_p): Likewise.
1469 (md_apply_fix): Likewise.
1470 (tc_gen_reloc): Likewise.
1472 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1474 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1475 (mips_fix_adjustable): Adjust pc-relative check to use
1478 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1480 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1481 (s_mips_stab): Do not restrict to stabn only.
1483 2013-05-02 Nick Clifton <nickc@redhat.com>
1485 * config/tc-msp430.c: Add support for the MSP430X architecture.
1486 Add code to insert a NOP instruction after any instruction that
1487 might change the interrupt state.
1488 Add support for the LARGE memory model.
1489 Add code to initialise the .MSP430.attributes section.
1490 * config/tc-msp430.h: Add support for the MSP430X architecture.
1491 * doc/c-msp430.texi: Document the new -mL and -mN command line
1493 * NEWS: Mention support for the MSP430X architecture.
1495 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1497 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1498 alpha*-*-linux*ecoff*.
1500 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1502 * config/tc-mips.c (mips_ip): Add sizelo.
1503 For "+C", "+G", and "+H", set sizelo and compare against it.
1505 2013-04-29 Nick Clifton <nickc@redhat.com>
1507 * as.c (Options): Add -gdwarf-sections.
1508 (parse_args): Likewise.
1509 * as.h (flag_dwarf_sections): Declare.
1510 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1511 (process_entries): When -gdwarf-sections is enabled generate
1512 fragmentary .debug_line sections.
1513 (out_debug_line): Set the section for the .debug_line section end
1515 * doc/as.texinfo: Document -gdwarf-sections.
1516 * NEWS: Mention -gdwarf-sections.
1518 2013-04-26 Christian Groessler <chris@groessler.org>
1520 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1521 according to the target parameter. Don't call s_segm since s_segm
1522 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1524 (md_begin): Call s_segm according to target parameter from command
1527 2013-04-25 Alan Modra <amodra@gmail.com>
1529 * configure.in: Allow little-endian linux.
1530 * configure: Regenerate.
1532 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1534 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1535 "fstatus" control register to "eccinj".
1537 2013-04-19 Kai Tietz <ktietz@redhat.com>
1539 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1541 2013-04-15 Julian Brown <julian@codesourcery.com>
1543 * expr.c (add_to_result, subtract_from_result): Make global.
1544 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1545 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1546 subtract_from_result to handle extra bit of precision for .sleb128
1549 2013-04-10 Julian Brown <julian@codesourcery.com>
1551 * read.c (convert_to_bignum): Add sign parameter. Use it
1552 instead of X_unsigned to determine sign of resulting bignum.
1553 (emit_expr): Pass extra argument to convert_to_bignum.
1554 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1555 X_extrabit to convert_to_bignum.
1556 (parse_bitfield_cons): Set X_extrabit.
1557 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1558 Initialise X_extrabit field as appropriate.
1559 (add_to_result): New.
1560 (subtract_from_result): New.
1562 * expr.h (expressionS): Add X_extrabit field.
1564 2013-04-10 Jan Beulich <jbeulich@suse.com>
1566 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1567 register being PC when is_t or writeback, and use distinct
1568 diagnostic for the latter case.
1570 2013-04-10 Jan Beulich <jbeulich@suse.com>
1572 * gas/config/tc-arm.c (parse_operands): Re-write
1573 po_barrier_or_imm().
1574 (do_barrier): Remove bogus constraint().
1575 (do_t_barrier): Remove.
1577 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1579 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1580 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1582 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1584 2013-04-09 Jan Beulich <jbeulich@suse.com>
1586 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1587 Use local variable Rt in more places.
1588 (do_vmsr): Accept all control registers.
1590 2013-04-09 Jan Beulich <jbeulich@suse.com>
1592 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1593 if there was none specified for moves between scalar and core
1596 2013-04-09 Jan Beulich <jbeulich@suse.com>
1598 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1599 NEON_ALL_LANES case.
1601 2013-04-08 Jan Beulich <jbeulich@suse.com>
1603 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1606 2013-04-08 Jan Beulich <jbeulich@suse.com>
1608 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1611 2013-04-03 Alan Modra <amodra@gmail.com>
1613 * doc/as.texinfo: Add support to generate man options for h8300.
1614 * doc/c-h8300.texi: Likewise.
1616 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1618 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1621 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1624 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1626 2013-03-26 Nick Clifton <nickc@redhat.com>
1629 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1630 start of the file each time.
1633 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1636 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1638 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1641 2013-03-21 Will Newton <will.newton@linaro.org>
1643 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1644 pc-relative str instructions in Thumb mode.
1646 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1648 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1649 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1651 * config/tc-h8300.h: Remove duplicated defines.
1653 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1656 * tc-avr.c (mcu_has_3_byte_pc): New function.
1657 (tc_cfi_frame_initial_instructions): Call it to find return
1660 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1663 * config/tc-tic6x.c (tic6x_try_encode): Handle
1664 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1665 encode register pair numbers when required.
1667 2013-03-15 Will Newton <will.newton@linaro.org>
1669 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1670 in vstr in Thumb mode for pre-ARMv7 cores.
1672 2013-03-14 Andreas Schwab <schwab@suse.de>
1674 * doc/c-arc.texi (ARC Directives): Revert last change and use
1675 @itemize instead of @table.
1676 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1678 2013-03-14 Nick Clifton <nickc@redhat.com>
1681 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1682 NULL message, instead just check ARM_CPU_IS_ANY directly.
1684 2013-03-14 Nick Clifton <nickc@redhat.com>
1687 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1689 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1690 to the @item directives.
1691 (ARM-Neon-Alignment): Move to correct place in the document.
1692 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1694 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1697 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1699 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1700 case. Add default BAD_CASE to switch.
1702 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1704 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1705 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1707 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1709 * config/tc-arm.c (crc_ext_armv8): New feature set.
1710 (UNPRED_REG): New macro.
1711 (do_crc32_1): New function.
1712 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1713 do_crc32ch, do_crc32cw): Likewise.
1715 (insns): Add entries for crc32 mnemonics.
1716 (arm_extensions): Add entry for crc.
1718 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1720 * write.h (struct fix): Add fx_dot_frag field.
1721 (dot_frag): Declare.
1722 * write.c (dot_frag): New variable.
1723 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1724 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1725 * expr.c (expr): Save value of frag_now in dot_frag when setting
1727 * read.c (emit_expr): Likewise. Delete comments.
1729 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1731 * config/tc-i386.c (flag_code_names): Removed.
1732 (i386_index_check): Rewrote.
1734 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1736 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1738 (aarch64_double_precision_fmovable): New function.
1739 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1740 function; handle hexadecimal representation of IEEE754 encoding.
1741 (parse_operands): Update the call to parse_aarch64_imm_float.
1743 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1745 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1746 (check_hle): Updated.
1747 (md_assemble): Likewise.
1748 (parse_insn): Likewise.
1750 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1752 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1753 (md_assemble): Check if REP prefix is OK.
1754 (parse_insn): Remove expecting_string_instruction. Set
1757 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1759 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1761 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1763 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1764 for system registers.
1766 2013-02-27 DJ Delorie <dj@redhat.com>
1768 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1769 (rl78_op): Handle %code().
1770 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1771 (tc_gen_reloc): Likwise; convert to a computed reloc.
1772 (md_apply_fix): Likewise.
1774 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1776 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1778 2013-02-25 Terry Guo <terry.guo@arm.com>
1780 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1781 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1782 list of accepted CPUs.
1784 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1787 * config/tc-i386.c (cpu_arch): Add ".smap".
1789 * doc/c-i386.texi: Document smap.
1791 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1793 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1794 mips_assembling_insn appropriately.
1795 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1797 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1799 * config/tc-mips.c (append_insn): Correct indentation, remove
1802 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1804 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1806 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1808 * configure.tgt: Add nios2-*-rtems*.
1810 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1812 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1815 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1817 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1818 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1820 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1822 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1825 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1826 Andrew Jenner <andrew@codesourcery.com>
1828 Based on patches from Altera Corporation.
1830 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1831 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1832 * Makefile.in: Regenerated.
1833 * configure.tgt: Add case for nios2*-linux*.
1834 * config/obj-elf.c: Conditionally include elf/nios2.h.
1835 * config/tc-nios2.c: New file.
1836 * config/tc-nios2.h: New file.
1837 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1838 * doc/Makefile.in: Regenerated.
1839 * doc/all.texi: Set NIOSII.
1840 * doc/as.texinfo (Overview): Add Nios II options.
1841 (Machine Dependencies): Include c-nios2.texi.
1842 * doc/c-nios2.texi: New file.
1843 * NEWS: Note Altera Nios II support.
1845 2013-02-06 Alan Modra <amodra@gmail.com>
1848 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1849 Don't skip fixups with fx_subsy non-NULL.
1850 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1851 with fx_subsy non-NULL.
1853 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1855 * doc/c-metag.texi: Add "@c man" markers.
1857 2013-02-04 Alan Modra <amodra@gmail.com>
1859 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1861 (TC_ADJUST_RELOC_COUNT): Delete.
1862 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1864 2013-02-04 Alan Modra <amodra@gmail.com>
1866 * po/POTFILES.in: Regenerate.
1868 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1870 * config/tc-metag.c: Make SWAP instruction less permissive with
1873 2013-01-29 DJ Delorie <dj@redhat.com>
1875 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1876 relocs in .word/.etc statements.
1878 2013-01-29 Roland McGrath <mcgrathr@google.com>
1880 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1881 immediate value for 8-bit offset" error so it shows line info.
1883 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1885 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1888 2013-01-24 Nick Clifton <nickc@redhat.com>
1890 * config/tc-v850.c: Add support for e3v5 architecture.
1891 * doc/c-v850.texi: Mention new support.
1893 2013-01-23 Nick Clifton <nickc@redhat.com>
1896 * config/tc-avr.c: Include dwarf2dbg.h.
1898 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1900 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1901 (tc_i386_fix_adjustable): Likewise.
1902 (lex_got): Likewise.
1903 (tc_gen_reloc): Likewise.
1905 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1907 * config/tc-aarch64.c (output_operand_error_record): Change to output
1908 the out-of-range error message as value-expected message if there is
1909 only one single value in the expected range.
1910 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1911 LSL #0 as a programmer-friendly feature.
1913 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1915 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1916 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1917 BFD_RELOC_64_SIZE relocations.
1918 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1920 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1921 relocations against local symbols.
1923 2013-01-16 Alan Modra <amodra@gmail.com>
1925 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1926 finding some sort of toc syntax error, and break to avoid
1927 compiler uninit warning.
1929 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1932 * config/tc-i386.c (lex_got): Increment length by 1 if the
1933 relocation token is removed.
1935 2013-01-15 Nick Clifton <nickc@redhat.com>
1937 * config/tc-v850.c (md_assemble): Allow signed values for
1940 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1942 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1945 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1947 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1948 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1949 * config/tc-ppc.c (md_show_usage): Likewise.
1950 (ppc_handle_align): Handle power8's group ending nop.
1952 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1954 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1955 that the assember exits after the opcodes have been printed.
1957 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1959 * app.c: Remove trailing white spaces.
1963 * dw2gencfi.c: Likewise.
1964 * dwarf2dbg.h: Likewise.
1965 * ecoff.c: Likewise.
1966 * input-file.c: Likewise.
1967 * itbl-lex.h: Likewise.
1968 * output-file.c: Likewise.
1971 * subsegs.c: Likewise.
1972 * symbols.c: Likewise.
1973 * write.c: Likewise.
1974 * config/tc-i386.c: Likewise.
1975 * doc/Makefile.am: Likewise.
1976 * doc/Makefile.in: Likewise.
1977 * doc/c-aarch64.texi: Likewise.
1978 * doc/c-alpha.texi: Likewise.
1979 * doc/c-arc.texi: Likewise.
1980 * doc/c-arm.texi: Likewise.
1981 * doc/c-avr.texi: Likewise.
1982 * doc/c-bfin.texi: Likewise.
1983 * doc/c-cr16.texi: Likewise.
1984 * doc/c-d10v.texi: Likewise.
1985 * doc/c-d30v.texi: Likewise.
1986 * doc/c-h8300.texi: Likewise.
1987 * doc/c-hppa.texi: Likewise.
1988 * doc/c-i370.texi: Likewise.
1989 * doc/c-i386.texi: Likewise.
1990 * doc/c-i860.texi: Likewise.
1991 * doc/c-m32c.texi: Likewise.
1992 * doc/c-m32r.texi: Likewise.
1993 * doc/c-m68hc11.texi: Likewise.
1994 * doc/c-m68k.texi: Likewise.
1995 * doc/c-microblaze.texi: Likewise.
1996 * doc/c-mips.texi: Likewise.
1997 * doc/c-msp430.texi: Likewise.
1998 * doc/c-mt.texi: Likewise.
1999 * doc/c-s390.texi: Likewise.
2000 * doc/c-score.texi: Likewise.
2001 * doc/c-sh.texi: Likewise.
2002 * doc/c-sh64.texi: Likewise.
2003 * doc/c-tic54x.texi: Likewise.
2004 * doc/c-tic6x.texi: Likewise.
2005 * doc/c-v850.texi: Likewise.
2006 * doc/c-xc16x.texi: Likewise.
2007 * doc/c-xgate.texi: Likewise.
2008 * doc/c-xtensa.texi: Likewise.
2009 * doc/c-z80.texi: Likewise.
2010 * doc/internals.texi: Likewise.
2012 2013-01-10 Roland McGrath <mcgrathr@google.com>
2014 * hash.c (hash_new_sized): Make it global.
2015 * hash.h: Declare it.
2016 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
2019 2013-01-10 Will Newton <will.newton@imgtec.com>
2021 * Makefile.am: Add Meta.
2022 * Makefile.in: Regenerate.
2023 * config/tc-metag.c: New file.
2024 * config/tc-metag.h: New file.
2025 * configure.tgt: Add Meta.
2026 * doc/Makefile.am: Add Meta.
2027 * doc/Makefile.in: Regenerate.
2028 * doc/all.texi: Add Meta.
2029 * doc/as.texiinfo: Document Meta options.
2030 * doc/c-metag.texi: New file.
2032 2013-01-09 Steve Ellcey <sellcey@mips.com>
2034 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2036 * config/tc-mips.c (internalError): Remove, replace with abort.
2038 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2040 * config/tc-aarch64.c (parse_operands): Change to compare the result
2041 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2043 2013-01-07 Nick Clifton <nickc@redhat.com>
2046 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2047 anticipated character.
2048 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2049 here as it is no longer needed.
2051 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2053 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2054 * doc/c-score.texi (SCORE-Opts): Likewise.
2055 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2057 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2059 * config/tc-mips.c: Add support for MIPS r5900.
2060 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2062 (can_swap_branch_p, get_append_method): Detect some conditional
2063 short loops to fix a bug on the r5900 by NOP in the branch delay
2065 (M_MUL): Support 3 operands in multu on r5900.
2066 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2067 (s_mipsset): Force 32 bit floating point on r5900.
2068 (mips_ip): Check parameter range of instructions mfps and mtps on
2070 * configure.in: Detect CPU type when target string contains r5900
2071 (e.g. mips64r5900el-linux-gnu).
2073 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2075 * as.c (parse_args): Update copyright year to 2013.
2077 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2079 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2082 2013-01-02 Nick Clifton <nickc@redhat.com>
2085 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2088 For older changes see ChangeLog-2012
2090 Copyright (C) 2013 Free Software Foundation, Inc.
2092 Copying and distribution of this file, with or without modification,
2093 are permitted in any medium without royalty provided the copyright
2094 notice and this notice are preserved.
2100 version-control: never