1 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
5 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
7 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
9 (macro): Update accordingly.
11 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
13 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
15 (md_assemble): Remove imm_reloc handling.
16 (mips_ip): Update commentary. Use offset_expr and offset_reloc
17 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
18 Use a temporary array rather than imm_reloc when parsing
19 constant expressions. Remove imm_reloc initialization.
20 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
21 for the relaxable field. Use a relax_char variable to track the
22 type of this field. Remove imm_reloc initialization.
24 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
26 * config/tc-mips.c (mips16_ip): Handle "I".
28 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
30 * config/tc-mips.c (mips_flag_nan2008): New variable.
31 (options): Add OPTION_NAN enum value.
32 (md_longopts): Handle it.
33 (md_parse_option): Likewise.
34 (s_nan): New function.
35 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
36 (md_show_usage): Add -mnan.
38 * doc/as.texinfo (Overview): Add -mnan.
39 * doc/c-mips.texi (MIPS Opts): Document -mnan.
40 (MIPS NaN Encodings): New node. Document .nan directive.
41 (MIPS-Dependent): List the new node.
43 2013-07-09 Tristan Gingold <gingold@adacore.com>
45 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
47 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
49 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
50 for 'A' and assume that the constant has been elided if the result
53 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
55 * config/tc-mips.c (gprel16_reloc_p): New function.
56 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
58 (offset_high_part, small_offset_p): New functions.
59 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
60 register load and store macros, handle the 16-bit offset case first.
61 If a 16-bit offset is not suitable for the instruction we're
62 generating, load it into the temporary register using
63 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
64 M_L_DAB code once the address has been constructed. For double load
65 and store macros, again handle the 16-bit offset case first.
66 If the second register cannot be accessed from the same high
67 part as the first, load it into AT using ADDRESS_ADDI_INSN.
68 Fix the handling of LD in cases where the first register is the
69 same as the base. Also handle the case where the offset is
70 not 16 bits and the second register cannot be accessed from the
71 same high part as the first. For unaligned loads and stores,
72 fuse the offbits == 12 and old "ab" handling. Apply this handling
73 whenever the second offset needs a different high part from the first.
74 Construct the offset using ADDRESS_ADDI_INSN where possible,
75 for offbits == 16 as well as offbits == 12. Use offset_reloc
76 when constructing the individual loads and stores.
77 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
78 and offset_reloc before matching against a particular opcode.
79 Handle elided 'A' constants. Allow 'A' constants to use
82 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
84 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
85 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
86 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
88 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
90 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
91 Require the msb to be <= 31 for "+s". Check that the size is <= 31
92 for both "+s" and "+S".
94 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
96 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
97 (mips_ip, mips16_ip): Handle "+i".
99 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
101 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
102 (micromips_to_32_reg_h_map): Rename to...
103 (micromips_to_32_reg_h_map1): ...this.
104 (micromips_to_32_reg_i_map): Rename to...
105 (micromips_to_32_reg_h_map2): ...this.
106 (mips_lookup_reg_pair): New function.
107 (gpr_write_mask, macro): Adjust after above renaming.
108 (validate_micromips_insn): Remove "mi" handling.
109 (mips_ip): Likewise. Parse both registers in a pair for "mh".
111 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
113 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
114 (mips_ip): Remove "+D" and "+T" handling.
116 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
118 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
121 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
123 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
125 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
127 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
128 (aarch64_force_relocation): Likewise.
130 2013-07-02 Alan Modra <amodra@gmail.com>
132 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
134 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
136 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
137 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
138 Replace @sc{mips16} with literal `MIPS16'.
139 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
141 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
143 * config/tc-aarch64.c (reloc_table): Replace
144 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
145 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
146 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
147 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
148 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
149 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
150 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
151 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
152 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
153 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
154 (aarch64_force_relocation): Likewise.
156 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
158 * config/tc-aarch64.c (ilp32_p): New static variable.
159 (elf64_aarch64_target_format): Return the target according to the
161 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
162 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
163 (aarch64_dwarf2_addr_size): New function.
164 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
165 (DWARF2_ADDR_SIZE): New define.
167 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
169 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
171 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
173 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
175 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
177 * config/tc-mips.c (mips_set_options): Add insn32 member.
178 (mips_opts): Initialize it.
179 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
180 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
181 (md_longopts): Add "minsn32" and "mno-insn32" options.
182 (is_size_valid): Handle insn32 mode.
183 (md_assemble): Pass instruction string down to macro.
184 (brk_fmt): Add second dimension and insn32 mode initializers.
185 (mfhl_fmt): Likewise.
186 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
187 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
188 (macro_build_jalr, move_register): Handle insn32 mode.
189 (macro_build_branch_rs): Likewise.
190 (macro): Handle insn32 mode.
191 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
192 (mips_ip): Handle insn32 mode.
193 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
194 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
195 (mips_handle_align): Handle insn32 mode.
196 (md_show_usage): Add -minsn32 and -mno-insn32.
198 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
200 (-minsn32, -mno-insn32): New options.
201 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
203 (MIPS assembly options): New node. Document .set insn32 and
205 (MIPS-Dependent): List the new node.
207 2013-06-25 Nick Clifton <nickc@redhat.com>
209 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
210 the PC in indirect addressing on 430xv2 parts.
211 (msp430_operands): Add version test to hardware bug encoding
214 2013-06-24 Roland McGrath <mcgrathr@google.com>
216 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
217 so it skips whitespace before it.
218 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
220 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
221 (arm_reg_parse_multi): Skip whitespace first.
222 (parse_reg_list): Likewise.
223 (parse_vfp_reg_list): Likewise.
224 (s_arm_unwind_save_mmxwcg): Likewise.
226 2013-06-24 Nick Clifton <nickc@redhat.com>
229 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
231 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
233 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
235 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
237 * config/tc-mips.c: Assert that offsetT and valueT are at least
239 (GPR_SMIN, GPR_SMAX): New macros.
240 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
242 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
244 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
245 conditions. Remove any code deselected by them.
246 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
248 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
250 * NEWS: Note removal of ECOFF support.
251 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
252 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
253 (MULTI_CFILES): Remove config/e-mipsecoff.c.
254 * Makefile.in: Regenerate.
255 * configure.in: Remove MIPS ECOFF references.
256 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
258 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
259 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
260 (mips-*-*): ...this single case.
261 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
262 MIPS emulations to be e-mipself*.
263 * configure: Regenerate.
264 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
265 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
266 (mips-*-sysv*): Remove coff and ecoff cases.
267 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
268 * ecoff.c: Remove reference to MIPS ECOFF.
269 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
270 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
271 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
272 (mips_hi_fixup): Tweak comment.
273 (append_insn): Require a howto.
274 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
276 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
278 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
279 Use "CPU" instead of "cpu".
280 * doc/c-mips.texi: Likewise.
281 (MIPS Opts): Rename to MIPS Options.
282 (MIPS option stack): Rename to MIPS Option Stack.
283 (MIPS ASE instruction generation overrides): Rename to
284 MIPS ASE Instruction Generation Overrides (for now).
285 (MIPS floating-point): Rename to MIPS Floating-Point.
287 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
289 * doc/c-mips.texi (MIPS Macros): New section.
290 (MIPS Object): Replace with...
291 (MIPS Small Data): ...this new section.
293 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
295 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
296 Capitalize name. Use @kindex instead of @cindex for .set entries.
298 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
300 * doc/c-mips.texi (MIPS Stabs): Remove section.
302 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
304 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
305 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
306 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
307 (ISA_SUPPORTS_VIRT64_ASE): Delete.
308 (mips_ase): New structure.
309 (mips_ases): New table.
310 (FP64_ASES): New macro.
311 (mips_ase_groups): New array.
312 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
313 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
315 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
316 (md_parse_option): Use mips_ases and mips_set_ase instead of
317 separate case statements for each ASE option.
318 (mips_after_parse_args): Use FP64_ASES. Use
319 mips_check_isa_supports_ases to check the ASEs against
321 (s_mipsset): Use mips_ases and mips_set_ase instead of
322 separate if statements for each ASE option. Use
323 mips_check_isa_supports_ases, even when a non-ASE option
326 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
328 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
330 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
332 * config/tc-mips.c (md_shortopts, options, md_longopts)
333 (md_longopts_size): Move earlier in file.
335 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
337 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
338 with a single "ase" bitmask.
339 (mips_opts): Update accordingly.
340 (file_ase, file_ase_explicit): New variables.
341 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
342 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
343 (ISA_HAS_ROR): Adjust for mips_set_options change.
344 (is_opcode_valid): Take the base ase mask directly from mips_opts.
345 (mips_ip): Adjust for mips_set_options change.
346 (md_parse_option): Likewise. Update file_ase_explicit.
347 (mips_after_parse_args): Adjust for mips_set_options change.
348 Use bitmask operations to select the default ASEs. Set file_ase
349 rather than individual per-ASE variables.
350 (s_mipsset): Adjust for mips_set_options change.
351 (mips_elf_final_processing): Test file_ase rather than
352 file_ase_mdmx. Remove commented-out code.
354 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
356 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
357 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
358 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
359 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
360 (mips_after_parse_args): Use the new "ase" field to choose
362 (mips_cpu_info_table): Move ASEs from the "flags" field to the
365 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
367 * config/tc-arm.c (symbol_preemptible): New function.
368 (relax_branch): Use it.
370 2013-06-17 Catherine Moore <clm@codesourcery.com>
371 Maciej W. Rozycki <macro@codesourcery.com>
372 Chao-Ying Fu <fu@mips.com>
374 * config/tc-mips.c (mips_set_options): Add ase_eva.
375 (mips_set_options mips_opts): Add ase_eva.
376 (file_ase_eva): Declare.
377 (ISA_SUPPORTS_EVA_ASE): Define.
378 (IS_SEXT_9BIT_NUM): Define.
379 (MIPS_CPU_ASE_EVA): Define.
380 (is_opcode_valid): Add support for ase_eva.
381 (macro_build): Likewise.
383 (validate_mips_insn): Likewise.
384 (validate_micromips_insn): Likewise.
386 (options): Add OPTION_EVA and OPTION_NO_EVA.
387 (md_longopts): Add -meva and -mno-eva.
388 (md_parse_option): Process new options.
389 (mips_after_parse_args): Check for valid EVA combinations.
390 (s_mipsset): Likewise.
392 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
394 * dwarf2dbg.h (dwarf2_move_insn): Declare.
395 * dwarf2dbg.c (line_subseg): Add pmove_tail.
396 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
397 (dwarf2_gen_line_info_1): Update call accordingly.
398 (dwarf2_move_insn): New function.
399 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
401 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
405 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
408 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
409 (dwarf2_gen_line_info_1): Delete.
410 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
411 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
412 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
413 (dwarf2_directive_loc): Push previous .locs instead of generating
416 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
418 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
419 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
421 2013-06-13 Nick Clifton <nickc@redhat.com>
424 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
425 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
426 function. Generates an error if the adjusted offset is out of a
429 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
431 * config/tc-nios2.c (md_apply_fix): Mask constant
432 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
434 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
436 * config/tc-mips.c (append_insn): Don't do branch relaxation for
437 MIPS-3D instructions either.
438 (md_convert_frag): Update the COPx branch mask accordingly.
440 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
442 * doc/as.texinfo (Overview): Add --relax-branch and
444 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
447 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
449 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
452 2013-06-08 Catherine Moore <clm@codesourcery.com>
454 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
455 (is_opcode_valid_16): Pass ase value to opcode_is_member.
456 (append_insn): Change INSN_xxxx to ASE_xxxx.
458 2013-06-01 George Thomas <george.thomas@atmel.com>
460 * gas/config/tc-avr.c: Change ISA for devices with USB support to
463 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
465 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
468 2013-05-31 Paul Brook <paul@codesourcery.com>
471 * config/tc-mips.c (s_ehword): New.
473 2013-05-30 Paul Brook <paul@codesourcery.com>
475 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
477 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
479 * write.c (resolve_reloc_expr_symbols): On REL targets don't
480 convert relocs who have no relocatable field either. Rephrase
481 the conditional so that the PC-relative check is only applied
484 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
486 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
489 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
491 * config/tc-aarch64.c (reloc_table): Update to use
492 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
493 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
494 (md_apply_fix): Likewise.
495 (aarch64_force_relocation): Likewise.
497 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
499 * config/tc-arm.c (it_fsm_post_encode): Improve
500 warning messages about deprecated IT block formats.
502 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
504 * config/tc-aarch64.c (md_apply_fix): Move value range checking
505 inside fx_done condition.
507 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
509 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
511 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
513 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
514 and clean up warning when using PRINT_OPCODE_TABLE.
516 2013-05-20 Alan Modra <amodra@gmail.com>
518 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
519 and data fixups performing shift/high adjust/sign extension on
520 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
521 when writing data fixups rather than recalculating size.
523 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
525 * doc/c-msp430.texi: Fix typo.
527 2013-05-16 Tristan Gingold <gingold@adacore.com>
529 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
530 are also TOC symbols.
532 2013-05-16 Nick Clifton <nickc@redhat.com>
534 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
535 Add -mcpu command to specify core type.
536 * doc/c-msp430.texi: Update documentation.
538 2013-05-09 Andrew Pinski <apinski@cavium.com>
540 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
541 (mips_opts): Update for the new field.
542 (file_ase_virt): New variable.
543 (ISA_SUPPORTS_VIRT_ASE): New macro.
544 (ISA_SUPPORTS_VIRT64_ASE): New macro.
545 (MIPS_CPU_ASE_VIRT): New define.
546 (is_opcode_valid): Handle ase_virt.
547 (macro_build): Handle "+J".
548 (validate_mips_insn): Likewise.
550 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
551 (md_longopts): Add mvirt and mnovirt
552 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
553 (mips_after_parse_args): Handle ase_virt field.
554 (s_mipsset): Handle "virt" and "novirt".
555 (mips_elf_final_processing): Add a comment about virt ASE might need
557 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
558 * doc/c-mips.texi: Document -mvirt and -mno-virt.
559 Document ".set virt" and ".set novirt".
561 2013-05-09 Alan Modra <amodra@gmail.com>
563 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
564 control of operand flag bits.
566 2013-05-07 Alan Modra <amodra@gmail.com>
568 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
569 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
570 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
571 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
572 (md_apply_fix): Set fx_no_overflow for assorted relocations.
573 Shift and sign-extend fieldval for use by some VLE reloc
574 operand->insert functions.
576 2013-05-06 Paul Brook <paul@codesourcery.com>
577 Catherine Moore <clm@codesourcery.com>
579 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
580 (limited_pcrel_reloc_p): Likewise.
581 (md_apply_fix): Likewise.
582 (tc_gen_reloc): Likewise.
584 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
586 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
587 (mips_fix_adjustable): Adjust pc-relative check to use
590 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
592 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
593 (s_mips_stab): Do not restrict to stabn only.
595 2013-05-02 Nick Clifton <nickc@redhat.com>
597 * config/tc-msp430.c: Add support for the MSP430X architecture.
598 Add code to insert a NOP instruction after any instruction that
599 might change the interrupt state.
600 Add support for the LARGE memory model.
601 Add code to initialise the .MSP430.attributes section.
602 * config/tc-msp430.h: Add support for the MSP430X architecture.
603 * doc/c-msp430.texi: Document the new -mL and -mN command line
605 * NEWS: Mention support for the MSP430X architecture.
607 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
609 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
610 alpha*-*-linux*ecoff*.
612 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
614 * config/tc-mips.c (mips_ip): Add sizelo.
615 For "+C", "+G", and "+H", set sizelo and compare against it.
617 2013-04-29 Nick Clifton <nickc@redhat.com>
619 * as.c (Options): Add -gdwarf-sections.
620 (parse_args): Likewise.
621 * as.h (flag_dwarf_sections): Declare.
622 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
623 (process_entries): When -gdwarf-sections is enabled generate
624 fragmentary .debug_line sections.
625 (out_debug_line): Set the section for the .debug_line section end
627 * doc/as.texinfo: Document -gdwarf-sections.
628 * NEWS: Mention -gdwarf-sections.
630 2013-04-26 Christian Groessler <chris@groessler.org>
632 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
633 according to the target parameter. Don't call s_segm since s_segm
634 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
636 (md_begin): Call s_segm according to target parameter from command
639 2013-04-25 Alan Modra <amodra@gmail.com>
641 * configure.in: Allow little-endian linux.
642 * configure: Regenerate.
644 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
646 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
647 "fstatus" control register to "eccinj".
649 2013-04-19 Kai Tietz <ktietz@redhat.com>
651 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
653 2013-04-15 Julian Brown <julian@codesourcery.com>
655 * expr.c (add_to_result, subtract_from_result): Make global.
656 * expr.h (add_to_result, subtract_from_result): Add prototypes.
657 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
658 subtract_from_result to handle extra bit of precision for .sleb128
661 2013-04-10 Julian Brown <julian@codesourcery.com>
663 * read.c (convert_to_bignum): Add sign parameter. Use it
664 instead of X_unsigned to determine sign of resulting bignum.
665 (emit_expr): Pass extra argument to convert_to_bignum.
666 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
667 X_extrabit to convert_to_bignum.
668 (parse_bitfield_cons): Set X_extrabit.
669 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
670 Initialise X_extrabit field as appropriate.
671 (add_to_result): New.
672 (subtract_from_result): New.
674 * expr.h (expressionS): Add X_extrabit field.
676 2013-04-10 Jan Beulich <jbeulich@suse.com>
678 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
679 register being PC when is_t or writeback, and use distinct
680 diagnostic for the latter case.
682 2013-04-10 Jan Beulich <jbeulich@suse.com>
684 * gas/config/tc-arm.c (parse_operands): Re-write
686 (do_barrier): Remove bogus constraint().
687 (do_t_barrier): Remove.
689 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
691 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
692 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
694 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
696 2013-04-09 Jan Beulich <jbeulich@suse.com>
698 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
699 Use local variable Rt in more places.
700 (do_vmsr): Accept all control registers.
702 2013-04-09 Jan Beulich <jbeulich@suse.com>
704 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
705 if there was none specified for moves between scalar and core
708 2013-04-09 Jan Beulich <jbeulich@suse.com>
710 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
713 2013-04-08 Jan Beulich <jbeulich@suse.com>
715 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
718 2013-04-08 Jan Beulich <jbeulich@suse.com>
720 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
723 2013-04-03 Alan Modra <amodra@gmail.com>
725 * doc/as.texinfo: Add support to generate man options for h8300.
726 * doc/c-h8300.texi: Likewise.
728 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
730 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
733 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
736 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
738 2013-03-26 Nick Clifton <nickc@redhat.com>
741 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
742 start of the file each time.
745 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
748 2013-03-26 Douglas B Rupp <rupp@gnat.com>
750 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
753 2013-03-21 Will Newton <will.newton@linaro.org>
755 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
756 pc-relative str instructions in Thumb mode.
758 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
760 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
761 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
763 * config/tc-h8300.h: Remove duplicated defines.
765 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
768 * tc-avr.c (mcu_has_3_byte_pc): New function.
769 (tc_cfi_frame_initial_instructions): Call it to find return
772 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
775 * config/tc-tic6x.c (tic6x_try_encode): Handle
776 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
777 encode register pair numbers when required.
779 2013-03-15 Will Newton <will.newton@linaro.org>
781 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
782 in vstr in Thumb mode for pre-ARMv7 cores.
784 2013-03-14 Andreas Schwab <schwab@suse.de>
786 * doc/c-arc.texi (ARC Directives): Revert last change and use
787 @itemize instead of @table.
788 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
790 2013-03-14 Nick Clifton <nickc@redhat.com>
793 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
794 NULL message, instead just check ARM_CPU_IS_ANY directly.
796 2013-03-14 Nick Clifton <nickc@redhat.com>
799 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
801 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
802 to the @item directives.
803 (ARM-Neon-Alignment): Move to correct place in the document.
804 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
806 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
809 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
811 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
812 case. Add default BAD_CASE to switch.
814 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
816 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
817 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
819 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
821 * config/tc-arm.c (crc_ext_armv8): New feature set.
822 (UNPRED_REG): New macro.
823 (do_crc32_1): New function.
824 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
825 do_crc32ch, do_crc32cw): Likewise.
827 (insns): Add entries for crc32 mnemonics.
828 (arm_extensions): Add entry for crc.
830 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
832 * write.h (struct fix): Add fx_dot_frag field.
834 * write.c (dot_frag): New variable.
835 (fix_new_internal): Set fx_dot_frag field with dot_frag.
836 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
837 * expr.c (expr): Save value of frag_now in dot_frag when setting
839 * read.c (emit_expr): Likewise. Delete comments.
841 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
843 * config/tc-i386.c (flag_code_names): Removed.
844 (i386_index_check): Rewrote.
846 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
848 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
850 (aarch64_double_precision_fmovable): New function.
851 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
852 function; handle hexadecimal representation of IEEE754 encoding.
853 (parse_operands): Update the call to parse_aarch64_imm_float.
855 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
857 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
858 (check_hle): Updated.
859 (md_assemble): Likewise.
860 (parse_insn): Likewise.
862 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
864 * config/tc-i386.c (_i386_insn): Add rep_prefix.
865 (md_assemble): Check if REP prefix is OK.
866 (parse_insn): Remove expecting_string_instruction. Set
869 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
871 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
873 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
875 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
876 for system registers.
878 2013-02-27 DJ Delorie <dj@redhat.com>
880 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
881 (rl78_op): Handle %code().
882 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
883 (tc_gen_reloc): Likwise; convert to a computed reloc.
884 (md_apply_fix): Likewise.
886 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
888 * config/rl78-parse.y: Fix encoding of DIVWU insn.
890 2013-02-25 Terry Guo <terry.guo@arm.com>
892 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
893 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
894 list of accepted CPUs.
896 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
899 * config/tc-i386.c (cpu_arch): Add ".smap".
901 * doc/c-i386.texi: Document smap.
903 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
905 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
906 mips_assembling_insn appropriately.
907 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
909 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
911 * config/tc-mips.c (append_insn): Correct indentation, remove
914 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
916 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
918 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
920 * configure.tgt: Add nios2-*-rtems*.
922 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
924 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
927 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
929 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
930 (macro): Use it. Assert that trunc.w.s is not used for r5900.
932 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
934 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
937 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
938 Andrew Jenner <andrew@codesourcery.com>
940 Based on patches from Altera Corporation.
942 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
943 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
944 * Makefile.in: Regenerated.
945 * configure.tgt: Add case for nios2*-linux*.
946 * config/obj-elf.c: Conditionally include elf/nios2.h.
947 * config/tc-nios2.c: New file.
948 * config/tc-nios2.h: New file.
949 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
950 * doc/Makefile.in: Regenerated.
951 * doc/all.texi: Set NIOSII.
952 * doc/as.texinfo (Overview): Add Nios II options.
953 (Machine Dependencies): Include c-nios2.texi.
954 * doc/c-nios2.texi: New file.
955 * NEWS: Note Altera Nios II support.
957 2013-02-06 Alan Modra <amodra@gmail.com>
960 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
961 Don't skip fixups with fx_subsy non-NULL.
962 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
963 with fx_subsy non-NULL.
965 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
967 * doc/c-metag.texi: Add "@c man" markers.
969 2013-02-04 Alan Modra <amodra@gmail.com>
971 * write.c (fixup_segment): Return void. Delete seg_reloc_count
973 (TC_ADJUST_RELOC_COUNT): Delete.
974 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
976 2013-02-04 Alan Modra <amodra@gmail.com>
978 * po/POTFILES.in: Regenerate.
980 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
982 * config/tc-metag.c: Make SWAP instruction less permissive with
985 2013-01-29 DJ Delorie <dj@redhat.com>
987 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
988 relocs in .word/.etc statements.
990 2013-01-29 Roland McGrath <mcgrathr@google.com>
992 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
993 immediate value for 8-bit offset" error so it shows line info.
995 2013-01-24 Joseph Myers <joseph@codesourcery.com>
997 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1000 2013-01-24 Nick Clifton <nickc@redhat.com>
1002 * config/tc-v850.c: Add support for e3v5 architecture.
1003 * doc/c-v850.texi: Mention new support.
1005 2013-01-23 Nick Clifton <nickc@redhat.com>
1008 * config/tc-avr.c: Include dwarf2dbg.h.
1010 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1012 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1013 (tc_i386_fix_adjustable): Likewise.
1014 (lex_got): Likewise.
1015 (tc_gen_reloc): Likewise.
1017 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1019 * config/tc-aarch64.c (output_operand_error_record): Change to output
1020 the out-of-range error message as value-expected message if there is
1021 only one single value in the expected range.
1022 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1023 LSL #0 as a programmer-friendly feature.
1025 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1027 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1028 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1029 BFD_RELOC_64_SIZE relocations.
1030 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1032 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1033 relocations against local symbols.
1035 2013-01-16 Alan Modra <amodra@gmail.com>
1037 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1038 finding some sort of toc syntax error, and break to avoid
1039 compiler uninit warning.
1041 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1044 * config/tc-i386.c (lex_got): Increment length by 1 if the
1045 relocation token is removed.
1047 2013-01-15 Nick Clifton <nickc@redhat.com>
1049 * config/tc-v850.c (md_assemble): Allow signed values for
1052 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1054 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1057 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1059 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1060 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1061 * config/tc-ppc.c (md_show_usage): Likewise.
1062 (ppc_handle_align): Handle power8's group ending nop.
1064 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1066 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1067 that the assember exits after the opcodes have been printed.
1069 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1071 * app.c: Remove trailing white spaces.
1075 * dw2gencfi.c: Likewise.
1076 * dwarf2dbg.h: Likewise.
1077 * ecoff.c: Likewise.
1078 * input-file.c: Likewise.
1079 * itbl-lex.h: Likewise.
1080 * output-file.c: Likewise.
1083 * subsegs.c: Likewise.
1084 * symbols.c: Likewise.
1085 * write.c: Likewise.
1086 * config/tc-i386.c: Likewise.
1087 * doc/Makefile.am: Likewise.
1088 * doc/Makefile.in: Likewise.
1089 * doc/c-aarch64.texi: Likewise.
1090 * doc/c-alpha.texi: Likewise.
1091 * doc/c-arc.texi: Likewise.
1092 * doc/c-arm.texi: Likewise.
1093 * doc/c-avr.texi: Likewise.
1094 * doc/c-bfin.texi: Likewise.
1095 * doc/c-cr16.texi: Likewise.
1096 * doc/c-d10v.texi: Likewise.
1097 * doc/c-d30v.texi: Likewise.
1098 * doc/c-h8300.texi: Likewise.
1099 * doc/c-hppa.texi: Likewise.
1100 * doc/c-i370.texi: Likewise.
1101 * doc/c-i386.texi: Likewise.
1102 * doc/c-i860.texi: Likewise.
1103 * doc/c-m32c.texi: Likewise.
1104 * doc/c-m32r.texi: Likewise.
1105 * doc/c-m68hc11.texi: Likewise.
1106 * doc/c-m68k.texi: Likewise.
1107 * doc/c-microblaze.texi: Likewise.
1108 * doc/c-mips.texi: Likewise.
1109 * doc/c-msp430.texi: Likewise.
1110 * doc/c-mt.texi: Likewise.
1111 * doc/c-s390.texi: Likewise.
1112 * doc/c-score.texi: Likewise.
1113 * doc/c-sh.texi: Likewise.
1114 * doc/c-sh64.texi: Likewise.
1115 * doc/c-tic54x.texi: Likewise.
1116 * doc/c-tic6x.texi: Likewise.
1117 * doc/c-v850.texi: Likewise.
1118 * doc/c-xc16x.texi: Likewise.
1119 * doc/c-xgate.texi: Likewise.
1120 * doc/c-xtensa.texi: Likewise.
1121 * doc/c-z80.texi: Likewise.
1122 * doc/internals.texi: Likewise.
1124 2013-01-10 Roland McGrath <mcgrathr@google.com>
1126 * hash.c (hash_new_sized): Make it global.
1127 * hash.h: Declare it.
1128 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1131 2013-01-10 Will Newton <will.newton@imgtec.com>
1133 * Makefile.am: Add Meta.
1134 * Makefile.in: Regenerate.
1135 * config/tc-metag.c: New file.
1136 * config/tc-metag.h: New file.
1137 * configure.tgt: Add Meta.
1138 * doc/Makefile.am: Add Meta.
1139 * doc/Makefile.in: Regenerate.
1140 * doc/all.texi: Add Meta.
1141 * doc/as.texiinfo: Document Meta options.
1142 * doc/c-metag.texi: New file.
1144 2013-01-09 Steve Ellcey <sellcey@mips.com>
1146 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1148 * config/tc-mips.c (internalError): Remove, replace with abort.
1150 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1152 * config/tc-aarch64.c (parse_operands): Change to compare the result
1153 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1155 2013-01-07 Nick Clifton <nickc@redhat.com>
1158 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1159 anticipated character.
1160 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1161 here as it is no longer needed.
1163 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1165 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1166 * doc/c-score.texi (SCORE-Opts): Likewise.
1167 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1169 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1171 * config/tc-mips.c: Add support for MIPS r5900.
1172 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1174 (can_swap_branch_p, get_append_method): Detect some conditional
1175 short loops to fix a bug on the r5900 by NOP in the branch delay
1177 (M_MUL): Support 3 operands in multu on r5900.
1178 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1179 (s_mipsset): Force 32 bit floating point on r5900.
1180 (mips_ip): Check parameter range of instructions mfps and mtps on
1182 * configure.in: Detect CPU type when target string contains r5900
1183 (e.g. mips64r5900el-linux-gnu).
1185 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1187 * as.c (parse_args): Update copyright year to 2013.
1189 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1191 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1194 2013-01-02 Nick Clifton <nickc@redhat.com>
1197 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1200 For older changes see ChangeLog-2012
1202 Copyright (C) 2013 Free Software Foundation, Inc.
1204 Copying and distribution of this file, with or without modification,
1205 are permitted in any medium without royalty provided the copyright
1206 notice and this notice are preserved.
1212 version-control: never