1 2006-07-07 James E Wilson <wilson@specifix.com>
3 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
5 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
6 Nick Clifton <nickc@redhat.com>
9 * doc/as.texi: Fix spelling typo: branchs => branches.
10 * doc/c-m68hc11.texi: Likewise.
11 * config/tc-m68hc11.c: Likewise.
12 Support old spelling of command line switch for backwards
15 2006-07-04 Thiemo Seufer <ths@mips.com>
16 David Ung <davidu@mips.com>
18 * config/tc-mips.c (s_is_linkonce): New function.
19 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
20 weak, external, and linkonce symbols.
21 (pic_need_relax): Use s_is_linkonce.
23 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
25 * doc/as.texinfo (Org): Remove space.
26 (P2align): Add "@var{abs-expr},".
28 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
30 * config/tc-i386.c (cpu_arch_tune_set): New.
31 (cpu_arch_isa): Likewise.
32 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
33 nops with short or long nop sequences based on -march=/.arch
35 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
36 set cpu_arch_tune and cpu_arch_tune_flags.
37 (md_parse_option): For -march=, set cpu_arch_isa and set
38 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
39 0. Set cpu_arch_tune_set to 1 for -mtune=.
40 (i386_target_format): Don't set cpu_arch_tune.
42 2006-06-23 Nigel Stephens <nigel@mips.com>
44 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
45 generated .sbss.* and .gnu.linkonce.sb.*.
47 2006-06-23 Thiemo Seufer <ths@mips.com>
48 David Ung <davidu@mips.com>
50 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
52 * config/tc-mips.c (label_list): Define per-segment label_list.
53 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
54 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
55 mips_from_file_after_relocs, mips_define_label): Use per-segment
58 2006-06-22 Thiemo Seufer <ths@mips.com>
60 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
61 (append_insn): Use it.
62 (md_apply_fix): Whitespace formatting.
63 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
64 mips16_extended_frag): Remove register specifier.
65 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
68 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
70 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
71 a directive saving VFP registers for ARMv6 or later.
72 (s_arm_unwind_save): Add parameter arch_v6 and call
73 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
75 (md_pseudo_table): Add entry for new "vsave" directive.
76 * doc/c-arm.texi: Correct error in example for "save"
77 directive (fstmdf -> fstmdx). Also document "vsave" directive.
79 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
80 Anatoly Sokolov <aesok@post.ru>
82 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
83 and atmega644p devices. Rename atmega164/atmega324 devices to
84 atmega164p/atmega324p.
85 * doc/c-avr.texi: Document new mcu and arch options.
87 2006-06-17 Nick Clifton <nickc@redhat.com>
89 * config/tc-arm.c (enum parse_operand_result): Move outside of
90 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
92 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
94 * config/tc-i386.h (processor_type): New.
95 (arch_entry): Add type.
97 * config/tc-i386.c (cpu_arch_tune): New.
98 (cpu_arch_tune_flags): Likewise.
99 (cpu_arch_isa_flags): Likewise.
101 (set_cpu_arch): Also update cpu_arch_isa_flags.
102 (md_assemble): Update cpu_arch_isa_flags.
104 (OPTION_MTUNE): Likewise.
105 (md_longopts): Add -march= and -mtune=.
106 (md_parse_option): Support -march= and -mtune=.
107 (md_show_usage): Add -march=CPU/-mtune=CPU.
108 (i386_target_format): Also update cpu_arch_isa_flags,
109 cpu_arch_tune and cpu_arch_tune_flags.
111 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
113 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
115 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
117 * config/tc-arm.c (enum parse_operand_result): New.
118 (struct group_reloc_table_entry): New.
119 (enum group_reloc_type): New.
120 (group_reloc_table): New array.
121 (find_group_reloc_table_entry): New function.
122 (parse_shifter_operand_group_reloc): New function.
123 (parse_address_main): New function, incorporating code
124 from the old parse_address function. To be used via...
125 (parse_address): wrapper for parse_address_main; and
126 (parse_address_group_reloc): new function, likewise.
127 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
128 OP_ADDRGLDRS, OP_ADDRGLDC.
129 (parse_operands): Support for these new operand codes.
130 New macro po_misc_or_fail_no_backtrack.
131 (encode_arm_cp_address): Preserve group relocations.
132 (insns): Modify to use the above operand codes where group
133 relocations are permitted.
134 (md_apply_fix): Handle the group relocations
135 ALU_PC_G0_NC through LDC_SB_G2.
136 (tc_gen_reloc): Likewise.
137 (arm_force_relocation): Leave group relocations for the linker.
138 (arm_fix_adjustable): Likewise.
140 2006-06-15 Julian Brown <julian@codesourcery.com>
142 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
143 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
146 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
148 * config/tc-i386.c (process_suffix): Don't add rex64 for
151 2006-06-09 Thiemo Seufer <ths@mips.com>
153 * config/tc-mips.c (mips_ip): Maintain argument count.
155 2006-06-09 Alan Modra <amodra@bigpond.net.au>
157 * config/tc-iq2000.c: Include sb.h.
159 2006-06-08 Nigel Stephens <nigel@mips.com>
161 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
162 aliases for better compatibility with SGI tools.
164 2006-06-08 Alan Modra <amodra@bigpond.net.au>
166 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
167 * Makefile.am (GASLIBS): Expand @BFDLIB@.
169 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
170 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
171 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
173 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
174 * Makefile.in: Regenerate.
175 * doc/Makefile.in: Regenerate.
176 * configure: Regenerate.
178 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
180 * po/Make-in (pdf, ps): New dummy targets.
182 2006-06-07 Julian Brown <julian@codesourcery.com>
184 * config/tc-arm.c (stdarg.h): include.
185 (arm_it): Add uncond_value field. Add isvec and issingle to operand
187 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
188 REG_TYPE_NSDQ (single, double or quad vector reg).
189 (reg_expected_msgs): Update.
190 (BAD_FPU): Add macro for unsupported FPU instruction error.
191 (parse_neon_type): Support 'd' as an alias for .f64.
192 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
194 (parse_vfp_reg_list): Don't update first arg on error.
195 (parse_neon_mov): Support extra syntax for VFP moves.
196 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
197 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
198 (parse_operands): Support isvec, issingle operands fields, new parse
200 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
202 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
203 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
204 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
205 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
207 (neon_shape): Redefine in terms of above.
208 (neon_shape_class): New enumeration, table of shape classes.
209 (neon_shape_el): New enumeration. One element of a shape.
210 (neon_shape_el_size): Register widths of above, where appropriate.
211 (neon_shape_info): New struct. Info for shape table.
212 (neon_shape_tab): New array.
213 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
214 (neon_check_shape): Rewrite as...
215 (neon_select_shape): New function to classify instruction shapes,
216 driven by new table neon_shape_tab array.
217 (neon_quad): New function. Return 1 if shape should set Q flag in
218 instructions (or equivalent), 0 otherwise.
219 (type_chk_of_el_type): Support F64.
220 (el_type_of_type_chk): Likewise.
221 (neon_check_type): Add support for VFP type checking (VFP data
222 elements fill their containing registers).
223 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
224 in thumb mode for VFP instructions.
225 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
226 and encode the current instruction as if it were that opcode.
227 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
228 arguments, call function in PFN.
229 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
230 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
231 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
232 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
233 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
234 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
235 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
236 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
237 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
238 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
239 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
240 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
241 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
242 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
243 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
245 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
246 between VFP and Neon turns out to belong to Neon. Perform
247 architecture check and fill in condition field if appropriate.
248 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
249 (do_neon_cvt): Add support for VFP variants of instructions.
250 (neon_cvt_flavour): Extend to cover VFP conversions.
251 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
253 (do_neon_ldr_str): Handle single-precision VFP load/store.
254 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
255 NS_NULL not NS_IGNORE.
256 (opcode_tag): Add OT_csuffixF for operands which either take a
257 conditional suffix, or have 0xF in the condition field.
258 (md_assemble): Add support for OT_csuffixF.
259 (NCE): Replace macro with...
260 (NCE_tag, NCE, NCEF): New macros.
261 (nCE): Replace macro with...
262 (nCE_tag, nCE, nCEF): New macros.
263 (insns): Add support for VFP insns or VFP versions of insns msr,
264 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
265 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
266 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
267 VFP/Neon insns together.
269 2006-06-07 Alan Modra <amodra@bigpond.net.au>
270 Ladislav Michl <ladis@linux-mips.org>
272 * app.c: Don't include headers already included by as.h.
274 * atof-generic.c: Likewise.
276 * dwarf2dbg.c: Likewise.
278 * input-file.c: Likewise.
279 * input-scrub.c: Likewise.
281 * output-file.c: Likewise.
284 * config/bfin-lex.l: Likewise.
285 * config/obj-coff.h: Likewise.
286 * config/obj-elf.h: Likewise.
287 * config/obj-som.h: Likewise.
288 * config/tc-arc.c: Likewise.
289 * config/tc-arm.c: Likewise.
290 * config/tc-avr.c: Likewise.
291 * config/tc-bfin.c: Likewise.
292 * config/tc-cris.c: Likewise.
293 * config/tc-d10v.c: Likewise.
294 * config/tc-d30v.c: Likewise.
295 * config/tc-dlx.h: Likewise.
296 * config/tc-fr30.c: Likewise.
297 * config/tc-frv.c: Likewise.
298 * config/tc-h8300.c: Likewise.
299 * config/tc-hppa.c: Likewise.
300 * config/tc-i370.c: Likewise.
301 * config/tc-i860.c: Likewise.
302 * config/tc-i960.c: Likewise.
303 * config/tc-ip2k.c: Likewise.
304 * config/tc-iq2000.c: Likewise.
305 * config/tc-m32c.c: Likewise.
306 * config/tc-m32r.c: Likewise.
307 * config/tc-maxq.c: Likewise.
308 * config/tc-mcore.c: Likewise.
309 * config/tc-mips.c: Likewise.
310 * config/tc-mmix.c: Likewise.
311 * config/tc-mn10200.c: Likewise.
312 * config/tc-mn10300.c: Likewise.
313 * config/tc-msp430.c: Likewise.
314 * config/tc-mt.c: Likewise.
315 * config/tc-ns32k.c: Likewise.
316 * config/tc-openrisc.c: Likewise.
317 * config/tc-ppc.c: Likewise.
318 * config/tc-s390.c: Likewise.
319 * config/tc-sh.c: Likewise.
320 * config/tc-sh64.c: Likewise.
321 * config/tc-sparc.c: Likewise.
322 * config/tc-tic30.c: Likewise.
323 * config/tc-tic4x.c: Likewise.
324 * config/tc-tic54x.c: Likewise.
325 * config/tc-v850.c: Likewise.
326 * config/tc-vax.c: Likewise.
327 * config/tc-xc16x.c: Likewise.
328 * config/tc-xstormy16.c: Likewise.
329 * config/tc-xtensa.c: Likewise.
330 * config/tc-z80.c: Likewise.
331 * config/tc-z8k.c: Likewise.
332 * macro.h: Don't include sb.h or ansidecl.h.
333 * sb.h: Don't include stdio.h or ansidecl.h.
334 * cond.c: Include sb.h.
335 * itbl-lex.l: Include as.h instead of other system headers.
336 * itbl-parse.y: Likewise.
337 * itbl-ops.c: Similarly.
338 * itbl-ops.h: Don't include as.h or ansidecl.h.
339 * config/bfin-defs.h: Don't include bfd.h or as.h.
340 * config/bfin-parse.y: Include as.h instead of other system headers.
342 2006-06-06 Ben Elliston <bje@au.ibm.com>
343 Anton Blanchard <anton@samba.org>
345 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
346 (md_show_usage): Document it.
347 (ppc_setup_opcodes): Test power6 opcode flag bits.
348 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
350 2006-06-06 Thiemo Seufer <ths@mips.com>
351 Chao-ying Fu <fu@mips.com>
353 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
354 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
355 (macro_build): Update comment.
356 (mips_ip): Allow DSP64 instructions for MIPS64R2.
357 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
359 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
360 MIPS_CPU_ASE_MDMX flags for sb1.
362 2006-06-05 Thiemo Seufer <ths@mips.com>
364 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
366 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
367 (mips_ip): Make overflowed/underflowed constant arguments in DSP
368 and MT instructions a fatal error. Use INSERT_OPERAND where
369 appropriate. Improve warnings for break and wait code overflows.
370 Use symbolic constant of OP_MASK_COPZ.
371 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
373 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
375 * po/Make-in (top_builddir): Define.
377 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
379 * doc/Makefile.am (TEXI2DVI): Define.
380 * doc/Makefile.in: Regenerate.
381 * doc/c-arc.texi: Fix typo.
383 2006-06-01 Alan Modra <amodra@bigpond.net.au>
385 * config/obj-ieee.c: Delete.
386 * config/obj-ieee.h: Delete.
387 * Makefile.am (OBJ_FORMATS): Remove ieee.
388 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
389 (obj-ieee.o): Remove rule.
390 * Makefile.in: Regenerate.
391 * configure.in (atof): Remove tahoe.
392 (OBJ_MAYBE_IEEE): Don't define.
393 * configure: Regenerate.
394 * config.in: Regenerate.
395 * doc/Makefile.in: Regenerate.
396 * po/POTFILES.in: Regenerate.
398 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
400 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
401 and LIBINTL_DEP everywhere.
403 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
404 * acinclude.m4: Include new gettext macros.
405 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
406 Remove local code for po/Makefile.
407 * Makefile.in, configure, doc/Makefile.in: Regenerated.
409 2006-05-30 Nick Clifton <nickc@redhat.com>
411 * po/es.po: Updated Spanish translation.
413 2006-05-06 Denis Chertykov <denisc@overta.ru>
415 * doc/c-avr.texi: New file.
416 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
417 * doc/all.texi: Set AVR
418 * doc/as.texinfo: Include c-avr.texi
420 2006-05-28 Jie Zhang <jie.zhang@analog.com>
422 * config/bfin-parse.y (check_macfunc): Loose the condition of
423 calling check_multiply_halfregs ().
425 2006-05-25 Jie Zhang <jie.zhang@analog.com>
427 * config/bfin-parse.y (asm_1): Better check and deal with
428 vector and scalar Multiply 16-Bit Operands instructions.
430 2006-05-24 Nick Clifton <nickc@redhat.com>
432 * config/tc-hppa.c: Convert to ISO C90 format.
433 * config/tc-hppa.h: Likewise.
435 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
436 Randolph Chung <randolph@tausq.org>
438 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
439 is_tls_ieoff, is_tls_leoff): Define.
440 (fix_new_hppa): Handle TLS.
441 (cons_fix_new_hppa): Likewise.
443 (md_apply_fix): Handle TLS relocs.
444 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
446 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
448 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
450 2006-05-23 Thiemo Seufer <ths@mips.com>
451 David Ung <davidu@mips.com>
452 Nigel Stephens <nigel@mips.com>
455 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
456 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
457 ISA_HAS_MXHC1): New macros.
458 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
459 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
460 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
461 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
462 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
463 (mips_after_parse_args): Change default handling of float register
464 size to account for 32bit code with 64bit FP. Better sanity checking
465 of ISA/ASE/ABI option combinations.
466 (s_mipsset): Support switching of GPR and FPR sizes via
467 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
469 (mips_elf_final_processing): We should record the use of 64bit FP
470 registers in 32bit code but we don't, because ELF header flags are
472 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
473 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
474 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
475 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
476 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
477 missing -march options. Document .set arch=CPU. Move .set smartmips
478 to ASE page. Use @code for .set FOO examples.
480 2006-05-23 Jie Zhang <jie.zhang@analog.com>
482 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
485 2006-05-23 Jie Zhang <jie.zhang@analog.com>
487 * config/bfin-defs.h (bfin_equals): Remove declaration.
488 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
489 * config/tc-bfin.c (bfin_name_is_register): Remove.
490 (bfin_equals): Remove.
491 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
492 (bfin_name_is_register): Remove declaration.
494 2006-05-19 Thiemo Seufer <ths@mips.com>
495 Nigel Stephens <nigel@mips.com>
497 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
498 (mips_oddfpreg_ok): New function.
501 2006-05-19 Thiemo Seufer <ths@mips.com>
502 David Ung <davidu@mips.com>
504 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
505 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
506 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
507 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
508 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
509 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
510 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
511 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
512 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
513 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
514 reg_names_o32, reg_names_n32n64): Define register classes.
515 (reg_lookup): New function, use register classes.
516 (md_begin): Reserve register names in the symbol table. Simplify
518 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
520 (mips16_ip): Use reg_lookup.
521 (tc_get_register): Likewise.
522 (tc_mips_regname_to_dw2regnum): New function.
524 2006-05-19 Thiemo Seufer <ths@mips.com>
526 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
527 Un-constify string argument.
528 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
530 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
532 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
534 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
536 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
538 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
541 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
543 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
544 cfloat/m68881 to correct architecture before using it.
546 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
548 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
551 2006-05-15 Paul Brook <paul@codesourcery.com>
553 * config/tc-arm.c (arm_adjust_symtab): Use
554 bfd_is_arm_special_symbol_name.
556 2006-05-15 Bob Wilson <bob.wilson@acm.org>
558 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
559 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
560 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
561 Handle errors from calls to xtensa_opcode_is_* functions.
563 2006-05-14 Thiemo Seufer <ths@mips.com>
565 * config/tc-mips.c (macro_build): Test for currently active
567 (mips16_ip): Reject invalid opcodes.
569 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
571 * doc/as.texinfo: Rename "Index" to "AS Index",
572 and "ABORT" to "ABORT (COFF)".
574 2006-05-11 Paul Brook <paul@codesourcery.com>
576 * config/tc-arm.c (parse_half): New function.
577 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
578 (parse_operands): Ditto.
579 (do_mov16): Reject invalid relocations.
580 (do_t_mov16): Ditto. Use Thumb reloc numbers.
581 (insns): Replace Iffff with HALF.
582 (md_apply_fix): Add MOVW and MOVT relocs.
583 (tc_gen_reloc): Ditto.
584 * doc/c-arm.texi: Document relocation operators
586 2006-05-11 Paul Brook <paul@codesourcery.com>
588 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
590 2006-05-11 Thiemo Seufer <ths@mips.com>
592 * config/tc-mips.c (append_insn): Don't check the range of j or
595 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
597 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
598 relocs against external symbols for WinCE targets.
599 (md_apply_fix): Likewise.
601 2006-05-09 David Ung <davidu@mips.com>
603 * config/tc-mips.c (append_insn): Only warn about an out-of-range
606 2006-05-09 Nick Clifton <nickc@redhat.com>
608 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
609 against symbols which are not going to be placed into the symbol
612 2006-05-09 Ben Elliston <bje@au.ibm.com>
614 * expr.c (operand): Remove `if (0 && ..)' statement and
615 subsequently unused target_op label. Collapse `if (1 || ..)'
617 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
618 separately above the switch.
620 2006-05-08 Nick Clifton <nickc@redhat.com>
623 * config/tc-msp430.c (line_separator_character): Define as |.
625 2006-05-08 Thiemo Seufer <ths@mips.com>
626 Nigel Stephens <nigel@mips.com>
627 David Ung <davidu@mips.com>
629 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
630 (mips_opts): Likewise.
631 (file_ase_smartmips): New variable.
632 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
633 (macro_build): Handle SmartMIPS instructions.
635 (md_longopts): Add argument handling for smartmips.
636 (md_parse_options, mips_after_parse_args): Likewise.
637 (s_mipsset): Add .set smartmips support.
638 (md_show_usage): Document -msmartmips/-mno-smartmips.
639 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
641 * doc/c-mips.texi: Likewise.
643 2006-05-08 Alan Modra <amodra@bigpond.net.au>
645 * write.c (relax_segment): Add pass count arg. Don't error on
646 negative org/space on first two passes.
647 (relax_seg_info): New struct.
648 (relax_seg, write_object_file): Adjust.
649 * write.h (relax_segment): Update prototype.
651 2006-05-05 Julian Brown <julian@codesourcery.com>
653 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
655 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
656 architecture version checks.
657 (insns): Allow overlapping instructions to be used in VFP mode.
659 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
662 * config/obj-elf.c (obj_elf_change_section): Allow user
663 specified SHF_ALPHA_GPREL.
665 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
667 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
668 for PMEM related expressions.
670 2006-05-05 Nick Clifton <nickc@redhat.com>
673 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
674 insertion of a directory separator character into a string at a
675 given offset. Uses heuristics to decide when to use a backslash
676 character rather than a forward-slash character.
677 (dwarf2_directive_loc): Use the macro.
678 (out_debug_info): Likewise.
680 2006-05-05 Thiemo Seufer <ths@mips.com>
681 David Ung <davidu@mips.com>
683 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
685 (macro): Add new case M_CACHE_AB.
687 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
689 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
690 (opcode_lookup): Issue a warning for opcode with
691 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
692 identical to OT_cinfix3.
693 (TxC3w, TC3w, tC3w): New.
694 (insns): Use tC3w and TC3w for comparison instructions with
697 2006-05-04 Alan Modra <amodra@bigpond.net.au>
699 * subsegs.h (struct frchain): Delete frch_seg.
700 (frchain_root): Delete.
701 (seg_info): Define as macro.
702 * subsegs.c (frchain_root): Delete.
703 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
704 (subsegs_begin, subseg_change): Adjust for above.
705 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
706 rather than to one big list.
707 (subseg_get): Don't special case abs, und sections.
708 (subseg_new, subseg_force_new): Don't set frchainP here.
710 (subsegs_print_statistics): Adjust frag chain control list traversal.
711 * debug.c (dmp_frags): Likewise.
712 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
713 at frchain_root. Make use of known frchain ordering.
714 (last_frag_for_seg): Likewise.
715 (get_frag_fix): Likewise. Add seg param.
716 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
717 * write.c (chain_frchains_together_1): Adjust for struct frchain.
718 (SUB_SEGMENT_ALIGN): Likewise.
719 (subsegs_finish): Adjust frchain list traversal.
720 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
721 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
722 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
723 (xtensa_fix_b_j_loop_end_frags): Likewise.
724 (xtensa_fix_close_loop_end_frags): Likewise.
725 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
726 (retrieve_segment_info): Delete frch_seg initialisation.
728 2006-05-03 Alan Modra <amodra@bigpond.net.au>
730 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
731 * config/obj-elf.h (obj_sec_set_private_data): Delete.
732 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
733 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
735 2006-05-02 Joseph Myers <joseph@codesourcery.com>
737 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
739 (md_apply_fix3): Multiply offset by 4 here for
740 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
742 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
743 Jan Beulich <jbeulich@novell.com>
745 * config/tc-i386.c (output_invalid_buf): Change size for
747 * config/tc-tic30.c (output_invalid_buf): Likewise.
749 * config/tc-i386.c (output_invalid): Cast none-ascii char to
751 * config/tc-tic30.c (output_invalid): Likewise.
753 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
755 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
756 (TEXI2POD): Use AM_MAKEINFOFLAGS.
757 (asconfig.texi): Don't set top_srcdir.
758 * doc/as.texinfo: Don't use top_srcdir.
759 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
761 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
763 * config/tc-i386.c (output_invalid_buf): Change size to 16.
764 * config/tc-tic30.c (output_invalid_buf): Likewise.
766 * config/tc-i386.c (output_invalid): Use snprintf instead of
768 * config/tc-ia64.c (declare_register_set): Likewise.
769 (emit_one_bundle): Likewise.
770 (check_dependencies): Likewise.
771 * config/tc-tic30.c (output_invalid): Likewise.
773 2006-05-02 Paul Brook <paul@codesourcery.com>
775 * config/tc-arm.c (arm_optimize_expr): New function.
776 * config/tc-arm.h (md_optimize_expr): Define
777 (arm_optimize_expr): Add prototype.
778 (TC_FORCE_RELOCATION_SUB_SAME): Define.
780 2006-05-02 Ben Elliston <bje@au.ibm.com>
782 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
785 * sb.h (sb_list_vector): Move to sb.c.
786 * sb.c (free_list): Use type of sb_list_vector directly.
787 (sb_build): Fix off-by-one error in assertion about `size'.
789 2006-05-01 Ben Elliston <bje@au.ibm.com>
791 * listing.c (listing_listing): Remove useless loop.
792 * macro.c (macro_expand): Remove is_positional local variable.
793 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
794 and simplify surrounding expressions, where possible.
795 (assign_symbol): Likewise.
796 (s_weakref): Likewise.
797 * symbols.c (colon): Likewise.
799 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
801 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
803 2006-04-30 Thiemo Seufer <ths@mips.com>
804 David Ung <davidu@mips.com>
806 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
807 (mips_immed): New table that records various handling of udi
808 instruction patterns.
809 (mips_ip): Adds udi handling.
811 2006-04-28 Alan Modra <amodra@bigpond.net.au>
813 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
814 of list rather than beginning.
816 2006-04-26 Julian Brown <julian@codesourcery.com>
818 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
819 (is_quarter_float): Rename from above. Simplify slightly.
820 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
822 (parse_neon_mov): Parse floating-point constants.
823 (neon_qfloat_bits): Fix encoding.
824 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
825 preference to integer encoding when using the F32 type.
827 2006-04-26 Julian Brown <julian@codesourcery.com>
829 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
830 zero-initialising structures containing it will lead to invalid types).
831 (arm_it): Add vectype to each operand.
832 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
834 (neon_typed_alias): New structure. Extra information for typed
836 (reg_entry): Add neon type info field.
837 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
838 Break out alternative syntax for coprocessor registers, etc. into...
839 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
840 out from arm_reg_parse.
841 (parse_neon_type): Move. Return SUCCESS/FAIL.
842 (first_error): New function. Call to ensure first error which occurs is
844 (parse_neon_operand_type): Parse exactly one type.
845 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
846 (parse_typed_reg_or_scalar): New function. Handle core of both
847 arm_typed_reg_parse and parse_scalar.
848 (arm_typed_reg_parse): Parse a register with an optional type.
849 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
851 (parse_scalar): Parse a Neon scalar with optional type.
852 (parse_reg_list): Use first_error.
853 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
854 (neon_alias_types_same): New function. Return true if two (alias) types
856 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
858 (insert_reg_alias): Return new reg_entry not void.
859 (insert_neon_reg_alias): New function. Insert type/index information as
860 well as register for alias.
861 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
862 make typed register aliases accordingly.
863 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
865 (s_unreq): Delete type information if present.
866 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
867 (s_arm_unwind_save_mmxwcg): Likewise.
868 (s_arm_unwind_movsp): Likewise.
869 (s_arm_unwind_setfp): Likewise.
870 (parse_shift): Likewise.
871 (parse_shifter_operand): Likewise.
872 (parse_address): Likewise.
873 (parse_tb): Likewise.
874 (tc_arm_regname_to_dw2regnum): Likewise.
875 (md_pseudo_table): Add dn, qn.
876 (parse_neon_mov): Handle typed operands.
877 (parse_operands): Likewise.
878 (neon_type_mask): Add N_SIZ.
879 (N_ALLMODS): New macro.
880 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
881 (el_type_of_type_chk): Add some safeguards.
882 (modify_types_allowed): Fix logic bug.
883 (neon_check_type): Handle operands with types.
884 (neon_three_same): Remove redundant optional arg handling.
885 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
886 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
887 (do_neon_step): Adjust accordingly.
888 (neon_cmode_for_logic_imm): Use first_error.
889 (do_neon_bitfield): Call neon_check_type.
890 (neon_dyadic): Rename to...
891 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
892 to allow modification of type of the destination.
893 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
894 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
895 (do_neon_compare): Make destination be an untyped bitfield.
896 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
897 (neon_mul_mac): Return early in case of errors.
898 (neon_move_immediate): Use first_error.
899 (neon_mac_reg_scalar_long): Fix type to include scalar.
900 (do_neon_dup): Likewise.
901 (do_neon_mov): Likewise (in several places).
902 (do_neon_tbl_tbx): Fix type.
903 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
904 (do_neon_ld_dup): Exit early in case of errors and/or use
906 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
907 Handle .dn/.qn directives.
908 (REGDEF): Add zero for reg_entry neon field.
910 2006-04-26 Julian Brown <julian@codesourcery.com>
912 * config/tc-arm.c (limits.h): Include.
913 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
914 (fpu_vfp_v3_or_neon_ext): Declare constants.
915 (neon_el_type): New enumeration of types for Neon vector elements.
916 (neon_type_el): New struct. Define type and size of a vector element.
917 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
919 (neon_type): Define struct. The type of an instruction.
920 (arm_it): Add 'vectype' for the current instruction.
921 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
922 (vfp_sp_reg_pos): Rename to...
923 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
925 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
926 (Neon D or Q register).
927 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
929 (GE_OPT_PREFIX_BIG): Define constant, for use in...
930 (my_get_expression): Allow above constant as argument to accept
931 64-bit constants with optional prefix.
932 (arm_reg_parse): Add extra argument to return the specific type of
933 register in when either a D or Q register (REG_TYPE_NDQ) is
934 requested. Can be NULL.
935 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
936 (parse_reg_list): Update for new arm_reg_parse args.
937 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
938 (parse_neon_el_struct_list): New function. Parse element/structure
939 register lists for VLD<n>/VST<n> instructions.
940 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
941 (s_arm_unwind_save_mmxwr): Likewise.
942 (s_arm_unwind_save_mmxwcg): Likewise.
943 (s_arm_unwind_movsp): Likewise.
944 (s_arm_unwind_setfp): Likewise.
945 (parse_big_immediate): New function. Parse an immediate, which may be
946 64 bits wide. Put results in inst.operands[i].
947 (parse_shift): Update for new arm_reg_parse args.
948 (parse_address): Likewise. Add parsing of alignment specifiers.
949 (parse_neon_mov): Parse the operands of a VMOV instruction.
950 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
951 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
952 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
953 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
954 (parse_operands): Handle new codes above.
955 (encode_arm_vfp_sp_reg): Rename to...
956 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
957 selected VFP version only supports D0-D15.
958 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
959 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
960 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
961 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
962 encode_arm_vfp_reg name, and allow 32 D regs.
963 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
964 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
966 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
967 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
968 constant-load and conversion insns introduced with VFPv3.
969 (neon_tab_entry): New struct.
970 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
971 those which are the targets of pseudo-instructions.
972 (neon_opc): Enumerate opcodes, use as indices into...
973 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
974 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
975 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
976 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
978 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
980 (neon_type_mask): New. Compact type representation for type checking.
981 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
982 permitted type combinations.
983 (N_IGNORE_TYPE): New macro.
984 (neon_check_shape): New function. Check an instruction shape for
985 multiple alternatives. Return the specific shape for the current
987 (neon_modify_type_size): New function. Modify a vector type and size,
988 depending on the bit mask in argument 1.
989 (neon_type_promote): New function. Convert a given "key" type (of an
990 operand) into the correct type for a different operand, based on a bit
992 (type_chk_of_el_type): New function. Convert a type and size into the
993 compact representation used for type checking.
994 (el_type_of_type_ckh): New function. Reverse of above (only when a
995 single bit is set in the bit mask).
996 (modify_types_allowed): New function. Alter a mask of allowed types
997 based on a bit mask of modifications.
998 (neon_check_type): New function. Check the type of the current
999 instruction against the variable argument list. The "key" type of the
1000 instruction is returned.
1001 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1002 a Neon data-processing instruction depending on whether we're in ARM
1003 mode or Thumb-2 mode.
1004 (neon_logbits): New function.
1005 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1006 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1007 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1008 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1009 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1010 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1011 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1012 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1013 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1014 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1015 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1016 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1017 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1018 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1019 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1020 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1021 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1022 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1023 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1024 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1025 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1026 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1027 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1028 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1029 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1031 (parse_neon_type): New function. Parse Neon type specifier.
1032 (opcode_lookup): Allow parsing of Neon type specifiers.
1033 (REGNUM2, REGSETH, REGSET2): New macros.
1034 (reg_names): Add new VFPv3 and Neon registers.
1035 (NUF, nUF, NCE, nCE): New macros for opcode table.
1036 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1037 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1038 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1039 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1040 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1041 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1042 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1043 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1044 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1045 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1046 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1047 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1048 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1049 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1051 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1052 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1053 (arm_option_cpu_value): Add vfp3 and neon.
1054 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1057 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1059 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1060 syntax instead of hardcoded opcodes with ".w18" suffixes.
1061 (wide_branch_opcode): New.
1062 (build_transition): Use it to check for wide branch opcodes with
1063 either ".w18" or ".w15" suffixes.
1065 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1067 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1068 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1069 frag's is_literal flag.
1071 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1073 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1075 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1077 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1078 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1079 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1080 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1081 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1083 2005-04-20 Paul Brook <paul@codesourcery.com>
1085 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1087 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1089 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1091 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1092 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1093 Make some cpus unsupported on ELF. Run "make dep-am".
1094 * Makefile.in: Regenerate.
1096 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1098 * configure.in (--enable-targets): Indent help message.
1099 * configure: Regenerate.
1101 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1104 * config/tc-i386.c (i386_immediate): Check illegal immediate
1107 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1109 * config/tc-i386.c: Formatting.
1110 (output_disp, output_imm): ISO C90 params.
1112 * frags.c (frag_offset_fixed_p): Constify args.
1113 * frags.h (frag_offset_fixed_p): Ditto.
1115 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1116 (COFF_MAGIC): Delete.
1118 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1120 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1122 * po/POTFILES.in: Regenerated.
1124 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1126 * doc/as.texinfo: Mention that some .type syntaxes are not
1127 supported on all architectures.
1129 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1131 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1132 instructions when such transformations have been disabled.
1134 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1136 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1137 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1138 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1139 decoding the loop instructions. Remove current_offset variable.
1140 (xtensa_fix_short_loop_frags): Likewise.
1141 (min_bytes_to_other_loop_end): Remove current_offset argument.
1143 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1145 * config/tc-z80.c (z80_optimize_expr): Removed.
1146 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1148 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1150 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1151 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1152 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1153 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1154 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1155 at90can64, at90usb646, at90usb647, at90usb1286 and
1157 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1159 2006-04-07 Paul Brook <paul@codesourcery.com>
1161 * config/tc-arm.c (parse_operands): Set default error message.
1163 2006-04-07 Paul Brook <paul@codesourcery.com>
1165 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1167 2006-04-07 Paul Brook <paul@codesourcery.com>
1169 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1171 2006-04-07 Paul Brook <paul@codesourcery.com>
1173 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1174 (move_or_literal_pool): Handle Thumb-2 instructions.
1175 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1177 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1180 * config/tc-i386.c (match_template): Move 64-bit operand tests
1183 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1185 * po/Make-in: Add install-html target.
1186 * Makefile.am: Add install-html and install-html-recursive targets.
1187 * Makefile.in: Regenerate.
1188 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1189 * configure: Regenerate.
1190 * doc/Makefile.am: Add install-html and install-html-am targets.
1191 * doc/Makefile.in: Regenerate.
1193 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1195 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1198 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1199 Daniel Jacobowitz <dan@codesourcery.com>
1201 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1202 (GOTT_BASE, GOTT_INDEX): New.
1203 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1204 GOTT_INDEX when generating VxWorks PIC.
1205 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1206 use the generic *-*-vxworks* stanza instead.
1208 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1211 * frags.c (frag_offset_fixed_p): New function.
1212 * frags.h (frag_offset_fixed_p): Declare.
1213 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1214 (resolve_expression): Likewise.
1216 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1218 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1219 of the same length but different numbers of slots.
1221 2006-03-30 Andreas Schwab <schwab@suse.de>
1223 * configure.in: Fix help string for --enable-targets option.
1224 * configure: Regenerate.
1226 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1228 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1229 (m68k_ip): ... here. Use for all chips. Protect against buffer
1230 overrun and avoid excessive copying.
1232 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1233 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1234 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1235 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1236 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1237 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1238 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1239 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1240 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1241 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1242 (struct m68k_cpu): Change chip field to control_regs.
1243 (current_chip): Remove.
1244 (control_regs): New.
1245 (m68k_archs, m68k_extensions): Adjust.
1246 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1247 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1248 (find_cf_chip): Reimplement for new organization of cpu table.
1249 (select_control_regs): Remove.
1251 (struct save_opts): Save control regs, not chip.
1252 (s_save, s_restore): Adjust.
1253 (m68k_lookup_cpu): Give deprecated warning when necessary.
1254 (m68k_init_arch): Adjust.
1255 (md_show_usage): Adjust for new cpu table organization.
1257 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1259 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1260 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1261 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1263 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1264 (any_gotrel): New rule.
1265 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1266 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1268 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1269 (bfin_pic_ptr): New function.
1270 (md_pseudo_table): Add it for ".picptr".
1271 (OPTION_FDPIC): New macro.
1272 (md_longopts): Add -mfdpic.
1273 (md_parse_option): Handle it.
1274 (md_begin): Set BFD flags.
1275 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1276 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1278 * Makefile.am (bfin-parse.o): Update dependencies.
1279 (DEPTC_bfin_elf): Likewise.
1280 * Makefile.in: Regenerate.
1282 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1284 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1285 mcfemac instead of mcfmac.
1287 2006-03-23 Michael Matz <matz@suse.de>
1289 * config/tc-i386.c (type_names): Correct placement of 'static'.
1290 (reloc): Map some more relocs to their 64 bit counterpart when
1292 (output_insn): Work around breakage if DEBUG386 is defined.
1293 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1294 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1295 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1296 different from i386.
1297 (output_imm): Ditto.
1298 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1300 (md_convert_frag): Jumps can now be larger than 2GB away, error
1302 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1303 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1305 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1306 Daniel Jacobowitz <dan@codesourcery.com>
1307 Phil Edwards <phil@codesourcery.com>
1308 Zack Weinberg <zack@codesourcery.com>
1309 Mark Mitchell <mark@codesourcery.com>
1310 Nathan Sidwell <nathan@codesourcery.com>
1312 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1313 (md_begin): Complain about -G being used for PIC. Don't change
1314 the text, data and bss alignments on VxWorks.
1315 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1316 generating VxWorks PIC.
1317 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1318 (macro): Likewise, but do not treat la $25 specially for
1319 VxWorks PIC, and do not handle jal.
1320 (OPTION_MVXWORKS_PIC): New macro.
1321 (md_longopts): Add -mvxworks-pic.
1322 (md_parse_option): Don't complain about using PIC and -G together here.
1323 Handle OPTION_MVXWORKS_PIC.
1324 (md_estimate_size_before_relax): Always use the first relaxation
1325 sequence on VxWorks.
1326 * config/tc-mips.h (VXWORKS_PIC): New.
1328 2006-03-21 Paul Brook <paul@codesourcery.com>
1330 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1332 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1334 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1335 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1336 (get_loop_align_size): New.
1337 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1338 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1339 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1340 (get_noop_aligned_address): Use get_loop_align_size.
1341 (get_aligned_diff): Likewise.
1343 2006-03-21 Paul Brook <paul@codesourcery.com>
1345 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1347 2006-03-20 Paul Brook <paul@codesourcery.com>
1349 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1350 (do_t_branch): Encode branches inside IT blocks as unconditional.
1351 (do_t_cps): New function.
1352 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1353 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1354 (opcode_lookup): Allow conditional suffixes on all instructions in
1356 (md_assemble): Advance condexec state before checking for errors.
1357 (insns): Use do_t_cps.
1359 2006-03-20 Paul Brook <paul@codesourcery.com>
1361 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1362 outputting the insn.
1364 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1366 * config/tc-vax.c: Update copyright year.
1367 * config/tc-vax.h: Likewise.
1369 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1371 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1373 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1375 2006-03-17 Paul Brook <paul@codesourcery.com>
1377 * config/tc-arm.c (insns): Add ldm and stm.
1379 2006-03-17 Ben Elliston <bje@au.ibm.com>
1382 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1384 2006-03-16 Paul Brook <paul@codesourcery.com>
1386 * config/tc-arm.c (insns): Add "svc".
1388 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1390 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1391 flag and avoid double underscore prefixes.
1393 2006-03-10 Paul Brook <paul@codesourcery.com>
1395 * config/tc-arm.c (md_begin): Handle EABIv5.
1396 (arm_eabis): Add EF_ARM_EABI_VER5.
1397 * doc/c-arm.texi: Document -meabi=5.
1399 2006-03-10 Ben Elliston <bje@au.ibm.com>
1401 * app.c (do_scrub_chars): Simplify string handling.
1403 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1404 Daniel Jacobowitz <dan@codesourcery.com>
1405 Zack Weinberg <zack@codesourcery.com>
1406 Nathan Sidwell <nathan@codesourcery.com>
1407 Paul Brook <paul@codesourcery.com>
1408 Ricardo Anguiano <anguiano@codesourcery.com>
1409 Phil Edwards <phil@codesourcery.com>
1411 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1412 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1414 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1415 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1416 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1418 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1420 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1421 even when using the text-section-literals option.
1423 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1425 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1427 (m68k_ip): <case 'J'> Check we have some control regs.
1428 (md_parse_option): Allow raw arch switch.
1429 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1430 whether 68881 or cfloat was meant by -mfloat.
1431 (md_show_usage): Adjust extension display.
1432 (m68k_elf_final_processing): Adjust.
1434 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1436 * config/tc-avr.c (avr_mod_hash_value): New function.
1437 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1438 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1439 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1440 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1442 (tc_gen_reloc): Handle substractions of symbols, if possible do
1443 fixups, abort otherwise.
1444 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1445 tc_fix_adjustable): Define.
1447 2006-03-02 James E Wilson <wilson@specifix.com>
1449 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1450 change the template, then clear md.slot[curr].end_of_insn_group.
1452 2006-02-28 Jan Beulich <jbeulich@novell.com>
1454 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1456 2006-02-28 Jan Beulich <jbeulich@novell.com>
1459 * macro.c (getstring): Don't treat parentheses special anymore.
1460 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1461 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1464 2006-02-28 Mat <mat@csail.mit.edu>
1466 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1468 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1470 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1472 (CFI_signal_frame): Define.
1473 (cfi_pseudo_table): Add .cfi_signal_frame.
1474 (dot_cfi): Handle CFI_signal_frame.
1475 (output_cie): Handle cie->signal_frame.
1476 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1477 different. Copy signal_frame from FDE to newly created CIE.
1478 * doc/as.texinfo: Document .cfi_signal_frame.
1480 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1482 * doc/Makefile.am: Add html target.
1483 * doc/Makefile.in: Regenerate.
1484 * po/Make-in: Add html target.
1486 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1488 * config/tc-i386.c (output_insn): Support Intel Merom New
1491 * config/tc-i386.h (CpuMNI): New.
1492 (CpuUnknownFlags): Add CpuMNI.
1494 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1496 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1497 (hpriv_reg_table): New table for hyperprivileged registers.
1498 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1501 2006-02-24 DJ Delorie <dj@redhat.com>
1503 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1504 (tc_gen_reloc): Don't define.
1505 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1506 (OPTION_LINKRELAX): New.
1507 (md_longopts): Add it.
1509 (md_parse_options): Set it.
1510 (md_assemble): Emit relaxation relocs as needed.
1511 (md_convert_frag): Emit relaxation relocs as needed.
1512 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1513 (m32c_apply_fix): New.
1514 (tc_gen_reloc): New.
1515 (m32c_force_relocation): Force out jump relocs when relaxing.
1516 (m32c_fix_adjustable): Return false if relaxing.
1518 2006-02-24 Paul Brook <paul@codesourcery.com>
1520 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1521 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1522 (struct asm_barrier_opt): Define.
1523 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1524 (parse_psr): Accept V7M psr names.
1525 (parse_barrier): New function.
1526 (enum operand_parse_code): Add OP_oBARRIER.
1527 (parse_operands): Implement OP_oBARRIER.
1528 (do_barrier): New function.
1529 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1530 (do_t_cpsi): Add V7M restrictions.
1531 (do_t_mrs, do_t_msr): Validate V7M variants.
1532 (md_assemble): Check for NULL variants.
1533 (v7m_psrs, barrier_opt_names): New tables.
1534 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1535 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1536 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1537 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1538 (struct cpu_arch_ver_table): Define.
1539 (cpu_arch_ver): New.
1540 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1541 Tag_CPU_arch_profile.
1542 * doc/c-arm.texi: Document new cpu and arch options.
1544 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1546 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1548 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1550 * config/tc-ia64.c: Update copyright years.
1552 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1554 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1557 2005-02-22 Paul Brook <paul@codesourcery.com>
1559 * config/tc-arm.c (do_pld): Remove incorrect write to
1561 (encode_thumb32_addr_mode): Use correct operand.
1563 2006-02-21 Paul Brook <paul@codesourcery.com>
1565 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1567 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1568 Anil Paranjape <anilp1@kpitcummins.com>
1569 Shilin Shakti <shilins@kpitcummins.com>
1571 * Makefile.am: Add xc16x related entry.
1572 * Makefile.in: Regenerate.
1573 * configure.in: Added xc16x related entry.
1574 * configure: Regenerate.
1575 * config/tc-xc16x.h: New file
1576 * config/tc-xc16x.c: New file
1577 * doc/c-xc16x.texi: New file for xc16x
1578 * doc/all.texi: Entry for xc16x
1579 * doc/Makefile.texi: Added c-xc16x.texi
1580 * NEWS: Announce the support for the new target.
1582 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1584 * configure.tgt: set emulation for mips-*-netbsd*
1586 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1588 * config.in: Rebuilt.
1590 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1592 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1593 from 1, not 0, in error messages.
1594 (md_assemble): Simplify special-case check for ENTRY instructions.
1595 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1596 operand in error message.
1598 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1600 * configure.tgt (arm-*-linux-gnueabi*): Change to
1603 2006-02-10 Nick Clifton <nickc@redhat.com>
1605 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1606 32-bit value is propagated into the upper bits of a 64-bit long.
1608 * config/tc-arc.c (init_opcode_tables): Fix cast.
1609 (arc_extoper, md_operand): Likewise.
1611 2006-02-09 David Heine <dlheine@tensilica.com>
1613 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1614 each relaxation step.
1616 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1618 * configure.in (CHECK_DECLS): Add vsnprintf.
1619 * configure: Regenerate.
1620 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1621 include/declare here, but...
1622 * as.h: Move code detecting VARARGS idiom to the top.
1623 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1624 (vsnprintf): Declare if not already declared.
1626 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1628 * as.c (close_output_file): New.
1629 (main): Register close_output_file with xatexit before
1630 dump_statistics. Don't call output_file_close.
1632 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1634 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1635 mcf5329_control_regs): New.
1636 (not_current_architecture, selected_arch, selected_cpu): New.
1637 (m68k_archs, m68k_extensions): New.
1638 (archs): Renamed to ...
1639 (m68k_cpus): ... here. Adjust.
1641 (md_pseudo_table): Add arch and cpu directives.
1642 (find_cf_chip, m68k_ip): Adjust table scanning.
1643 (no_68851, no_68881): Remove.
1644 (md_assemble): Lazily initialize.
1645 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1646 (md_init_after_args): Move functionality to m68k_init_arch.
1647 (mri_chip): Adjust table scanning.
1648 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1649 options with saner parsing.
1650 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1651 m68k_init_arch): New.
1652 (s_m68k_cpu, s_m68k_arch): New.
1653 (md_show_usage): Adjust.
1654 (m68k_elf_final_processing): Set CF EF flags.
1655 * config/tc-m68k.h (m68k_init_after_args): Remove.
1656 (tc_init_after_args): Remove.
1657 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1658 (M68k-Directives): Document .arch and .cpu directives.
1660 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1662 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1663 synonyms for equ and defl.
1664 (z80_cons_fix_new): New function.
1665 (emit_byte): Disallow relative jumps to absolute locations.
1666 (emit_data): Only handle defb, prototype changed, because defb is
1667 now handled as pseudo-op rather than an instruction.
1668 (instab): Entries for defb,defw,db,dw moved from here...
1669 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1670 Add entries for def24,def32,d24,d32.
1671 (md_assemble): Improved error handling.
1672 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1673 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1674 (z80_cons_fix_new): Declare.
1675 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1676 (def24,d24,def32,d32): New pseudo-ops.
1678 2006-02-02 Paul Brook <paul@codesourcery.com>
1680 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1682 2005-02-02 Paul Brook <paul@codesourcery.com>
1684 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1685 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1686 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1687 T2_OPCODE_RSB): Define.
1688 (thumb32_negate_data_op): New function.
1689 (md_apply_fix): Use it.
1691 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1693 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1695 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1696 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1698 (relaxation_requirements): Add pfinish_frag argument and use it to
1699 replace setting tinsn->record_fix fields.
1700 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1701 and vinsn_to_insnbuf. Remove references to record_fix and
1702 slot_sub_symbols fields.
1703 (xtensa_mark_narrow_branches): Delete unused code.
1704 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1706 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1708 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1709 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1710 of the record_fix field. Simplify error messages for unexpected
1712 (set_expr_symbol_offset_diff): Delete.
1714 2006-01-31 Paul Brook <paul@codesourcery.com>
1716 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1718 2006-01-31 Paul Brook <paul@codesourcery.com>
1719 Richard Earnshaw <rearnsha@arm.com>
1721 * config/tc-arm.c: Use arm_feature_set.
1722 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1723 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1724 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1727 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1728 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1729 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1730 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1732 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1733 (arm_opts): Move old cpu/arch options from here...
1734 (arm_legacy_opts): ... to here.
1735 (md_parse_option): Search arm_legacy_opts.
1736 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1737 (arm_float_abis, arm_eabis): Make const.
1739 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1741 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1743 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1745 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1746 in load immediate intruction.
1748 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1750 * config/bfin-parse.y (value_match): Use correct conversion
1751 specifications in template string for __FILE__ and __LINE__.
1755 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1757 Introduce TLS descriptors for i386 and x86_64.
1758 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1759 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1760 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1761 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1762 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1764 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1765 (lex_got): Handle @tlsdesc and @tlscall.
1766 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1768 2006-01-11 Nick Clifton <nickc@redhat.com>
1770 Fixes for building on 64-bit hosts:
1771 * config/tc-avr.c (mod_index): New union to allow conversion
1772 between pointers and integers.
1773 (md_begin, avr_ldi_expression): Use it.
1774 * config/tc-i370.c (md_assemble): Add cast for argument to print
1776 * config/tc-tic54x.c (subsym_substitute): Likewise.
1777 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1778 opindex field of fr_cgen structure into a pointer so that it can
1779 be stored in a frag.
1780 * config/tc-mn10300.c (md_assemble): Likewise.
1781 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1783 * config/tc-v850.c: Replace uses of (int) casts with correct
1786 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1789 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1791 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1794 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1795 a local-label reference.
1797 For older changes see ChangeLog-2005
1803 version-control: never
projects / external / binutils.git / blob