1 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
3 * po/Make-in (top_builddir): Define.
5 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
7 * doc/Makefile.am (TEXI2DVI): Define.
8 * doc/Makefile.in: Regenerate.
9 * doc/c-arc.texi: Fix typo.
11 2006-06-01 Alan Modra <amodra@bigpond.net.au>
13 * config/obj-ieee.c: Delete.
14 * config/obj-ieee.h: Delete.
15 * Makefile.am (OBJ_FORMATS): Remove ieee.
16 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
17 (obj-ieee.o): Remove rule.
18 * Makefile.in: Regenerate.
19 * configure.in (atof): Remove tahoe.
20 (OBJ_MAYBE_IEEE): Don't define.
21 * configure: Regenerate.
22 * config.in: Regenerate.
23 * doc/Makefile.in: Regenerate.
24 * po/POTFILES.in: Regenerate.
26 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
28 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
29 and LIBINTL_DEP everywhere.
31 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
32 * acinclude.m4: Include new gettext macros.
33 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
34 Remove local code for po/Makefile.
35 * Makefile.in, configure, doc/Makefile.in: Regenerated.
37 2006-05-30 Nick Clifton <nickc@redhat.com>
39 * po/es.po: Updated Spanish translation.
41 2006-05-06 Denis Chertykov <denisc@overta.ru>
43 * doc/c-avr.texi: New file.
44 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
45 * doc/all.texi: Set AVR
46 * doc/as.texinfo: Include c-avr.texi
48 2006-05-28 Jie Zhang <jie.zhang@analog.com>
50 * config/bfin-parse.y (check_macfunc): Loose the condition of
51 calling check_multiply_halfregs ().
53 2006-05-25 Jie Zhang <jie.zhang@analog.com>
55 * config/bfin-parse.y (asm_1): Better check and deal with
56 vector and scalar Multiply 16-Bit Operands instructions.
58 2006-05-24 Nick Clifton <nickc@redhat.com>
60 * config/tc-hppa.c: Convert to ISO C90 format.
61 * config/tc-hppa.h: Likewise.
63 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
64 Randolph Chung <randolph@tausq.org>
66 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
67 is_tls_ieoff, is_tls_leoff): Define.
68 (fix_new_hppa): Handle TLS.
69 (cons_fix_new_hppa): Likewise.
71 (md_apply_fix): Handle TLS relocs.
72 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
74 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
76 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
78 2006-05-23 Thiemo Seufer <ths@mips.com>
79 David Ung <davidu@mips.com>
80 Nigel Stephens <nigel@mips.com>
83 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
84 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
85 ISA_HAS_MXHC1): New macros.
86 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
87 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
88 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
89 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
90 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
91 (mips_after_parse_args): Change default handling of float register
92 size to account for 32bit code with 64bit FP. Better sanity checking
93 of ISA/ASE/ABI option combinations.
94 (s_mipsset): Support switching of GPR and FPR sizes via
95 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
97 (mips_elf_final_processing): We should record the use of 64bit FP
98 registers in 32bit code but we don't, because ELF header flags are
100 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
101 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
102 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
103 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
104 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
105 missing -march options. Document .set arch=CPU. Move .set smartmips
106 to ASE page. Use @code for .set FOO examples.
108 2006-05-23 Jie Zhang <jie.zhang@analog.com>
110 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
113 2006-05-23 Jie Zhang <jie.zhang@analog.com>
115 * config/bfin-defs.h (bfin_equals): Remove declaration.
116 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
117 * config/tc-bfin.c (bfin_name_is_register): Remove.
118 (bfin_equals): Remove.
119 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
120 (bfin_name_is_register): Remove declaration.
122 2006-05-19 Thiemo Seufer <ths@mips.com>
123 Nigel Stephens <nigel@mips.com>
125 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
126 (mips_oddfpreg_ok): New function.
129 2006-05-19 Thiemo Seufer <ths@mips.com>
130 David Ung <davidu@mips.com>
132 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
133 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
134 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
135 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
136 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
137 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
138 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
139 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
140 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
141 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
142 reg_names_o32, reg_names_n32n64): Define register classes.
143 (reg_lookup): New function, use register classes.
144 (md_begin): Reserve register names in the symbol table. Simplify
146 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
148 (mips16_ip): Use reg_lookup.
149 (tc_get_register): Likewise.
150 (tc_mips_regname_to_dw2regnum): New function.
152 2006-05-19 Thiemo Seufer <ths@mips.com>
154 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
155 Un-constify string argument.
156 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
158 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
160 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
162 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
164 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
166 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
169 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
171 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
172 cfloat/m68881 to correct architecture before using it.
174 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
176 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
179 2006-05-15 Paul Brook <paul@codesourcery.com>
181 * config/tc-arm.c (arm_adjust_symtab): Use
182 bfd_is_arm_special_symbol_name.
184 2006-05-15 Bob Wilson <bob.wilson@acm.org>
186 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
187 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
188 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
189 Handle errors from calls to xtensa_opcode_is_* functions.
191 2006-05-14 Thiemo Seufer <ths@mips.com>
193 * config/tc-mips.c (macro_build): Test for currently active
195 (mips16_ip): Reject invalid opcodes.
197 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
199 * doc/as.texinfo: Rename "Index" to "AS Index",
200 and "ABORT" to "ABORT (COFF)".
202 2006-05-11 Paul Brook <paul@codesourcery.com>
204 * config/tc-arm.c (parse_half): New function.
205 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
206 (parse_operands): Ditto.
207 (do_mov16): Reject invalid relocations.
208 (do_t_mov16): Ditto. Use Thumb reloc numbers.
209 (insns): Replace Iffff with HALF.
210 (md_apply_fix): Add MOVW and MOVT relocs.
211 (tc_gen_reloc): Ditto.
212 * doc/c-arm.texi: Document relocation operators
214 2006-05-11 Paul Brook <paul@codesourcery.com>
216 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
218 2006-05-11 Thiemo Seufer <ths@mips.com>
220 * config/tc-mips.c (append_insn): Don't check the range of j or
223 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
225 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
226 relocs against external symbols for WinCE targets.
227 (md_apply_fix): Likewise.
229 2006-05-09 David Ung <davidu@mips.com>
231 * config/tc-mips.c (append_insn): Only warn about an out-of-range
234 2006-05-09 Nick Clifton <nickc@redhat.com>
236 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
237 against symbols which are not going to be placed into the symbol
240 2006-05-09 Ben Elliston <bje@au.ibm.com>
242 * expr.c (operand): Remove `if (0 && ..)' statement and
243 subsequently unused target_op label. Collapse `if (1 || ..)'
245 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
246 separately above the switch.
248 2006-05-08 Nick Clifton <nickc@redhat.com>
251 * config/tc-msp430.c (line_separator_character): Define as |.
253 2006-05-08 Thiemo Seufer <ths@mips.com>
254 Nigel Stephens <nigel@mips.com>
255 David Ung <davidu@mips.com>
257 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
258 (mips_opts): Likewise.
259 (file_ase_smartmips): New variable.
260 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
261 (macro_build): Handle SmartMIPS instructions.
263 (md_longopts): Add argument handling for smartmips.
264 (md_parse_options, mips_after_parse_args): Likewise.
265 (s_mipsset): Add .set smartmips support.
266 (md_show_usage): Document -msmartmips/-mno-smartmips.
267 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
269 * doc/c-mips.texi: Likewise.
271 2006-05-08 Alan Modra <amodra@bigpond.net.au>
273 * write.c (relax_segment): Add pass count arg. Don't error on
274 negative org/space on first two passes.
275 (relax_seg_info): New struct.
276 (relax_seg, write_object_file): Adjust.
277 * write.h (relax_segment): Update prototype.
279 2006-05-05 Julian Brown <julian@codesourcery.com>
281 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
283 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
284 architecture version checks.
285 (insns): Allow overlapping instructions to be used in VFP mode.
287 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
290 * config/obj-elf.c (obj_elf_change_section): Allow user
291 specified SHF_ALPHA_GPREL.
293 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
295 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
296 for PMEM related expressions.
298 2006-05-05 Nick Clifton <nickc@redhat.com>
301 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
302 insertion of a directory separator character into a string at a
303 given offset. Uses heuristics to decide when to use a backslash
304 character rather than a forward-slash character.
305 (dwarf2_directive_loc): Use the macro.
306 (out_debug_info): Likewise.
308 2006-05-05 Thiemo Seufer <ths@mips.com>
309 David Ung <davidu@mips.com>
311 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
313 (macro): Add new case M_CACHE_AB.
315 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
317 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
318 (opcode_lookup): Issue a warning for opcode with
319 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
320 identical to OT_cinfix3.
321 (TxC3w, TC3w, tC3w): New.
322 (insns): Use tC3w and TC3w for comparison instructions with
325 2006-05-04 Alan Modra <amodra@bigpond.net.au>
327 * subsegs.h (struct frchain): Delete frch_seg.
328 (frchain_root): Delete.
329 (seg_info): Define as macro.
330 * subsegs.c (frchain_root): Delete.
331 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
332 (subsegs_begin, subseg_change): Adjust for above.
333 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
334 rather than to one big list.
335 (subseg_get): Don't special case abs, und sections.
336 (subseg_new, subseg_force_new): Don't set frchainP here.
338 (subsegs_print_statistics): Adjust frag chain control list traversal.
339 * debug.c (dmp_frags): Likewise.
340 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
341 at frchain_root. Make use of known frchain ordering.
342 (last_frag_for_seg): Likewise.
343 (get_frag_fix): Likewise. Add seg param.
344 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
345 * write.c (chain_frchains_together_1): Adjust for struct frchain.
346 (SUB_SEGMENT_ALIGN): Likewise.
347 (subsegs_finish): Adjust frchain list traversal.
348 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
349 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
350 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
351 (xtensa_fix_b_j_loop_end_frags): Likewise.
352 (xtensa_fix_close_loop_end_frags): Likewise.
353 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
354 (retrieve_segment_info): Delete frch_seg initialisation.
356 2006-05-03 Alan Modra <amodra@bigpond.net.au>
358 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
359 * config/obj-elf.h (obj_sec_set_private_data): Delete.
360 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
361 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
363 2006-05-02 Joseph Myers <joseph@codesourcery.com>
365 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
367 (md_apply_fix3): Multiply offset by 4 here for
368 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
370 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
371 Jan Beulich <jbeulich@novell.com>
373 * config/tc-i386.c (output_invalid_buf): Change size for
375 * config/tc-tic30.c (output_invalid_buf): Likewise.
377 * config/tc-i386.c (output_invalid): Cast none-ascii char to
379 * config/tc-tic30.c (output_invalid): Likewise.
381 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
383 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
384 (TEXI2POD): Use AM_MAKEINFOFLAGS.
385 (asconfig.texi): Don't set top_srcdir.
386 * doc/as.texinfo: Don't use top_srcdir.
387 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
389 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
391 * config/tc-i386.c (output_invalid_buf): Change size to 16.
392 * config/tc-tic30.c (output_invalid_buf): Likewise.
394 * config/tc-i386.c (output_invalid): Use snprintf instead of
396 * config/tc-ia64.c (declare_register_set): Likewise.
397 (emit_one_bundle): Likewise.
398 (check_dependencies): Likewise.
399 * config/tc-tic30.c (output_invalid): Likewise.
401 2006-05-02 Paul Brook <paul@codesourcery.com>
403 * config/tc-arm.c (arm_optimize_expr): New function.
404 * config/tc-arm.h (md_optimize_expr): Define
405 (arm_optimize_expr): Add prototype.
406 (TC_FORCE_RELOCATION_SUB_SAME): Define.
408 2006-05-02 Ben Elliston <bje@au.ibm.com>
410 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
413 * sb.h (sb_list_vector): Move to sb.c.
414 * sb.c (free_list): Use type of sb_list_vector directly.
415 (sb_build): Fix off-by-one error in assertion about `size'.
417 2006-05-01 Ben Elliston <bje@au.ibm.com>
419 * listing.c (listing_listing): Remove useless loop.
420 * macro.c (macro_expand): Remove is_positional local variable.
421 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
422 and simplify surrounding expressions, where possible.
423 (assign_symbol): Likewise.
424 (s_weakref): Likewise.
425 * symbols.c (colon): Likewise.
427 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
429 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
431 2006-04-30 Thiemo Seufer <ths@mips.com>
432 David Ung <davidu@mips.com>
434 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
435 (mips_immed): New table that records various handling of udi
436 instruction patterns.
437 (mips_ip): Adds udi handling.
439 2006-04-28 Alan Modra <amodra@bigpond.net.au>
441 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
442 of list rather than beginning.
444 2006-04-26 Julian Brown <julian@codesourcery.com>
446 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
447 (is_quarter_float): Rename from above. Simplify slightly.
448 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
450 (parse_neon_mov): Parse floating-point constants.
451 (neon_qfloat_bits): Fix encoding.
452 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
453 preference to integer encoding when using the F32 type.
455 2006-04-26 Julian Brown <julian@codesourcery.com>
457 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
458 zero-initialising structures containing it will lead to invalid types).
459 (arm_it): Add vectype to each operand.
460 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
462 (neon_typed_alias): New structure. Extra information for typed
464 (reg_entry): Add neon type info field.
465 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
466 Break out alternative syntax for coprocessor registers, etc. into...
467 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
468 out from arm_reg_parse.
469 (parse_neon_type): Move. Return SUCCESS/FAIL.
470 (first_error): New function. Call to ensure first error which occurs is
472 (parse_neon_operand_type): Parse exactly one type.
473 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
474 (parse_typed_reg_or_scalar): New function. Handle core of both
475 arm_typed_reg_parse and parse_scalar.
476 (arm_typed_reg_parse): Parse a register with an optional type.
477 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
479 (parse_scalar): Parse a Neon scalar with optional type.
480 (parse_reg_list): Use first_error.
481 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
482 (neon_alias_types_same): New function. Return true if two (alias) types
484 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
486 (insert_reg_alias): Return new reg_entry not void.
487 (insert_neon_reg_alias): New function. Insert type/index information as
488 well as register for alias.
489 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
490 make typed register aliases accordingly.
491 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
493 (s_unreq): Delete type information if present.
494 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
495 (s_arm_unwind_save_mmxwcg): Likewise.
496 (s_arm_unwind_movsp): Likewise.
497 (s_arm_unwind_setfp): Likewise.
498 (parse_shift): Likewise.
499 (parse_shifter_operand): Likewise.
500 (parse_address): Likewise.
501 (parse_tb): Likewise.
502 (tc_arm_regname_to_dw2regnum): Likewise.
503 (md_pseudo_table): Add dn, qn.
504 (parse_neon_mov): Handle typed operands.
505 (parse_operands): Likewise.
506 (neon_type_mask): Add N_SIZ.
507 (N_ALLMODS): New macro.
508 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
509 (el_type_of_type_chk): Add some safeguards.
510 (modify_types_allowed): Fix logic bug.
511 (neon_check_type): Handle operands with types.
512 (neon_three_same): Remove redundant optional arg handling.
513 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
514 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
515 (do_neon_step): Adjust accordingly.
516 (neon_cmode_for_logic_imm): Use first_error.
517 (do_neon_bitfield): Call neon_check_type.
518 (neon_dyadic): Rename to...
519 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
520 to allow modification of type of the destination.
521 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
522 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
523 (do_neon_compare): Make destination be an untyped bitfield.
524 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
525 (neon_mul_mac): Return early in case of errors.
526 (neon_move_immediate): Use first_error.
527 (neon_mac_reg_scalar_long): Fix type to include scalar.
528 (do_neon_dup): Likewise.
529 (do_neon_mov): Likewise (in several places).
530 (do_neon_tbl_tbx): Fix type.
531 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
532 (do_neon_ld_dup): Exit early in case of errors and/or use
534 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
535 Handle .dn/.qn directives.
536 (REGDEF): Add zero for reg_entry neon field.
538 2006-04-26 Julian Brown <julian@codesourcery.com>
540 * config/tc-arm.c (limits.h): Include.
541 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
542 (fpu_vfp_v3_or_neon_ext): Declare constants.
543 (neon_el_type): New enumeration of types for Neon vector elements.
544 (neon_type_el): New struct. Define type and size of a vector element.
545 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
547 (neon_type): Define struct. The type of an instruction.
548 (arm_it): Add 'vectype' for the current instruction.
549 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
550 (vfp_sp_reg_pos): Rename to...
551 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
553 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
554 (Neon D or Q register).
555 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
557 (GE_OPT_PREFIX_BIG): Define constant, for use in...
558 (my_get_expression): Allow above constant as argument to accept
559 64-bit constants with optional prefix.
560 (arm_reg_parse): Add extra argument to return the specific type of
561 register in when either a D or Q register (REG_TYPE_NDQ) is
562 requested. Can be NULL.
563 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
564 (parse_reg_list): Update for new arm_reg_parse args.
565 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
566 (parse_neon_el_struct_list): New function. Parse element/structure
567 register lists for VLD<n>/VST<n> instructions.
568 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
569 (s_arm_unwind_save_mmxwr): Likewise.
570 (s_arm_unwind_save_mmxwcg): Likewise.
571 (s_arm_unwind_movsp): Likewise.
572 (s_arm_unwind_setfp): Likewise.
573 (parse_big_immediate): New function. Parse an immediate, which may be
574 64 bits wide. Put results in inst.operands[i].
575 (parse_shift): Update for new arm_reg_parse args.
576 (parse_address): Likewise. Add parsing of alignment specifiers.
577 (parse_neon_mov): Parse the operands of a VMOV instruction.
578 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
579 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
580 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
581 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
582 (parse_operands): Handle new codes above.
583 (encode_arm_vfp_sp_reg): Rename to...
584 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
585 selected VFP version only supports D0-D15.
586 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
587 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
588 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
589 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
590 encode_arm_vfp_reg name, and allow 32 D regs.
591 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
592 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
594 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
595 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
596 constant-load and conversion insns introduced with VFPv3.
597 (neon_tab_entry): New struct.
598 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
599 those which are the targets of pseudo-instructions.
600 (neon_opc): Enumerate opcodes, use as indices into...
601 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
602 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
603 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
604 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
606 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
608 (neon_type_mask): New. Compact type representation for type checking.
609 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
610 permitted type combinations.
611 (N_IGNORE_TYPE): New macro.
612 (neon_check_shape): New function. Check an instruction shape for
613 multiple alternatives. Return the specific shape for the current
615 (neon_modify_type_size): New function. Modify a vector type and size,
616 depending on the bit mask in argument 1.
617 (neon_type_promote): New function. Convert a given "key" type (of an
618 operand) into the correct type for a different operand, based on a bit
620 (type_chk_of_el_type): New function. Convert a type and size into the
621 compact representation used for type checking.
622 (el_type_of_type_ckh): New function. Reverse of above (only when a
623 single bit is set in the bit mask).
624 (modify_types_allowed): New function. Alter a mask of allowed types
625 based on a bit mask of modifications.
626 (neon_check_type): New function. Check the type of the current
627 instruction against the variable argument list. The "key" type of the
628 instruction is returned.
629 (neon_dp_fixup): New function. Fill in and modify instruction bits for
630 a Neon data-processing instruction depending on whether we're in ARM
631 mode or Thumb-2 mode.
632 (neon_logbits): New function.
633 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
634 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
635 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
636 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
637 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
638 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
639 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
640 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
641 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
642 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
643 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
644 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
645 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
646 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
647 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
648 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
649 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
650 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
651 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
652 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
653 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
654 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
655 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
656 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
657 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
659 (parse_neon_type): New function. Parse Neon type specifier.
660 (opcode_lookup): Allow parsing of Neon type specifiers.
661 (REGNUM2, REGSETH, REGSET2): New macros.
662 (reg_names): Add new VFPv3 and Neon registers.
663 (NUF, nUF, NCE, nCE): New macros for opcode table.
664 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
665 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
666 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
667 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
668 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
669 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
670 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
671 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
672 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
673 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
674 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
675 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
676 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
677 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
679 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
680 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
681 (arm_option_cpu_value): Add vfp3 and neon.
682 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
685 2006-04-25 Bob Wilson <bob.wilson@acm.org>
687 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
688 syntax instead of hardcoded opcodes with ".w18" suffixes.
689 (wide_branch_opcode): New.
690 (build_transition): Use it to check for wide branch opcodes with
691 either ".w18" or ".w15" suffixes.
693 2006-04-25 Bob Wilson <bob.wilson@acm.org>
695 * config/tc-xtensa.c (xtensa_create_literal_symbol,
696 xg_assemble_literal, xg_assemble_literal_space): Do not set the
697 frag's is_literal flag.
699 2006-04-25 Bob Wilson <bob.wilson@acm.org>
701 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
703 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
705 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
706 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
707 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
708 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
709 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
711 2005-04-20 Paul Brook <paul@codesourcery.com>
713 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
715 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
717 2006-04-19 Alan Modra <amodra@bigpond.net.au>
719 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
720 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
721 Make some cpus unsupported on ELF. Run "make dep-am".
722 * Makefile.in: Regenerate.
724 2006-04-19 Alan Modra <amodra@bigpond.net.au>
726 * configure.in (--enable-targets): Indent help message.
727 * configure: Regenerate.
729 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
732 * config/tc-i386.c (i386_immediate): Check illegal immediate
735 2006-04-18 Alan Modra <amodra@bigpond.net.au>
737 * config/tc-i386.c: Formatting.
738 (output_disp, output_imm): ISO C90 params.
740 * frags.c (frag_offset_fixed_p): Constify args.
741 * frags.h (frag_offset_fixed_p): Ditto.
743 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
744 (COFF_MAGIC): Delete.
746 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
748 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
750 * po/POTFILES.in: Regenerated.
752 2006-04-16 Mark Mitchell <mark@codesourcery.com>
754 * doc/as.texinfo: Mention that some .type syntaxes are not
755 supported on all architectures.
757 2006-04-14 Sterling Augustine <sterling@tensilica.com>
759 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
760 instructions when such transformations have been disabled.
762 2006-04-10 Sterling Augustine <sterling@tensilica.com>
764 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
765 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
766 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
767 decoding the loop instructions. Remove current_offset variable.
768 (xtensa_fix_short_loop_frags): Likewise.
769 (min_bytes_to_other_loop_end): Remove current_offset argument.
771 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
773 * config/tc-z80.c (z80_optimize_expr): Removed.
774 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
776 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
778 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
779 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
780 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
781 atmega644, atmega329, atmega3290, atmega649, atmega6490,
782 atmega406, atmega640, atmega1280, atmega1281, at90can32,
783 at90can64, at90usb646, at90usb647, at90usb1286 and
785 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
787 2006-04-07 Paul Brook <paul@codesourcery.com>
789 * config/tc-arm.c (parse_operands): Set default error message.
791 2006-04-07 Paul Brook <paul@codesourcery.com>
793 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
795 2006-04-07 Paul Brook <paul@codesourcery.com>
797 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
799 2006-04-07 Paul Brook <paul@codesourcery.com>
801 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
802 (move_or_literal_pool): Handle Thumb-2 instructions.
803 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
805 2006-04-07 Alan Modra <amodra@bigpond.net.au>
808 * config/tc-i386.c (match_template): Move 64-bit operand tests
811 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
813 * po/Make-in: Add install-html target.
814 * Makefile.am: Add install-html and install-html-recursive targets.
815 * Makefile.in: Regenerate.
816 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
817 * configure: Regenerate.
818 * doc/Makefile.am: Add install-html and install-html-am targets.
819 * doc/Makefile.in: Regenerate.
821 2006-04-06 Alan Modra <amodra@bigpond.net.au>
823 * frags.c (frag_offset_fixed_p): Reinitialise offset before
826 2006-04-05 Richard Sandiford <richard@codesourcery.com>
827 Daniel Jacobowitz <dan@codesourcery.com>
829 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
830 (GOTT_BASE, GOTT_INDEX): New.
831 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
832 GOTT_INDEX when generating VxWorks PIC.
833 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
834 use the generic *-*-vxworks* stanza instead.
836 2006-04-04 Alan Modra <amodra@bigpond.net.au>
839 * frags.c (frag_offset_fixed_p): New function.
840 * frags.h (frag_offset_fixed_p): Declare.
841 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
842 (resolve_expression): Likewise.
844 2006-04-03 Sterling Augustine <sterling@tensilica.com>
846 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
847 of the same length but different numbers of slots.
849 2006-03-30 Andreas Schwab <schwab@suse.de>
851 * configure.in: Fix help string for --enable-targets option.
852 * configure: Regenerate.
854 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
856 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
857 (m68k_ip): ... here. Use for all chips. Protect against buffer
858 overrun and avoid excessive copying.
860 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
861 m68020_control_regs, m68040_control_regs, m68060_control_regs,
862 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
863 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
864 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
865 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
866 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
867 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
868 mcf5282_ctrl, mcfv4e_ctrl): ... these.
869 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
870 (struct m68k_cpu): Change chip field to control_regs.
871 (current_chip): Remove.
873 (m68k_archs, m68k_extensions): Adjust.
874 (m68k_cpus): Reorder to be in cpu number order. Adjust.
875 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
876 (find_cf_chip): Reimplement for new organization of cpu table.
877 (select_control_regs): Remove.
879 (struct save_opts): Save control regs, not chip.
880 (s_save, s_restore): Adjust.
881 (m68k_lookup_cpu): Give deprecated warning when necessary.
882 (m68k_init_arch): Adjust.
883 (md_show_usage): Adjust for new cpu table organization.
885 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
887 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
888 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
889 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
891 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
892 (any_gotrel): New rule.
893 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
894 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
896 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
897 (bfin_pic_ptr): New function.
898 (md_pseudo_table): Add it for ".picptr".
899 (OPTION_FDPIC): New macro.
900 (md_longopts): Add -mfdpic.
901 (md_parse_option): Handle it.
902 (md_begin): Set BFD flags.
903 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
904 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
906 * Makefile.am (bfin-parse.o): Update dependencies.
907 (DEPTC_bfin_elf): Likewise.
908 * Makefile.in: Regenerate.
910 2006-03-25 Richard Sandiford <richard@codesourcery.com>
912 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
913 mcfemac instead of mcfmac.
915 2006-03-23 Michael Matz <matz@suse.de>
917 * config/tc-i386.c (type_names): Correct placement of 'static'.
918 (reloc): Map some more relocs to their 64 bit counterpart when
920 (output_insn): Work around breakage if DEBUG386 is defined.
921 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
922 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
923 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
926 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
928 (md_convert_frag): Jumps can now be larger than 2GB away, error
930 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
931 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
933 2006-03-22 Richard Sandiford <richard@codesourcery.com>
934 Daniel Jacobowitz <dan@codesourcery.com>
935 Phil Edwards <phil@codesourcery.com>
936 Zack Weinberg <zack@codesourcery.com>
937 Mark Mitchell <mark@codesourcery.com>
938 Nathan Sidwell <nathan@codesourcery.com>
940 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
941 (md_begin): Complain about -G being used for PIC. Don't change
942 the text, data and bss alignments on VxWorks.
943 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
944 generating VxWorks PIC.
945 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
946 (macro): Likewise, but do not treat la $25 specially for
947 VxWorks PIC, and do not handle jal.
948 (OPTION_MVXWORKS_PIC): New macro.
949 (md_longopts): Add -mvxworks-pic.
950 (md_parse_option): Don't complain about using PIC and -G together here.
951 Handle OPTION_MVXWORKS_PIC.
952 (md_estimate_size_before_relax): Always use the first relaxation
954 * config/tc-mips.h (VXWORKS_PIC): New.
956 2006-03-21 Paul Brook <paul@codesourcery.com>
958 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
960 2006-03-21 Sterling Augustine <sterling@tensilica.com>
962 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
963 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
964 (get_loop_align_size): New.
965 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
966 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
967 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
968 (get_noop_aligned_address): Use get_loop_align_size.
969 (get_aligned_diff): Likewise.
971 2006-03-21 Paul Brook <paul@codesourcery.com>
973 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
975 2006-03-20 Paul Brook <paul@codesourcery.com>
977 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
978 (do_t_branch): Encode branches inside IT blocks as unconditional.
979 (do_t_cps): New function.
980 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
981 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
982 (opcode_lookup): Allow conditional suffixes on all instructions in
984 (md_assemble): Advance condexec state before checking for errors.
985 (insns): Use do_t_cps.
987 2006-03-20 Paul Brook <paul@codesourcery.com>
989 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
992 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
994 * config/tc-vax.c: Update copyright year.
995 * config/tc-vax.h: Likewise.
997 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
999 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1001 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1003 2006-03-17 Paul Brook <paul@codesourcery.com>
1005 * config/tc-arm.c (insns): Add ldm and stm.
1007 2006-03-17 Ben Elliston <bje@au.ibm.com>
1010 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1012 2006-03-16 Paul Brook <paul@codesourcery.com>
1014 * config/tc-arm.c (insns): Add "svc".
1016 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1018 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1019 flag and avoid double underscore prefixes.
1021 2006-03-10 Paul Brook <paul@codesourcery.com>
1023 * config/tc-arm.c (md_begin): Handle EABIv5.
1024 (arm_eabis): Add EF_ARM_EABI_VER5.
1025 * doc/c-arm.texi: Document -meabi=5.
1027 2006-03-10 Ben Elliston <bje@au.ibm.com>
1029 * app.c (do_scrub_chars): Simplify string handling.
1031 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1032 Daniel Jacobowitz <dan@codesourcery.com>
1033 Zack Weinberg <zack@codesourcery.com>
1034 Nathan Sidwell <nathan@codesourcery.com>
1035 Paul Brook <paul@codesourcery.com>
1036 Ricardo Anguiano <anguiano@codesourcery.com>
1037 Phil Edwards <phil@codesourcery.com>
1039 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1040 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1042 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1043 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1044 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1046 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1048 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1049 even when using the text-section-literals option.
1051 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1053 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1055 (m68k_ip): <case 'J'> Check we have some control regs.
1056 (md_parse_option): Allow raw arch switch.
1057 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1058 whether 68881 or cfloat was meant by -mfloat.
1059 (md_show_usage): Adjust extension display.
1060 (m68k_elf_final_processing): Adjust.
1062 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1064 * config/tc-avr.c (avr_mod_hash_value): New function.
1065 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1066 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1067 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1068 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1070 (tc_gen_reloc): Handle substractions of symbols, if possible do
1071 fixups, abort otherwise.
1072 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1073 tc_fix_adjustable): Define.
1075 2006-03-02 James E Wilson <wilson@specifix.com>
1077 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1078 change the template, then clear md.slot[curr].end_of_insn_group.
1080 2006-02-28 Jan Beulich <jbeulich@novell.com>
1082 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1084 2006-02-28 Jan Beulich <jbeulich@novell.com>
1087 * macro.c (getstring): Don't treat parentheses special anymore.
1088 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1089 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1092 2006-02-28 Mat <mat@csail.mit.edu>
1094 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1096 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1098 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1100 (CFI_signal_frame): Define.
1101 (cfi_pseudo_table): Add .cfi_signal_frame.
1102 (dot_cfi): Handle CFI_signal_frame.
1103 (output_cie): Handle cie->signal_frame.
1104 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1105 different. Copy signal_frame from FDE to newly created CIE.
1106 * doc/as.texinfo: Document .cfi_signal_frame.
1108 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1110 * doc/Makefile.am: Add html target.
1111 * doc/Makefile.in: Regenerate.
1112 * po/Make-in: Add html target.
1114 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1116 * config/tc-i386.c (output_insn): Support Intel Merom New
1119 * config/tc-i386.h (CpuMNI): New.
1120 (CpuUnknownFlags): Add CpuMNI.
1122 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1124 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1125 (hpriv_reg_table): New table for hyperprivileged registers.
1126 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1129 2006-02-24 DJ Delorie <dj@redhat.com>
1131 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1132 (tc_gen_reloc): Don't define.
1133 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1134 (OPTION_LINKRELAX): New.
1135 (md_longopts): Add it.
1137 (md_parse_options): Set it.
1138 (md_assemble): Emit relaxation relocs as needed.
1139 (md_convert_frag): Emit relaxation relocs as needed.
1140 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1141 (m32c_apply_fix): New.
1142 (tc_gen_reloc): New.
1143 (m32c_force_relocation): Force out jump relocs when relaxing.
1144 (m32c_fix_adjustable): Return false if relaxing.
1146 2006-02-24 Paul Brook <paul@codesourcery.com>
1148 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1149 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1150 (struct asm_barrier_opt): Define.
1151 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1152 (parse_psr): Accept V7M psr names.
1153 (parse_barrier): New function.
1154 (enum operand_parse_code): Add OP_oBARRIER.
1155 (parse_operands): Implement OP_oBARRIER.
1156 (do_barrier): New function.
1157 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1158 (do_t_cpsi): Add V7M restrictions.
1159 (do_t_mrs, do_t_msr): Validate V7M variants.
1160 (md_assemble): Check for NULL variants.
1161 (v7m_psrs, barrier_opt_names): New tables.
1162 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1163 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1164 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1165 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1166 (struct cpu_arch_ver_table): Define.
1167 (cpu_arch_ver): New.
1168 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1169 Tag_CPU_arch_profile.
1170 * doc/c-arm.texi: Document new cpu and arch options.
1172 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1174 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1176 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1178 * config/tc-ia64.c: Update copyright years.
1180 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1182 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1185 2005-02-22 Paul Brook <paul@codesourcery.com>
1187 * config/tc-arm.c (do_pld): Remove incorrect write to
1189 (encode_thumb32_addr_mode): Use correct operand.
1191 2006-02-21 Paul Brook <paul@codesourcery.com>
1193 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1195 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1196 Anil Paranjape <anilp1@kpitcummins.com>
1197 Shilin Shakti <shilins@kpitcummins.com>
1199 * Makefile.am: Add xc16x related entry.
1200 * Makefile.in: Regenerate.
1201 * configure.in: Added xc16x related entry.
1202 * configure: Regenerate.
1203 * config/tc-xc16x.h: New file
1204 * config/tc-xc16x.c: New file
1205 * doc/c-xc16x.texi: New file for xc16x
1206 * doc/all.texi: Entry for xc16x
1207 * doc/Makefile.texi: Added c-xc16x.texi
1208 * NEWS: Announce the support for the new target.
1210 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1212 * configure.tgt: set emulation for mips-*-netbsd*
1214 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1216 * config.in: Rebuilt.
1218 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1220 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1221 from 1, not 0, in error messages.
1222 (md_assemble): Simplify special-case check for ENTRY instructions.
1223 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1224 operand in error message.
1226 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1228 * configure.tgt (arm-*-linux-gnueabi*): Change to
1231 2006-02-10 Nick Clifton <nickc@redhat.com>
1233 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1234 32-bit value is propagated into the upper bits of a 64-bit long.
1236 * config/tc-arc.c (init_opcode_tables): Fix cast.
1237 (arc_extoper, md_operand): Likewise.
1239 2006-02-09 David Heine <dlheine@tensilica.com>
1241 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1242 each relaxation step.
1244 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1246 * configure.in (CHECK_DECLS): Add vsnprintf.
1247 * configure: Regenerate.
1248 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1249 include/declare here, but...
1250 * as.h: Move code detecting VARARGS idiom to the top.
1251 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1252 (vsnprintf): Declare if not already declared.
1254 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1256 * as.c (close_output_file): New.
1257 (main): Register close_output_file with xatexit before
1258 dump_statistics. Don't call output_file_close.
1260 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1262 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1263 mcf5329_control_regs): New.
1264 (not_current_architecture, selected_arch, selected_cpu): New.
1265 (m68k_archs, m68k_extensions): New.
1266 (archs): Renamed to ...
1267 (m68k_cpus): ... here. Adjust.
1269 (md_pseudo_table): Add arch and cpu directives.
1270 (find_cf_chip, m68k_ip): Adjust table scanning.
1271 (no_68851, no_68881): Remove.
1272 (md_assemble): Lazily initialize.
1273 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1274 (md_init_after_args): Move functionality to m68k_init_arch.
1275 (mri_chip): Adjust table scanning.
1276 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1277 options with saner parsing.
1278 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1279 m68k_init_arch): New.
1280 (s_m68k_cpu, s_m68k_arch): New.
1281 (md_show_usage): Adjust.
1282 (m68k_elf_final_processing): Set CF EF flags.
1283 * config/tc-m68k.h (m68k_init_after_args): Remove.
1284 (tc_init_after_args): Remove.
1285 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1286 (M68k-Directives): Document .arch and .cpu directives.
1288 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1290 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1291 synonyms for equ and defl.
1292 (z80_cons_fix_new): New function.
1293 (emit_byte): Disallow relative jumps to absolute locations.
1294 (emit_data): Only handle defb, prototype changed, because defb is
1295 now handled as pseudo-op rather than an instruction.
1296 (instab): Entries for defb,defw,db,dw moved from here...
1297 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1298 Add entries for def24,def32,d24,d32.
1299 (md_assemble): Improved error handling.
1300 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1301 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1302 (z80_cons_fix_new): Declare.
1303 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1304 (def24,d24,def32,d32): New pseudo-ops.
1306 2006-02-02 Paul Brook <paul@codesourcery.com>
1308 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1310 2005-02-02 Paul Brook <paul@codesourcery.com>
1312 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1313 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1314 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1315 T2_OPCODE_RSB): Define.
1316 (thumb32_negate_data_op): New function.
1317 (md_apply_fix): Use it.
1319 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1321 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1323 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1324 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1326 (relaxation_requirements): Add pfinish_frag argument and use it to
1327 replace setting tinsn->record_fix fields.
1328 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1329 and vinsn_to_insnbuf. Remove references to record_fix and
1330 slot_sub_symbols fields.
1331 (xtensa_mark_narrow_branches): Delete unused code.
1332 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1334 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1336 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1337 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1338 of the record_fix field. Simplify error messages for unexpected
1340 (set_expr_symbol_offset_diff): Delete.
1342 2006-01-31 Paul Brook <paul@codesourcery.com>
1344 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1346 2006-01-31 Paul Brook <paul@codesourcery.com>
1347 Richard Earnshaw <rearnsha@arm.com>
1349 * config/tc-arm.c: Use arm_feature_set.
1350 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1351 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1352 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1355 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1356 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1357 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1358 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1360 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1361 (arm_opts): Move old cpu/arch options from here...
1362 (arm_legacy_opts): ... to here.
1363 (md_parse_option): Search arm_legacy_opts.
1364 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1365 (arm_float_abis, arm_eabis): Make const.
1367 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1369 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1371 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1373 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1374 in load immediate intruction.
1376 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1378 * config/bfin-parse.y (value_match): Use correct conversion
1379 specifications in template string for __FILE__ and __LINE__.
1383 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1385 Introduce TLS descriptors for i386 and x86_64.
1386 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1387 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1388 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1389 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1390 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1392 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1393 (lex_got): Handle @tlsdesc and @tlscall.
1394 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1396 2006-01-11 Nick Clifton <nickc@redhat.com>
1398 Fixes for building on 64-bit hosts:
1399 * config/tc-avr.c (mod_index): New union to allow conversion
1400 between pointers and integers.
1401 (md_begin, avr_ldi_expression): Use it.
1402 * config/tc-i370.c (md_assemble): Add cast for argument to print
1404 * config/tc-tic54x.c (subsym_substitute): Likewise.
1405 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1406 opindex field of fr_cgen structure into a pointer so that it can
1407 be stored in a frag.
1408 * config/tc-mn10300.c (md_assemble): Likewise.
1409 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1411 * config/tc-v850.c: Replace uses of (int) casts with correct
1414 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1417 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1419 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1422 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1423 a local-label reference.
1425 For older changes see ChangeLog-2005
1431 version-control: never