1 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (mips_arg_info): Remove soft_match.
4 (match_out_of_range, match_not_constant): New functions.
5 (match_const_int): Remove fallback parameter and check for soft_match.
6 Use match_not_constant.
7 (match_mapped_int_operand, match_addiusp_operand)
8 (match_perf_reg_operand, match_save_restore_list_operand)
9 (match_mdmx_imm_reg_operand): Update accordingly. Use
10 match_out_of_range and set_insn_error* instead of as_bad.
11 (match_int_operand): Likewise. Use match_not_constant in the
12 !allows_nonconst case.
13 (match_float_constant): Report invalid float constants.
14 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
15 match_float_constant to check for invalid constants. Fail the
16 match if match_const_int or match_float_constant return false.
17 (mips_ip): Update accordingly.
18 (mips16_ip): Likewise. Undo null termination of instruction name
19 once lookup is complete.
21 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
23 * config/tc-mips.c (mips_insn_error_format): New enum.
24 (mips_insn_error): New struct.
25 (insn_error): Change to a mips_insn_error.
26 (clear_insn_error, set_insn_error_format, set_insn_error)
27 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
29 (mips_parse_argument_token, md_assemble, match_insn)
30 (match_mips16_insn): Use them instead of manipulating insn_error
32 (mips_ip, mips16_ip): Likewise. Simplify control flow.
34 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
36 * config/tc-mips.c (normalize_constant_expr): Move further up file.
37 (normalize_address_expr): Likewise.
38 (match_insn, match_mips16_insn): New functions, split out from...
39 (mips_ip, mips16_ip): ...here.
41 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
43 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
45 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
46 for optional operands.
48 2013-08-16 Alan Modra <amodra@gmail.com>
50 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
53 2013-08-16 Alan Modra <amodra@gmail.com>
55 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
57 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
59 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
60 argument as alignment.
62 2013-08-09 Nick Clifton <nickc@redhat.com>
64 * config/tc-rl78.c (elf_flags): New variable.
65 (enum options): Add OPTION_G10.
66 (md_longopts): Add mg10.
67 (md_parse_option): Parse -mg10.
68 (rl78_elf_final_processing): New function.
69 * config/tc-rl78.c (tc_final_processing): Define.
70 * doc/c-rl78.texi: Document -mg10 option.
72 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
74 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
75 suffixes to be elided too.
76 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
77 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
80 2013-08-05 John Tytgat <john@bass-software.com>
82 * po/POTFILES.in: Regenerate.
84 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
85 Konrad Eisele <konrad@gaisler.com>
87 * config/tc-sparc.c (sparc_arch_types): Add leon.
88 (sparc_arch): Move sparc4 around and add leon.
89 (sparc_target_format): Document -Aleon.
90 * doc/c-sparc.texi: Likewise.
92 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
94 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
96 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
97 Richard Sandiford <rdsandiford@googlemail.com>
99 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
100 (RWARN): Bump to 0x8000000.
101 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
102 (RTYPE_R5900_ACC): New register types.
103 (RTYPE_MASK): Include them.
104 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
106 (reg_names): Include them.
107 (mips_parse_register_1): New function, split out from...
108 (mips_parse_register): ...here. Add a channels_ptr parameter.
109 Look for VU0 channel suffixes when nonnull.
110 (reg_lookup): Update the call to mips_parse_register.
111 (mips_parse_vu0_channels): New function.
112 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
113 (mips_operand_token): Add a "channels" field to the union.
114 Extend the comment above "ch" to OT_DOUBLE_CHAR.
115 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
116 (mips_parse_argument_token): Handle channel suffixes here too.
117 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
118 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
120 (md_begin): Register $vfN and $vfI registers.
121 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
122 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
123 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
124 (match_vu0_suffix_operand): New function.
125 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
126 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
127 (mips_lookup_insn): New function.
128 (mips_ip): Use it. Allow "+K" operands to be elided at the end
129 of an instruction. Handle '#' sequences.
131 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
133 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
134 values and use it instead of sreg, treg, xreg, etc.
136 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
138 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
139 and mips_int_operand_max.
140 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
142 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
143 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
144 instead of mips16_immed_operand.
146 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
148 * config/tc-mips.c (mips16_macro): Don't use move_register.
149 (mips16_ip): Allow macros to use 'p'.
151 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
153 * config/tc-mips.c (MAX_OPERANDS): New macro.
154 (mips_operand_array): New structure.
155 (mips_operands, mips16_operands, micromips_operands): New arrays.
156 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
157 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
158 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
159 (micromips_to_32_reg_q_map): Delete.
160 (insn_operands, insn_opno, insn_extract_operand): New functions.
161 (validate_mips_insn): Take a mips_operand_array as argument and
162 use it to build up a list of operands. Extend to handle INSN_MACRO
164 (validate_mips16_insn): New function.
165 (validate_micromips_insn): Take a mips_operand_array as argument.
167 (md_begin): Initialize mips_operands, mips16_operands and
168 micromips_operands. Call validate_mips_insn and
169 validate_micromips_insn for macro instructions too.
170 Call validate_mips16_insn for MIPS16 instructions.
171 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
173 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
174 them. Handle INSN_UDI.
175 (get_append_method): Use gpr_read_mask.
177 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
179 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
180 flags for MIPS16 and non-MIPS16 instructions.
181 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
182 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
183 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
184 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
185 and non-MIPS16 instructions. Fix formatting.
187 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
189 * config/tc-mips.c (reg_needs_delay): Move later in file.
191 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
193 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
194 Alexander Ivchenko <alexander.ivchenko@intel.com>
195 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
196 Sergey Lega <sergey.s.lega@intel.com>
197 Anna Tikhonova <anna.tikhonova@intel.com>
198 Ilya Tocar <ilya.tocar@intel.com>
199 Andrey Turetskiy <andrey.turetskiy@intel.com>
200 Ilya Verbin <ilya.verbin@intel.com>
201 Kirill Yukhin <kirill.yukhin@intel.com>
202 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
204 * config/tc-i386-intel.c (O_zmmword_ptr): New.
205 (i386_types): Add zmmword.
206 (i386_intel_simplify_register): Allow regzmm.
207 (i386_intel_simplify): Handle zmmwords.
208 (i386_intel_operand): Handle RC/SAE, vector operations and
210 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
211 (struct RC_Operation): New.
212 (struct Mask_Operation): New.
213 (struct Broadcast_Operation): New.
214 (vex_prefix): Size of bytes increased to 4 to support EVEX
216 (enum i386_error): Add new error codes: unsupported_broadcast,
217 broadcast_not_on_src_operand, broadcast_needed,
218 unsupported_masking, mask_not_on_destination, no_default_mask,
219 unsupported_rc_sae, rc_sae_operand_not_last_imm,
220 invalid_register_operand, try_vector_disp8.
221 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
222 rounding, broadcast, memshift.
223 (struct RC_name): New.
224 (RC_NamesTable): New.
227 (extra_symbol_chars): Add '{'.
228 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
229 (i386_operand_type): Add regzmm, regmask and vec_disp8.
230 (match_mem_size): Handle zmmwords.
231 (operand_type_match): Handle zmm-registers.
232 (mode_from_disp_size): Handle vec_disp8.
233 (fits_in_vec_disp8): New.
234 (md_begin): Handle {} properly.
235 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
236 (build_vex_prefix): Handle vrex.
237 (build_evex_prefix): New.
238 (process_immext): Adjust to properly handle EVEX.
239 (md_assemble): Add EVEX encoding support.
240 (swap_2_operands): Correctly handle operands with masking,
241 broadcasting or RC/SAE.
242 (check_VecOperands): Support EVEX features.
243 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
244 (match_template): Support regzmm and handle new error codes.
245 (process_suffix): Handle zmmwords and zmm-registers.
246 (check_byte_reg): Extend to zmm-registers.
247 (process_operands): Extend to zmm-registers.
248 (build_modrm_byte): Handle EVEX.
249 (output_insn): Adjust to properly handle EVEX case.
250 (disp_size): Handle vec_disp8.
251 (output_disp): Support compressed disp8*N evex feature.
252 (output_imm): Handle RC/SAE immediates properly.
253 (check_VecOperations): New.
254 (i386_immediate): Handle EVEX features.
255 (i386_index_check): Handle zmmwords and zmm-registers.
256 (RC_SAE_immediate): New.
257 (i386_att_operand): Handle EVEX features.
258 (parse_real_register): Add a check for ZMM/Mask registers.
259 (OPTION_MEVEXLIG): New.
260 (OPTION_MEVEXWIG): New.
261 (md_longopts): Add mevexlig and mevexwig.
262 (md_parse_option): Handle mevexlig and mevexwig options.
263 (md_show_usage): Add description for mevexlig and mevexwig.
264 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
265 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
267 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
269 * config/tc-i386.c (cpu_arch): Add .sha.
270 * doc/c-i386.texi: Document sha/.sha.
272 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
273 Kirill Yukhin <kirill.yukhin@intel.com>
274 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
276 * config/tc-i386.c (BND_PREFIX): New.
277 (struct _i386_insn): Add new field bnd_prefix.
278 (add_bnd_prefix): New.
280 (i386_operand_type): Add regbnd.
281 (md_assemble): Handle BND prefixes.
282 (parse_insn): Likewise.
283 (output_branch): Likewise.
284 (output_jump): Likewise.
285 (build_modrm_byte): Handle regbnd.
286 (OPTION_MADD_BND_PREFIX): New.
287 (md_longopts): Add entry for 'madd-bnd-prefix'.
288 (md_parse_option): Handle madd-bnd-prefix option.
289 (md_show_usage): Add description for madd-bnd-prefix
291 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
293 2013-07-24 Tristan Gingold <gingold@adacore.com>
295 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
298 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
300 * config/tc-s390.c (s390_machine): Don't force the .machine
301 argument to lower case.
303 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
305 * config/tc-arm.c (s_arm_arch_extension): Improve error message
306 for invalid extension.
308 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
310 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
311 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
312 (aarch64_abi): New variable.
313 (ilp32_p): Change to be a macro.
314 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
315 (struct aarch64_option_abi_value_table): New struct.
316 (aarch64_abis): New table.
317 (aarch64_parse_abi): New function.
318 (aarch64_long_opts): Add entry for -mabi=.
319 * doc/as.texinfo (Target AArch64 options): Document -mabi.
320 * doc/c-aarch64.texi: Likewise.
322 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
324 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
327 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
329 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
331 * config/rx-parse.y: (rx_check_float_support): Add function to
332 check floating point operation support for target RX100 and
334 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
335 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
336 RX200, RX600, and RX610
338 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
340 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
342 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
344 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
345 * doc/c-avr.texi: Likewise.
347 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
349 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
350 error with older GCCs.
351 (mips16_macro_build): Dereference args.
353 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
355 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
356 New functions, split out from...
357 (reg_lookup): ...here. Remove itbl support.
358 (reglist_lookup): Delete.
359 (mips_operand_token_type): New enum.
360 (mips_operand_token): New structure.
361 (mips_operand_tokens): New variable.
362 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
363 (mips_parse_arguments): New functions.
364 (md_begin): Initialize mips_operand_tokens.
365 (mips_arg_info): Add a token field. Remove optional_reg field.
366 (match_char, match_expression): New functions.
367 (match_const_int): Use match_expression. Remove "s" argument
368 and return a boolean result. Remove O_register handling.
369 (match_regno, match_reg, match_reg_range): New functions.
370 (match_int_operand, match_mapped_int_operand, match_msb_operand)
371 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
372 (match_addiusp_operand, match_clo_clz_dest_operand)
373 (match_lwm_swm_list_operand, match_entry_exit_operand)
374 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
375 (match_tied_reg_operand): Remove "s" argument and return a boolean
376 result. Match tokens rather than text. Update calls to
377 match_const_int. Rely on match_regno to call check_regno.
378 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
379 "arg" argument. Return a boolean result.
380 (parse_float_constant): Replace with...
381 (match_float_constant): ...this new function.
382 (match_operand): Remove "s" argument and return a boolean result.
383 Update calls to subfunctions.
384 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
385 rather than string-parsing routines. Update handling of optional
386 registers for token scheme.
388 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
390 * config/tc-mips.c (parse_float_constant): Split out from...
393 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
395 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
398 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
400 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
401 (match_entry_exit_operand): New function.
402 (match_save_restore_list_operand): Likewise.
403 (match_operand): Use them.
404 (check_absolute_expr): Delete.
405 (mips16_ip): Rewrite main parsing loop to use mips_operands.
407 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
409 * config/tc-mips.c: Enable functions commented out in previous patch.
410 (SKIP_SPACE_TABS): Move further up file.
411 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
412 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
413 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
414 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
415 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
416 (micromips_imm_b_map, micromips_imm_c_map): Delete.
417 (mips_lookup_reg_pair): Delete.
418 (macro): Use report_bad_range and report_bad_field.
419 (mips_immed, expr_const_in_range): Delete.
420 (mips_ip): Rewrite main parsing loop to use new functions.
422 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
424 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
425 Change return type to bfd_boolean.
426 (report_bad_range, report_bad_field): New functions.
427 (mips_arg_info): New structure.
428 (match_const_int, convert_reg_type, check_regno, match_int_operand)
429 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
430 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
431 (match_addiusp_operand, match_clo_clz_dest_operand)
432 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
433 (match_pc_operand, match_tied_reg_operand, match_operand)
434 (check_completed_insn): New functions, commented out for now.
436 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
438 * config/tc-mips.c (insn_insert_operand): New function.
439 (macro_build, mips16_macro_build): Put null character check
440 in the for loop and convert continues to breaks. Use operand
441 structures to handle constant operands.
443 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
445 * config/tc-mips.c (validate_mips_insn): Move further up file.
446 Add insn_bits and decode_operand arguments. Use the mips_operand
447 fields to work out which bits an operand occupies. Detect double
449 (validate_micromips_insn): Move further up file. Call into
452 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
454 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
456 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
458 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
460 (macro): Update accordingly.
462 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
464 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
466 (md_assemble): Remove imm_reloc handling.
467 (mips_ip): Update commentary. Use offset_expr and offset_reloc
468 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
469 Use a temporary array rather than imm_reloc when parsing
470 constant expressions. Remove imm_reloc initialization.
471 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
472 for the relaxable field. Use a relax_char variable to track the
473 type of this field. Remove imm_reloc initialization.
475 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
477 * config/tc-mips.c (mips16_ip): Handle "I".
479 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
481 * config/tc-mips.c (mips_flag_nan2008): New variable.
482 (options): Add OPTION_NAN enum value.
483 (md_longopts): Handle it.
484 (md_parse_option): Likewise.
485 (s_nan): New function.
486 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
487 (md_show_usage): Add -mnan.
489 * doc/as.texinfo (Overview): Add -mnan.
490 * doc/c-mips.texi (MIPS Opts): Document -mnan.
491 (MIPS NaN Encodings): New node. Document .nan directive.
492 (MIPS-Dependent): List the new node.
494 2013-07-09 Tristan Gingold <gingold@adacore.com>
496 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
498 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
500 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
501 for 'A' and assume that the constant has been elided if the result
504 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
506 * config/tc-mips.c (gprel16_reloc_p): New function.
507 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
509 (offset_high_part, small_offset_p): New functions.
510 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
511 register load and store macros, handle the 16-bit offset case first.
512 If a 16-bit offset is not suitable for the instruction we're
513 generating, load it into the temporary register using
514 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
515 M_L_DAB code once the address has been constructed. For double load
516 and store macros, again handle the 16-bit offset case first.
517 If the second register cannot be accessed from the same high
518 part as the first, load it into AT using ADDRESS_ADDI_INSN.
519 Fix the handling of LD in cases where the first register is the
520 same as the base. Also handle the case where the offset is
521 not 16 bits and the second register cannot be accessed from the
522 same high part as the first. For unaligned loads and stores,
523 fuse the offbits == 12 and old "ab" handling. Apply this handling
524 whenever the second offset needs a different high part from the first.
525 Construct the offset using ADDRESS_ADDI_INSN where possible,
526 for offbits == 16 as well as offbits == 12. Use offset_reloc
527 when constructing the individual loads and stores.
528 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
529 and offset_reloc before matching against a particular opcode.
530 Handle elided 'A' constants. Allow 'A' constants to use
531 relocation operators.
533 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
535 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
536 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
537 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
539 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
541 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
542 Require the msb to be <= 31 for "+s". Check that the size is <= 31
543 for both "+s" and "+S".
545 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
547 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
548 (mips_ip, mips16_ip): Handle "+i".
550 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
552 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
553 (micromips_to_32_reg_h_map): Rename to...
554 (micromips_to_32_reg_h_map1): ...this.
555 (micromips_to_32_reg_i_map): Rename to...
556 (micromips_to_32_reg_h_map2): ...this.
557 (mips_lookup_reg_pair): New function.
558 (gpr_write_mask, macro): Adjust after above renaming.
559 (validate_micromips_insn): Remove "mi" handling.
560 (mips_ip): Likewise. Parse both registers in a pair for "mh".
562 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
564 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
565 (mips_ip): Remove "+D" and "+T" handling.
567 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
569 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
572 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
574 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
576 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
578 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
579 (aarch64_force_relocation): Likewise.
581 2013-07-02 Alan Modra <amodra@gmail.com>
583 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
585 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
587 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
588 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
589 Replace @sc{mips16} with literal `MIPS16'.
590 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
592 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
594 * config/tc-aarch64.c (reloc_table): Replace
595 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
596 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
597 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
598 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
599 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
600 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
601 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
602 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
603 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
604 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
605 (aarch64_force_relocation): Likewise.
607 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
609 * config/tc-aarch64.c (ilp32_p): New static variable.
610 (elf64_aarch64_target_format): Return the target according to the
612 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
613 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
614 (aarch64_dwarf2_addr_size): New function.
615 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
616 (DWARF2_ADDR_SIZE): New define.
618 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
620 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
622 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
624 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
626 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
628 * config/tc-mips.c (mips_set_options): Add insn32 member.
629 (mips_opts): Initialize it.
630 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
631 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
632 (md_longopts): Add "minsn32" and "mno-insn32" options.
633 (is_size_valid): Handle insn32 mode.
634 (md_assemble): Pass instruction string down to macro.
635 (brk_fmt): Add second dimension and insn32 mode initializers.
636 (mfhl_fmt): Likewise.
637 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
638 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
639 (macro_build_jalr, move_register): Handle insn32 mode.
640 (macro_build_branch_rs): Likewise.
641 (macro): Handle insn32 mode.
642 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
643 (mips_ip): Handle insn32 mode.
644 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
645 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
646 (mips_handle_align): Handle insn32 mode.
647 (md_show_usage): Add -minsn32 and -mno-insn32.
649 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
651 (-minsn32, -mno-insn32): New options.
652 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
654 (MIPS assembly options): New node. Document .set insn32 and
656 (MIPS-Dependent): List the new node.
658 2013-06-25 Nick Clifton <nickc@redhat.com>
660 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
661 the PC in indirect addressing on 430xv2 parts.
662 (msp430_operands): Add version test to hardware bug encoding
665 2013-06-24 Roland McGrath <mcgrathr@google.com>
667 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
668 so it skips whitespace before it.
669 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
671 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
672 (arm_reg_parse_multi): Skip whitespace first.
673 (parse_reg_list): Likewise.
674 (parse_vfp_reg_list): Likewise.
675 (s_arm_unwind_save_mmxwcg): Likewise.
677 2013-06-24 Nick Clifton <nickc@redhat.com>
680 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
682 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
684 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
686 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
688 * config/tc-mips.c: Assert that offsetT and valueT are at least
690 (GPR_SMIN, GPR_SMAX): New macros.
691 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
693 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
695 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
696 conditions. Remove any code deselected by them.
697 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
699 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
701 * NEWS: Note removal of ECOFF support.
702 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
703 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
704 (MULTI_CFILES): Remove config/e-mipsecoff.c.
705 * Makefile.in: Regenerate.
706 * configure.in: Remove MIPS ECOFF references.
707 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
709 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
710 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
711 (mips-*-*): ...this single case.
712 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
713 MIPS emulations to be e-mipself*.
714 * configure: Regenerate.
715 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
716 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
717 (mips-*-sysv*): Remove coff and ecoff cases.
718 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
719 * ecoff.c: Remove reference to MIPS ECOFF.
720 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
721 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
722 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
723 (mips_hi_fixup): Tweak comment.
724 (append_insn): Require a howto.
725 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
727 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
729 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
730 Use "CPU" instead of "cpu".
731 * doc/c-mips.texi: Likewise.
732 (MIPS Opts): Rename to MIPS Options.
733 (MIPS option stack): Rename to MIPS Option Stack.
734 (MIPS ASE instruction generation overrides): Rename to
735 MIPS ASE Instruction Generation Overrides (for now).
736 (MIPS floating-point): Rename to MIPS Floating-Point.
738 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
740 * doc/c-mips.texi (MIPS Macros): New section.
741 (MIPS Object): Replace with...
742 (MIPS Small Data): ...this new section.
744 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
746 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
747 Capitalize name. Use @kindex instead of @cindex for .set entries.
749 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
751 * doc/c-mips.texi (MIPS Stabs): Remove section.
753 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
755 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
756 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
757 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
758 (ISA_SUPPORTS_VIRT64_ASE): Delete.
759 (mips_ase): New structure.
760 (mips_ases): New table.
761 (FP64_ASES): New macro.
762 (mips_ase_groups): New array.
763 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
764 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
766 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
767 (md_parse_option): Use mips_ases and mips_set_ase instead of
768 separate case statements for each ASE option.
769 (mips_after_parse_args): Use FP64_ASES. Use
770 mips_check_isa_supports_ases to check the ASEs against
772 (s_mipsset): Use mips_ases and mips_set_ase instead of
773 separate if statements for each ASE option. Use
774 mips_check_isa_supports_ases, even when a non-ASE option
777 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
779 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
781 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
783 * config/tc-mips.c (md_shortopts, options, md_longopts)
784 (md_longopts_size): Move earlier in file.
786 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
788 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
789 with a single "ase" bitmask.
790 (mips_opts): Update accordingly.
791 (file_ase, file_ase_explicit): New variables.
792 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
793 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
794 (ISA_HAS_ROR): Adjust for mips_set_options change.
795 (is_opcode_valid): Take the base ase mask directly from mips_opts.
796 (mips_ip): Adjust for mips_set_options change.
797 (md_parse_option): Likewise. Update file_ase_explicit.
798 (mips_after_parse_args): Adjust for mips_set_options change.
799 Use bitmask operations to select the default ASEs. Set file_ase
800 rather than individual per-ASE variables.
801 (s_mipsset): Adjust for mips_set_options change.
802 (mips_elf_final_processing): Test file_ase rather than
803 file_ase_mdmx. Remove commented-out code.
805 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
807 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
808 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
809 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
810 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
811 (mips_after_parse_args): Use the new "ase" field to choose
813 (mips_cpu_info_table): Move ASEs from the "flags" field to the
816 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
818 * config/tc-arm.c (symbol_preemptible): New function.
819 (relax_branch): Use it.
821 2013-06-17 Catherine Moore <clm@codesourcery.com>
822 Maciej W. Rozycki <macro@codesourcery.com>
823 Chao-Ying Fu <fu@mips.com>
825 * config/tc-mips.c (mips_set_options): Add ase_eva.
826 (mips_set_options mips_opts): Add ase_eva.
827 (file_ase_eva): Declare.
828 (ISA_SUPPORTS_EVA_ASE): Define.
829 (IS_SEXT_9BIT_NUM): Define.
830 (MIPS_CPU_ASE_EVA): Define.
831 (is_opcode_valid): Add support for ase_eva.
832 (macro_build): Likewise.
834 (validate_mips_insn): Likewise.
835 (validate_micromips_insn): Likewise.
837 (options): Add OPTION_EVA and OPTION_NO_EVA.
838 (md_longopts): Add -meva and -mno-eva.
839 (md_parse_option): Process new options.
840 (mips_after_parse_args): Check for valid EVA combinations.
841 (s_mipsset): Likewise.
843 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
845 * dwarf2dbg.h (dwarf2_move_insn): Declare.
846 * dwarf2dbg.c (line_subseg): Add pmove_tail.
847 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
848 (dwarf2_gen_line_info_1): Update call accordingly.
849 (dwarf2_move_insn): New function.
850 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
852 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
856 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
859 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
860 (dwarf2_gen_line_info_1): Delete.
861 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
862 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
863 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
864 (dwarf2_directive_loc): Push previous .locs instead of generating
867 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
869 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
870 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
872 2013-06-13 Nick Clifton <nickc@redhat.com>
875 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
876 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
877 function. Generates an error if the adjusted offset is out of a
880 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
882 * config/tc-nios2.c (md_apply_fix): Mask constant
883 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
885 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
887 * config/tc-mips.c (append_insn): Don't do branch relaxation for
888 MIPS-3D instructions either.
889 (md_convert_frag): Update the COPx branch mask accordingly.
891 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
893 * doc/as.texinfo (Overview): Add --relax-branch and
895 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
898 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
900 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
903 2013-06-08 Catherine Moore <clm@codesourcery.com>
905 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
906 (is_opcode_valid_16): Pass ase value to opcode_is_member.
907 (append_insn): Change INSN_xxxx to ASE_xxxx.
909 2013-06-01 George Thomas <george.thomas@atmel.com>
911 * gas/config/tc-avr.c: Change ISA for devices with USB support to
914 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
916 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
919 2013-05-31 Paul Brook <paul@codesourcery.com>
921 * config/tc-mips.c (s_ehword): New.
923 2013-05-30 Paul Brook <paul@codesourcery.com>
925 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
927 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
929 * write.c (resolve_reloc_expr_symbols): On REL targets don't
930 convert relocs who have no relocatable field either. Rephrase
931 the conditional so that the PC-relative check is only applied
934 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
936 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
939 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
941 * config/tc-aarch64.c (reloc_table): Update to use
942 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
943 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
944 (md_apply_fix): Likewise.
945 (aarch64_force_relocation): Likewise.
947 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
949 * config/tc-arm.c (it_fsm_post_encode): Improve
950 warning messages about deprecated IT block formats.
952 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
954 * config/tc-aarch64.c (md_apply_fix): Move value range checking
955 inside fx_done condition.
957 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
959 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
961 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
963 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
964 and clean up warning when using PRINT_OPCODE_TABLE.
966 2013-05-20 Alan Modra <amodra@gmail.com>
968 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
969 and data fixups performing shift/high adjust/sign extension on
970 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
971 when writing data fixups rather than recalculating size.
973 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
975 * doc/c-msp430.texi: Fix typo.
977 2013-05-16 Tristan Gingold <gingold@adacore.com>
979 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
980 are also TOC symbols.
982 2013-05-16 Nick Clifton <nickc@redhat.com>
984 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
985 Add -mcpu command to specify core type.
986 * doc/c-msp430.texi: Update documentation.
988 2013-05-09 Andrew Pinski <apinski@cavium.com>
990 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
991 (mips_opts): Update for the new field.
992 (file_ase_virt): New variable.
993 (ISA_SUPPORTS_VIRT_ASE): New macro.
994 (ISA_SUPPORTS_VIRT64_ASE): New macro.
995 (MIPS_CPU_ASE_VIRT): New define.
996 (is_opcode_valid): Handle ase_virt.
997 (macro_build): Handle "+J".
998 (validate_mips_insn): Likewise.
1000 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1001 (md_longopts): Add mvirt and mnovirt
1002 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1003 (mips_after_parse_args): Handle ase_virt field.
1004 (s_mipsset): Handle "virt" and "novirt".
1005 (mips_elf_final_processing): Add a comment about virt ASE might need
1007 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1008 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1009 Document ".set virt" and ".set novirt".
1011 2013-05-09 Alan Modra <amodra@gmail.com>
1013 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1014 control of operand flag bits.
1016 2013-05-07 Alan Modra <amodra@gmail.com>
1018 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1019 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1020 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1021 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1022 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1023 Shift and sign-extend fieldval for use by some VLE reloc
1024 operand->insert functions.
1026 2013-05-06 Paul Brook <paul@codesourcery.com>
1027 Catherine Moore <clm@codesourcery.com>
1029 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1030 (limited_pcrel_reloc_p): Likewise.
1031 (md_apply_fix): Likewise.
1032 (tc_gen_reloc): Likewise.
1034 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1036 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1037 (mips_fix_adjustable): Adjust pc-relative check to use
1040 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1042 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1043 (s_mips_stab): Do not restrict to stabn only.
1045 2013-05-02 Nick Clifton <nickc@redhat.com>
1047 * config/tc-msp430.c: Add support for the MSP430X architecture.
1048 Add code to insert a NOP instruction after any instruction that
1049 might change the interrupt state.
1050 Add support for the LARGE memory model.
1051 Add code to initialise the .MSP430.attributes section.
1052 * config/tc-msp430.h: Add support for the MSP430X architecture.
1053 * doc/c-msp430.texi: Document the new -mL and -mN command line
1055 * NEWS: Mention support for the MSP430X architecture.
1057 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1059 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1060 alpha*-*-linux*ecoff*.
1062 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1064 * config/tc-mips.c (mips_ip): Add sizelo.
1065 For "+C", "+G", and "+H", set sizelo and compare against it.
1067 2013-04-29 Nick Clifton <nickc@redhat.com>
1069 * as.c (Options): Add -gdwarf-sections.
1070 (parse_args): Likewise.
1071 * as.h (flag_dwarf_sections): Declare.
1072 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1073 (process_entries): When -gdwarf-sections is enabled generate
1074 fragmentary .debug_line sections.
1075 (out_debug_line): Set the section for the .debug_line section end
1077 * doc/as.texinfo: Document -gdwarf-sections.
1078 * NEWS: Mention -gdwarf-sections.
1080 2013-04-26 Christian Groessler <chris@groessler.org>
1082 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1083 according to the target parameter. Don't call s_segm since s_segm
1084 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1086 (md_begin): Call s_segm according to target parameter from command
1089 2013-04-25 Alan Modra <amodra@gmail.com>
1091 * configure.in: Allow little-endian linux.
1092 * configure: Regenerate.
1094 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1096 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1097 "fstatus" control register to "eccinj".
1099 2013-04-19 Kai Tietz <ktietz@redhat.com>
1101 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1103 2013-04-15 Julian Brown <julian@codesourcery.com>
1105 * expr.c (add_to_result, subtract_from_result): Make global.
1106 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1107 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1108 subtract_from_result to handle extra bit of precision for .sleb128
1111 2013-04-10 Julian Brown <julian@codesourcery.com>
1113 * read.c (convert_to_bignum): Add sign parameter. Use it
1114 instead of X_unsigned to determine sign of resulting bignum.
1115 (emit_expr): Pass extra argument to convert_to_bignum.
1116 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1117 X_extrabit to convert_to_bignum.
1118 (parse_bitfield_cons): Set X_extrabit.
1119 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1120 Initialise X_extrabit field as appropriate.
1121 (add_to_result): New.
1122 (subtract_from_result): New.
1124 * expr.h (expressionS): Add X_extrabit field.
1126 2013-04-10 Jan Beulich <jbeulich@suse.com>
1128 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1129 register being PC when is_t or writeback, and use distinct
1130 diagnostic for the latter case.
1132 2013-04-10 Jan Beulich <jbeulich@suse.com>
1134 * gas/config/tc-arm.c (parse_operands): Re-write
1135 po_barrier_or_imm().
1136 (do_barrier): Remove bogus constraint().
1137 (do_t_barrier): Remove.
1139 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1141 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1142 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1144 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1146 2013-04-09 Jan Beulich <jbeulich@suse.com>
1148 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1149 Use local variable Rt in more places.
1150 (do_vmsr): Accept all control registers.
1152 2013-04-09 Jan Beulich <jbeulich@suse.com>
1154 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1155 if there was none specified for moves between scalar and core
1158 2013-04-09 Jan Beulich <jbeulich@suse.com>
1160 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1161 NEON_ALL_LANES case.
1163 2013-04-08 Jan Beulich <jbeulich@suse.com>
1165 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1168 2013-04-08 Jan Beulich <jbeulich@suse.com>
1170 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1173 2013-04-03 Alan Modra <amodra@gmail.com>
1175 * doc/as.texinfo: Add support to generate man options for h8300.
1176 * doc/c-h8300.texi: Likewise.
1178 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1180 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1183 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1186 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1188 2013-03-26 Nick Clifton <nickc@redhat.com>
1191 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1192 start of the file each time.
1195 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1198 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1200 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1203 2013-03-21 Will Newton <will.newton@linaro.org>
1205 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1206 pc-relative str instructions in Thumb mode.
1208 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1210 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1211 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1213 * config/tc-h8300.h: Remove duplicated defines.
1215 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1218 * tc-avr.c (mcu_has_3_byte_pc): New function.
1219 (tc_cfi_frame_initial_instructions): Call it to find return
1222 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1225 * config/tc-tic6x.c (tic6x_try_encode): Handle
1226 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1227 encode register pair numbers when required.
1229 2013-03-15 Will Newton <will.newton@linaro.org>
1231 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1232 in vstr in Thumb mode for pre-ARMv7 cores.
1234 2013-03-14 Andreas Schwab <schwab@suse.de>
1236 * doc/c-arc.texi (ARC Directives): Revert last change and use
1237 @itemize instead of @table.
1238 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1240 2013-03-14 Nick Clifton <nickc@redhat.com>
1243 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1244 NULL message, instead just check ARM_CPU_IS_ANY directly.
1246 2013-03-14 Nick Clifton <nickc@redhat.com>
1249 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1251 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1252 to the @item directives.
1253 (ARM-Neon-Alignment): Move to correct place in the document.
1254 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1256 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1259 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1261 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1262 case. Add default BAD_CASE to switch.
1264 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1266 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1267 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1269 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1271 * config/tc-arm.c (crc_ext_armv8): New feature set.
1272 (UNPRED_REG): New macro.
1273 (do_crc32_1): New function.
1274 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1275 do_crc32ch, do_crc32cw): Likewise.
1277 (insns): Add entries for crc32 mnemonics.
1278 (arm_extensions): Add entry for crc.
1280 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1282 * write.h (struct fix): Add fx_dot_frag field.
1283 (dot_frag): Declare.
1284 * write.c (dot_frag): New variable.
1285 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1286 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1287 * expr.c (expr): Save value of frag_now in dot_frag when setting
1289 * read.c (emit_expr): Likewise. Delete comments.
1291 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1293 * config/tc-i386.c (flag_code_names): Removed.
1294 (i386_index_check): Rewrote.
1296 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1298 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1300 (aarch64_double_precision_fmovable): New function.
1301 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1302 function; handle hexadecimal representation of IEEE754 encoding.
1303 (parse_operands): Update the call to parse_aarch64_imm_float.
1305 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1307 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1308 (check_hle): Updated.
1309 (md_assemble): Likewise.
1310 (parse_insn): Likewise.
1312 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1314 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1315 (md_assemble): Check if REP prefix is OK.
1316 (parse_insn): Remove expecting_string_instruction. Set
1319 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1321 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1323 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1325 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1326 for system registers.
1328 2013-02-27 DJ Delorie <dj@redhat.com>
1330 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1331 (rl78_op): Handle %code().
1332 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1333 (tc_gen_reloc): Likwise; convert to a computed reloc.
1334 (md_apply_fix): Likewise.
1336 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1338 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1340 2013-02-25 Terry Guo <terry.guo@arm.com>
1342 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1343 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1344 list of accepted CPUs.
1346 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1349 * config/tc-i386.c (cpu_arch): Add ".smap".
1351 * doc/c-i386.texi: Document smap.
1353 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1355 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1356 mips_assembling_insn appropriately.
1357 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1359 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1361 * config/tc-mips.c (append_insn): Correct indentation, remove
1364 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1366 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1368 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1370 * configure.tgt: Add nios2-*-rtems*.
1372 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1374 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1377 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1379 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1380 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1382 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1384 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1387 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1388 Andrew Jenner <andrew@codesourcery.com>
1390 Based on patches from Altera Corporation.
1392 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1393 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1394 * Makefile.in: Regenerated.
1395 * configure.tgt: Add case for nios2*-linux*.
1396 * config/obj-elf.c: Conditionally include elf/nios2.h.
1397 * config/tc-nios2.c: New file.
1398 * config/tc-nios2.h: New file.
1399 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1400 * doc/Makefile.in: Regenerated.
1401 * doc/all.texi: Set NIOSII.
1402 * doc/as.texinfo (Overview): Add Nios II options.
1403 (Machine Dependencies): Include c-nios2.texi.
1404 * doc/c-nios2.texi: New file.
1405 * NEWS: Note Altera Nios II support.
1407 2013-02-06 Alan Modra <amodra@gmail.com>
1410 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1411 Don't skip fixups with fx_subsy non-NULL.
1412 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1413 with fx_subsy non-NULL.
1415 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1417 * doc/c-metag.texi: Add "@c man" markers.
1419 2013-02-04 Alan Modra <amodra@gmail.com>
1421 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1423 (TC_ADJUST_RELOC_COUNT): Delete.
1424 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1426 2013-02-04 Alan Modra <amodra@gmail.com>
1428 * po/POTFILES.in: Regenerate.
1430 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1432 * config/tc-metag.c: Make SWAP instruction less permissive with
1435 2013-01-29 DJ Delorie <dj@redhat.com>
1437 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1438 relocs in .word/.etc statements.
1440 2013-01-29 Roland McGrath <mcgrathr@google.com>
1442 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1443 immediate value for 8-bit offset" error so it shows line info.
1445 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1447 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1450 2013-01-24 Nick Clifton <nickc@redhat.com>
1452 * config/tc-v850.c: Add support for e3v5 architecture.
1453 * doc/c-v850.texi: Mention new support.
1455 2013-01-23 Nick Clifton <nickc@redhat.com>
1458 * config/tc-avr.c: Include dwarf2dbg.h.
1460 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1462 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1463 (tc_i386_fix_adjustable): Likewise.
1464 (lex_got): Likewise.
1465 (tc_gen_reloc): Likewise.
1467 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1469 * config/tc-aarch64.c (output_operand_error_record): Change to output
1470 the out-of-range error message as value-expected message if there is
1471 only one single value in the expected range.
1472 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1473 LSL #0 as a programmer-friendly feature.
1475 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1477 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1478 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1479 BFD_RELOC_64_SIZE relocations.
1480 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1482 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1483 relocations against local symbols.
1485 2013-01-16 Alan Modra <amodra@gmail.com>
1487 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1488 finding some sort of toc syntax error, and break to avoid
1489 compiler uninit warning.
1491 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1494 * config/tc-i386.c (lex_got): Increment length by 1 if the
1495 relocation token is removed.
1497 2013-01-15 Nick Clifton <nickc@redhat.com>
1499 * config/tc-v850.c (md_assemble): Allow signed values for
1502 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1504 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1507 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1509 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1510 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1511 * config/tc-ppc.c (md_show_usage): Likewise.
1512 (ppc_handle_align): Handle power8's group ending nop.
1514 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1516 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1517 that the assember exits after the opcodes have been printed.
1519 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1521 * app.c: Remove trailing white spaces.
1525 * dw2gencfi.c: Likewise.
1526 * dwarf2dbg.h: Likewise.
1527 * ecoff.c: Likewise.
1528 * input-file.c: Likewise.
1529 * itbl-lex.h: Likewise.
1530 * output-file.c: Likewise.
1533 * subsegs.c: Likewise.
1534 * symbols.c: Likewise.
1535 * write.c: Likewise.
1536 * config/tc-i386.c: Likewise.
1537 * doc/Makefile.am: Likewise.
1538 * doc/Makefile.in: Likewise.
1539 * doc/c-aarch64.texi: Likewise.
1540 * doc/c-alpha.texi: Likewise.
1541 * doc/c-arc.texi: Likewise.
1542 * doc/c-arm.texi: Likewise.
1543 * doc/c-avr.texi: Likewise.
1544 * doc/c-bfin.texi: Likewise.
1545 * doc/c-cr16.texi: Likewise.
1546 * doc/c-d10v.texi: Likewise.
1547 * doc/c-d30v.texi: Likewise.
1548 * doc/c-h8300.texi: Likewise.
1549 * doc/c-hppa.texi: Likewise.
1550 * doc/c-i370.texi: Likewise.
1551 * doc/c-i386.texi: Likewise.
1552 * doc/c-i860.texi: Likewise.
1553 * doc/c-m32c.texi: Likewise.
1554 * doc/c-m32r.texi: Likewise.
1555 * doc/c-m68hc11.texi: Likewise.
1556 * doc/c-m68k.texi: Likewise.
1557 * doc/c-microblaze.texi: Likewise.
1558 * doc/c-mips.texi: Likewise.
1559 * doc/c-msp430.texi: Likewise.
1560 * doc/c-mt.texi: Likewise.
1561 * doc/c-s390.texi: Likewise.
1562 * doc/c-score.texi: Likewise.
1563 * doc/c-sh.texi: Likewise.
1564 * doc/c-sh64.texi: Likewise.
1565 * doc/c-tic54x.texi: Likewise.
1566 * doc/c-tic6x.texi: Likewise.
1567 * doc/c-v850.texi: Likewise.
1568 * doc/c-xc16x.texi: Likewise.
1569 * doc/c-xgate.texi: Likewise.
1570 * doc/c-xtensa.texi: Likewise.
1571 * doc/c-z80.texi: Likewise.
1572 * doc/internals.texi: Likewise.
1574 2013-01-10 Roland McGrath <mcgrathr@google.com>
1576 * hash.c (hash_new_sized): Make it global.
1577 * hash.h: Declare it.
1578 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1581 2013-01-10 Will Newton <will.newton@imgtec.com>
1583 * Makefile.am: Add Meta.
1584 * Makefile.in: Regenerate.
1585 * config/tc-metag.c: New file.
1586 * config/tc-metag.h: New file.
1587 * configure.tgt: Add Meta.
1588 * doc/Makefile.am: Add Meta.
1589 * doc/Makefile.in: Regenerate.
1590 * doc/all.texi: Add Meta.
1591 * doc/as.texiinfo: Document Meta options.
1592 * doc/c-metag.texi: New file.
1594 2013-01-09 Steve Ellcey <sellcey@mips.com>
1596 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1598 * config/tc-mips.c (internalError): Remove, replace with abort.
1600 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1602 * config/tc-aarch64.c (parse_operands): Change to compare the result
1603 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1605 2013-01-07 Nick Clifton <nickc@redhat.com>
1608 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1609 anticipated character.
1610 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1611 here as it is no longer needed.
1613 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1615 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1616 * doc/c-score.texi (SCORE-Opts): Likewise.
1617 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1619 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1621 * config/tc-mips.c: Add support for MIPS r5900.
1622 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1624 (can_swap_branch_p, get_append_method): Detect some conditional
1625 short loops to fix a bug on the r5900 by NOP in the branch delay
1627 (M_MUL): Support 3 operands in multu on r5900.
1628 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1629 (s_mipsset): Force 32 bit floating point on r5900.
1630 (mips_ip): Check parameter range of instructions mfps and mtps on
1632 * configure.in: Detect CPU type when target string contains r5900
1633 (e.g. mips64r5900el-linux-gnu).
1635 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1637 * as.c (parse_args): Update copyright year to 2013.
1639 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1641 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1644 2013-01-02 Nick Clifton <nickc@redhat.com>
1647 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1650 For older changes see ChangeLog-2012
1652 Copyright (C) 2013 Free Software Foundation, Inc.
1654 Copying and distribution of this file, with or without modification,
1655 are permitted in any medium without royalty provided the copyright
1656 notice and this notice are preserved.
1662 version-control: never