1 2006-05-09 Nick Clifton <nickc@redhat.com>
3 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
4 against symbols which are not going to be placed into the symbol
7 2006-05-09 Ben Elliston <bje@au.ibm.com>
9 * expr.c (operand): Remove `if (0 && ..)' statement and
10 subsequently unused target_op label. Collapse `if (1 || ..)'
12 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
13 separately above the switch.
15 2006-05-08 Nick Clifton <nickc@redhat.com>
18 * config/tc-msp430.c (line_separator_character): Define as |.
20 2006-05-08 Thiemo Seufer <ths@mips.com>
21 Nigel Stephens <nigel@mips.com>
22 David Ung <davidu@mips.com>
24 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
25 (mips_opts): Likewise.
26 (file_ase_smartmips): New variable.
27 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
28 (macro_build): Handle SmartMIPS instructions.
30 (md_longopts): Add argument handling for smartmips.
31 (md_parse_options, mips_after_parse_args): Likewise.
32 (s_mipsset): Add .set smartmips support.
33 (md_show_usage): Document -msmartmips/-mno-smartmips.
34 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
36 * doc/c-mips.texi: Likewise.
38 2006-05-08 Alan Modra <amodra@bigpond.net.au>
40 * write.c (relax_segment): Add pass count arg. Don't error on
41 negative org/space on first two passes.
42 (relax_seg_info): New struct.
43 (relax_seg, write_object_file): Adjust.
44 * write.h (relax_segment): Update prototype.
46 2006-05-05 Julian Brown <julian@codesourcery.com>
48 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
50 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
51 architecture version checks.
52 (insns): Allow overlapping instructions to be used in VFP mode.
54 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
57 * config/obj-elf.c (obj_elf_change_section): Allow user
58 specified SHF_ALPHA_GPREL.
60 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
62 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
63 for PMEM related expressions.
65 2006-05-05 Nick Clifton <nickc@redhat.com>
68 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
69 insertion of a directory separator character into a string at a
70 given offset. Uses heuristics to decide when to use a backslash
71 character rather than a forward-slash character.
72 (dwarf2_directive_loc): Use the macro.
73 (out_debug_info): Likewise.
75 2006-05-05 Thiemo Seufer <ths@mips.com>
76 David Ung <davidu@mips.com>
78 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
80 (macro): Add new case M_CACHE_AB.
82 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
84 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
85 (opcode_lookup): Issue a warning for opcode with
86 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
87 identical to OT_cinfix3.
88 (TxC3w, TC3w, tC3w): New.
89 (insns): Use tC3w and TC3w for comparison instructions with
92 2006-05-04 Alan Modra <amodra@bigpond.net.au>
94 * subsegs.h (struct frchain): Delete frch_seg.
95 (frchain_root): Delete.
96 (seg_info): Define as macro.
97 * subsegs.c (frchain_root): Delete.
98 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
99 (subsegs_begin, subseg_change): Adjust for above.
100 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
101 rather than to one big list.
102 (subseg_get): Don't special case abs, und sections.
103 (subseg_new, subseg_force_new): Don't set frchainP here.
105 (subsegs_print_statistics): Adjust frag chain control list traversal.
106 * debug.c (dmp_frags): Likewise.
107 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
108 at frchain_root. Make use of known frchain ordering.
109 (last_frag_for_seg): Likewise.
110 (get_frag_fix): Likewise. Add seg param.
111 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
112 * write.c (chain_frchains_together_1): Adjust for struct frchain.
113 (SUB_SEGMENT_ALIGN): Likewise.
114 (subsegs_finish): Adjust frchain list traversal.
115 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
116 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
117 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
118 (xtensa_fix_b_j_loop_end_frags): Likewise.
119 (xtensa_fix_close_loop_end_frags): Likewise.
120 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
121 (retrieve_segment_info): Delete frch_seg initialisation.
123 2006-05-03 Alan Modra <amodra@bigpond.net.au>
125 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
126 * config/obj-elf.h (obj_sec_set_private_data): Delete.
127 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
128 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
130 2006-05-02 Joseph Myers <joseph@codesourcery.com>
132 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
134 (md_apply_fix3): Multiply offset by 4 here for
135 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
137 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
138 Jan Beulich <jbeulich@novell.com>
140 * config/tc-i386.c (output_invalid_buf): Change size for
142 * config/tc-tic30.c (output_invalid_buf): Likewise.
144 * config/tc-i386.c (output_invalid): Cast none-ascii char to
146 * config/tc-tic30.c (output_invalid): Likewise.
148 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
150 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
151 (TEXI2POD): Use AM_MAKEINFOFLAGS.
152 (asconfig.texi): Don't set top_srcdir.
153 * doc/as.texinfo: Don't use top_srcdir.
154 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
156 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
158 * config/tc-i386.c (output_invalid_buf): Change size to 16.
159 * config/tc-tic30.c (output_invalid_buf): Likewise.
161 * config/tc-i386.c (output_invalid): Use snprintf instead of
163 * config/tc-ia64.c (declare_register_set): Likewise.
164 (emit_one_bundle): Likewise.
165 (check_dependencies): Likewise.
166 * config/tc-tic30.c (output_invalid): Likewise.
168 2006-05-02 Paul Brook <paul@codesourcery.com>
170 * config/tc-arm.c (arm_optimize_expr): New function.
171 * config/tc-arm.h (md_optimize_expr): Define
172 (arm_optimize_expr): Add prototype.
173 (TC_FORCE_RELOCATION_SUB_SAME): Define.
175 2006-05-02 Ben Elliston <bje@au.ibm.com>
177 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
180 * sb.h (sb_list_vector): Move to sb.c.
181 * sb.c (free_list): Use type of sb_list_vector directly.
182 (sb_build): Fix off-by-one error in assertion about `size'.
184 2006-05-01 Ben Elliston <bje@au.ibm.com>
186 * listing.c (listing_listing): Remove useless loop.
187 * macro.c (macro_expand): Remove is_positional local variable.
188 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
189 and simplify surrounding expressions, where possible.
190 (assign_symbol): Likewise.
191 (s_weakref): Likewise.
192 * symbols.c (colon): Likewise.
194 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
196 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
198 2006-04-30 Thiemo Seufer <ths@mips.com>
199 David Ung <davidu@mips.com>
201 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
202 (mips_immed): New table that records various handling of udi
203 instruction patterns.
204 (mips_ip): Adds udi handling.
206 2006-04-28 Alan Modra <amodra@bigpond.net.au>
208 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
209 of list rather than beginning.
211 2006-04-26 Julian Brown <julian@codesourcery.com>
213 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
214 (is_quarter_float): Rename from above. Simplify slightly.
215 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
217 (parse_neon_mov): Parse floating-point constants.
218 (neon_qfloat_bits): Fix encoding.
219 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
220 preference to integer encoding when using the F32 type.
222 2006-04-26 Julian Brown <julian@codesourcery.com>
224 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
225 zero-initialising structures containing it will lead to invalid types).
226 (arm_it): Add vectype to each operand.
227 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
229 (neon_typed_alias): New structure. Extra information for typed
231 (reg_entry): Add neon type info field.
232 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
233 Break out alternative syntax for coprocessor registers, etc. into...
234 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
235 out from arm_reg_parse.
236 (parse_neon_type): Move. Return SUCCESS/FAIL.
237 (first_error): New function. Call to ensure first error which occurs is
239 (parse_neon_operand_type): Parse exactly one type.
240 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
241 (parse_typed_reg_or_scalar): New function. Handle core of both
242 arm_typed_reg_parse and parse_scalar.
243 (arm_typed_reg_parse): Parse a register with an optional type.
244 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
246 (parse_scalar): Parse a Neon scalar with optional type.
247 (parse_reg_list): Use first_error.
248 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
249 (neon_alias_types_same): New function. Return true if two (alias) types
251 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
253 (insert_reg_alias): Return new reg_entry not void.
254 (insert_neon_reg_alias): New function. Insert type/index information as
255 well as register for alias.
256 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
257 make typed register aliases accordingly.
258 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
260 (s_unreq): Delete type information if present.
261 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
262 (s_arm_unwind_save_mmxwcg): Likewise.
263 (s_arm_unwind_movsp): Likewise.
264 (s_arm_unwind_setfp): Likewise.
265 (parse_shift): Likewise.
266 (parse_shifter_operand): Likewise.
267 (parse_address): Likewise.
268 (parse_tb): Likewise.
269 (tc_arm_regname_to_dw2regnum): Likewise.
270 (md_pseudo_table): Add dn, qn.
271 (parse_neon_mov): Handle typed operands.
272 (parse_operands): Likewise.
273 (neon_type_mask): Add N_SIZ.
274 (N_ALLMODS): New macro.
275 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
276 (el_type_of_type_chk): Add some safeguards.
277 (modify_types_allowed): Fix logic bug.
278 (neon_check_type): Handle operands with types.
279 (neon_three_same): Remove redundant optional arg handling.
280 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
281 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
282 (do_neon_step): Adjust accordingly.
283 (neon_cmode_for_logic_imm): Use first_error.
284 (do_neon_bitfield): Call neon_check_type.
285 (neon_dyadic): Rename to...
286 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
287 to allow modification of type of the destination.
288 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
289 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
290 (do_neon_compare): Make destination be an untyped bitfield.
291 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
292 (neon_mul_mac): Return early in case of errors.
293 (neon_move_immediate): Use first_error.
294 (neon_mac_reg_scalar_long): Fix type to include scalar.
295 (do_neon_dup): Likewise.
296 (do_neon_mov): Likewise (in several places).
297 (do_neon_tbl_tbx): Fix type.
298 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
299 (do_neon_ld_dup): Exit early in case of errors and/or use
301 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
302 Handle .dn/.qn directives.
303 (REGDEF): Add zero for reg_entry neon field.
305 2006-04-26 Julian Brown <julian@codesourcery.com>
307 * config/tc-arm.c (limits.h): Include.
308 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
309 (fpu_vfp_v3_or_neon_ext): Declare constants.
310 (neon_el_type): New enumeration of types for Neon vector elements.
311 (neon_type_el): New struct. Define type and size of a vector element.
312 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
314 (neon_type): Define struct. The type of an instruction.
315 (arm_it): Add 'vectype' for the current instruction.
316 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
317 (vfp_sp_reg_pos): Rename to...
318 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
320 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
321 (Neon D or Q register).
322 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
324 (GE_OPT_PREFIX_BIG): Define constant, for use in...
325 (my_get_expression): Allow above constant as argument to accept
326 64-bit constants with optional prefix.
327 (arm_reg_parse): Add extra argument to return the specific type of
328 register in when either a D or Q register (REG_TYPE_NDQ) is
329 requested. Can be NULL.
330 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
331 (parse_reg_list): Update for new arm_reg_parse args.
332 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
333 (parse_neon_el_struct_list): New function. Parse element/structure
334 register lists for VLD<n>/VST<n> instructions.
335 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
336 (s_arm_unwind_save_mmxwr): Likewise.
337 (s_arm_unwind_save_mmxwcg): Likewise.
338 (s_arm_unwind_movsp): Likewise.
339 (s_arm_unwind_setfp): Likewise.
340 (parse_big_immediate): New function. Parse an immediate, which may be
341 64 bits wide. Put results in inst.operands[i].
342 (parse_shift): Update for new arm_reg_parse args.
343 (parse_address): Likewise. Add parsing of alignment specifiers.
344 (parse_neon_mov): Parse the operands of a VMOV instruction.
345 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
346 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
347 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
348 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
349 (parse_operands): Handle new codes above.
350 (encode_arm_vfp_sp_reg): Rename to...
351 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
352 selected VFP version only supports D0-D15.
353 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
354 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
355 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
356 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
357 encode_arm_vfp_reg name, and allow 32 D regs.
358 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
359 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
361 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
362 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
363 constant-load and conversion insns introduced with VFPv3.
364 (neon_tab_entry): New struct.
365 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
366 those which are the targets of pseudo-instructions.
367 (neon_opc): Enumerate opcodes, use as indices into...
368 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
369 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
370 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
371 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
373 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
375 (neon_type_mask): New. Compact type representation for type checking.
376 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
377 permitted type combinations.
378 (N_IGNORE_TYPE): New macro.
379 (neon_check_shape): New function. Check an instruction shape for
380 multiple alternatives. Return the specific shape for the current
382 (neon_modify_type_size): New function. Modify a vector type and size,
383 depending on the bit mask in argument 1.
384 (neon_type_promote): New function. Convert a given "key" type (of an
385 operand) into the correct type for a different operand, based on a bit
387 (type_chk_of_el_type): New function. Convert a type and size into the
388 compact representation used for type checking.
389 (el_type_of_type_ckh): New function. Reverse of above (only when a
390 single bit is set in the bit mask).
391 (modify_types_allowed): New function. Alter a mask of allowed types
392 based on a bit mask of modifications.
393 (neon_check_type): New function. Check the type of the current
394 instruction against the variable argument list. The "key" type of the
395 instruction is returned.
396 (neon_dp_fixup): New function. Fill in and modify instruction bits for
397 a Neon data-processing instruction depending on whether we're in ARM
398 mode or Thumb-2 mode.
399 (neon_logbits): New function.
400 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
401 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
402 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
403 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
404 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
405 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
406 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
407 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
408 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
409 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
410 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
411 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
412 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
413 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
414 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
415 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
416 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
417 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
418 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
419 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
420 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
421 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
422 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
423 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
424 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
426 (parse_neon_type): New function. Parse Neon type specifier.
427 (opcode_lookup): Allow parsing of Neon type specifiers.
428 (REGNUM2, REGSETH, REGSET2): New macros.
429 (reg_names): Add new VFPv3 and Neon registers.
430 (NUF, nUF, NCE, nCE): New macros for opcode table.
431 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
432 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
433 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
434 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
435 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
436 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
437 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
438 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
439 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
440 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
441 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
442 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
443 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
444 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
446 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
447 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
448 (arm_option_cpu_value): Add vfp3 and neon.
449 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
452 2006-04-25 Bob Wilson <bob.wilson@acm.org>
454 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
455 syntax instead of hardcoded opcodes with ".w18" suffixes.
456 (wide_branch_opcode): New.
457 (build_transition): Use it to check for wide branch opcodes with
458 either ".w18" or ".w15" suffixes.
460 2006-04-25 Bob Wilson <bob.wilson@acm.org>
462 * config/tc-xtensa.c (xtensa_create_literal_symbol,
463 xg_assemble_literal, xg_assemble_literal_space): Do not set the
464 frag's is_literal flag.
466 2006-04-25 Bob Wilson <bob.wilson@acm.org>
468 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
470 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
472 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
473 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
474 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
475 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
476 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
478 2005-04-20 Paul Brook <paul@codesourcery.com>
480 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
482 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
484 2006-04-19 Alan Modra <amodra@bigpond.net.au>
486 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
487 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
488 Make some cpus unsupported on ELF. Run "make dep-am".
489 * Makefile.in: Regenerate.
491 2006-04-19 Alan Modra <amodra@bigpond.net.au>
493 * configure.in (--enable-targets): Indent help message.
494 * configure: Regenerate.
496 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
499 * config/tc-i386.c (i386_immediate): Check illegal immediate
502 2006-04-18 Alan Modra <amodra@bigpond.net.au>
504 * config/tc-i386.c: Formatting.
505 (output_disp, output_imm): ISO C90 params.
507 * frags.c (frag_offset_fixed_p): Constify args.
508 * frags.h (frag_offset_fixed_p): Ditto.
510 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
511 (COFF_MAGIC): Delete.
513 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
515 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
517 * po/POTFILES.in: Regenerated.
519 2006-04-16 Mark Mitchell <mark@codesourcery.com>
521 * doc/as.texinfo: Mention that some .type syntaxes are not
522 supported on all architectures.
524 2006-04-14 Sterling Augustine <sterling@tensilica.com>
526 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
527 instructions when such transformations have been disabled.
529 2006-04-10 Sterling Augustine <sterling@tensilica.com>
531 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
532 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
533 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
534 decoding the loop instructions. Remove current_offset variable.
535 (xtensa_fix_short_loop_frags): Likewise.
536 (min_bytes_to_other_loop_end): Remove current_offset argument.
538 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
540 * config/tc-z80.c (z80_optimize_expr): Removed.
541 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
543 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
545 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
546 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
547 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
548 atmega644, atmega329, atmega3290, atmega649, atmega6490,
549 atmega406, atmega640, atmega1280, atmega1281, at90can32,
550 at90can64, at90usb646, at90usb647, at90usb1286 and
552 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
554 2006-04-07 Paul Brook <paul@codesourcery.com>
556 * config/tc-arm.c (parse_operands): Set default error message.
558 2006-04-07 Paul Brook <paul@codesourcery.com>
560 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
562 2006-04-07 Paul Brook <paul@codesourcery.com>
564 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
566 2006-04-07 Paul Brook <paul@codesourcery.com>
568 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
569 (move_or_literal_pool): Handle Thumb-2 instructions.
570 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
572 2006-04-07 Alan Modra <amodra@bigpond.net.au>
575 * config/tc-i386.c (match_template): Move 64-bit operand tests
578 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
580 * po/Make-in: Add install-html target.
581 * Makefile.am: Add install-html and install-html-recursive targets.
582 * Makefile.in: Regenerate.
583 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
584 * configure: Regenerate.
585 * doc/Makefile.am: Add install-html and install-html-am targets.
586 * doc/Makefile.in: Regenerate.
588 2006-04-06 Alan Modra <amodra@bigpond.net.au>
590 * frags.c (frag_offset_fixed_p): Reinitialise offset before
593 2006-04-05 Richard Sandiford <richard@codesourcery.com>
594 Daniel Jacobowitz <dan@codesourcery.com>
596 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
597 (GOTT_BASE, GOTT_INDEX): New.
598 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
599 GOTT_INDEX when generating VxWorks PIC.
600 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
601 use the generic *-*-vxworks* stanza instead.
603 2006-04-04 Alan Modra <amodra@bigpond.net.au>
606 * frags.c (frag_offset_fixed_p): New function.
607 * frags.h (frag_offset_fixed_p): Declare.
608 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
609 (resolve_expression): Likewise.
611 2006-04-03 Sterling Augustine <sterling@tensilica.com>
613 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
614 of the same length but different numbers of slots.
616 2006-03-30 Andreas Schwab <schwab@suse.de>
618 * configure.in: Fix help string for --enable-targets option.
619 * configure: Regenerate.
621 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
623 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
624 (m68k_ip): ... here. Use for all chips. Protect against buffer
625 overrun and avoid excessive copying.
627 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
628 m68020_control_regs, m68040_control_regs, m68060_control_regs,
629 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
630 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
631 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
632 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
633 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
634 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
635 mcf5282_ctrl, mcfv4e_ctrl): ... these.
636 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
637 (struct m68k_cpu): Change chip field to control_regs.
638 (current_chip): Remove.
640 (m68k_archs, m68k_extensions): Adjust.
641 (m68k_cpus): Reorder to be in cpu number order. Adjust.
642 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
643 (find_cf_chip): Reimplement for new organization of cpu table.
644 (select_control_regs): Remove.
646 (struct save_opts): Save control regs, not chip.
647 (s_save, s_restore): Adjust.
648 (m68k_lookup_cpu): Give deprecated warning when necessary.
649 (m68k_init_arch): Adjust.
650 (md_show_usage): Adjust for new cpu table organization.
652 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
654 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
655 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
656 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
658 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
659 (any_gotrel): New rule.
660 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
661 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
663 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
664 (bfin_pic_ptr): New function.
665 (md_pseudo_table): Add it for ".picptr".
666 (OPTION_FDPIC): New macro.
667 (md_longopts): Add -mfdpic.
668 (md_parse_option): Handle it.
669 (md_begin): Set BFD flags.
670 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
671 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
673 * Makefile.am (bfin-parse.o): Update dependencies.
674 (DEPTC_bfin_elf): Likewise.
675 * Makefile.in: Regenerate.
677 2006-03-25 Richard Sandiford <richard@codesourcery.com>
679 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
680 mcfemac instead of mcfmac.
682 2006-03-23 Michael Matz <matz@suse.de>
684 * config/tc-i386.c (type_names): Correct placement of 'static'.
685 (reloc): Map some more relocs to their 64 bit counterpart when
687 (output_insn): Work around breakage if DEBUG386 is defined.
688 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
689 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
690 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
693 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
695 (md_convert_frag): Jumps can now be larger than 2GB away, error
697 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
698 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
700 2006-03-22 Richard Sandiford <richard@codesourcery.com>
701 Daniel Jacobowitz <dan@codesourcery.com>
702 Phil Edwards <phil@codesourcery.com>
703 Zack Weinberg <zack@codesourcery.com>
704 Mark Mitchell <mark@codesourcery.com>
705 Nathan Sidwell <nathan@codesourcery.com>
707 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
708 (md_begin): Complain about -G being used for PIC. Don't change
709 the text, data and bss alignments on VxWorks.
710 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
711 generating VxWorks PIC.
712 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
713 (macro): Likewise, but do not treat la $25 specially for
714 VxWorks PIC, and do not handle jal.
715 (OPTION_MVXWORKS_PIC): New macro.
716 (md_longopts): Add -mvxworks-pic.
717 (md_parse_option): Don't complain about using PIC and -G together here.
718 Handle OPTION_MVXWORKS_PIC.
719 (md_estimate_size_before_relax): Always use the first relaxation
721 * config/tc-mips.h (VXWORKS_PIC): New.
723 2006-03-21 Paul Brook <paul@codesourcery.com>
725 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
727 2006-03-21 Sterling Augustine <sterling@tensilica.com>
729 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
730 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
731 (get_loop_align_size): New.
732 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
733 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
734 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
735 (get_noop_aligned_address): Use get_loop_align_size.
736 (get_aligned_diff): Likewise.
738 2006-03-21 Paul Brook <paul@codesourcery.com>
740 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
742 2006-03-20 Paul Brook <paul@codesourcery.com>
744 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
745 (do_t_branch): Encode branches inside IT blocks as unconditional.
746 (do_t_cps): New function.
747 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
748 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
749 (opcode_lookup): Allow conditional suffixes on all instructions in
751 (md_assemble): Advance condexec state before checking for errors.
752 (insns): Use do_t_cps.
754 2006-03-20 Paul Brook <paul@codesourcery.com>
756 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
759 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
761 * config/tc-vax.c: Update copyright year.
762 * config/tc-vax.h: Likewise.
764 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
766 * config/tc-vax.c (md_chars_to_number): Used only locally, so
768 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
770 2006-03-17 Paul Brook <paul@codesourcery.com>
772 * config/tc-arm.c (insns): Add ldm and stm.
774 2006-03-17 Ben Elliston <bje@au.ibm.com>
777 * doc/as.texinfo (Ident): Document this directive more thoroughly.
779 2006-03-16 Paul Brook <paul@codesourcery.com>
781 * config/tc-arm.c (insns): Add "svc".
783 2006-03-13 Bob Wilson <bob.wilson@acm.org>
785 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
786 flag and avoid double underscore prefixes.
788 2006-03-10 Paul Brook <paul@codesourcery.com>
790 * config/tc-arm.c (md_begin): Handle EABIv5.
791 (arm_eabis): Add EF_ARM_EABI_VER5.
792 * doc/c-arm.texi: Document -meabi=5.
794 2006-03-10 Ben Elliston <bje@au.ibm.com>
796 * app.c (do_scrub_chars): Simplify string handling.
798 2006-03-07 Richard Sandiford <richard@codesourcery.com>
799 Daniel Jacobowitz <dan@codesourcery.com>
800 Zack Weinberg <zack@codesourcery.com>
801 Nathan Sidwell <nathan@codesourcery.com>
802 Paul Brook <paul@codesourcery.com>
803 Ricardo Anguiano <anguiano@codesourcery.com>
804 Phil Edwards <phil@codesourcery.com>
806 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
807 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
809 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
810 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
811 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
813 2006-03-06 Bob Wilson <bob.wilson@acm.org>
815 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
816 even when using the text-section-literals option.
818 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
820 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
822 (m68k_ip): <case 'J'> Check we have some control regs.
823 (md_parse_option): Allow raw arch switch.
824 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
825 whether 68881 or cfloat was meant by -mfloat.
826 (md_show_usage): Adjust extension display.
827 (m68k_elf_final_processing): Adjust.
829 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
831 * config/tc-avr.c (avr_mod_hash_value): New function.
832 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
833 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
834 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
835 instead of int avr_ldi_expression: use avr_mod_hash_value instead
837 (tc_gen_reloc): Handle substractions of symbols, if possible do
838 fixups, abort otherwise.
839 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
840 tc_fix_adjustable): Define.
842 2006-03-02 James E Wilson <wilson@specifix.com>
844 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
845 change the template, then clear md.slot[curr].end_of_insn_group.
847 2006-02-28 Jan Beulich <jbeulich@novell.com>
849 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
851 2006-02-28 Jan Beulich <jbeulich@novell.com>
854 * macro.c (getstring): Don't treat parentheses special anymore.
855 (get_any_string): Don't consider '(' and ')' as quoting anymore.
856 Special-case '(', ')', '[', and ']' when dealing with non-quoting
859 2006-02-28 Mat <mat@csail.mit.edu>
861 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
863 2006-02-27 Jakub Jelinek <jakub@redhat.com>
865 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
867 (CFI_signal_frame): Define.
868 (cfi_pseudo_table): Add .cfi_signal_frame.
869 (dot_cfi): Handle CFI_signal_frame.
870 (output_cie): Handle cie->signal_frame.
871 (select_cie_for_fde): Don't share CIE if signal_frame flag is
872 different. Copy signal_frame from FDE to newly created CIE.
873 * doc/as.texinfo: Document .cfi_signal_frame.
875 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
877 * doc/Makefile.am: Add html target.
878 * doc/Makefile.in: Regenerate.
879 * po/Make-in: Add html target.
881 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
883 * config/tc-i386.c (output_insn): Support Intel Merom New
886 * config/tc-i386.h (CpuMNI): New.
887 (CpuUnknownFlags): Add CpuMNI.
889 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
891 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
892 (hpriv_reg_table): New table for hyperprivileged registers.
893 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
896 2006-02-24 DJ Delorie <dj@redhat.com>
898 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
899 (tc_gen_reloc): Don't define.
900 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
901 (OPTION_LINKRELAX): New.
902 (md_longopts): Add it.
904 (md_parse_options): Set it.
905 (md_assemble): Emit relaxation relocs as needed.
906 (md_convert_frag): Emit relaxation relocs as needed.
907 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
908 (m32c_apply_fix): New.
910 (m32c_force_relocation): Force out jump relocs when relaxing.
911 (m32c_fix_adjustable): Return false if relaxing.
913 2006-02-24 Paul Brook <paul@codesourcery.com>
915 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
916 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
917 (struct asm_barrier_opt): Define.
918 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
919 (parse_psr): Accept V7M psr names.
920 (parse_barrier): New function.
921 (enum operand_parse_code): Add OP_oBARRIER.
922 (parse_operands): Implement OP_oBARRIER.
923 (do_barrier): New function.
924 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
925 (do_t_cpsi): Add V7M restrictions.
926 (do_t_mrs, do_t_msr): Validate V7M variants.
927 (md_assemble): Check for NULL variants.
928 (v7m_psrs, barrier_opt_names): New tables.
929 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
930 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
931 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
932 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
933 (struct cpu_arch_ver_table): Define.
935 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
936 Tag_CPU_arch_profile.
937 * doc/c-arm.texi: Document new cpu and arch options.
939 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
941 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
943 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
945 * config/tc-ia64.c: Update copyright years.
947 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
949 * config/tc-ia64.c (specify_resource): Add the rule 17 from
952 2005-02-22 Paul Brook <paul@codesourcery.com>
954 * config/tc-arm.c (do_pld): Remove incorrect write to
956 (encode_thumb32_addr_mode): Use correct operand.
958 2006-02-21 Paul Brook <paul@codesourcery.com>
960 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
962 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
963 Anil Paranjape <anilp1@kpitcummins.com>
964 Shilin Shakti <shilins@kpitcummins.com>
966 * Makefile.am: Add xc16x related entry.
967 * Makefile.in: Regenerate.
968 * configure.in: Added xc16x related entry.
969 * configure: Regenerate.
970 * config/tc-xc16x.h: New file
971 * config/tc-xc16x.c: New file
972 * doc/c-xc16x.texi: New file for xc16x
973 * doc/all.texi: Entry for xc16x
974 * doc/Makefile.texi: Added c-xc16x.texi
975 * NEWS: Announce the support for the new target.
977 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
979 * configure.tgt: set emulation for mips-*-netbsd*
981 2006-02-14 Jakub Jelinek <jakub@redhat.com>
983 * config.in: Rebuilt.
985 2006-02-13 Bob Wilson <bob.wilson@acm.org>
987 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
988 from 1, not 0, in error messages.
989 (md_assemble): Simplify special-case check for ENTRY instructions.
990 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
991 operand in error message.
993 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
995 * configure.tgt (arm-*-linux-gnueabi*): Change to
998 2006-02-10 Nick Clifton <nickc@redhat.com>
1000 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1001 32-bit value is propagated into the upper bits of a 64-bit long.
1003 * config/tc-arc.c (init_opcode_tables): Fix cast.
1004 (arc_extoper, md_operand): Likewise.
1006 2006-02-09 David Heine <dlheine@tensilica.com>
1008 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1009 each relaxation step.
1011 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1013 * configure.in (CHECK_DECLS): Add vsnprintf.
1014 * configure: Regenerate.
1015 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1016 include/declare here, but...
1017 * as.h: Move code detecting VARARGS idiom to the top.
1018 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1019 (vsnprintf): Declare if not already declared.
1021 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1023 * as.c (close_output_file): New.
1024 (main): Register close_output_file with xatexit before
1025 dump_statistics. Don't call output_file_close.
1027 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1029 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1030 mcf5329_control_regs): New.
1031 (not_current_architecture, selected_arch, selected_cpu): New.
1032 (m68k_archs, m68k_extensions): New.
1033 (archs): Renamed to ...
1034 (m68k_cpus): ... here. Adjust.
1036 (md_pseudo_table): Add arch and cpu directives.
1037 (find_cf_chip, m68k_ip): Adjust table scanning.
1038 (no_68851, no_68881): Remove.
1039 (md_assemble): Lazily initialize.
1040 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1041 (md_init_after_args): Move functionality to m68k_init_arch.
1042 (mri_chip): Adjust table scanning.
1043 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1044 options with saner parsing.
1045 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1046 m68k_init_arch): New.
1047 (s_m68k_cpu, s_m68k_arch): New.
1048 (md_show_usage): Adjust.
1049 (m68k_elf_final_processing): Set CF EF flags.
1050 * config/tc-m68k.h (m68k_init_after_args): Remove.
1051 (tc_init_after_args): Remove.
1052 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1053 (M68k-Directives): Document .arch and .cpu directives.
1055 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1057 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1058 synonyms for equ and defl.
1059 (z80_cons_fix_new): New function.
1060 (emit_byte): Disallow relative jumps to absolute locations.
1061 (emit_data): Only handle defb, prototype changed, because defb is
1062 now handled as pseudo-op rather than an instruction.
1063 (instab): Entries for defb,defw,db,dw moved from here...
1064 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1065 Add entries for def24,def32,d24,d32.
1066 (md_assemble): Improved error handling.
1067 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1068 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1069 (z80_cons_fix_new): Declare.
1070 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1071 (def24,d24,def32,d32): New pseudo-ops.
1073 2006-02-02 Paul Brook <paul@codesourcery.com>
1075 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1077 2005-02-02 Paul Brook <paul@codesourcery.com>
1079 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1080 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1081 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1082 T2_OPCODE_RSB): Define.
1083 (thumb32_negate_data_op): New function.
1084 (md_apply_fix): Use it.
1086 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1088 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1090 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1091 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1093 (relaxation_requirements): Add pfinish_frag argument and use it to
1094 replace setting tinsn->record_fix fields.
1095 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1096 and vinsn_to_insnbuf. Remove references to record_fix and
1097 slot_sub_symbols fields.
1098 (xtensa_mark_narrow_branches): Delete unused code.
1099 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1101 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1103 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1104 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1105 of the record_fix field. Simplify error messages for unexpected
1107 (set_expr_symbol_offset_diff): Delete.
1109 2006-01-31 Paul Brook <paul@codesourcery.com>
1111 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1113 2006-01-31 Paul Brook <paul@codesourcery.com>
1114 Richard Earnshaw <rearnsha@arm.com>
1116 * config/tc-arm.c: Use arm_feature_set.
1117 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1118 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1119 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1122 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1123 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1124 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1125 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1127 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1128 (arm_opts): Move old cpu/arch options from here...
1129 (arm_legacy_opts): ... to here.
1130 (md_parse_option): Search arm_legacy_opts.
1131 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1132 (arm_float_abis, arm_eabis): Make const.
1134 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1136 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1138 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1140 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1141 in load immediate intruction.
1143 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1145 * config/bfin-parse.y (value_match): Use correct conversion
1146 specifications in template string for __FILE__ and __LINE__.
1150 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1152 Introduce TLS descriptors for i386 and x86_64.
1153 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1154 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1155 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1156 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1157 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1159 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1160 (lex_got): Handle @tlsdesc and @tlscall.
1161 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1163 2006-01-11 Nick Clifton <nickc@redhat.com>
1165 Fixes for building on 64-bit hosts:
1166 * config/tc-avr.c (mod_index): New union to allow conversion
1167 between pointers and integers.
1168 (md_begin, avr_ldi_expression): Use it.
1169 * config/tc-i370.c (md_assemble): Add cast for argument to print
1171 * config/tc-tic54x.c (subsym_substitute): Likewise.
1172 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1173 opindex field of fr_cgen structure into a pointer so that it can
1174 be stored in a frag.
1175 * config/tc-mn10300.c (md_assemble): Likewise.
1176 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1178 * config/tc-v850.c: Replace uses of (int) casts with correct
1181 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1184 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1186 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1189 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1190 a local-label reference.
1192 For older changes see ChangeLog-2005
1198 version-control: never