1 2006-09-13 Jan Beulich <jbeulich@novell.com>
3 * input-file.c (input_file_give_next_buffer): Demote as_bad to
6 2006-09-13 Alan Modra <amodra@bigpond.net.au>
9 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
12 2006-09-13 Alan Modra <amodra@bigpond.net.au>
14 * input-file.c (input_file_open): Replace as_perror with as_bad
15 so that gas exits with error on file errors. Correct error
17 (input_file_get, input_file_give_next_buffer): Likewise.
18 * input-file.h: Update comment.
20 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
23 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
24 registers as a sub-class of wC registers.
26 2006-09-11 Alan Modra <amodra@bigpond.net.au>
29 * config/tc-mips.h (enum dwarf2_format): Forward declare.
30 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
31 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
32 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
34 2006-09-08 Nick Clifton <nickc@redhat.com>
37 * doc/as.texinfo (Macro): Improve documentation about separating
38 macro arguments from following text.
40 2006-09-08 Paul Brook <paul@codesourcery.com>
42 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
44 2006-09-07 Paul Brook <paul@codesourcery.com>
46 * config/tc-arm.c (parse_operands): Mark operand as present.
48 2006-09-04 Paul Brook <paul@codesourcery.com>
50 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
51 (do_neon_dyadic_if_i_d): Avoid setting U bit.
52 (do_neon_mac_maybe_scalar): Ditto.
53 (do_neon_dyadic_narrow): Force operand type to NT_integer.
54 (insns): Remove out of date comments.
56 2006-08-29 Nick Clifton <nickc@redhat.com>
58 * read.c (s_align): Initialize the 'stopc' variable to prevent
59 compiler complaints about it being used without being
61 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
62 s_float_space, s_struct, cons_worker, equals): Likewise.
64 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
66 * ecoff.c (ecoff_directive_val): Fix message typo.
67 * config/tc-ns32k.c (convert_iif): Likewise.
68 * config/tc-sh64.c (shmedia_check_limits): Likewise.
70 2006-08-25 Sterling Augustine <sterling@tensilica.com>
71 Bob Wilson <bob.wilson@acm.org>
73 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
74 the state of the absolute_literals directive. Remove align frag at
75 the start of the literal pool position.
77 2006-08-25 Bob Wilson <bob.wilson@acm.org>
79 * doc/c-xtensa.texi: Add @group commands in examples.
81 2006-08-24 Bob Wilson <bob.wilson@acm.org>
83 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
84 (INIT_LITERAL_SECTION_NAME): Delete.
85 (lit_state struct): Remove segment names, init_lit_seg, and
86 fini_lit_seg. Add lit_prefix and current_text_seg.
87 (init_literal_head_h, init_literal_head): Delete.
88 (fini_literal_head_h, fini_literal_head): Delete.
89 (xtensa_begin_directive): Move argument parsing to
90 xtensa_literal_prefix function.
91 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
92 (xtensa_literal_prefix): Parse the directive argument here and
93 record it in the lit_prefix field. Remove code to derive literal
96 (get_is_linkonce_section): Use linkonce_len. Check for any
97 ".gnu.linkonce.*" section, not just text sections.
98 (md_begin): Remove initialization of deleted lit_state fields.
99 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
100 to init_literal_head and fini_literal_head.
101 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
102 when traversing literal_head list.
103 (match_section_group): New.
104 (cache_literal_section): Rewrite to determine the literal section
105 name on the fly, create the section and return it.
106 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
107 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
108 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
109 Use xtensa_get_property_section from bfd.
110 (retrieve_xtensa_section): Delete.
111 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
112 description to refer to plural literal sections and add xref to
113 the Literal Directive section.
114 (Literal Directive): Describe new rules for deriving literal section
115 names. Add footnote for special case of .init/.fini with
116 --text-section-literals.
117 (Literal Prefix Directive): Replace old naming rules with xref to the
118 Literal Directive section.
120 2006-08-21 Joseph Myers <joseph@codesourcery.com>
122 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
123 merging with previous long opcode.
125 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
127 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
128 * Makefile.in: Regenerate.
129 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
132 2006-08-16 Julian Brown <julian@codesourcery.com>
134 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
135 to use ARM instructions on non-ARM-supporting cores.
136 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
137 mode automatically based on cpu variant.
138 (md_begin): Call above function.
140 2006-08-16 Julian Brown <julian@codesourcery.com>
142 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
143 recognized in non-unified syntax mode.
145 2006-08-15 Thiemo Seufer <ths@mips.com>
146 Nigel Stephens <nigel@mips.com>
147 David Ung <davidu@mips.com>
149 * configure.tgt: Handle mips*-sde-elf*.
151 2006-08-12 Thiemo Seufer <ths@networkno.de>
153 * config/tc-mips.c (mips16_ip): Fix argument register handling
154 for restore instruction.
156 2006-08-08 Bob Wilson <bob.wilson@acm.org>
158 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
160 (out_fixed_inc_line_addr): New.
161 (process_entries): Use out_fixed_inc_line_addr when
162 DWARF2_USE_FIXED_ADVANCE_PC is set.
163 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
165 2006-08-08 DJ Delorie <dj@redhat.com>
167 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
168 vs full symbols so that we never have more than one pointer value
169 for any given symbol in our symbol table.
171 2006-08-08 Sterling Augustine <sterling@tensilica.com>
173 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
174 and emit DW_AT_ranges when code in compilation unit is not
176 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
178 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
179 (out_debug_ranges): New function to emit .debug_ranges section
180 when code is not contiguous.
182 2006-08-08 Nick Clifton <nickc@redhat.com>
184 * config/tc-arm.c (WARN_DEPRECATED): Enable.
186 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
188 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
190 (pe_directive_secrel) [TE_PE]: New function.
191 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
192 loc, loc_mark_labels.
193 [TE_PE]: Handle secrel32.
194 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
196 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
197 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
198 (md_section_align): Only round section sizes here for AOUT
200 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
201 (tc_pe_dwarf2_emit_offset): New function.
202 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
203 (cons_fix_new_arm): Handle O_secrel.
204 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
205 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
206 of OBJ_ELF only block.
207 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
208 tc_pe_dwarf2_emit_offset.
210 2006-08-04 Richard Sandiford <richard@codesourcery.com>
212 * config/tc-sh.c (apply_full_field_fix): New function.
213 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
214 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
215 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
216 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
218 2006-08-03 Nick Clifton <nickc@redhat.com>
221 * config.in: Regenerate.
223 2006-08-03 Joseph Myers <joseph@codesourcery.com>
225 * config/tc-arm.c (parse_operands): Handle invalid register name
228 2006-08-03 Joseph Myers <joseph@codesourcery.com>
230 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
231 (parse_operands): Handle it.
232 (insns): Use it for tmcr and tmrc.
234 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
237 * config/tc-i386.c (md_parse_option): Treat any target starting
238 with elf64_x86_64 as a viable target for the -64 switch.
239 (i386_target_format): For 64-bit ELF flavoured output use
241 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
243 2006-08-02 Nick Clifton <nickc@redhat.com>
246 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
248 * configure.in: Run BFD_BINARY_FOPEN.
249 * configure: Regenerate.
250 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
253 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
255 * config/tc-i386.c (md_assemble): Don't update
258 2006-08-01 Thiemo Seufer <ths@mips.com>
260 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
262 2006-08-01 Thiemo Seufer <ths@mips.com>
264 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
265 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
266 BFD_RELOC_32 and BFD_RELOC_16.
267 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
268 md_convert_frag, md_obj_end): Fix comment formatting.
270 2006-07-31 Thiemo Seufer <ths@mips.com>
272 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
273 handling for BFD_RELOC_MIPS16_JMP.
275 2006-07-24 Andreas Schwab <schwab@suse.de>
278 * read.c (read_a_source_file): Ignore unknown text after line
279 comment character. Fix misleading comment.
281 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
283 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
284 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
285 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
286 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
287 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
288 doc/c-z80.texi, doc/internals.texi: Fix some typos.
290 2006-07-21 Nick Clifton <nickc@redhat.com>
292 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
295 2006-07-20 Thiemo Seufer <ths@mips.com>
296 Nigel Stephens <nigel@mips.com>
298 * config/tc-mips.c (md_parse_option): Don't infer optimisation
299 options from debug options.
301 2006-07-20 Thiemo Seufer <ths@mips.com>
303 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
304 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
306 2006-07-19 Paul Brook <paul@codesourcery.com>
308 * config/tc-arm.c (insns): Fix rbit Arm opcode.
310 2006-07-18 Paul Brook <paul@codesourcery.com>
312 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
313 (md_convert_frag): Use correct reloc for add_pc. Use
314 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
315 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
316 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
318 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
320 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
321 when file and line unknown.
323 2006-07-17 Thiemo Seufer <ths@mips.com>
325 * read.c (s_struct): Use IS_ELF.
326 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
327 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
328 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
329 s_mips_mask): Likewise.
331 2006-07-16 Thiemo Seufer <ths@mips.com>
332 David Ung <davidu@mips.com>
334 * read.c (s_struct): Handle ELF section changing.
335 * config/tc-mips.c (s_align): Leave enabling auto-align to the
337 (s_change_sec): Try section changing only if we output ELF.
339 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
341 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
343 (smallest_imm_type): Remove Cpu086.
344 (i386_target_format): Likewise.
346 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
349 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
350 Michael Meissner <michael.meissner@amd.com>
352 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
353 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
354 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
356 (i386_align_code): Ditto.
357 (md_assemble_code): Add support for insertq/extrq instructions,
358 swapping as needed for intel syntax.
359 (swap_imm_operands): New function to swap immediate operands.
360 (swap_operands): Deal with 4 operand instructions.
361 (build_modrm_byte): Add support for insertq instruction.
363 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
365 * config/tc-i386.h (Size64): Fix a typo in comment.
367 2006-07-12 Nick Clifton <nickc@redhat.com>
369 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
370 fixup_segment() to repeat a range check on a value that has
371 already been checked here.
373 2006-07-07 James E Wilson <wilson@specifix.com>
375 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
377 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
378 Nick Clifton <nickc@redhat.com>
381 * doc/as.texi: Fix spelling typo: branchs => branches.
382 * doc/c-m68hc11.texi: Likewise.
383 * config/tc-m68hc11.c: Likewise.
384 Support old spelling of command line switch for backwards
387 2006-07-04 Thiemo Seufer <ths@mips.com>
388 David Ung <davidu@mips.com>
390 * config/tc-mips.c (s_is_linkonce): New function.
391 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
392 weak, external, and linkonce symbols.
393 (pic_need_relax): Use s_is_linkonce.
395 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
397 * doc/as.texinfo (Org): Remove space.
398 (P2align): Add "@var{abs-expr},".
400 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
402 * config/tc-i386.c (cpu_arch_tune_set): New.
403 (cpu_arch_isa): Likewise.
404 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
405 nops with short or long nop sequences based on -march=/.arch
407 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
408 set cpu_arch_tune and cpu_arch_tune_flags.
409 (md_parse_option): For -march=, set cpu_arch_isa and set
410 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
411 0. Set cpu_arch_tune_set to 1 for -mtune=.
412 (i386_target_format): Don't set cpu_arch_tune.
414 2006-06-23 Nigel Stephens <nigel@mips.com>
416 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
417 generated .sbss.* and .gnu.linkonce.sb.*.
419 2006-06-23 Thiemo Seufer <ths@mips.com>
420 David Ung <davidu@mips.com>
422 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
424 * config/tc-mips.c (label_list): Define per-segment label_list.
425 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
426 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
427 mips_from_file_after_relocs, mips_define_label): Use per-segment
430 2006-06-22 Thiemo Seufer <ths@mips.com>
432 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
433 (append_insn): Use it.
434 (md_apply_fix): Whitespace formatting.
435 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
436 mips16_extended_frag): Remove register specifier.
437 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
440 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
442 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
443 a directive saving VFP registers for ARMv6 or later.
444 (s_arm_unwind_save): Add parameter arch_v6 and call
445 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
447 (md_pseudo_table): Add entry for new "vsave" directive.
448 * doc/c-arm.texi: Correct error in example for "save"
449 directive (fstmdf -> fstmdx). Also document "vsave" directive.
451 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
452 Anatoly Sokolov <aesok@post.ru>
454 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
455 and atmega644p devices. Rename atmega164/atmega324 devices to
456 atmega164p/atmega324p.
457 * doc/c-avr.texi: Document new mcu and arch options.
459 2006-06-17 Nick Clifton <nickc@redhat.com>
461 * config/tc-arm.c (enum parse_operand_result): Move outside of
462 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
464 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
466 * config/tc-i386.h (processor_type): New.
467 (arch_entry): Add type.
469 * config/tc-i386.c (cpu_arch_tune): New.
470 (cpu_arch_tune_flags): Likewise.
471 (cpu_arch_isa_flags): Likewise.
473 (set_cpu_arch): Also update cpu_arch_isa_flags.
474 (md_assemble): Update cpu_arch_isa_flags.
476 (OPTION_MTUNE): Likewise.
477 (md_longopts): Add -march= and -mtune=.
478 (md_parse_option): Support -march= and -mtune=.
479 (md_show_usage): Add -march=CPU/-mtune=CPU.
480 (i386_target_format): Also update cpu_arch_isa_flags,
481 cpu_arch_tune and cpu_arch_tune_flags.
483 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
485 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
487 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
489 * config/tc-arm.c (enum parse_operand_result): New.
490 (struct group_reloc_table_entry): New.
491 (enum group_reloc_type): New.
492 (group_reloc_table): New array.
493 (find_group_reloc_table_entry): New function.
494 (parse_shifter_operand_group_reloc): New function.
495 (parse_address_main): New function, incorporating code
496 from the old parse_address function. To be used via...
497 (parse_address): wrapper for parse_address_main; and
498 (parse_address_group_reloc): new function, likewise.
499 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
500 OP_ADDRGLDRS, OP_ADDRGLDC.
501 (parse_operands): Support for these new operand codes.
502 New macro po_misc_or_fail_no_backtrack.
503 (encode_arm_cp_address): Preserve group relocations.
504 (insns): Modify to use the above operand codes where group
505 relocations are permitted.
506 (md_apply_fix): Handle the group relocations
507 ALU_PC_G0_NC through LDC_SB_G2.
508 (tc_gen_reloc): Likewise.
509 (arm_force_relocation): Leave group relocations for the linker.
510 (arm_fix_adjustable): Likewise.
512 2006-06-15 Julian Brown <julian@codesourcery.com>
514 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
515 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
518 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
520 * config/tc-i386.c (process_suffix): Don't add rex64 for
523 2006-06-09 Thiemo Seufer <ths@mips.com>
525 * config/tc-mips.c (mips_ip): Maintain argument count.
527 2006-06-09 Alan Modra <amodra@bigpond.net.au>
529 * config/tc-iq2000.c: Include sb.h.
531 2006-06-08 Nigel Stephens <nigel@mips.com>
533 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
534 aliases for better compatibility with SGI tools.
536 2006-06-08 Alan Modra <amodra@bigpond.net.au>
538 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
539 * Makefile.am (GASLIBS): Expand @BFDLIB@.
541 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
542 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
543 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
545 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
546 * Makefile.in: Regenerate.
547 * doc/Makefile.in: Regenerate.
548 * configure: Regenerate.
550 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
552 * po/Make-in (pdf, ps): New dummy targets.
554 2006-06-07 Julian Brown <julian@codesourcery.com>
556 * config/tc-arm.c (stdarg.h): include.
557 (arm_it): Add uncond_value field. Add isvec and issingle to operand
559 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
560 REG_TYPE_NSDQ (single, double or quad vector reg).
561 (reg_expected_msgs): Update.
562 (BAD_FPU): Add macro for unsupported FPU instruction error.
563 (parse_neon_type): Support 'd' as an alias for .f64.
564 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
566 (parse_vfp_reg_list): Don't update first arg on error.
567 (parse_neon_mov): Support extra syntax for VFP moves.
568 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
569 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
570 (parse_operands): Support isvec, issingle operands fields, new parse
572 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
574 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
575 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
576 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
577 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
579 (neon_shape): Redefine in terms of above.
580 (neon_shape_class): New enumeration, table of shape classes.
581 (neon_shape_el): New enumeration. One element of a shape.
582 (neon_shape_el_size): Register widths of above, where appropriate.
583 (neon_shape_info): New struct. Info for shape table.
584 (neon_shape_tab): New array.
585 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
586 (neon_check_shape): Rewrite as...
587 (neon_select_shape): New function to classify instruction shapes,
588 driven by new table neon_shape_tab array.
589 (neon_quad): New function. Return 1 if shape should set Q flag in
590 instructions (or equivalent), 0 otherwise.
591 (type_chk_of_el_type): Support F64.
592 (el_type_of_type_chk): Likewise.
593 (neon_check_type): Add support for VFP type checking (VFP data
594 elements fill their containing registers).
595 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
596 in thumb mode for VFP instructions.
597 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
598 and encode the current instruction as if it were that opcode.
599 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
600 arguments, call function in PFN.
601 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
602 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
603 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
604 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
605 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
606 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
607 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
608 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
609 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
610 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
611 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
612 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
613 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
614 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
615 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
617 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
618 between VFP and Neon turns out to belong to Neon. Perform
619 architecture check and fill in condition field if appropriate.
620 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
621 (do_neon_cvt): Add support for VFP variants of instructions.
622 (neon_cvt_flavour): Extend to cover VFP conversions.
623 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
625 (do_neon_ldr_str): Handle single-precision VFP load/store.
626 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
627 NS_NULL not NS_IGNORE.
628 (opcode_tag): Add OT_csuffixF for operands which either take a
629 conditional suffix, or have 0xF in the condition field.
630 (md_assemble): Add support for OT_csuffixF.
631 (NCE): Replace macro with...
632 (NCE_tag, NCE, NCEF): New macros.
633 (nCE): Replace macro with...
634 (nCE_tag, nCE, nCEF): New macros.
635 (insns): Add support for VFP insns or VFP versions of insns msr,
636 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
637 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
638 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
639 VFP/Neon insns together.
641 2006-06-07 Alan Modra <amodra@bigpond.net.au>
642 Ladislav Michl <ladis@linux-mips.org>
644 * app.c: Don't include headers already included by as.h.
646 * atof-generic.c: Likewise.
648 * dwarf2dbg.c: Likewise.
650 * input-file.c: Likewise.
651 * input-scrub.c: Likewise.
653 * output-file.c: Likewise.
656 * config/bfin-lex.l: Likewise.
657 * config/obj-coff.h: Likewise.
658 * config/obj-elf.h: Likewise.
659 * config/obj-som.h: Likewise.
660 * config/tc-arc.c: Likewise.
661 * config/tc-arm.c: Likewise.
662 * config/tc-avr.c: Likewise.
663 * config/tc-bfin.c: Likewise.
664 * config/tc-cris.c: Likewise.
665 * config/tc-d10v.c: Likewise.
666 * config/tc-d30v.c: Likewise.
667 * config/tc-dlx.h: Likewise.
668 * config/tc-fr30.c: Likewise.
669 * config/tc-frv.c: Likewise.
670 * config/tc-h8300.c: Likewise.
671 * config/tc-hppa.c: Likewise.
672 * config/tc-i370.c: Likewise.
673 * config/tc-i860.c: Likewise.
674 * config/tc-i960.c: Likewise.
675 * config/tc-ip2k.c: Likewise.
676 * config/tc-iq2000.c: Likewise.
677 * config/tc-m32c.c: Likewise.
678 * config/tc-m32r.c: Likewise.
679 * config/tc-maxq.c: Likewise.
680 * config/tc-mcore.c: Likewise.
681 * config/tc-mips.c: Likewise.
682 * config/tc-mmix.c: Likewise.
683 * config/tc-mn10200.c: Likewise.
684 * config/tc-mn10300.c: Likewise.
685 * config/tc-msp430.c: Likewise.
686 * config/tc-mt.c: Likewise.
687 * config/tc-ns32k.c: Likewise.
688 * config/tc-openrisc.c: Likewise.
689 * config/tc-ppc.c: Likewise.
690 * config/tc-s390.c: Likewise.
691 * config/tc-sh.c: Likewise.
692 * config/tc-sh64.c: Likewise.
693 * config/tc-sparc.c: Likewise.
694 * config/tc-tic30.c: Likewise.
695 * config/tc-tic4x.c: Likewise.
696 * config/tc-tic54x.c: Likewise.
697 * config/tc-v850.c: Likewise.
698 * config/tc-vax.c: Likewise.
699 * config/tc-xc16x.c: Likewise.
700 * config/tc-xstormy16.c: Likewise.
701 * config/tc-xtensa.c: Likewise.
702 * config/tc-z80.c: Likewise.
703 * config/tc-z8k.c: Likewise.
704 * macro.h: Don't include sb.h or ansidecl.h.
705 * sb.h: Don't include stdio.h or ansidecl.h.
706 * cond.c: Include sb.h.
707 * itbl-lex.l: Include as.h instead of other system headers.
708 * itbl-parse.y: Likewise.
709 * itbl-ops.c: Similarly.
710 * itbl-ops.h: Don't include as.h or ansidecl.h.
711 * config/bfin-defs.h: Don't include bfd.h or as.h.
712 * config/bfin-parse.y: Include as.h instead of other system headers.
714 2006-06-06 Ben Elliston <bje@au.ibm.com>
715 Anton Blanchard <anton@samba.org>
717 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
718 (md_show_usage): Document it.
719 (ppc_setup_opcodes): Test power6 opcode flag bits.
720 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
722 2006-06-06 Thiemo Seufer <ths@mips.com>
723 Chao-ying Fu <fu@mips.com>
725 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
726 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
727 (macro_build): Update comment.
728 (mips_ip): Allow DSP64 instructions for MIPS64R2.
729 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
731 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
732 MIPS_CPU_ASE_MDMX flags for sb1.
734 2006-06-05 Thiemo Seufer <ths@mips.com>
736 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
738 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
739 (mips_ip): Make overflowed/underflowed constant arguments in DSP
740 and MT instructions a fatal error. Use INSERT_OPERAND where
741 appropriate. Improve warnings for break and wait code overflows.
742 Use symbolic constant of OP_MASK_COPZ.
743 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
745 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
747 * po/Make-in (top_builddir): Define.
749 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
751 * doc/Makefile.am (TEXI2DVI): Define.
752 * doc/Makefile.in: Regenerate.
753 * doc/c-arc.texi: Fix typo.
755 2006-06-01 Alan Modra <amodra@bigpond.net.au>
757 * config/obj-ieee.c: Delete.
758 * config/obj-ieee.h: Delete.
759 * Makefile.am (OBJ_FORMATS): Remove ieee.
760 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
761 (obj-ieee.o): Remove rule.
762 * Makefile.in: Regenerate.
763 * configure.in (atof): Remove tahoe.
764 (OBJ_MAYBE_IEEE): Don't define.
765 * configure: Regenerate.
766 * config.in: Regenerate.
767 * doc/Makefile.in: Regenerate.
768 * po/POTFILES.in: Regenerate.
770 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
772 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
773 and LIBINTL_DEP everywhere.
775 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
776 * acinclude.m4: Include new gettext macros.
777 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
778 Remove local code for po/Makefile.
779 * Makefile.in, configure, doc/Makefile.in: Regenerated.
781 2006-05-30 Nick Clifton <nickc@redhat.com>
783 * po/es.po: Updated Spanish translation.
785 2006-05-06 Denis Chertykov <denisc@overta.ru>
787 * doc/c-avr.texi: New file.
788 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
789 * doc/all.texi: Set AVR
790 * doc/as.texinfo: Include c-avr.texi
792 2006-05-28 Jie Zhang <jie.zhang@analog.com>
794 * config/bfin-parse.y (check_macfunc): Loose the condition of
795 calling check_multiply_halfregs ().
797 2006-05-25 Jie Zhang <jie.zhang@analog.com>
799 * config/bfin-parse.y (asm_1): Better check and deal with
800 vector and scalar Multiply 16-Bit Operands instructions.
802 2006-05-24 Nick Clifton <nickc@redhat.com>
804 * config/tc-hppa.c: Convert to ISO C90 format.
805 * config/tc-hppa.h: Likewise.
807 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
808 Randolph Chung <randolph@tausq.org>
810 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
811 is_tls_ieoff, is_tls_leoff): Define.
812 (fix_new_hppa): Handle TLS.
813 (cons_fix_new_hppa): Likewise.
815 (md_apply_fix): Handle TLS relocs.
816 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
818 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
820 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
822 2006-05-23 Thiemo Seufer <ths@mips.com>
823 David Ung <davidu@mips.com>
824 Nigel Stephens <nigel@mips.com>
827 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
828 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
829 ISA_HAS_MXHC1): New macros.
830 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
831 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
832 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
833 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
834 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
835 (mips_after_parse_args): Change default handling of float register
836 size to account for 32bit code with 64bit FP. Better sanity checking
837 of ISA/ASE/ABI option combinations.
838 (s_mipsset): Support switching of GPR and FPR sizes via
839 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
841 (mips_elf_final_processing): We should record the use of 64bit FP
842 registers in 32bit code but we don't, because ELF header flags are
844 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
845 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
846 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
847 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
848 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
849 missing -march options. Document .set arch=CPU. Move .set smartmips
850 to ASE page. Use @code for .set FOO examples.
852 2006-05-23 Jie Zhang <jie.zhang@analog.com>
854 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
857 2006-05-23 Jie Zhang <jie.zhang@analog.com>
859 * config/bfin-defs.h (bfin_equals): Remove declaration.
860 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
861 * config/tc-bfin.c (bfin_name_is_register): Remove.
862 (bfin_equals): Remove.
863 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
864 (bfin_name_is_register): Remove declaration.
866 2006-05-19 Thiemo Seufer <ths@mips.com>
867 Nigel Stephens <nigel@mips.com>
869 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
870 (mips_oddfpreg_ok): New function.
873 2006-05-19 Thiemo Seufer <ths@mips.com>
874 David Ung <davidu@mips.com>
876 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
877 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
878 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
879 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
880 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
881 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
882 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
883 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
884 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
885 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
886 reg_names_o32, reg_names_n32n64): Define register classes.
887 (reg_lookup): New function, use register classes.
888 (md_begin): Reserve register names in the symbol table. Simplify
890 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
892 (mips16_ip): Use reg_lookup.
893 (tc_get_register): Likewise.
894 (tc_mips_regname_to_dw2regnum): New function.
896 2006-05-19 Thiemo Seufer <ths@mips.com>
898 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
899 Un-constify string argument.
900 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
902 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
904 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
906 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
908 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
910 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
913 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
915 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
916 cfloat/m68881 to correct architecture before using it.
918 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
920 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
923 2006-05-15 Paul Brook <paul@codesourcery.com>
925 * config/tc-arm.c (arm_adjust_symtab): Use
926 bfd_is_arm_special_symbol_name.
928 2006-05-15 Bob Wilson <bob.wilson@acm.org>
930 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
931 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
932 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
933 Handle errors from calls to xtensa_opcode_is_* functions.
935 2006-05-14 Thiemo Seufer <ths@mips.com>
937 * config/tc-mips.c (macro_build): Test for currently active
939 (mips16_ip): Reject invalid opcodes.
941 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
943 * doc/as.texinfo: Rename "Index" to "AS Index",
944 and "ABORT" to "ABORT (COFF)".
946 2006-05-11 Paul Brook <paul@codesourcery.com>
948 * config/tc-arm.c (parse_half): New function.
949 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
950 (parse_operands): Ditto.
951 (do_mov16): Reject invalid relocations.
952 (do_t_mov16): Ditto. Use Thumb reloc numbers.
953 (insns): Replace Iffff with HALF.
954 (md_apply_fix): Add MOVW and MOVT relocs.
955 (tc_gen_reloc): Ditto.
956 * doc/c-arm.texi: Document relocation operators
958 2006-05-11 Paul Brook <paul@codesourcery.com>
960 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
962 2006-05-11 Thiemo Seufer <ths@mips.com>
964 * config/tc-mips.c (append_insn): Don't check the range of j or
967 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
969 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
970 relocs against external symbols for WinCE targets.
971 (md_apply_fix): Likewise.
973 2006-05-09 David Ung <davidu@mips.com>
975 * config/tc-mips.c (append_insn): Only warn about an out-of-range
978 2006-05-09 Nick Clifton <nickc@redhat.com>
980 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
981 against symbols which are not going to be placed into the symbol
984 2006-05-09 Ben Elliston <bje@au.ibm.com>
986 * expr.c (operand): Remove `if (0 && ..)' statement and
987 subsequently unused target_op label. Collapse `if (1 || ..)'
989 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
990 separately above the switch.
992 2006-05-08 Nick Clifton <nickc@redhat.com>
995 * config/tc-msp430.c (line_separator_character): Define as |.
997 2006-05-08 Thiemo Seufer <ths@mips.com>
998 Nigel Stephens <nigel@mips.com>
999 David Ung <davidu@mips.com>
1001 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1002 (mips_opts): Likewise.
1003 (file_ase_smartmips): New variable.
1004 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1005 (macro_build): Handle SmartMIPS instructions.
1006 (mips_ip): Likewise.
1007 (md_longopts): Add argument handling for smartmips.
1008 (md_parse_options, mips_after_parse_args): Likewise.
1009 (s_mipsset): Add .set smartmips support.
1010 (md_show_usage): Document -msmartmips/-mno-smartmips.
1011 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1013 * doc/c-mips.texi: Likewise.
1015 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1017 * write.c (relax_segment): Add pass count arg. Don't error on
1018 negative org/space on first two passes.
1019 (relax_seg_info): New struct.
1020 (relax_seg, write_object_file): Adjust.
1021 * write.h (relax_segment): Update prototype.
1023 2006-05-05 Julian Brown <julian@codesourcery.com>
1025 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1027 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1028 architecture version checks.
1029 (insns): Allow overlapping instructions to be used in VFP mode.
1031 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1034 * config/obj-elf.c (obj_elf_change_section): Allow user
1035 specified SHF_ALPHA_GPREL.
1037 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1039 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1040 for PMEM related expressions.
1042 2006-05-05 Nick Clifton <nickc@redhat.com>
1045 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1046 insertion of a directory separator character into a string at a
1047 given offset. Uses heuristics to decide when to use a backslash
1048 character rather than a forward-slash character.
1049 (dwarf2_directive_loc): Use the macro.
1050 (out_debug_info): Likewise.
1052 2006-05-05 Thiemo Seufer <ths@mips.com>
1053 David Ung <davidu@mips.com>
1055 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1057 (macro): Add new case M_CACHE_AB.
1059 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1061 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1062 (opcode_lookup): Issue a warning for opcode with
1063 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1064 identical to OT_cinfix3.
1065 (TxC3w, TC3w, tC3w): New.
1066 (insns): Use tC3w and TC3w for comparison instructions with
1069 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1071 * subsegs.h (struct frchain): Delete frch_seg.
1072 (frchain_root): Delete.
1073 (seg_info): Define as macro.
1074 * subsegs.c (frchain_root): Delete.
1075 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1076 (subsegs_begin, subseg_change): Adjust for above.
1077 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1078 rather than to one big list.
1079 (subseg_get): Don't special case abs, und sections.
1080 (subseg_new, subseg_force_new): Don't set frchainP here.
1082 (subsegs_print_statistics): Adjust frag chain control list traversal.
1083 * debug.c (dmp_frags): Likewise.
1084 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1085 at frchain_root. Make use of known frchain ordering.
1086 (last_frag_for_seg): Likewise.
1087 (get_frag_fix): Likewise. Add seg param.
1088 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1089 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1090 (SUB_SEGMENT_ALIGN): Likewise.
1091 (subsegs_finish): Adjust frchain list traversal.
1092 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1093 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1094 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1095 (xtensa_fix_b_j_loop_end_frags): Likewise.
1096 (xtensa_fix_close_loop_end_frags): Likewise.
1097 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1098 (retrieve_segment_info): Delete frch_seg initialisation.
1100 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1102 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1103 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1104 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1105 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1107 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1109 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1111 (md_apply_fix3): Multiply offset by 4 here for
1112 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1114 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1115 Jan Beulich <jbeulich@novell.com>
1117 * config/tc-i386.c (output_invalid_buf): Change size for
1119 * config/tc-tic30.c (output_invalid_buf): Likewise.
1121 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1123 * config/tc-tic30.c (output_invalid): Likewise.
1125 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1127 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1128 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1129 (asconfig.texi): Don't set top_srcdir.
1130 * doc/as.texinfo: Don't use top_srcdir.
1131 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1133 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1135 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1136 * config/tc-tic30.c (output_invalid_buf): Likewise.
1138 * config/tc-i386.c (output_invalid): Use snprintf instead of
1140 * config/tc-ia64.c (declare_register_set): Likewise.
1141 (emit_one_bundle): Likewise.
1142 (check_dependencies): Likewise.
1143 * config/tc-tic30.c (output_invalid): Likewise.
1145 2006-05-02 Paul Brook <paul@codesourcery.com>
1147 * config/tc-arm.c (arm_optimize_expr): New function.
1148 * config/tc-arm.h (md_optimize_expr): Define
1149 (arm_optimize_expr): Add prototype.
1150 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1152 2006-05-02 Ben Elliston <bje@au.ibm.com>
1154 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1157 * sb.h (sb_list_vector): Move to sb.c.
1158 * sb.c (free_list): Use type of sb_list_vector directly.
1159 (sb_build): Fix off-by-one error in assertion about `size'.
1161 2006-05-01 Ben Elliston <bje@au.ibm.com>
1163 * listing.c (listing_listing): Remove useless loop.
1164 * macro.c (macro_expand): Remove is_positional local variable.
1165 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1166 and simplify surrounding expressions, where possible.
1167 (assign_symbol): Likewise.
1168 (s_weakref): Likewise.
1169 * symbols.c (colon): Likewise.
1171 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1173 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1175 2006-04-30 Thiemo Seufer <ths@mips.com>
1176 David Ung <davidu@mips.com>
1178 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1179 (mips_immed): New table that records various handling of udi
1180 instruction patterns.
1181 (mips_ip): Adds udi handling.
1183 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1185 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1186 of list rather than beginning.
1188 2006-04-26 Julian Brown <julian@codesourcery.com>
1190 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1191 (is_quarter_float): Rename from above. Simplify slightly.
1192 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1194 (parse_neon_mov): Parse floating-point constants.
1195 (neon_qfloat_bits): Fix encoding.
1196 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1197 preference to integer encoding when using the F32 type.
1199 2006-04-26 Julian Brown <julian@codesourcery.com>
1201 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1202 zero-initialising structures containing it will lead to invalid types).
1203 (arm_it): Add vectype to each operand.
1204 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1206 (neon_typed_alias): New structure. Extra information for typed
1208 (reg_entry): Add neon type info field.
1209 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1210 Break out alternative syntax for coprocessor registers, etc. into...
1211 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1212 out from arm_reg_parse.
1213 (parse_neon_type): Move. Return SUCCESS/FAIL.
1214 (first_error): New function. Call to ensure first error which occurs is
1216 (parse_neon_operand_type): Parse exactly one type.
1217 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1218 (parse_typed_reg_or_scalar): New function. Handle core of both
1219 arm_typed_reg_parse and parse_scalar.
1220 (arm_typed_reg_parse): Parse a register with an optional type.
1221 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1223 (parse_scalar): Parse a Neon scalar with optional type.
1224 (parse_reg_list): Use first_error.
1225 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1226 (neon_alias_types_same): New function. Return true if two (alias) types
1228 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1230 (insert_reg_alias): Return new reg_entry not void.
1231 (insert_neon_reg_alias): New function. Insert type/index information as
1232 well as register for alias.
1233 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1234 make typed register aliases accordingly.
1235 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1237 (s_unreq): Delete type information if present.
1238 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1239 (s_arm_unwind_save_mmxwcg): Likewise.
1240 (s_arm_unwind_movsp): Likewise.
1241 (s_arm_unwind_setfp): Likewise.
1242 (parse_shift): Likewise.
1243 (parse_shifter_operand): Likewise.
1244 (parse_address): Likewise.
1245 (parse_tb): Likewise.
1246 (tc_arm_regname_to_dw2regnum): Likewise.
1247 (md_pseudo_table): Add dn, qn.
1248 (parse_neon_mov): Handle typed operands.
1249 (parse_operands): Likewise.
1250 (neon_type_mask): Add N_SIZ.
1251 (N_ALLMODS): New macro.
1252 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1253 (el_type_of_type_chk): Add some safeguards.
1254 (modify_types_allowed): Fix logic bug.
1255 (neon_check_type): Handle operands with types.
1256 (neon_three_same): Remove redundant optional arg handling.
1257 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1258 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1259 (do_neon_step): Adjust accordingly.
1260 (neon_cmode_for_logic_imm): Use first_error.
1261 (do_neon_bitfield): Call neon_check_type.
1262 (neon_dyadic): Rename to...
1263 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1264 to allow modification of type of the destination.
1265 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1266 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1267 (do_neon_compare): Make destination be an untyped bitfield.
1268 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1269 (neon_mul_mac): Return early in case of errors.
1270 (neon_move_immediate): Use first_error.
1271 (neon_mac_reg_scalar_long): Fix type to include scalar.
1272 (do_neon_dup): Likewise.
1273 (do_neon_mov): Likewise (in several places).
1274 (do_neon_tbl_tbx): Fix type.
1275 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1276 (do_neon_ld_dup): Exit early in case of errors and/or use
1278 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1279 Handle .dn/.qn directives.
1280 (REGDEF): Add zero for reg_entry neon field.
1282 2006-04-26 Julian Brown <julian@codesourcery.com>
1284 * config/tc-arm.c (limits.h): Include.
1285 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1286 (fpu_vfp_v3_or_neon_ext): Declare constants.
1287 (neon_el_type): New enumeration of types for Neon vector elements.
1288 (neon_type_el): New struct. Define type and size of a vector element.
1289 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1291 (neon_type): Define struct. The type of an instruction.
1292 (arm_it): Add 'vectype' for the current instruction.
1293 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1294 (vfp_sp_reg_pos): Rename to...
1295 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1297 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1298 (Neon D or Q register).
1299 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1301 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1302 (my_get_expression): Allow above constant as argument to accept
1303 64-bit constants with optional prefix.
1304 (arm_reg_parse): Add extra argument to return the specific type of
1305 register in when either a D or Q register (REG_TYPE_NDQ) is
1306 requested. Can be NULL.
1307 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1308 (parse_reg_list): Update for new arm_reg_parse args.
1309 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1310 (parse_neon_el_struct_list): New function. Parse element/structure
1311 register lists for VLD<n>/VST<n> instructions.
1312 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1313 (s_arm_unwind_save_mmxwr): Likewise.
1314 (s_arm_unwind_save_mmxwcg): Likewise.
1315 (s_arm_unwind_movsp): Likewise.
1316 (s_arm_unwind_setfp): Likewise.
1317 (parse_big_immediate): New function. Parse an immediate, which may be
1318 64 bits wide. Put results in inst.operands[i].
1319 (parse_shift): Update for new arm_reg_parse args.
1320 (parse_address): Likewise. Add parsing of alignment specifiers.
1321 (parse_neon_mov): Parse the operands of a VMOV instruction.
1322 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1323 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1324 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1325 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1326 (parse_operands): Handle new codes above.
1327 (encode_arm_vfp_sp_reg): Rename to...
1328 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1329 selected VFP version only supports D0-D15.
1330 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1331 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1332 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1333 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1334 encode_arm_vfp_reg name, and allow 32 D regs.
1335 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1336 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1338 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1339 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1340 constant-load and conversion insns introduced with VFPv3.
1341 (neon_tab_entry): New struct.
1342 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1343 those which are the targets of pseudo-instructions.
1344 (neon_opc): Enumerate opcodes, use as indices into...
1345 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1346 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1347 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1348 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1350 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1352 (neon_type_mask): New. Compact type representation for type checking.
1353 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1354 permitted type combinations.
1355 (N_IGNORE_TYPE): New macro.
1356 (neon_check_shape): New function. Check an instruction shape for
1357 multiple alternatives. Return the specific shape for the current
1359 (neon_modify_type_size): New function. Modify a vector type and size,
1360 depending on the bit mask in argument 1.
1361 (neon_type_promote): New function. Convert a given "key" type (of an
1362 operand) into the correct type for a different operand, based on a bit
1364 (type_chk_of_el_type): New function. Convert a type and size into the
1365 compact representation used for type checking.
1366 (el_type_of_type_ckh): New function. Reverse of above (only when a
1367 single bit is set in the bit mask).
1368 (modify_types_allowed): New function. Alter a mask of allowed types
1369 based on a bit mask of modifications.
1370 (neon_check_type): New function. Check the type of the current
1371 instruction against the variable argument list. The "key" type of the
1372 instruction is returned.
1373 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1374 a Neon data-processing instruction depending on whether we're in ARM
1375 mode or Thumb-2 mode.
1376 (neon_logbits): New function.
1377 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1378 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1379 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1380 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1381 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1382 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1383 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1384 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1385 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1386 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1387 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1388 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1389 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1390 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1391 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1392 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1393 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1394 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1395 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1396 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1397 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1398 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1399 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1400 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1401 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1403 (parse_neon_type): New function. Parse Neon type specifier.
1404 (opcode_lookup): Allow parsing of Neon type specifiers.
1405 (REGNUM2, REGSETH, REGSET2): New macros.
1406 (reg_names): Add new VFPv3 and Neon registers.
1407 (NUF, nUF, NCE, nCE): New macros for opcode table.
1408 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1409 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1410 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1411 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1412 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1413 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1414 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1415 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1416 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1417 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1418 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1419 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1420 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1421 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1423 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1424 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1425 (arm_option_cpu_value): Add vfp3 and neon.
1426 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1429 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1431 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1432 syntax instead of hardcoded opcodes with ".w18" suffixes.
1433 (wide_branch_opcode): New.
1434 (build_transition): Use it to check for wide branch opcodes with
1435 either ".w18" or ".w15" suffixes.
1437 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1439 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1440 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1441 frag's is_literal flag.
1443 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1445 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1447 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1449 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1450 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1451 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1452 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1453 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1455 2005-04-20 Paul Brook <paul@codesourcery.com>
1457 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1459 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1461 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1463 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1464 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1465 Make some cpus unsupported on ELF. Run "make dep-am".
1466 * Makefile.in: Regenerate.
1468 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1470 * configure.in (--enable-targets): Indent help message.
1471 * configure: Regenerate.
1473 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1476 * config/tc-i386.c (i386_immediate): Check illegal immediate
1479 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1481 * config/tc-i386.c: Formatting.
1482 (output_disp, output_imm): ISO C90 params.
1484 * frags.c (frag_offset_fixed_p): Constify args.
1485 * frags.h (frag_offset_fixed_p): Ditto.
1487 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1488 (COFF_MAGIC): Delete.
1490 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1492 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1494 * po/POTFILES.in: Regenerated.
1496 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1498 * doc/as.texinfo: Mention that some .type syntaxes are not
1499 supported on all architectures.
1501 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1503 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1504 instructions when such transformations have been disabled.
1506 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1508 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1509 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1510 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1511 decoding the loop instructions. Remove current_offset variable.
1512 (xtensa_fix_short_loop_frags): Likewise.
1513 (min_bytes_to_other_loop_end): Remove current_offset argument.
1515 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1517 * config/tc-z80.c (z80_optimize_expr): Removed.
1518 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1520 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1522 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1523 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1524 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1525 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1526 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1527 at90can64, at90usb646, at90usb647, at90usb1286 and
1529 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1531 2006-04-07 Paul Brook <paul@codesourcery.com>
1533 * config/tc-arm.c (parse_operands): Set default error message.
1535 2006-04-07 Paul Brook <paul@codesourcery.com>
1537 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1539 2006-04-07 Paul Brook <paul@codesourcery.com>
1541 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1543 2006-04-07 Paul Brook <paul@codesourcery.com>
1545 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1546 (move_or_literal_pool): Handle Thumb-2 instructions.
1547 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1549 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1552 * config/tc-i386.c (match_template): Move 64-bit operand tests
1555 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1557 * po/Make-in: Add install-html target.
1558 * Makefile.am: Add install-html and install-html-recursive targets.
1559 * Makefile.in: Regenerate.
1560 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1561 * configure: Regenerate.
1562 * doc/Makefile.am: Add install-html and install-html-am targets.
1563 * doc/Makefile.in: Regenerate.
1565 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1567 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1570 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1571 Daniel Jacobowitz <dan@codesourcery.com>
1573 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1574 (GOTT_BASE, GOTT_INDEX): New.
1575 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1576 GOTT_INDEX when generating VxWorks PIC.
1577 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1578 use the generic *-*-vxworks* stanza instead.
1580 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1583 * frags.c (frag_offset_fixed_p): New function.
1584 * frags.h (frag_offset_fixed_p): Declare.
1585 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1586 (resolve_expression): Likewise.
1588 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1590 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1591 of the same length but different numbers of slots.
1593 2006-03-30 Andreas Schwab <schwab@suse.de>
1595 * configure.in: Fix help string for --enable-targets option.
1596 * configure: Regenerate.
1598 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1600 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1601 (m68k_ip): ... here. Use for all chips. Protect against buffer
1602 overrun and avoid excessive copying.
1604 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1605 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1606 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1607 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1608 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1609 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1610 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1611 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1612 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1613 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1614 (struct m68k_cpu): Change chip field to control_regs.
1615 (current_chip): Remove.
1616 (control_regs): New.
1617 (m68k_archs, m68k_extensions): Adjust.
1618 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1619 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1620 (find_cf_chip): Reimplement for new organization of cpu table.
1621 (select_control_regs): Remove.
1623 (struct save_opts): Save control regs, not chip.
1624 (s_save, s_restore): Adjust.
1625 (m68k_lookup_cpu): Give deprecated warning when necessary.
1626 (m68k_init_arch): Adjust.
1627 (md_show_usage): Adjust for new cpu table organization.
1629 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1631 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1632 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1633 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1635 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1636 (any_gotrel): New rule.
1637 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1638 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1640 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1641 (bfin_pic_ptr): New function.
1642 (md_pseudo_table): Add it for ".picptr".
1643 (OPTION_FDPIC): New macro.
1644 (md_longopts): Add -mfdpic.
1645 (md_parse_option): Handle it.
1646 (md_begin): Set BFD flags.
1647 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1648 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1650 * Makefile.am (bfin-parse.o): Update dependencies.
1651 (DEPTC_bfin_elf): Likewise.
1652 * Makefile.in: Regenerate.
1654 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1656 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1657 mcfemac instead of mcfmac.
1659 2006-03-23 Michael Matz <matz@suse.de>
1661 * config/tc-i386.c (type_names): Correct placement of 'static'.
1662 (reloc): Map some more relocs to their 64 bit counterpart when
1664 (output_insn): Work around breakage if DEBUG386 is defined.
1665 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1666 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1667 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1668 different from i386.
1669 (output_imm): Ditto.
1670 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1672 (md_convert_frag): Jumps can now be larger than 2GB away, error
1674 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1675 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1677 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1678 Daniel Jacobowitz <dan@codesourcery.com>
1679 Phil Edwards <phil@codesourcery.com>
1680 Zack Weinberg <zack@codesourcery.com>
1681 Mark Mitchell <mark@codesourcery.com>
1682 Nathan Sidwell <nathan@codesourcery.com>
1684 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1685 (md_begin): Complain about -G being used for PIC. Don't change
1686 the text, data and bss alignments on VxWorks.
1687 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1688 generating VxWorks PIC.
1689 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1690 (macro): Likewise, but do not treat la $25 specially for
1691 VxWorks PIC, and do not handle jal.
1692 (OPTION_MVXWORKS_PIC): New macro.
1693 (md_longopts): Add -mvxworks-pic.
1694 (md_parse_option): Don't complain about using PIC and -G together here.
1695 Handle OPTION_MVXWORKS_PIC.
1696 (md_estimate_size_before_relax): Always use the first relaxation
1697 sequence on VxWorks.
1698 * config/tc-mips.h (VXWORKS_PIC): New.
1700 2006-03-21 Paul Brook <paul@codesourcery.com>
1702 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1704 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1706 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1707 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1708 (get_loop_align_size): New.
1709 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1710 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1711 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1712 (get_noop_aligned_address): Use get_loop_align_size.
1713 (get_aligned_diff): Likewise.
1715 2006-03-21 Paul Brook <paul@codesourcery.com>
1717 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1719 2006-03-20 Paul Brook <paul@codesourcery.com>
1721 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1722 (do_t_branch): Encode branches inside IT blocks as unconditional.
1723 (do_t_cps): New function.
1724 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1725 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1726 (opcode_lookup): Allow conditional suffixes on all instructions in
1728 (md_assemble): Advance condexec state before checking for errors.
1729 (insns): Use do_t_cps.
1731 2006-03-20 Paul Brook <paul@codesourcery.com>
1733 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1734 outputting the insn.
1736 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1738 * config/tc-vax.c: Update copyright year.
1739 * config/tc-vax.h: Likewise.
1741 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1743 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1745 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1747 2006-03-17 Paul Brook <paul@codesourcery.com>
1749 * config/tc-arm.c (insns): Add ldm and stm.
1751 2006-03-17 Ben Elliston <bje@au.ibm.com>
1754 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1756 2006-03-16 Paul Brook <paul@codesourcery.com>
1758 * config/tc-arm.c (insns): Add "svc".
1760 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1762 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1763 flag and avoid double underscore prefixes.
1765 2006-03-10 Paul Brook <paul@codesourcery.com>
1767 * config/tc-arm.c (md_begin): Handle EABIv5.
1768 (arm_eabis): Add EF_ARM_EABI_VER5.
1769 * doc/c-arm.texi: Document -meabi=5.
1771 2006-03-10 Ben Elliston <bje@au.ibm.com>
1773 * app.c (do_scrub_chars): Simplify string handling.
1775 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1776 Daniel Jacobowitz <dan@codesourcery.com>
1777 Zack Weinberg <zack@codesourcery.com>
1778 Nathan Sidwell <nathan@codesourcery.com>
1779 Paul Brook <paul@codesourcery.com>
1780 Ricardo Anguiano <anguiano@codesourcery.com>
1781 Phil Edwards <phil@codesourcery.com>
1783 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1784 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1786 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1787 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1788 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1790 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1792 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1793 even when using the text-section-literals option.
1795 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1797 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1799 (m68k_ip): <case 'J'> Check we have some control regs.
1800 (md_parse_option): Allow raw arch switch.
1801 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1802 whether 68881 or cfloat was meant by -mfloat.
1803 (md_show_usage): Adjust extension display.
1804 (m68k_elf_final_processing): Adjust.
1806 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1808 * config/tc-avr.c (avr_mod_hash_value): New function.
1809 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1810 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1811 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1812 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1814 (tc_gen_reloc): Handle substractions of symbols, if possible do
1815 fixups, abort otherwise.
1816 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1817 tc_fix_adjustable): Define.
1819 2006-03-02 James E Wilson <wilson@specifix.com>
1821 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1822 change the template, then clear md.slot[curr].end_of_insn_group.
1824 2006-02-28 Jan Beulich <jbeulich@novell.com>
1826 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1828 2006-02-28 Jan Beulich <jbeulich@novell.com>
1831 * macro.c (getstring): Don't treat parentheses special anymore.
1832 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1833 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1836 2006-02-28 Mat <mat@csail.mit.edu>
1838 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1840 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1842 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1844 (CFI_signal_frame): Define.
1845 (cfi_pseudo_table): Add .cfi_signal_frame.
1846 (dot_cfi): Handle CFI_signal_frame.
1847 (output_cie): Handle cie->signal_frame.
1848 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1849 different. Copy signal_frame from FDE to newly created CIE.
1850 * doc/as.texinfo: Document .cfi_signal_frame.
1852 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1854 * doc/Makefile.am: Add html target.
1855 * doc/Makefile.in: Regenerate.
1856 * po/Make-in: Add html target.
1858 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1860 * config/tc-i386.c (output_insn): Support Intel Merom New
1863 * config/tc-i386.h (CpuMNI): New.
1864 (CpuUnknownFlags): Add CpuMNI.
1866 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1868 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1869 (hpriv_reg_table): New table for hyperprivileged registers.
1870 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1873 2006-02-24 DJ Delorie <dj@redhat.com>
1875 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1876 (tc_gen_reloc): Don't define.
1877 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1878 (OPTION_LINKRELAX): New.
1879 (md_longopts): Add it.
1881 (md_parse_options): Set it.
1882 (md_assemble): Emit relaxation relocs as needed.
1883 (md_convert_frag): Emit relaxation relocs as needed.
1884 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1885 (m32c_apply_fix): New.
1886 (tc_gen_reloc): New.
1887 (m32c_force_relocation): Force out jump relocs when relaxing.
1888 (m32c_fix_adjustable): Return false if relaxing.
1890 2006-02-24 Paul Brook <paul@codesourcery.com>
1892 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1893 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1894 (struct asm_barrier_opt): Define.
1895 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1896 (parse_psr): Accept V7M psr names.
1897 (parse_barrier): New function.
1898 (enum operand_parse_code): Add OP_oBARRIER.
1899 (parse_operands): Implement OP_oBARRIER.
1900 (do_barrier): New function.
1901 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1902 (do_t_cpsi): Add V7M restrictions.
1903 (do_t_mrs, do_t_msr): Validate V7M variants.
1904 (md_assemble): Check for NULL variants.
1905 (v7m_psrs, barrier_opt_names): New tables.
1906 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1907 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1908 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1909 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1910 (struct cpu_arch_ver_table): Define.
1911 (cpu_arch_ver): New.
1912 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1913 Tag_CPU_arch_profile.
1914 * doc/c-arm.texi: Document new cpu and arch options.
1916 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1918 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1920 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1922 * config/tc-ia64.c: Update copyright years.
1924 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1926 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1929 2005-02-22 Paul Brook <paul@codesourcery.com>
1931 * config/tc-arm.c (do_pld): Remove incorrect write to
1933 (encode_thumb32_addr_mode): Use correct operand.
1935 2006-02-21 Paul Brook <paul@codesourcery.com>
1937 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1939 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1940 Anil Paranjape <anilp1@kpitcummins.com>
1941 Shilin Shakti <shilins@kpitcummins.com>
1943 * Makefile.am: Add xc16x related entry.
1944 * Makefile.in: Regenerate.
1945 * configure.in: Added xc16x related entry.
1946 * configure: Regenerate.
1947 * config/tc-xc16x.h: New file
1948 * config/tc-xc16x.c: New file
1949 * doc/c-xc16x.texi: New file for xc16x
1950 * doc/all.texi: Entry for xc16x
1951 * doc/Makefile.texi: Added c-xc16x.texi
1952 * NEWS: Announce the support for the new target.
1954 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1956 * configure.tgt: set emulation for mips-*-netbsd*
1958 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1960 * config.in: Rebuilt.
1962 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1964 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1965 from 1, not 0, in error messages.
1966 (md_assemble): Simplify special-case check for ENTRY instructions.
1967 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1968 operand in error message.
1970 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1972 * configure.tgt (arm-*-linux-gnueabi*): Change to
1975 2006-02-10 Nick Clifton <nickc@redhat.com>
1977 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1978 32-bit value is propagated into the upper bits of a 64-bit long.
1980 * config/tc-arc.c (init_opcode_tables): Fix cast.
1981 (arc_extoper, md_operand): Likewise.
1983 2006-02-09 David Heine <dlheine@tensilica.com>
1985 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1986 each relaxation step.
1988 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1990 * configure.in (CHECK_DECLS): Add vsnprintf.
1991 * configure: Regenerate.
1992 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1993 include/declare here, but...
1994 * as.h: Move code detecting VARARGS idiom to the top.
1995 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1996 (vsnprintf): Declare if not already declared.
1998 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2000 * as.c (close_output_file): New.
2001 (main): Register close_output_file with xatexit before
2002 dump_statistics. Don't call output_file_close.
2004 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2006 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2007 mcf5329_control_regs): New.
2008 (not_current_architecture, selected_arch, selected_cpu): New.
2009 (m68k_archs, m68k_extensions): New.
2010 (archs): Renamed to ...
2011 (m68k_cpus): ... here. Adjust.
2013 (md_pseudo_table): Add arch and cpu directives.
2014 (find_cf_chip, m68k_ip): Adjust table scanning.
2015 (no_68851, no_68881): Remove.
2016 (md_assemble): Lazily initialize.
2017 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2018 (md_init_after_args): Move functionality to m68k_init_arch.
2019 (mri_chip): Adjust table scanning.
2020 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2021 options with saner parsing.
2022 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2023 m68k_init_arch): New.
2024 (s_m68k_cpu, s_m68k_arch): New.
2025 (md_show_usage): Adjust.
2026 (m68k_elf_final_processing): Set CF EF flags.
2027 * config/tc-m68k.h (m68k_init_after_args): Remove.
2028 (tc_init_after_args): Remove.
2029 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2030 (M68k-Directives): Document .arch and .cpu directives.
2032 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2034 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2035 synonyms for equ and defl.
2036 (z80_cons_fix_new): New function.
2037 (emit_byte): Disallow relative jumps to absolute locations.
2038 (emit_data): Only handle defb, prototype changed, because defb is
2039 now handled as pseudo-op rather than an instruction.
2040 (instab): Entries for defb,defw,db,dw moved from here...
2041 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2042 Add entries for def24,def32,d24,d32.
2043 (md_assemble): Improved error handling.
2044 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2045 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2046 (z80_cons_fix_new): Declare.
2047 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2048 (def24,d24,def32,d32): New pseudo-ops.
2050 2006-02-02 Paul Brook <paul@codesourcery.com>
2052 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2054 2005-02-02 Paul Brook <paul@codesourcery.com>
2056 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2057 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2058 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2059 T2_OPCODE_RSB): Define.
2060 (thumb32_negate_data_op): New function.
2061 (md_apply_fix): Use it.
2063 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2065 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2067 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2068 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2070 (relaxation_requirements): Add pfinish_frag argument and use it to
2071 replace setting tinsn->record_fix fields.
2072 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2073 and vinsn_to_insnbuf. Remove references to record_fix and
2074 slot_sub_symbols fields.
2075 (xtensa_mark_narrow_branches): Delete unused code.
2076 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2078 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2080 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2081 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2082 of the record_fix field. Simplify error messages for unexpected
2084 (set_expr_symbol_offset_diff): Delete.
2086 2006-01-31 Paul Brook <paul@codesourcery.com>
2088 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2090 2006-01-31 Paul Brook <paul@codesourcery.com>
2091 Richard Earnshaw <rearnsha@arm.com>
2093 * config/tc-arm.c: Use arm_feature_set.
2094 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2095 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2096 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2099 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2100 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2101 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2102 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2104 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2105 (arm_opts): Move old cpu/arch options from here...
2106 (arm_legacy_opts): ... to here.
2107 (md_parse_option): Search arm_legacy_opts.
2108 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2109 (arm_float_abis, arm_eabis): Make const.
2111 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2113 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2115 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2117 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2118 in load immediate intruction.
2120 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2122 * config/bfin-parse.y (value_match): Use correct conversion
2123 specifications in template string for __FILE__ and __LINE__.
2127 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2129 Introduce TLS descriptors for i386 and x86_64.
2130 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2131 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2132 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2133 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2134 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2136 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2137 (lex_got): Handle @tlsdesc and @tlscall.
2138 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2140 2006-01-11 Nick Clifton <nickc@redhat.com>
2142 Fixes for building on 64-bit hosts:
2143 * config/tc-avr.c (mod_index): New union to allow conversion
2144 between pointers and integers.
2145 (md_begin, avr_ldi_expression): Use it.
2146 * config/tc-i370.c (md_assemble): Add cast for argument to print
2148 * config/tc-tic54x.c (subsym_substitute): Likewise.
2149 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2150 opindex field of fr_cgen structure into a pointer so that it can
2151 be stored in a frag.
2152 * config/tc-mn10300.c (md_assemble): Likewise.
2153 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2155 * config/tc-v850.c: Replace uses of (int) casts with correct
2158 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2161 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2163 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2166 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2167 a local-label reference.
2169 For older changes see ChangeLog-2005
2175 version-control: never
projects / platform / upstream / binutils.git / blob