1 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
4 and mips_int_operand_max.
5 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
7 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
8 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
9 instead of mips16_immed_operand.
11 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
13 * config/tc-mips.c (mips16_macro): Don't use move_register.
14 (mips16_ip): Allow macros to use 'p'.
16 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
18 * config/tc-mips.c (MAX_OPERANDS): New macro.
19 (mips_operand_array): New structure.
20 (mips_operands, mips16_operands, micromips_operands): New arrays.
21 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
22 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
23 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
24 (micromips_to_32_reg_q_map): Delete.
25 (insn_operands, insn_opno, insn_extract_operand): New functions.
26 (validate_mips_insn): Take a mips_operand_array as argument and
27 use it to build up a list of operands. Extend to handle INSN_MACRO
29 (validate_mips16_insn): New function.
30 (validate_micromips_insn): Take a mips_operand_array as argument.
32 (md_begin): Initialize mips_operands, mips16_operands and
33 micromips_operands. Call validate_mips_insn and
34 validate_micromips_insn for macro instructions too.
35 Call validate_mips16_insn for MIPS16 instructions.
36 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
38 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
39 them. Handle INSN_UDI.
40 (get_append_method): Use gpr_read_mask.
42 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
44 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
45 flags for MIPS16 and non-MIPS16 instructions.
46 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
47 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
48 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
49 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
50 and non-MIPS16 instructions. Fix formatting.
52 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
54 * config/tc-mips.c (reg_needs_delay): Move later in file.
56 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
58 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
59 Alexander Ivchenko <alexander.ivchenko@intel.com>
60 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
61 Sergey Lega <sergey.s.lega@intel.com>
62 Anna Tikhonova <anna.tikhonova@intel.com>
63 Ilya Tocar <ilya.tocar@intel.com>
64 Andrey Turetskiy <andrey.turetskiy@intel.com>
65 Ilya Verbin <ilya.verbin@intel.com>
66 Kirill Yukhin <kirill.yukhin@intel.com>
67 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
69 * config/tc-i386-intel.c (O_zmmword_ptr): New.
70 (i386_types): Add zmmword.
71 (i386_intel_simplify_register): Allow regzmm.
72 (i386_intel_simplify): Handle zmmwords.
73 (i386_intel_operand): Handle RC/SAE, vector operations and
75 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
76 (struct RC_Operation): New.
77 (struct Mask_Operation): New.
78 (struct Broadcast_Operation): New.
79 (vex_prefix): Size of bytes increased to 4 to support EVEX
81 (enum i386_error): Add new error codes: unsupported_broadcast,
82 broadcast_not_on_src_operand, broadcast_needed,
83 unsupported_masking, mask_not_on_destination, no_default_mask,
84 unsupported_rc_sae, rc_sae_operand_not_last_imm,
85 invalid_register_operand, try_vector_disp8.
86 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
87 rounding, broadcast, memshift.
88 (struct RC_name): New.
92 (extra_symbol_chars): Add '{'.
93 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
94 (i386_operand_type): Add regzmm, regmask and vec_disp8.
95 (match_mem_size): Handle zmmwords.
96 (operand_type_match): Handle zmm-registers.
97 (mode_from_disp_size): Handle vec_disp8.
98 (fits_in_vec_disp8): New.
99 (md_begin): Handle {} properly.
100 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
101 (build_vex_prefix): Handle vrex.
102 (build_evex_prefix): New.
103 (process_immext): Adjust to properly handle EVEX.
104 (md_assemble): Add EVEX encoding support.
105 (swap_2_operands): Correctly handle operands with masking,
106 broadcasting or RC/SAE.
107 (check_VecOperands): Support EVEX features.
108 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
109 (match_template): Support regzmm and handle new error codes.
110 (process_suffix): Handle zmmwords and zmm-registers.
111 (check_byte_reg): Extend to zmm-registers.
112 (process_operands): Extend to zmm-registers.
113 (build_modrm_byte): Handle EVEX.
114 (output_insn): Adjust to properly handle EVEX case.
115 (disp_size): Handle vec_disp8.
116 (output_disp): Support compressed disp8*N evex feature.
117 (output_imm): Handle RC/SAE immediates properly.
118 (check_VecOperations): New.
119 (i386_immediate): Handle EVEX features.
120 (i386_index_check): Handle zmmwords and zmm-registers.
121 (RC_SAE_immediate): New.
122 (i386_att_operand): Handle EVEX features.
123 (parse_real_register): Add a check for ZMM/Mask registers.
124 (OPTION_MEVEXLIG): New.
125 (OPTION_MEVEXWIG): New.
126 (md_longopts): Add mevexlig and mevexwig.
127 (md_parse_option): Handle mevexlig and mevexwig options.
128 (md_show_usage): Add description for mevexlig and mevexwig.
129 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
130 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
132 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
134 * config/tc-i386.c (cpu_arch): Add .sha.
135 * doc/c-i386.texi: Document sha/.sha.
137 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
138 Kirill Yukhin <kirill.yukhin@intel.com>
139 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
141 * config/tc-i386.c (BND_PREFIX): New.
142 (struct _i386_insn): Add new field bnd_prefix.
143 (add_bnd_prefix): New.
145 (i386_operand_type): Add regbnd.
146 (md_assemble): Handle BND prefixes.
147 (parse_insn): Likewise.
148 (output_branch): Likewise.
149 (output_jump): Likewise.
150 (build_modrm_byte): Handle regbnd.
151 (OPTION_MADD_BND_PREFIX): New.
152 (md_longopts): Add entry for 'madd-bnd-prefix'.
153 (md_parse_option): Handle madd-bnd-prefix option.
154 (md_show_usage): Add description for madd-bnd-prefix
156 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
158 2013-07-24 Tristan Gingold <gingold@adacore.com>
160 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
163 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
165 * config/tc-s390.c (s390_machine): Don't force the .machine
166 argument to lower case.
168 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
170 * config/tc-arm.c (s_arm_arch_extension): Improve error message
171 for invalid extension.
173 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
175 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
176 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
177 (aarch64_abi): New variable.
178 (ilp32_p): Change to be a macro.
179 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
180 (struct aarch64_option_abi_value_table): New struct.
181 (aarch64_abis): New table.
182 (aarch64_parse_abi): New function.
183 (aarch64_long_opts): Add entry for -mabi=.
184 * doc/as.texinfo (Target AArch64 options): Document -mabi.
185 * doc/c-aarch64.texi: Likewise.
187 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
189 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
192 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
194 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
196 * config/rx-parse.y: (rx_check_float_support): Add function to
197 check floating point operation support for target RX100 and
199 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
200 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
201 RX200, RX600, and RX610
203 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
205 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
207 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
209 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
210 * doc/c-avr.texi: Likewise.
212 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
214 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
215 error with older GCCs.
216 (mips16_macro_build): Dereference args.
218 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
220 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
221 New functions, split out from...
222 (reg_lookup): ...here. Remove itbl support.
223 (reglist_lookup): Delete.
224 (mips_operand_token_type): New enum.
225 (mips_operand_token): New structure.
226 (mips_operand_tokens): New variable.
227 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
228 (mips_parse_arguments): New functions.
229 (md_begin): Initialize mips_operand_tokens.
230 (mips_arg_info): Add a token field. Remove optional_reg field.
231 (match_char, match_expression): New functions.
232 (match_const_int): Use match_expression. Remove "s" argument
233 and return a boolean result. Remove O_register handling.
234 (match_regno, match_reg, match_reg_range): New functions.
235 (match_int_operand, match_mapped_int_operand, match_msb_operand)
236 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
237 (match_addiusp_operand, match_clo_clz_dest_operand)
238 (match_lwm_swm_list_operand, match_entry_exit_operand)
239 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
240 (match_tied_reg_operand): Remove "s" argument and return a boolean
241 result. Match tokens rather than text. Update calls to
242 match_const_int. Rely on match_regno to call check_regno.
243 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
244 "arg" argument. Return a boolean result.
245 (parse_float_constant): Replace with...
246 (match_float_constant): ...this new function.
247 (match_operand): Remove "s" argument and return a boolean result.
248 Update calls to subfunctions.
249 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
250 rather than string-parsing routines. Update handling of optional
251 registers for token scheme.
253 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
255 * config/tc-mips.c (parse_float_constant): Split out from...
258 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
260 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
263 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
265 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
266 (match_entry_exit_operand): New function.
267 (match_save_restore_list_operand): Likewise.
268 (match_operand): Use them.
269 (check_absolute_expr): Delete.
270 (mips16_ip): Rewrite main parsing loop to use mips_operands.
272 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
274 * config/tc-mips.c: Enable functions commented out in previous patch.
275 (SKIP_SPACE_TABS): Move further up file.
276 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
277 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
278 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
279 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
280 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
281 (micromips_imm_b_map, micromips_imm_c_map): Delete.
282 (mips_lookup_reg_pair): Delete.
283 (macro): Use report_bad_range and report_bad_field.
284 (mips_immed, expr_const_in_range): Delete.
285 (mips_ip): Rewrite main parsing loop to use new functions.
287 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
289 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
290 Change return type to bfd_boolean.
291 (report_bad_range, report_bad_field): New functions.
292 (mips_arg_info): New structure.
293 (match_const_int, convert_reg_type, check_regno, match_int_operand)
294 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
295 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
296 (match_addiusp_operand, match_clo_clz_dest_operand)
297 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
298 (match_pc_operand, match_tied_reg_operand, match_operand)
299 (check_completed_insn): New functions, commented out for now.
301 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
303 * config/tc-mips.c (insn_insert_operand): New function.
304 (macro_build, mips16_macro_build): Put null character check
305 in the for loop and convert continues to breaks. Use operand
306 structures to handle constant operands.
308 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
310 * config/tc-mips.c (validate_mips_insn): Move further up file.
311 Add insn_bits and decode_operand arguments. Use the mips_operand
312 fields to work out which bits an operand occupies. Detect double
314 (validate_micromips_insn): Move further up file. Call into
317 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
319 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
321 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
323 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
325 (macro): Update accordingly.
327 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
329 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
331 (md_assemble): Remove imm_reloc handling.
332 (mips_ip): Update commentary. Use offset_expr and offset_reloc
333 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
334 Use a temporary array rather than imm_reloc when parsing
335 constant expressions. Remove imm_reloc initialization.
336 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
337 for the relaxable field. Use a relax_char variable to track the
338 type of this field. Remove imm_reloc initialization.
340 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
342 * config/tc-mips.c (mips16_ip): Handle "I".
344 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
346 * config/tc-mips.c (mips_flag_nan2008): New variable.
347 (options): Add OPTION_NAN enum value.
348 (md_longopts): Handle it.
349 (md_parse_option): Likewise.
350 (s_nan): New function.
351 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
352 (md_show_usage): Add -mnan.
354 * doc/as.texinfo (Overview): Add -mnan.
355 * doc/c-mips.texi (MIPS Opts): Document -mnan.
356 (MIPS NaN Encodings): New node. Document .nan directive.
357 (MIPS-Dependent): List the new node.
359 2013-07-09 Tristan Gingold <gingold@adacore.com>
361 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
363 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
365 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
366 for 'A' and assume that the constant has been elided if the result
369 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
371 * config/tc-mips.c (gprel16_reloc_p): New function.
372 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
374 (offset_high_part, small_offset_p): New functions.
375 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
376 register load and store macros, handle the 16-bit offset case first.
377 If a 16-bit offset is not suitable for the instruction we're
378 generating, load it into the temporary register using
379 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
380 M_L_DAB code once the address has been constructed. For double load
381 and store macros, again handle the 16-bit offset case first.
382 If the second register cannot be accessed from the same high
383 part as the first, load it into AT using ADDRESS_ADDI_INSN.
384 Fix the handling of LD in cases where the first register is the
385 same as the base. Also handle the case where the offset is
386 not 16 bits and the second register cannot be accessed from the
387 same high part as the first. For unaligned loads and stores,
388 fuse the offbits == 12 and old "ab" handling. Apply this handling
389 whenever the second offset needs a different high part from the first.
390 Construct the offset using ADDRESS_ADDI_INSN where possible,
391 for offbits == 16 as well as offbits == 12. Use offset_reloc
392 when constructing the individual loads and stores.
393 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
394 and offset_reloc before matching against a particular opcode.
395 Handle elided 'A' constants. Allow 'A' constants to use
396 relocation operators.
398 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
400 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
401 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
402 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
404 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
406 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
407 Require the msb to be <= 31 for "+s". Check that the size is <= 31
408 for both "+s" and "+S".
410 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
412 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
413 (mips_ip, mips16_ip): Handle "+i".
415 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
417 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
418 (micromips_to_32_reg_h_map): Rename to...
419 (micromips_to_32_reg_h_map1): ...this.
420 (micromips_to_32_reg_i_map): Rename to...
421 (micromips_to_32_reg_h_map2): ...this.
422 (mips_lookup_reg_pair): New function.
423 (gpr_write_mask, macro): Adjust after above renaming.
424 (validate_micromips_insn): Remove "mi" handling.
425 (mips_ip): Likewise. Parse both registers in a pair for "mh".
427 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
429 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
430 (mips_ip): Remove "+D" and "+T" handling.
432 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
434 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
437 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
439 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
441 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
443 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
444 (aarch64_force_relocation): Likewise.
446 2013-07-02 Alan Modra <amodra@gmail.com>
448 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
450 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
452 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
453 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
454 Replace @sc{mips16} with literal `MIPS16'.
455 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
457 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
459 * config/tc-aarch64.c (reloc_table): Replace
460 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
461 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
462 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
463 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
464 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
465 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
466 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
467 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
468 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
469 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
470 (aarch64_force_relocation): Likewise.
472 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
474 * config/tc-aarch64.c (ilp32_p): New static variable.
475 (elf64_aarch64_target_format): Return the target according to the
477 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
478 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
479 (aarch64_dwarf2_addr_size): New function.
480 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
481 (DWARF2_ADDR_SIZE): New define.
483 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
485 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
487 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
489 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
491 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
493 * config/tc-mips.c (mips_set_options): Add insn32 member.
494 (mips_opts): Initialize it.
495 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
496 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
497 (md_longopts): Add "minsn32" and "mno-insn32" options.
498 (is_size_valid): Handle insn32 mode.
499 (md_assemble): Pass instruction string down to macro.
500 (brk_fmt): Add second dimension and insn32 mode initializers.
501 (mfhl_fmt): Likewise.
502 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
503 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
504 (macro_build_jalr, move_register): Handle insn32 mode.
505 (macro_build_branch_rs): Likewise.
506 (macro): Handle insn32 mode.
507 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
508 (mips_ip): Handle insn32 mode.
509 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
510 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
511 (mips_handle_align): Handle insn32 mode.
512 (md_show_usage): Add -minsn32 and -mno-insn32.
514 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
516 (-minsn32, -mno-insn32): New options.
517 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
519 (MIPS assembly options): New node. Document .set insn32 and
521 (MIPS-Dependent): List the new node.
523 2013-06-25 Nick Clifton <nickc@redhat.com>
525 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
526 the PC in indirect addressing on 430xv2 parts.
527 (msp430_operands): Add version test to hardware bug encoding
530 2013-06-24 Roland McGrath <mcgrathr@google.com>
532 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
533 so it skips whitespace before it.
534 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
536 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
537 (arm_reg_parse_multi): Skip whitespace first.
538 (parse_reg_list): Likewise.
539 (parse_vfp_reg_list): Likewise.
540 (s_arm_unwind_save_mmxwcg): Likewise.
542 2013-06-24 Nick Clifton <nickc@redhat.com>
545 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
547 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
549 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
551 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
553 * config/tc-mips.c: Assert that offsetT and valueT are at least
555 (GPR_SMIN, GPR_SMAX): New macros.
556 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
558 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
560 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
561 conditions. Remove any code deselected by them.
562 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
564 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
566 * NEWS: Note removal of ECOFF support.
567 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
568 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
569 (MULTI_CFILES): Remove config/e-mipsecoff.c.
570 * Makefile.in: Regenerate.
571 * configure.in: Remove MIPS ECOFF references.
572 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
574 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
575 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
576 (mips-*-*): ...this single case.
577 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
578 MIPS emulations to be e-mipself*.
579 * configure: Regenerate.
580 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
581 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
582 (mips-*-sysv*): Remove coff and ecoff cases.
583 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
584 * ecoff.c: Remove reference to MIPS ECOFF.
585 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
586 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
587 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
588 (mips_hi_fixup): Tweak comment.
589 (append_insn): Require a howto.
590 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
592 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
594 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
595 Use "CPU" instead of "cpu".
596 * doc/c-mips.texi: Likewise.
597 (MIPS Opts): Rename to MIPS Options.
598 (MIPS option stack): Rename to MIPS Option Stack.
599 (MIPS ASE instruction generation overrides): Rename to
600 MIPS ASE Instruction Generation Overrides (for now).
601 (MIPS floating-point): Rename to MIPS Floating-Point.
603 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
605 * doc/c-mips.texi (MIPS Macros): New section.
606 (MIPS Object): Replace with...
607 (MIPS Small Data): ...this new section.
609 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
611 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
612 Capitalize name. Use @kindex instead of @cindex for .set entries.
614 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
616 * doc/c-mips.texi (MIPS Stabs): Remove section.
618 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
620 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
621 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
622 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
623 (ISA_SUPPORTS_VIRT64_ASE): Delete.
624 (mips_ase): New structure.
625 (mips_ases): New table.
626 (FP64_ASES): New macro.
627 (mips_ase_groups): New array.
628 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
629 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
631 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
632 (md_parse_option): Use mips_ases and mips_set_ase instead of
633 separate case statements for each ASE option.
634 (mips_after_parse_args): Use FP64_ASES. Use
635 mips_check_isa_supports_ases to check the ASEs against
637 (s_mipsset): Use mips_ases and mips_set_ase instead of
638 separate if statements for each ASE option. Use
639 mips_check_isa_supports_ases, even when a non-ASE option
642 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
644 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
646 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
648 * config/tc-mips.c (md_shortopts, options, md_longopts)
649 (md_longopts_size): Move earlier in file.
651 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
653 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
654 with a single "ase" bitmask.
655 (mips_opts): Update accordingly.
656 (file_ase, file_ase_explicit): New variables.
657 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
658 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
659 (ISA_HAS_ROR): Adjust for mips_set_options change.
660 (is_opcode_valid): Take the base ase mask directly from mips_opts.
661 (mips_ip): Adjust for mips_set_options change.
662 (md_parse_option): Likewise. Update file_ase_explicit.
663 (mips_after_parse_args): Adjust for mips_set_options change.
664 Use bitmask operations to select the default ASEs. Set file_ase
665 rather than individual per-ASE variables.
666 (s_mipsset): Adjust for mips_set_options change.
667 (mips_elf_final_processing): Test file_ase rather than
668 file_ase_mdmx. Remove commented-out code.
670 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
672 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
673 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
674 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
675 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
676 (mips_after_parse_args): Use the new "ase" field to choose
678 (mips_cpu_info_table): Move ASEs from the "flags" field to the
681 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
683 * config/tc-arm.c (symbol_preemptible): New function.
684 (relax_branch): Use it.
686 2013-06-17 Catherine Moore <clm@codesourcery.com>
687 Maciej W. Rozycki <macro@codesourcery.com>
688 Chao-Ying Fu <fu@mips.com>
690 * config/tc-mips.c (mips_set_options): Add ase_eva.
691 (mips_set_options mips_opts): Add ase_eva.
692 (file_ase_eva): Declare.
693 (ISA_SUPPORTS_EVA_ASE): Define.
694 (IS_SEXT_9BIT_NUM): Define.
695 (MIPS_CPU_ASE_EVA): Define.
696 (is_opcode_valid): Add support for ase_eva.
697 (macro_build): Likewise.
699 (validate_mips_insn): Likewise.
700 (validate_micromips_insn): Likewise.
702 (options): Add OPTION_EVA and OPTION_NO_EVA.
703 (md_longopts): Add -meva and -mno-eva.
704 (md_parse_option): Process new options.
705 (mips_after_parse_args): Check for valid EVA combinations.
706 (s_mipsset): Likewise.
708 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
710 * dwarf2dbg.h (dwarf2_move_insn): Declare.
711 * dwarf2dbg.c (line_subseg): Add pmove_tail.
712 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
713 (dwarf2_gen_line_info_1): Update call accordingly.
714 (dwarf2_move_insn): New function.
715 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
717 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
721 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
724 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
725 (dwarf2_gen_line_info_1): Delete.
726 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
727 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
728 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
729 (dwarf2_directive_loc): Push previous .locs instead of generating
732 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
734 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
735 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
737 2013-06-13 Nick Clifton <nickc@redhat.com>
740 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
741 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
742 function. Generates an error if the adjusted offset is out of a
745 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
747 * config/tc-nios2.c (md_apply_fix): Mask constant
748 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
750 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
752 * config/tc-mips.c (append_insn): Don't do branch relaxation for
753 MIPS-3D instructions either.
754 (md_convert_frag): Update the COPx branch mask accordingly.
756 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
758 * doc/as.texinfo (Overview): Add --relax-branch and
760 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
763 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
765 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
768 2013-06-08 Catherine Moore <clm@codesourcery.com>
770 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
771 (is_opcode_valid_16): Pass ase value to opcode_is_member.
772 (append_insn): Change INSN_xxxx to ASE_xxxx.
774 2013-06-01 George Thomas <george.thomas@atmel.com>
776 * gas/config/tc-avr.c: Change ISA for devices with USB support to
779 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
781 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
784 2013-05-31 Paul Brook <paul@codesourcery.com>
787 * config/tc-mips.c (s_ehword): New.
789 2013-05-30 Paul Brook <paul@codesourcery.com>
791 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
793 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
795 * write.c (resolve_reloc_expr_symbols): On REL targets don't
796 convert relocs who have no relocatable field either. Rephrase
797 the conditional so that the PC-relative check is only applied
800 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
802 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
805 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
807 * config/tc-aarch64.c (reloc_table): Update to use
808 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
809 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
810 (md_apply_fix): Likewise.
811 (aarch64_force_relocation): Likewise.
813 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
815 * config/tc-arm.c (it_fsm_post_encode): Improve
816 warning messages about deprecated IT block formats.
818 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
820 * config/tc-aarch64.c (md_apply_fix): Move value range checking
821 inside fx_done condition.
823 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
825 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
827 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
829 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
830 and clean up warning when using PRINT_OPCODE_TABLE.
832 2013-05-20 Alan Modra <amodra@gmail.com>
834 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
835 and data fixups performing shift/high adjust/sign extension on
836 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
837 when writing data fixups rather than recalculating size.
839 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
841 * doc/c-msp430.texi: Fix typo.
843 2013-05-16 Tristan Gingold <gingold@adacore.com>
845 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
846 are also TOC symbols.
848 2013-05-16 Nick Clifton <nickc@redhat.com>
850 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
851 Add -mcpu command to specify core type.
852 * doc/c-msp430.texi: Update documentation.
854 2013-05-09 Andrew Pinski <apinski@cavium.com>
856 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
857 (mips_opts): Update for the new field.
858 (file_ase_virt): New variable.
859 (ISA_SUPPORTS_VIRT_ASE): New macro.
860 (ISA_SUPPORTS_VIRT64_ASE): New macro.
861 (MIPS_CPU_ASE_VIRT): New define.
862 (is_opcode_valid): Handle ase_virt.
863 (macro_build): Handle "+J".
864 (validate_mips_insn): Likewise.
866 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
867 (md_longopts): Add mvirt and mnovirt
868 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
869 (mips_after_parse_args): Handle ase_virt field.
870 (s_mipsset): Handle "virt" and "novirt".
871 (mips_elf_final_processing): Add a comment about virt ASE might need
873 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
874 * doc/c-mips.texi: Document -mvirt and -mno-virt.
875 Document ".set virt" and ".set novirt".
877 2013-05-09 Alan Modra <amodra@gmail.com>
879 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
880 control of operand flag bits.
882 2013-05-07 Alan Modra <amodra@gmail.com>
884 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
885 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
886 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
887 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
888 (md_apply_fix): Set fx_no_overflow for assorted relocations.
889 Shift and sign-extend fieldval for use by some VLE reloc
890 operand->insert functions.
892 2013-05-06 Paul Brook <paul@codesourcery.com>
893 Catherine Moore <clm@codesourcery.com>
895 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
896 (limited_pcrel_reloc_p): Likewise.
897 (md_apply_fix): Likewise.
898 (tc_gen_reloc): Likewise.
900 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
902 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
903 (mips_fix_adjustable): Adjust pc-relative check to use
906 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
908 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
909 (s_mips_stab): Do not restrict to stabn only.
911 2013-05-02 Nick Clifton <nickc@redhat.com>
913 * config/tc-msp430.c: Add support for the MSP430X architecture.
914 Add code to insert a NOP instruction after any instruction that
915 might change the interrupt state.
916 Add support for the LARGE memory model.
917 Add code to initialise the .MSP430.attributes section.
918 * config/tc-msp430.h: Add support for the MSP430X architecture.
919 * doc/c-msp430.texi: Document the new -mL and -mN command line
921 * NEWS: Mention support for the MSP430X architecture.
923 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
925 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
926 alpha*-*-linux*ecoff*.
928 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
930 * config/tc-mips.c (mips_ip): Add sizelo.
931 For "+C", "+G", and "+H", set sizelo and compare against it.
933 2013-04-29 Nick Clifton <nickc@redhat.com>
935 * as.c (Options): Add -gdwarf-sections.
936 (parse_args): Likewise.
937 * as.h (flag_dwarf_sections): Declare.
938 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
939 (process_entries): When -gdwarf-sections is enabled generate
940 fragmentary .debug_line sections.
941 (out_debug_line): Set the section for the .debug_line section end
943 * doc/as.texinfo: Document -gdwarf-sections.
944 * NEWS: Mention -gdwarf-sections.
946 2013-04-26 Christian Groessler <chris@groessler.org>
948 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
949 according to the target parameter. Don't call s_segm since s_segm
950 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
952 (md_begin): Call s_segm according to target parameter from command
955 2013-04-25 Alan Modra <amodra@gmail.com>
957 * configure.in: Allow little-endian linux.
958 * configure: Regenerate.
960 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
962 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
963 "fstatus" control register to "eccinj".
965 2013-04-19 Kai Tietz <ktietz@redhat.com>
967 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
969 2013-04-15 Julian Brown <julian@codesourcery.com>
971 * expr.c (add_to_result, subtract_from_result): Make global.
972 * expr.h (add_to_result, subtract_from_result): Add prototypes.
973 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
974 subtract_from_result to handle extra bit of precision for .sleb128
977 2013-04-10 Julian Brown <julian@codesourcery.com>
979 * read.c (convert_to_bignum): Add sign parameter. Use it
980 instead of X_unsigned to determine sign of resulting bignum.
981 (emit_expr): Pass extra argument to convert_to_bignum.
982 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
983 X_extrabit to convert_to_bignum.
984 (parse_bitfield_cons): Set X_extrabit.
985 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
986 Initialise X_extrabit field as appropriate.
987 (add_to_result): New.
988 (subtract_from_result): New.
990 * expr.h (expressionS): Add X_extrabit field.
992 2013-04-10 Jan Beulich <jbeulich@suse.com>
994 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
995 register being PC when is_t or writeback, and use distinct
996 diagnostic for the latter case.
998 2013-04-10 Jan Beulich <jbeulich@suse.com>
1000 * gas/config/tc-arm.c (parse_operands): Re-write
1001 po_barrier_or_imm().
1002 (do_barrier): Remove bogus constraint().
1003 (do_t_barrier): Remove.
1005 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1007 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1008 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1010 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1012 2013-04-09 Jan Beulich <jbeulich@suse.com>
1014 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1015 Use local variable Rt in more places.
1016 (do_vmsr): Accept all control registers.
1018 2013-04-09 Jan Beulich <jbeulich@suse.com>
1020 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1021 if there was none specified for moves between scalar and core
1024 2013-04-09 Jan Beulich <jbeulich@suse.com>
1026 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1027 NEON_ALL_LANES case.
1029 2013-04-08 Jan Beulich <jbeulich@suse.com>
1031 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1034 2013-04-08 Jan Beulich <jbeulich@suse.com>
1036 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1039 2013-04-03 Alan Modra <amodra@gmail.com>
1041 * doc/as.texinfo: Add support to generate man options for h8300.
1042 * doc/c-h8300.texi: Likewise.
1044 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1046 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1049 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1052 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1054 2013-03-26 Nick Clifton <nickc@redhat.com>
1057 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1058 start of the file each time.
1061 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1064 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1066 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1069 2013-03-21 Will Newton <will.newton@linaro.org>
1071 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1072 pc-relative str instructions in Thumb mode.
1074 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1076 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1077 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1079 * config/tc-h8300.h: Remove duplicated defines.
1081 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1084 * tc-avr.c (mcu_has_3_byte_pc): New function.
1085 (tc_cfi_frame_initial_instructions): Call it to find return
1088 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1091 * config/tc-tic6x.c (tic6x_try_encode): Handle
1092 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1093 encode register pair numbers when required.
1095 2013-03-15 Will Newton <will.newton@linaro.org>
1097 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1098 in vstr in Thumb mode for pre-ARMv7 cores.
1100 2013-03-14 Andreas Schwab <schwab@suse.de>
1102 * doc/c-arc.texi (ARC Directives): Revert last change and use
1103 @itemize instead of @table.
1104 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1106 2013-03-14 Nick Clifton <nickc@redhat.com>
1109 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1110 NULL message, instead just check ARM_CPU_IS_ANY directly.
1112 2013-03-14 Nick Clifton <nickc@redhat.com>
1115 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1117 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1118 to the @item directives.
1119 (ARM-Neon-Alignment): Move to correct place in the document.
1120 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1122 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1125 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1127 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1128 case. Add default BAD_CASE to switch.
1130 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1132 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1133 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1135 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1137 * config/tc-arm.c (crc_ext_armv8): New feature set.
1138 (UNPRED_REG): New macro.
1139 (do_crc32_1): New function.
1140 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1141 do_crc32ch, do_crc32cw): Likewise.
1143 (insns): Add entries for crc32 mnemonics.
1144 (arm_extensions): Add entry for crc.
1146 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1148 * write.h (struct fix): Add fx_dot_frag field.
1149 (dot_frag): Declare.
1150 * write.c (dot_frag): New variable.
1151 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1152 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1153 * expr.c (expr): Save value of frag_now in dot_frag when setting
1155 * read.c (emit_expr): Likewise. Delete comments.
1157 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1159 * config/tc-i386.c (flag_code_names): Removed.
1160 (i386_index_check): Rewrote.
1162 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1164 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1166 (aarch64_double_precision_fmovable): New function.
1167 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1168 function; handle hexadecimal representation of IEEE754 encoding.
1169 (parse_operands): Update the call to parse_aarch64_imm_float.
1171 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1173 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1174 (check_hle): Updated.
1175 (md_assemble): Likewise.
1176 (parse_insn): Likewise.
1178 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1180 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1181 (md_assemble): Check if REP prefix is OK.
1182 (parse_insn): Remove expecting_string_instruction. Set
1185 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1187 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1189 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1191 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1192 for system registers.
1194 2013-02-27 DJ Delorie <dj@redhat.com>
1196 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1197 (rl78_op): Handle %code().
1198 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1199 (tc_gen_reloc): Likwise; convert to a computed reloc.
1200 (md_apply_fix): Likewise.
1202 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1204 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1206 2013-02-25 Terry Guo <terry.guo@arm.com>
1208 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1209 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1210 list of accepted CPUs.
1212 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1215 * config/tc-i386.c (cpu_arch): Add ".smap".
1217 * doc/c-i386.texi: Document smap.
1219 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1221 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1222 mips_assembling_insn appropriately.
1223 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1225 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1227 * config/tc-mips.c (append_insn): Correct indentation, remove
1230 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1232 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1234 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1236 * configure.tgt: Add nios2-*-rtems*.
1238 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1240 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1243 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1245 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1246 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1248 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1250 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1253 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1254 Andrew Jenner <andrew@codesourcery.com>
1256 Based on patches from Altera Corporation.
1258 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1259 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1260 * Makefile.in: Regenerated.
1261 * configure.tgt: Add case for nios2*-linux*.
1262 * config/obj-elf.c: Conditionally include elf/nios2.h.
1263 * config/tc-nios2.c: New file.
1264 * config/tc-nios2.h: New file.
1265 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1266 * doc/Makefile.in: Regenerated.
1267 * doc/all.texi: Set NIOSII.
1268 * doc/as.texinfo (Overview): Add Nios II options.
1269 (Machine Dependencies): Include c-nios2.texi.
1270 * doc/c-nios2.texi: New file.
1271 * NEWS: Note Altera Nios II support.
1273 2013-02-06 Alan Modra <amodra@gmail.com>
1276 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1277 Don't skip fixups with fx_subsy non-NULL.
1278 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1279 with fx_subsy non-NULL.
1281 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1283 * doc/c-metag.texi: Add "@c man" markers.
1285 2013-02-04 Alan Modra <amodra@gmail.com>
1287 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1289 (TC_ADJUST_RELOC_COUNT): Delete.
1290 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1292 2013-02-04 Alan Modra <amodra@gmail.com>
1294 * po/POTFILES.in: Regenerate.
1296 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1298 * config/tc-metag.c: Make SWAP instruction less permissive with
1301 2013-01-29 DJ Delorie <dj@redhat.com>
1303 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1304 relocs in .word/.etc statements.
1306 2013-01-29 Roland McGrath <mcgrathr@google.com>
1308 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1309 immediate value for 8-bit offset" error so it shows line info.
1311 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1313 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1316 2013-01-24 Nick Clifton <nickc@redhat.com>
1318 * config/tc-v850.c: Add support for e3v5 architecture.
1319 * doc/c-v850.texi: Mention new support.
1321 2013-01-23 Nick Clifton <nickc@redhat.com>
1324 * config/tc-avr.c: Include dwarf2dbg.h.
1326 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1328 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1329 (tc_i386_fix_adjustable): Likewise.
1330 (lex_got): Likewise.
1331 (tc_gen_reloc): Likewise.
1333 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1335 * config/tc-aarch64.c (output_operand_error_record): Change to output
1336 the out-of-range error message as value-expected message if there is
1337 only one single value in the expected range.
1338 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1339 LSL #0 as a programmer-friendly feature.
1341 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1343 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1344 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1345 BFD_RELOC_64_SIZE relocations.
1346 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1348 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1349 relocations against local symbols.
1351 2013-01-16 Alan Modra <amodra@gmail.com>
1353 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1354 finding some sort of toc syntax error, and break to avoid
1355 compiler uninit warning.
1357 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1360 * config/tc-i386.c (lex_got): Increment length by 1 if the
1361 relocation token is removed.
1363 2013-01-15 Nick Clifton <nickc@redhat.com>
1365 * config/tc-v850.c (md_assemble): Allow signed values for
1368 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1370 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1373 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1375 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1376 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1377 * config/tc-ppc.c (md_show_usage): Likewise.
1378 (ppc_handle_align): Handle power8's group ending nop.
1380 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1382 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1383 that the assember exits after the opcodes have been printed.
1385 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1387 * app.c: Remove trailing white spaces.
1391 * dw2gencfi.c: Likewise.
1392 * dwarf2dbg.h: Likewise.
1393 * ecoff.c: Likewise.
1394 * input-file.c: Likewise.
1395 * itbl-lex.h: Likewise.
1396 * output-file.c: Likewise.
1399 * subsegs.c: Likewise.
1400 * symbols.c: Likewise.
1401 * write.c: Likewise.
1402 * config/tc-i386.c: Likewise.
1403 * doc/Makefile.am: Likewise.
1404 * doc/Makefile.in: Likewise.
1405 * doc/c-aarch64.texi: Likewise.
1406 * doc/c-alpha.texi: Likewise.
1407 * doc/c-arc.texi: Likewise.
1408 * doc/c-arm.texi: Likewise.
1409 * doc/c-avr.texi: Likewise.
1410 * doc/c-bfin.texi: Likewise.
1411 * doc/c-cr16.texi: Likewise.
1412 * doc/c-d10v.texi: Likewise.
1413 * doc/c-d30v.texi: Likewise.
1414 * doc/c-h8300.texi: Likewise.
1415 * doc/c-hppa.texi: Likewise.
1416 * doc/c-i370.texi: Likewise.
1417 * doc/c-i386.texi: Likewise.
1418 * doc/c-i860.texi: Likewise.
1419 * doc/c-m32c.texi: Likewise.
1420 * doc/c-m32r.texi: Likewise.
1421 * doc/c-m68hc11.texi: Likewise.
1422 * doc/c-m68k.texi: Likewise.
1423 * doc/c-microblaze.texi: Likewise.
1424 * doc/c-mips.texi: Likewise.
1425 * doc/c-msp430.texi: Likewise.
1426 * doc/c-mt.texi: Likewise.
1427 * doc/c-s390.texi: Likewise.
1428 * doc/c-score.texi: Likewise.
1429 * doc/c-sh.texi: Likewise.
1430 * doc/c-sh64.texi: Likewise.
1431 * doc/c-tic54x.texi: Likewise.
1432 * doc/c-tic6x.texi: Likewise.
1433 * doc/c-v850.texi: Likewise.
1434 * doc/c-xc16x.texi: Likewise.
1435 * doc/c-xgate.texi: Likewise.
1436 * doc/c-xtensa.texi: Likewise.
1437 * doc/c-z80.texi: Likewise.
1438 * doc/internals.texi: Likewise.
1440 2013-01-10 Roland McGrath <mcgrathr@google.com>
1442 * hash.c (hash_new_sized): Make it global.
1443 * hash.h: Declare it.
1444 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1447 2013-01-10 Will Newton <will.newton@imgtec.com>
1449 * Makefile.am: Add Meta.
1450 * Makefile.in: Regenerate.
1451 * config/tc-metag.c: New file.
1452 * config/tc-metag.h: New file.
1453 * configure.tgt: Add Meta.
1454 * doc/Makefile.am: Add Meta.
1455 * doc/Makefile.in: Regenerate.
1456 * doc/all.texi: Add Meta.
1457 * doc/as.texiinfo: Document Meta options.
1458 * doc/c-metag.texi: New file.
1460 2013-01-09 Steve Ellcey <sellcey@mips.com>
1462 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1464 * config/tc-mips.c (internalError): Remove, replace with abort.
1466 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1468 * config/tc-aarch64.c (parse_operands): Change to compare the result
1469 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1471 2013-01-07 Nick Clifton <nickc@redhat.com>
1474 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1475 anticipated character.
1476 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1477 here as it is no longer needed.
1479 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1481 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1482 * doc/c-score.texi (SCORE-Opts): Likewise.
1483 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1485 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1487 * config/tc-mips.c: Add support for MIPS r5900.
1488 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1490 (can_swap_branch_p, get_append_method): Detect some conditional
1491 short loops to fix a bug on the r5900 by NOP in the branch delay
1493 (M_MUL): Support 3 operands in multu on r5900.
1494 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1495 (s_mipsset): Force 32 bit floating point on r5900.
1496 (mips_ip): Check parameter range of instructions mfps and mtps on
1498 * configure.in: Detect CPU type when target string contains r5900
1499 (e.g. mips64r5900el-linux-gnu).
1501 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1503 * as.c (parse_args): Update copyright year to 2013.
1505 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1507 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1510 2013-01-02 Nick Clifton <nickc@redhat.com>
1513 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1516 For older changes see ChangeLog-2012
1518 Copyright (C) 2013 Free Software Foundation, Inc.
1520 Copying and distribution of this file, with or without modification,
1521 are permitted in any medium without royalty provided the copyright
1522 notice and this notice are preserved.
1528 version-control: never