1 2006-09-13 Alan Modra <amodra@bigpond.net.au>
4 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
7 2006-09-13 Alan Modra <amodra@bigpond.net.au>
9 * input-file.c (input_file_open): Replace as_perror with as_bad
10 so that gas exits with error on file errors. Correct error
12 (input_file_get, input_file_give_next_buffer): Likewise.
13 * input-file.h: Update comment.
15 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
18 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
19 registers as a sub-class of wC registers.
21 2006-09-11 Alan Modra <amodra@bigpond.net.au>
24 * config/tc-mips.h (enum dwarf2_format): Forward declare.
25 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
26 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
27 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
29 2006-09-08 Nick Clifton <nickc@redhat.com>
32 * doc/as.texinfo (Macro): Improve documentation about separating
33 macro arguments from following text.
35 2006-09-08 Paul Brook <paul@codesourcery.com>
37 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
39 2006-09-07 Paul Brook <paul@codesourcery.com>
41 * config/tc-arm.c (parse_operands): Mark operand as present.
43 2006-09-04 Paul Brook <paul@codesourcery.com>
45 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
46 (do_neon_dyadic_if_i_d): Avoid setting U bit.
47 (do_neon_mac_maybe_scalar): Ditto.
48 (do_neon_dyadic_narrow): Force operand type to NT_integer.
49 (insns): Remove out of date comments.
51 2006-08-29 Nick Clifton <nickc@redhat.com>
53 * read.c (s_align): Initialize the 'stopc' variable to prevent
54 compiler complaints about it being used without being
56 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
57 s_float_space, s_struct, cons_worker, equals): Likewise.
59 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
61 * ecoff.c (ecoff_directive_val): Fix message typo.
62 * config/tc-ns32k.c (convert_iif): Likewise.
63 * config/tc-sh64.c (shmedia_check_limits): Likewise.
65 2006-08-25 Sterling Augustine <sterling@tensilica.com>
66 Bob Wilson <bob.wilson@acm.org>
68 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
69 the state of the absolute_literals directive. Remove align frag at
70 the start of the literal pool position.
72 2006-08-25 Bob Wilson <bob.wilson@acm.org>
74 * doc/c-xtensa.texi: Add @group commands in examples.
76 2006-08-24 Bob Wilson <bob.wilson@acm.org>
78 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
79 (INIT_LITERAL_SECTION_NAME): Delete.
80 (lit_state struct): Remove segment names, init_lit_seg, and
81 fini_lit_seg. Add lit_prefix and current_text_seg.
82 (init_literal_head_h, init_literal_head): Delete.
83 (fini_literal_head_h, fini_literal_head): Delete.
84 (xtensa_begin_directive): Move argument parsing to
85 xtensa_literal_prefix function.
86 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
87 (xtensa_literal_prefix): Parse the directive argument here and
88 record it in the lit_prefix field. Remove code to derive literal
91 (get_is_linkonce_section): Use linkonce_len. Check for any
92 ".gnu.linkonce.*" section, not just text sections.
93 (md_begin): Remove initialization of deleted lit_state fields.
94 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
95 to init_literal_head and fini_literal_head.
96 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
97 when traversing literal_head list.
98 (match_section_group): New.
99 (cache_literal_section): Rewrite to determine the literal section
100 name on the fly, create the section and return it.
101 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
102 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
103 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
104 Use xtensa_get_property_section from bfd.
105 (retrieve_xtensa_section): Delete.
106 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
107 description to refer to plural literal sections and add xref to
108 the Literal Directive section.
109 (Literal Directive): Describe new rules for deriving literal section
110 names. Add footnote for special case of .init/.fini with
111 --text-section-literals.
112 (Literal Prefix Directive): Replace old naming rules with xref to the
113 Literal Directive section.
115 2006-08-21 Joseph Myers <joseph@codesourcery.com>
117 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
118 merging with previous long opcode.
120 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
122 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
123 * Makefile.in: Regenerate.
124 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
127 2006-08-16 Julian Brown <julian@codesourcery.com>
129 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
130 to use ARM instructions on non-ARM-supporting cores.
131 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
132 mode automatically based on cpu variant.
133 (md_begin): Call above function.
135 2006-08-16 Julian Brown <julian@codesourcery.com>
137 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
138 recognized in non-unified syntax mode.
140 2006-08-15 Thiemo Seufer <ths@mips.com>
141 Nigel Stephens <nigel@mips.com>
142 David Ung <davidu@mips.com>
144 * configure.tgt: Handle mips*-sde-elf*.
146 2006-08-12 Thiemo Seufer <ths@networkno.de>
148 * config/tc-mips.c (mips16_ip): Fix argument register handling
149 for restore instruction.
151 2006-08-08 Bob Wilson <bob.wilson@acm.org>
153 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
155 (out_fixed_inc_line_addr): New.
156 (process_entries): Use out_fixed_inc_line_addr when
157 DWARF2_USE_FIXED_ADVANCE_PC is set.
158 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
160 2006-08-08 DJ Delorie <dj@redhat.com>
162 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
163 vs full symbols so that we never have more than one pointer value
164 for any given symbol in our symbol table.
166 2006-08-08 Sterling Augustine <sterling@tensilica.com>
168 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
169 and emit DW_AT_ranges when code in compilation unit is not
171 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
173 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
174 (out_debug_ranges): New function to emit .debug_ranges section
175 when code is not contiguous.
177 2006-08-08 Nick Clifton <nickc@redhat.com>
179 * config/tc-arm.c (WARN_DEPRECATED): Enable.
181 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
183 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
185 (pe_directive_secrel) [TE_PE]: New function.
186 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
187 loc, loc_mark_labels.
188 [TE_PE]: Handle secrel32.
189 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
191 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
192 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
193 (md_section_align): Only round section sizes here for AOUT
195 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
196 (tc_pe_dwarf2_emit_offset): New function.
197 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
198 (cons_fix_new_arm): Handle O_secrel.
199 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
200 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
201 of OBJ_ELF only block.
202 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
203 tc_pe_dwarf2_emit_offset.
205 2006-08-04 Richard Sandiford <richard@codesourcery.com>
207 * config/tc-sh.c (apply_full_field_fix): New function.
208 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
209 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
210 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
211 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
213 2006-08-03 Nick Clifton <nickc@redhat.com>
216 * config.in: Regenerate.
218 2006-08-03 Joseph Myers <joseph@codesourcery.com>
220 * config/tc-arm.c (parse_operands): Handle invalid register name
223 2006-08-03 Joseph Myers <joseph@codesourcery.com>
225 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
226 (parse_operands): Handle it.
227 (insns): Use it for tmcr and tmrc.
229 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
232 * config/tc-i386.c (md_parse_option): Treat any target starting
233 with elf64_x86_64 as a viable target for the -64 switch.
234 (i386_target_format): For 64-bit ELF flavoured output use
236 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
238 2006-08-02 Nick Clifton <nickc@redhat.com>
241 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
243 * configure.in: Run BFD_BINARY_FOPEN.
244 * configure: Regenerate.
245 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
248 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
250 * config/tc-i386.c (md_assemble): Don't update
253 2006-08-01 Thiemo Seufer <ths@mips.com>
255 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
257 2006-08-01 Thiemo Seufer <ths@mips.com>
259 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
260 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
261 BFD_RELOC_32 and BFD_RELOC_16.
262 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
263 md_convert_frag, md_obj_end): Fix comment formatting.
265 2006-07-31 Thiemo Seufer <ths@mips.com>
267 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
268 handling for BFD_RELOC_MIPS16_JMP.
270 2006-07-24 Andreas Schwab <schwab@suse.de>
273 * read.c (read_a_source_file): Ignore unknown text after line
274 comment character. Fix misleading comment.
276 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
278 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
279 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
280 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
281 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
282 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
283 doc/c-z80.texi, doc/internals.texi: Fix some typos.
285 2006-07-21 Nick Clifton <nickc@redhat.com>
287 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
290 2006-07-20 Thiemo Seufer <ths@mips.com>
291 Nigel Stephens <nigel@mips.com>
293 * config/tc-mips.c (md_parse_option): Don't infer optimisation
294 options from debug options.
296 2006-07-20 Thiemo Seufer <ths@mips.com>
298 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
299 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
301 2006-07-19 Paul Brook <paul@codesourcery.com>
303 * config/tc-arm.c (insns): Fix rbit Arm opcode.
305 2006-07-18 Paul Brook <paul@codesourcery.com>
307 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
308 (md_convert_frag): Use correct reloc for add_pc. Use
309 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
310 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
311 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
313 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
315 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
316 when file and line unknown.
318 2006-07-17 Thiemo Seufer <ths@mips.com>
320 * read.c (s_struct): Use IS_ELF.
321 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
322 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
323 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
324 s_mips_mask): Likewise.
326 2006-07-16 Thiemo Seufer <ths@mips.com>
327 David Ung <davidu@mips.com>
329 * read.c (s_struct): Handle ELF section changing.
330 * config/tc-mips.c (s_align): Leave enabling auto-align to the
332 (s_change_sec): Try section changing only if we output ELF.
334 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
336 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
338 (smallest_imm_type): Remove Cpu086.
339 (i386_target_format): Likewise.
341 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
344 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
345 Michael Meissner <michael.meissner@amd.com>
347 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
348 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
349 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
351 (i386_align_code): Ditto.
352 (md_assemble_code): Add support for insertq/extrq instructions,
353 swapping as needed for intel syntax.
354 (swap_imm_operands): New function to swap immediate operands.
355 (swap_operands): Deal with 4 operand instructions.
356 (build_modrm_byte): Add support for insertq instruction.
358 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
360 * config/tc-i386.h (Size64): Fix a typo in comment.
362 2006-07-12 Nick Clifton <nickc@redhat.com>
364 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
365 fixup_segment() to repeat a range check on a value that has
366 already been checked here.
368 2006-07-07 James E Wilson <wilson@specifix.com>
370 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
372 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
373 Nick Clifton <nickc@redhat.com>
376 * doc/as.texi: Fix spelling typo: branchs => branches.
377 * doc/c-m68hc11.texi: Likewise.
378 * config/tc-m68hc11.c: Likewise.
379 Support old spelling of command line switch for backwards
382 2006-07-04 Thiemo Seufer <ths@mips.com>
383 David Ung <davidu@mips.com>
385 * config/tc-mips.c (s_is_linkonce): New function.
386 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
387 weak, external, and linkonce symbols.
388 (pic_need_relax): Use s_is_linkonce.
390 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
392 * doc/as.texinfo (Org): Remove space.
393 (P2align): Add "@var{abs-expr},".
395 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
397 * config/tc-i386.c (cpu_arch_tune_set): New.
398 (cpu_arch_isa): Likewise.
399 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
400 nops with short or long nop sequences based on -march=/.arch
402 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
403 set cpu_arch_tune and cpu_arch_tune_flags.
404 (md_parse_option): For -march=, set cpu_arch_isa and set
405 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
406 0. Set cpu_arch_tune_set to 1 for -mtune=.
407 (i386_target_format): Don't set cpu_arch_tune.
409 2006-06-23 Nigel Stephens <nigel@mips.com>
411 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
412 generated .sbss.* and .gnu.linkonce.sb.*.
414 2006-06-23 Thiemo Seufer <ths@mips.com>
415 David Ung <davidu@mips.com>
417 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
419 * config/tc-mips.c (label_list): Define per-segment label_list.
420 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
421 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
422 mips_from_file_after_relocs, mips_define_label): Use per-segment
425 2006-06-22 Thiemo Seufer <ths@mips.com>
427 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
428 (append_insn): Use it.
429 (md_apply_fix): Whitespace formatting.
430 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
431 mips16_extended_frag): Remove register specifier.
432 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
435 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
437 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
438 a directive saving VFP registers for ARMv6 or later.
439 (s_arm_unwind_save): Add parameter arch_v6 and call
440 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
442 (md_pseudo_table): Add entry for new "vsave" directive.
443 * doc/c-arm.texi: Correct error in example for "save"
444 directive (fstmdf -> fstmdx). Also document "vsave" directive.
446 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
447 Anatoly Sokolov <aesok@post.ru>
449 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
450 and atmega644p devices. Rename atmega164/atmega324 devices to
451 atmega164p/atmega324p.
452 * doc/c-avr.texi: Document new mcu and arch options.
454 2006-06-17 Nick Clifton <nickc@redhat.com>
456 * config/tc-arm.c (enum parse_operand_result): Move outside of
457 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
459 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
461 * config/tc-i386.h (processor_type): New.
462 (arch_entry): Add type.
464 * config/tc-i386.c (cpu_arch_tune): New.
465 (cpu_arch_tune_flags): Likewise.
466 (cpu_arch_isa_flags): Likewise.
468 (set_cpu_arch): Also update cpu_arch_isa_flags.
469 (md_assemble): Update cpu_arch_isa_flags.
471 (OPTION_MTUNE): Likewise.
472 (md_longopts): Add -march= and -mtune=.
473 (md_parse_option): Support -march= and -mtune=.
474 (md_show_usage): Add -march=CPU/-mtune=CPU.
475 (i386_target_format): Also update cpu_arch_isa_flags,
476 cpu_arch_tune and cpu_arch_tune_flags.
478 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
480 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
482 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
484 * config/tc-arm.c (enum parse_operand_result): New.
485 (struct group_reloc_table_entry): New.
486 (enum group_reloc_type): New.
487 (group_reloc_table): New array.
488 (find_group_reloc_table_entry): New function.
489 (parse_shifter_operand_group_reloc): New function.
490 (parse_address_main): New function, incorporating code
491 from the old parse_address function. To be used via...
492 (parse_address): wrapper for parse_address_main; and
493 (parse_address_group_reloc): new function, likewise.
494 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
495 OP_ADDRGLDRS, OP_ADDRGLDC.
496 (parse_operands): Support for these new operand codes.
497 New macro po_misc_or_fail_no_backtrack.
498 (encode_arm_cp_address): Preserve group relocations.
499 (insns): Modify to use the above operand codes where group
500 relocations are permitted.
501 (md_apply_fix): Handle the group relocations
502 ALU_PC_G0_NC through LDC_SB_G2.
503 (tc_gen_reloc): Likewise.
504 (arm_force_relocation): Leave group relocations for the linker.
505 (arm_fix_adjustable): Likewise.
507 2006-06-15 Julian Brown <julian@codesourcery.com>
509 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
510 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
513 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
515 * config/tc-i386.c (process_suffix): Don't add rex64 for
518 2006-06-09 Thiemo Seufer <ths@mips.com>
520 * config/tc-mips.c (mips_ip): Maintain argument count.
522 2006-06-09 Alan Modra <amodra@bigpond.net.au>
524 * config/tc-iq2000.c: Include sb.h.
526 2006-06-08 Nigel Stephens <nigel@mips.com>
528 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
529 aliases for better compatibility with SGI tools.
531 2006-06-08 Alan Modra <amodra@bigpond.net.au>
533 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
534 * Makefile.am (GASLIBS): Expand @BFDLIB@.
536 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
537 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
538 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
540 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
541 * Makefile.in: Regenerate.
542 * doc/Makefile.in: Regenerate.
543 * configure: Regenerate.
545 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
547 * po/Make-in (pdf, ps): New dummy targets.
549 2006-06-07 Julian Brown <julian@codesourcery.com>
551 * config/tc-arm.c (stdarg.h): include.
552 (arm_it): Add uncond_value field. Add isvec and issingle to operand
554 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
555 REG_TYPE_NSDQ (single, double or quad vector reg).
556 (reg_expected_msgs): Update.
557 (BAD_FPU): Add macro for unsupported FPU instruction error.
558 (parse_neon_type): Support 'd' as an alias for .f64.
559 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
561 (parse_vfp_reg_list): Don't update first arg on error.
562 (parse_neon_mov): Support extra syntax for VFP moves.
563 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
564 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
565 (parse_operands): Support isvec, issingle operands fields, new parse
567 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
569 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
570 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
571 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
572 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
574 (neon_shape): Redefine in terms of above.
575 (neon_shape_class): New enumeration, table of shape classes.
576 (neon_shape_el): New enumeration. One element of a shape.
577 (neon_shape_el_size): Register widths of above, where appropriate.
578 (neon_shape_info): New struct. Info for shape table.
579 (neon_shape_tab): New array.
580 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
581 (neon_check_shape): Rewrite as...
582 (neon_select_shape): New function to classify instruction shapes,
583 driven by new table neon_shape_tab array.
584 (neon_quad): New function. Return 1 if shape should set Q flag in
585 instructions (or equivalent), 0 otherwise.
586 (type_chk_of_el_type): Support F64.
587 (el_type_of_type_chk): Likewise.
588 (neon_check_type): Add support for VFP type checking (VFP data
589 elements fill their containing registers).
590 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
591 in thumb mode for VFP instructions.
592 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
593 and encode the current instruction as if it were that opcode.
594 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
595 arguments, call function in PFN.
596 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
597 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
598 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
599 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
600 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
601 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
602 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
603 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
604 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
605 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
606 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
607 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
608 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
609 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
610 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
612 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
613 between VFP and Neon turns out to belong to Neon. Perform
614 architecture check and fill in condition field if appropriate.
615 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
616 (do_neon_cvt): Add support for VFP variants of instructions.
617 (neon_cvt_flavour): Extend to cover VFP conversions.
618 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
620 (do_neon_ldr_str): Handle single-precision VFP load/store.
621 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
622 NS_NULL not NS_IGNORE.
623 (opcode_tag): Add OT_csuffixF for operands which either take a
624 conditional suffix, or have 0xF in the condition field.
625 (md_assemble): Add support for OT_csuffixF.
626 (NCE): Replace macro with...
627 (NCE_tag, NCE, NCEF): New macros.
628 (nCE): Replace macro with...
629 (nCE_tag, nCE, nCEF): New macros.
630 (insns): Add support for VFP insns or VFP versions of insns msr,
631 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
632 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
633 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
634 VFP/Neon insns together.
636 2006-06-07 Alan Modra <amodra@bigpond.net.au>
637 Ladislav Michl <ladis@linux-mips.org>
639 * app.c: Don't include headers already included by as.h.
641 * atof-generic.c: Likewise.
643 * dwarf2dbg.c: Likewise.
645 * input-file.c: Likewise.
646 * input-scrub.c: Likewise.
648 * output-file.c: Likewise.
651 * config/bfin-lex.l: Likewise.
652 * config/obj-coff.h: Likewise.
653 * config/obj-elf.h: Likewise.
654 * config/obj-som.h: Likewise.
655 * config/tc-arc.c: Likewise.
656 * config/tc-arm.c: Likewise.
657 * config/tc-avr.c: Likewise.
658 * config/tc-bfin.c: Likewise.
659 * config/tc-cris.c: Likewise.
660 * config/tc-d10v.c: Likewise.
661 * config/tc-d30v.c: Likewise.
662 * config/tc-dlx.h: Likewise.
663 * config/tc-fr30.c: Likewise.
664 * config/tc-frv.c: Likewise.
665 * config/tc-h8300.c: Likewise.
666 * config/tc-hppa.c: Likewise.
667 * config/tc-i370.c: Likewise.
668 * config/tc-i860.c: Likewise.
669 * config/tc-i960.c: Likewise.
670 * config/tc-ip2k.c: Likewise.
671 * config/tc-iq2000.c: Likewise.
672 * config/tc-m32c.c: Likewise.
673 * config/tc-m32r.c: Likewise.
674 * config/tc-maxq.c: Likewise.
675 * config/tc-mcore.c: Likewise.
676 * config/tc-mips.c: Likewise.
677 * config/tc-mmix.c: Likewise.
678 * config/tc-mn10200.c: Likewise.
679 * config/tc-mn10300.c: Likewise.
680 * config/tc-msp430.c: Likewise.
681 * config/tc-mt.c: Likewise.
682 * config/tc-ns32k.c: Likewise.
683 * config/tc-openrisc.c: Likewise.
684 * config/tc-ppc.c: Likewise.
685 * config/tc-s390.c: Likewise.
686 * config/tc-sh.c: Likewise.
687 * config/tc-sh64.c: Likewise.
688 * config/tc-sparc.c: Likewise.
689 * config/tc-tic30.c: Likewise.
690 * config/tc-tic4x.c: Likewise.
691 * config/tc-tic54x.c: Likewise.
692 * config/tc-v850.c: Likewise.
693 * config/tc-vax.c: Likewise.
694 * config/tc-xc16x.c: Likewise.
695 * config/tc-xstormy16.c: Likewise.
696 * config/tc-xtensa.c: Likewise.
697 * config/tc-z80.c: Likewise.
698 * config/tc-z8k.c: Likewise.
699 * macro.h: Don't include sb.h or ansidecl.h.
700 * sb.h: Don't include stdio.h or ansidecl.h.
701 * cond.c: Include sb.h.
702 * itbl-lex.l: Include as.h instead of other system headers.
703 * itbl-parse.y: Likewise.
704 * itbl-ops.c: Similarly.
705 * itbl-ops.h: Don't include as.h or ansidecl.h.
706 * config/bfin-defs.h: Don't include bfd.h or as.h.
707 * config/bfin-parse.y: Include as.h instead of other system headers.
709 2006-06-06 Ben Elliston <bje@au.ibm.com>
710 Anton Blanchard <anton@samba.org>
712 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
713 (md_show_usage): Document it.
714 (ppc_setup_opcodes): Test power6 opcode flag bits.
715 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
717 2006-06-06 Thiemo Seufer <ths@mips.com>
718 Chao-ying Fu <fu@mips.com>
720 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
721 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
722 (macro_build): Update comment.
723 (mips_ip): Allow DSP64 instructions for MIPS64R2.
724 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
726 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
727 MIPS_CPU_ASE_MDMX flags for sb1.
729 2006-06-05 Thiemo Seufer <ths@mips.com>
731 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
733 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
734 (mips_ip): Make overflowed/underflowed constant arguments in DSP
735 and MT instructions a fatal error. Use INSERT_OPERAND where
736 appropriate. Improve warnings for break and wait code overflows.
737 Use symbolic constant of OP_MASK_COPZ.
738 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
740 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
742 * po/Make-in (top_builddir): Define.
744 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
746 * doc/Makefile.am (TEXI2DVI): Define.
747 * doc/Makefile.in: Regenerate.
748 * doc/c-arc.texi: Fix typo.
750 2006-06-01 Alan Modra <amodra@bigpond.net.au>
752 * config/obj-ieee.c: Delete.
753 * config/obj-ieee.h: Delete.
754 * Makefile.am (OBJ_FORMATS): Remove ieee.
755 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
756 (obj-ieee.o): Remove rule.
757 * Makefile.in: Regenerate.
758 * configure.in (atof): Remove tahoe.
759 (OBJ_MAYBE_IEEE): Don't define.
760 * configure: Regenerate.
761 * config.in: Regenerate.
762 * doc/Makefile.in: Regenerate.
763 * po/POTFILES.in: Regenerate.
765 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
767 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
768 and LIBINTL_DEP everywhere.
770 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
771 * acinclude.m4: Include new gettext macros.
772 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
773 Remove local code for po/Makefile.
774 * Makefile.in, configure, doc/Makefile.in: Regenerated.
776 2006-05-30 Nick Clifton <nickc@redhat.com>
778 * po/es.po: Updated Spanish translation.
780 2006-05-06 Denis Chertykov <denisc@overta.ru>
782 * doc/c-avr.texi: New file.
783 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
784 * doc/all.texi: Set AVR
785 * doc/as.texinfo: Include c-avr.texi
787 2006-05-28 Jie Zhang <jie.zhang@analog.com>
789 * config/bfin-parse.y (check_macfunc): Loose the condition of
790 calling check_multiply_halfregs ().
792 2006-05-25 Jie Zhang <jie.zhang@analog.com>
794 * config/bfin-parse.y (asm_1): Better check and deal with
795 vector and scalar Multiply 16-Bit Operands instructions.
797 2006-05-24 Nick Clifton <nickc@redhat.com>
799 * config/tc-hppa.c: Convert to ISO C90 format.
800 * config/tc-hppa.h: Likewise.
802 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
803 Randolph Chung <randolph@tausq.org>
805 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
806 is_tls_ieoff, is_tls_leoff): Define.
807 (fix_new_hppa): Handle TLS.
808 (cons_fix_new_hppa): Likewise.
810 (md_apply_fix): Handle TLS relocs.
811 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
813 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
815 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
817 2006-05-23 Thiemo Seufer <ths@mips.com>
818 David Ung <davidu@mips.com>
819 Nigel Stephens <nigel@mips.com>
822 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
823 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
824 ISA_HAS_MXHC1): New macros.
825 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
826 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
827 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
828 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
829 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
830 (mips_after_parse_args): Change default handling of float register
831 size to account for 32bit code with 64bit FP. Better sanity checking
832 of ISA/ASE/ABI option combinations.
833 (s_mipsset): Support switching of GPR and FPR sizes via
834 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
836 (mips_elf_final_processing): We should record the use of 64bit FP
837 registers in 32bit code but we don't, because ELF header flags are
839 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
840 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
841 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
842 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
843 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
844 missing -march options. Document .set arch=CPU. Move .set smartmips
845 to ASE page. Use @code for .set FOO examples.
847 2006-05-23 Jie Zhang <jie.zhang@analog.com>
849 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
852 2006-05-23 Jie Zhang <jie.zhang@analog.com>
854 * config/bfin-defs.h (bfin_equals): Remove declaration.
855 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
856 * config/tc-bfin.c (bfin_name_is_register): Remove.
857 (bfin_equals): Remove.
858 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
859 (bfin_name_is_register): Remove declaration.
861 2006-05-19 Thiemo Seufer <ths@mips.com>
862 Nigel Stephens <nigel@mips.com>
864 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
865 (mips_oddfpreg_ok): New function.
868 2006-05-19 Thiemo Seufer <ths@mips.com>
869 David Ung <davidu@mips.com>
871 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
872 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
873 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
874 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
875 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
876 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
877 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
878 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
879 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
880 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
881 reg_names_o32, reg_names_n32n64): Define register classes.
882 (reg_lookup): New function, use register classes.
883 (md_begin): Reserve register names in the symbol table. Simplify
885 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
887 (mips16_ip): Use reg_lookup.
888 (tc_get_register): Likewise.
889 (tc_mips_regname_to_dw2regnum): New function.
891 2006-05-19 Thiemo Seufer <ths@mips.com>
893 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
894 Un-constify string argument.
895 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
897 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
899 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
901 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
903 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
905 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
908 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
910 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
911 cfloat/m68881 to correct architecture before using it.
913 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
915 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
918 2006-05-15 Paul Brook <paul@codesourcery.com>
920 * config/tc-arm.c (arm_adjust_symtab): Use
921 bfd_is_arm_special_symbol_name.
923 2006-05-15 Bob Wilson <bob.wilson@acm.org>
925 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
926 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
927 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
928 Handle errors from calls to xtensa_opcode_is_* functions.
930 2006-05-14 Thiemo Seufer <ths@mips.com>
932 * config/tc-mips.c (macro_build): Test for currently active
934 (mips16_ip): Reject invalid opcodes.
936 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
938 * doc/as.texinfo: Rename "Index" to "AS Index",
939 and "ABORT" to "ABORT (COFF)".
941 2006-05-11 Paul Brook <paul@codesourcery.com>
943 * config/tc-arm.c (parse_half): New function.
944 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
945 (parse_operands): Ditto.
946 (do_mov16): Reject invalid relocations.
947 (do_t_mov16): Ditto. Use Thumb reloc numbers.
948 (insns): Replace Iffff with HALF.
949 (md_apply_fix): Add MOVW and MOVT relocs.
950 (tc_gen_reloc): Ditto.
951 * doc/c-arm.texi: Document relocation operators
953 2006-05-11 Paul Brook <paul@codesourcery.com>
955 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
957 2006-05-11 Thiemo Seufer <ths@mips.com>
959 * config/tc-mips.c (append_insn): Don't check the range of j or
962 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
964 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
965 relocs against external symbols for WinCE targets.
966 (md_apply_fix): Likewise.
968 2006-05-09 David Ung <davidu@mips.com>
970 * config/tc-mips.c (append_insn): Only warn about an out-of-range
973 2006-05-09 Nick Clifton <nickc@redhat.com>
975 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
976 against symbols which are not going to be placed into the symbol
979 2006-05-09 Ben Elliston <bje@au.ibm.com>
981 * expr.c (operand): Remove `if (0 && ..)' statement and
982 subsequently unused target_op label. Collapse `if (1 || ..)'
984 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
985 separately above the switch.
987 2006-05-08 Nick Clifton <nickc@redhat.com>
990 * config/tc-msp430.c (line_separator_character): Define as |.
992 2006-05-08 Thiemo Seufer <ths@mips.com>
993 Nigel Stephens <nigel@mips.com>
994 David Ung <davidu@mips.com>
996 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
997 (mips_opts): Likewise.
998 (file_ase_smartmips): New variable.
999 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1000 (macro_build): Handle SmartMIPS instructions.
1001 (mips_ip): Likewise.
1002 (md_longopts): Add argument handling for smartmips.
1003 (md_parse_options, mips_after_parse_args): Likewise.
1004 (s_mipsset): Add .set smartmips support.
1005 (md_show_usage): Document -msmartmips/-mno-smartmips.
1006 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1008 * doc/c-mips.texi: Likewise.
1010 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1012 * write.c (relax_segment): Add pass count arg. Don't error on
1013 negative org/space on first two passes.
1014 (relax_seg_info): New struct.
1015 (relax_seg, write_object_file): Adjust.
1016 * write.h (relax_segment): Update prototype.
1018 2006-05-05 Julian Brown <julian@codesourcery.com>
1020 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1022 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1023 architecture version checks.
1024 (insns): Allow overlapping instructions to be used in VFP mode.
1026 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1029 * config/obj-elf.c (obj_elf_change_section): Allow user
1030 specified SHF_ALPHA_GPREL.
1032 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1034 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1035 for PMEM related expressions.
1037 2006-05-05 Nick Clifton <nickc@redhat.com>
1040 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1041 insertion of a directory separator character into a string at a
1042 given offset. Uses heuristics to decide when to use a backslash
1043 character rather than a forward-slash character.
1044 (dwarf2_directive_loc): Use the macro.
1045 (out_debug_info): Likewise.
1047 2006-05-05 Thiemo Seufer <ths@mips.com>
1048 David Ung <davidu@mips.com>
1050 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1052 (macro): Add new case M_CACHE_AB.
1054 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1056 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1057 (opcode_lookup): Issue a warning for opcode with
1058 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1059 identical to OT_cinfix3.
1060 (TxC3w, TC3w, tC3w): New.
1061 (insns): Use tC3w and TC3w for comparison instructions with
1064 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1066 * subsegs.h (struct frchain): Delete frch_seg.
1067 (frchain_root): Delete.
1068 (seg_info): Define as macro.
1069 * subsegs.c (frchain_root): Delete.
1070 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1071 (subsegs_begin, subseg_change): Adjust for above.
1072 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1073 rather than to one big list.
1074 (subseg_get): Don't special case abs, und sections.
1075 (subseg_new, subseg_force_new): Don't set frchainP here.
1077 (subsegs_print_statistics): Adjust frag chain control list traversal.
1078 * debug.c (dmp_frags): Likewise.
1079 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1080 at frchain_root. Make use of known frchain ordering.
1081 (last_frag_for_seg): Likewise.
1082 (get_frag_fix): Likewise. Add seg param.
1083 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1084 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1085 (SUB_SEGMENT_ALIGN): Likewise.
1086 (subsegs_finish): Adjust frchain list traversal.
1087 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1088 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1089 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1090 (xtensa_fix_b_j_loop_end_frags): Likewise.
1091 (xtensa_fix_close_loop_end_frags): Likewise.
1092 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1093 (retrieve_segment_info): Delete frch_seg initialisation.
1095 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1097 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1098 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1099 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1100 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1102 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1104 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1106 (md_apply_fix3): Multiply offset by 4 here for
1107 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1109 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1110 Jan Beulich <jbeulich@novell.com>
1112 * config/tc-i386.c (output_invalid_buf): Change size for
1114 * config/tc-tic30.c (output_invalid_buf): Likewise.
1116 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1118 * config/tc-tic30.c (output_invalid): Likewise.
1120 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1122 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1123 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1124 (asconfig.texi): Don't set top_srcdir.
1125 * doc/as.texinfo: Don't use top_srcdir.
1126 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1128 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1130 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1131 * config/tc-tic30.c (output_invalid_buf): Likewise.
1133 * config/tc-i386.c (output_invalid): Use snprintf instead of
1135 * config/tc-ia64.c (declare_register_set): Likewise.
1136 (emit_one_bundle): Likewise.
1137 (check_dependencies): Likewise.
1138 * config/tc-tic30.c (output_invalid): Likewise.
1140 2006-05-02 Paul Brook <paul@codesourcery.com>
1142 * config/tc-arm.c (arm_optimize_expr): New function.
1143 * config/tc-arm.h (md_optimize_expr): Define
1144 (arm_optimize_expr): Add prototype.
1145 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1147 2006-05-02 Ben Elliston <bje@au.ibm.com>
1149 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1152 * sb.h (sb_list_vector): Move to sb.c.
1153 * sb.c (free_list): Use type of sb_list_vector directly.
1154 (sb_build): Fix off-by-one error in assertion about `size'.
1156 2006-05-01 Ben Elliston <bje@au.ibm.com>
1158 * listing.c (listing_listing): Remove useless loop.
1159 * macro.c (macro_expand): Remove is_positional local variable.
1160 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1161 and simplify surrounding expressions, where possible.
1162 (assign_symbol): Likewise.
1163 (s_weakref): Likewise.
1164 * symbols.c (colon): Likewise.
1166 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1168 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1170 2006-04-30 Thiemo Seufer <ths@mips.com>
1171 David Ung <davidu@mips.com>
1173 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1174 (mips_immed): New table that records various handling of udi
1175 instruction patterns.
1176 (mips_ip): Adds udi handling.
1178 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1180 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1181 of list rather than beginning.
1183 2006-04-26 Julian Brown <julian@codesourcery.com>
1185 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1186 (is_quarter_float): Rename from above. Simplify slightly.
1187 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1189 (parse_neon_mov): Parse floating-point constants.
1190 (neon_qfloat_bits): Fix encoding.
1191 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1192 preference to integer encoding when using the F32 type.
1194 2006-04-26 Julian Brown <julian@codesourcery.com>
1196 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1197 zero-initialising structures containing it will lead to invalid types).
1198 (arm_it): Add vectype to each operand.
1199 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1201 (neon_typed_alias): New structure. Extra information for typed
1203 (reg_entry): Add neon type info field.
1204 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1205 Break out alternative syntax for coprocessor registers, etc. into...
1206 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1207 out from arm_reg_parse.
1208 (parse_neon_type): Move. Return SUCCESS/FAIL.
1209 (first_error): New function. Call to ensure first error which occurs is
1211 (parse_neon_operand_type): Parse exactly one type.
1212 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1213 (parse_typed_reg_or_scalar): New function. Handle core of both
1214 arm_typed_reg_parse and parse_scalar.
1215 (arm_typed_reg_parse): Parse a register with an optional type.
1216 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1218 (parse_scalar): Parse a Neon scalar with optional type.
1219 (parse_reg_list): Use first_error.
1220 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1221 (neon_alias_types_same): New function. Return true if two (alias) types
1223 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1225 (insert_reg_alias): Return new reg_entry not void.
1226 (insert_neon_reg_alias): New function. Insert type/index information as
1227 well as register for alias.
1228 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1229 make typed register aliases accordingly.
1230 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1232 (s_unreq): Delete type information if present.
1233 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1234 (s_arm_unwind_save_mmxwcg): Likewise.
1235 (s_arm_unwind_movsp): Likewise.
1236 (s_arm_unwind_setfp): Likewise.
1237 (parse_shift): Likewise.
1238 (parse_shifter_operand): Likewise.
1239 (parse_address): Likewise.
1240 (parse_tb): Likewise.
1241 (tc_arm_regname_to_dw2regnum): Likewise.
1242 (md_pseudo_table): Add dn, qn.
1243 (parse_neon_mov): Handle typed operands.
1244 (parse_operands): Likewise.
1245 (neon_type_mask): Add N_SIZ.
1246 (N_ALLMODS): New macro.
1247 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1248 (el_type_of_type_chk): Add some safeguards.
1249 (modify_types_allowed): Fix logic bug.
1250 (neon_check_type): Handle operands with types.
1251 (neon_three_same): Remove redundant optional arg handling.
1252 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1253 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1254 (do_neon_step): Adjust accordingly.
1255 (neon_cmode_for_logic_imm): Use first_error.
1256 (do_neon_bitfield): Call neon_check_type.
1257 (neon_dyadic): Rename to...
1258 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1259 to allow modification of type of the destination.
1260 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1261 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1262 (do_neon_compare): Make destination be an untyped bitfield.
1263 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1264 (neon_mul_mac): Return early in case of errors.
1265 (neon_move_immediate): Use first_error.
1266 (neon_mac_reg_scalar_long): Fix type to include scalar.
1267 (do_neon_dup): Likewise.
1268 (do_neon_mov): Likewise (in several places).
1269 (do_neon_tbl_tbx): Fix type.
1270 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1271 (do_neon_ld_dup): Exit early in case of errors and/or use
1273 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1274 Handle .dn/.qn directives.
1275 (REGDEF): Add zero for reg_entry neon field.
1277 2006-04-26 Julian Brown <julian@codesourcery.com>
1279 * config/tc-arm.c (limits.h): Include.
1280 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1281 (fpu_vfp_v3_or_neon_ext): Declare constants.
1282 (neon_el_type): New enumeration of types for Neon vector elements.
1283 (neon_type_el): New struct. Define type and size of a vector element.
1284 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1286 (neon_type): Define struct. The type of an instruction.
1287 (arm_it): Add 'vectype' for the current instruction.
1288 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1289 (vfp_sp_reg_pos): Rename to...
1290 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1292 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1293 (Neon D or Q register).
1294 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1296 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1297 (my_get_expression): Allow above constant as argument to accept
1298 64-bit constants with optional prefix.
1299 (arm_reg_parse): Add extra argument to return the specific type of
1300 register in when either a D or Q register (REG_TYPE_NDQ) is
1301 requested. Can be NULL.
1302 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1303 (parse_reg_list): Update for new arm_reg_parse args.
1304 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1305 (parse_neon_el_struct_list): New function. Parse element/structure
1306 register lists for VLD<n>/VST<n> instructions.
1307 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1308 (s_arm_unwind_save_mmxwr): Likewise.
1309 (s_arm_unwind_save_mmxwcg): Likewise.
1310 (s_arm_unwind_movsp): Likewise.
1311 (s_arm_unwind_setfp): Likewise.
1312 (parse_big_immediate): New function. Parse an immediate, which may be
1313 64 bits wide. Put results in inst.operands[i].
1314 (parse_shift): Update for new arm_reg_parse args.
1315 (parse_address): Likewise. Add parsing of alignment specifiers.
1316 (parse_neon_mov): Parse the operands of a VMOV instruction.
1317 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1318 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1319 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1320 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1321 (parse_operands): Handle new codes above.
1322 (encode_arm_vfp_sp_reg): Rename to...
1323 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1324 selected VFP version only supports D0-D15.
1325 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1326 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1327 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1328 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1329 encode_arm_vfp_reg name, and allow 32 D regs.
1330 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1331 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1333 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1334 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1335 constant-load and conversion insns introduced with VFPv3.
1336 (neon_tab_entry): New struct.
1337 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1338 those which are the targets of pseudo-instructions.
1339 (neon_opc): Enumerate opcodes, use as indices into...
1340 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1341 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1342 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1343 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1345 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1347 (neon_type_mask): New. Compact type representation for type checking.
1348 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1349 permitted type combinations.
1350 (N_IGNORE_TYPE): New macro.
1351 (neon_check_shape): New function. Check an instruction shape for
1352 multiple alternatives. Return the specific shape for the current
1354 (neon_modify_type_size): New function. Modify a vector type and size,
1355 depending on the bit mask in argument 1.
1356 (neon_type_promote): New function. Convert a given "key" type (of an
1357 operand) into the correct type for a different operand, based on a bit
1359 (type_chk_of_el_type): New function. Convert a type and size into the
1360 compact representation used for type checking.
1361 (el_type_of_type_ckh): New function. Reverse of above (only when a
1362 single bit is set in the bit mask).
1363 (modify_types_allowed): New function. Alter a mask of allowed types
1364 based on a bit mask of modifications.
1365 (neon_check_type): New function. Check the type of the current
1366 instruction against the variable argument list. The "key" type of the
1367 instruction is returned.
1368 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1369 a Neon data-processing instruction depending on whether we're in ARM
1370 mode or Thumb-2 mode.
1371 (neon_logbits): New function.
1372 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1373 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1374 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1375 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1376 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1377 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1378 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1379 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1380 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1381 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1382 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1383 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1384 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1385 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1386 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1387 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1388 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1389 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1390 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1391 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1392 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1393 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1394 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1395 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1396 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1398 (parse_neon_type): New function. Parse Neon type specifier.
1399 (opcode_lookup): Allow parsing of Neon type specifiers.
1400 (REGNUM2, REGSETH, REGSET2): New macros.
1401 (reg_names): Add new VFPv3 and Neon registers.
1402 (NUF, nUF, NCE, nCE): New macros for opcode table.
1403 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1404 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1405 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1406 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1407 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1408 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1409 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1410 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1411 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1412 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1413 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1414 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1415 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1416 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1418 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1419 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1420 (arm_option_cpu_value): Add vfp3 and neon.
1421 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1424 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1426 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1427 syntax instead of hardcoded opcodes with ".w18" suffixes.
1428 (wide_branch_opcode): New.
1429 (build_transition): Use it to check for wide branch opcodes with
1430 either ".w18" or ".w15" suffixes.
1432 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1434 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1435 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1436 frag's is_literal flag.
1438 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1440 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1442 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1444 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1445 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1446 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1447 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1448 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1450 2005-04-20 Paul Brook <paul@codesourcery.com>
1452 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1454 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1456 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1458 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1459 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1460 Make some cpus unsupported on ELF. Run "make dep-am".
1461 * Makefile.in: Regenerate.
1463 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1465 * configure.in (--enable-targets): Indent help message.
1466 * configure: Regenerate.
1468 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1471 * config/tc-i386.c (i386_immediate): Check illegal immediate
1474 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1476 * config/tc-i386.c: Formatting.
1477 (output_disp, output_imm): ISO C90 params.
1479 * frags.c (frag_offset_fixed_p): Constify args.
1480 * frags.h (frag_offset_fixed_p): Ditto.
1482 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1483 (COFF_MAGIC): Delete.
1485 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1487 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1489 * po/POTFILES.in: Regenerated.
1491 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1493 * doc/as.texinfo: Mention that some .type syntaxes are not
1494 supported on all architectures.
1496 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1498 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1499 instructions when such transformations have been disabled.
1501 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1503 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1504 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1505 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1506 decoding the loop instructions. Remove current_offset variable.
1507 (xtensa_fix_short_loop_frags): Likewise.
1508 (min_bytes_to_other_loop_end): Remove current_offset argument.
1510 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1512 * config/tc-z80.c (z80_optimize_expr): Removed.
1513 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1515 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1517 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1518 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1519 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1520 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1521 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1522 at90can64, at90usb646, at90usb647, at90usb1286 and
1524 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1526 2006-04-07 Paul Brook <paul@codesourcery.com>
1528 * config/tc-arm.c (parse_operands): Set default error message.
1530 2006-04-07 Paul Brook <paul@codesourcery.com>
1532 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1534 2006-04-07 Paul Brook <paul@codesourcery.com>
1536 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1538 2006-04-07 Paul Brook <paul@codesourcery.com>
1540 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1541 (move_or_literal_pool): Handle Thumb-2 instructions.
1542 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1544 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1547 * config/tc-i386.c (match_template): Move 64-bit operand tests
1550 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1552 * po/Make-in: Add install-html target.
1553 * Makefile.am: Add install-html and install-html-recursive targets.
1554 * Makefile.in: Regenerate.
1555 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1556 * configure: Regenerate.
1557 * doc/Makefile.am: Add install-html and install-html-am targets.
1558 * doc/Makefile.in: Regenerate.
1560 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1562 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1565 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1566 Daniel Jacobowitz <dan@codesourcery.com>
1568 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1569 (GOTT_BASE, GOTT_INDEX): New.
1570 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1571 GOTT_INDEX when generating VxWorks PIC.
1572 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1573 use the generic *-*-vxworks* stanza instead.
1575 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1578 * frags.c (frag_offset_fixed_p): New function.
1579 * frags.h (frag_offset_fixed_p): Declare.
1580 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1581 (resolve_expression): Likewise.
1583 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1585 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1586 of the same length but different numbers of slots.
1588 2006-03-30 Andreas Schwab <schwab@suse.de>
1590 * configure.in: Fix help string for --enable-targets option.
1591 * configure: Regenerate.
1593 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1595 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1596 (m68k_ip): ... here. Use for all chips. Protect against buffer
1597 overrun and avoid excessive copying.
1599 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1600 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1601 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1602 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1603 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1604 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1605 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1606 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1607 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1608 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1609 (struct m68k_cpu): Change chip field to control_regs.
1610 (current_chip): Remove.
1611 (control_regs): New.
1612 (m68k_archs, m68k_extensions): Adjust.
1613 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1614 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1615 (find_cf_chip): Reimplement for new organization of cpu table.
1616 (select_control_regs): Remove.
1618 (struct save_opts): Save control regs, not chip.
1619 (s_save, s_restore): Adjust.
1620 (m68k_lookup_cpu): Give deprecated warning when necessary.
1621 (m68k_init_arch): Adjust.
1622 (md_show_usage): Adjust for new cpu table organization.
1624 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1626 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1627 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1628 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1630 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1631 (any_gotrel): New rule.
1632 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1633 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1635 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1636 (bfin_pic_ptr): New function.
1637 (md_pseudo_table): Add it for ".picptr".
1638 (OPTION_FDPIC): New macro.
1639 (md_longopts): Add -mfdpic.
1640 (md_parse_option): Handle it.
1641 (md_begin): Set BFD flags.
1642 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1643 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1645 * Makefile.am (bfin-parse.o): Update dependencies.
1646 (DEPTC_bfin_elf): Likewise.
1647 * Makefile.in: Regenerate.
1649 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1651 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1652 mcfemac instead of mcfmac.
1654 2006-03-23 Michael Matz <matz@suse.de>
1656 * config/tc-i386.c (type_names): Correct placement of 'static'.
1657 (reloc): Map some more relocs to their 64 bit counterpart when
1659 (output_insn): Work around breakage if DEBUG386 is defined.
1660 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1661 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1662 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1663 different from i386.
1664 (output_imm): Ditto.
1665 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1667 (md_convert_frag): Jumps can now be larger than 2GB away, error
1669 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1670 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1672 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1673 Daniel Jacobowitz <dan@codesourcery.com>
1674 Phil Edwards <phil@codesourcery.com>
1675 Zack Weinberg <zack@codesourcery.com>
1676 Mark Mitchell <mark@codesourcery.com>
1677 Nathan Sidwell <nathan@codesourcery.com>
1679 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1680 (md_begin): Complain about -G being used for PIC. Don't change
1681 the text, data and bss alignments on VxWorks.
1682 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1683 generating VxWorks PIC.
1684 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1685 (macro): Likewise, but do not treat la $25 specially for
1686 VxWorks PIC, and do not handle jal.
1687 (OPTION_MVXWORKS_PIC): New macro.
1688 (md_longopts): Add -mvxworks-pic.
1689 (md_parse_option): Don't complain about using PIC and -G together here.
1690 Handle OPTION_MVXWORKS_PIC.
1691 (md_estimate_size_before_relax): Always use the first relaxation
1692 sequence on VxWorks.
1693 * config/tc-mips.h (VXWORKS_PIC): New.
1695 2006-03-21 Paul Brook <paul@codesourcery.com>
1697 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1699 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1701 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1702 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1703 (get_loop_align_size): New.
1704 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1705 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1706 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1707 (get_noop_aligned_address): Use get_loop_align_size.
1708 (get_aligned_diff): Likewise.
1710 2006-03-21 Paul Brook <paul@codesourcery.com>
1712 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1714 2006-03-20 Paul Brook <paul@codesourcery.com>
1716 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1717 (do_t_branch): Encode branches inside IT blocks as unconditional.
1718 (do_t_cps): New function.
1719 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1720 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1721 (opcode_lookup): Allow conditional suffixes on all instructions in
1723 (md_assemble): Advance condexec state before checking for errors.
1724 (insns): Use do_t_cps.
1726 2006-03-20 Paul Brook <paul@codesourcery.com>
1728 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1729 outputting the insn.
1731 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1733 * config/tc-vax.c: Update copyright year.
1734 * config/tc-vax.h: Likewise.
1736 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1738 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1740 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1742 2006-03-17 Paul Brook <paul@codesourcery.com>
1744 * config/tc-arm.c (insns): Add ldm and stm.
1746 2006-03-17 Ben Elliston <bje@au.ibm.com>
1749 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1751 2006-03-16 Paul Brook <paul@codesourcery.com>
1753 * config/tc-arm.c (insns): Add "svc".
1755 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1757 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1758 flag and avoid double underscore prefixes.
1760 2006-03-10 Paul Brook <paul@codesourcery.com>
1762 * config/tc-arm.c (md_begin): Handle EABIv5.
1763 (arm_eabis): Add EF_ARM_EABI_VER5.
1764 * doc/c-arm.texi: Document -meabi=5.
1766 2006-03-10 Ben Elliston <bje@au.ibm.com>
1768 * app.c (do_scrub_chars): Simplify string handling.
1770 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1771 Daniel Jacobowitz <dan@codesourcery.com>
1772 Zack Weinberg <zack@codesourcery.com>
1773 Nathan Sidwell <nathan@codesourcery.com>
1774 Paul Brook <paul@codesourcery.com>
1775 Ricardo Anguiano <anguiano@codesourcery.com>
1776 Phil Edwards <phil@codesourcery.com>
1778 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1779 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1781 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1782 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1783 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1785 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1787 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1788 even when using the text-section-literals option.
1790 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1792 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1794 (m68k_ip): <case 'J'> Check we have some control regs.
1795 (md_parse_option): Allow raw arch switch.
1796 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1797 whether 68881 or cfloat was meant by -mfloat.
1798 (md_show_usage): Adjust extension display.
1799 (m68k_elf_final_processing): Adjust.
1801 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1803 * config/tc-avr.c (avr_mod_hash_value): New function.
1804 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1805 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1806 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1807 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1809 (tc_gen_reloc): Handle substractions of symbols, if possible do
1810 fixups, abort otherwise.
1811 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1812 tc_fix_adjustable): Define.
1814 2006-03-02 James E Wilson <wilson@specifix.com>
1816 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1817 change the template, then clear md.slot[curr].end_of_insn_group.
1819 2006-02-28 Jan Beulich <jbeulich@novell.com>
1821 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1823 2006-02-28 Jan Beulich <jbeulich@novell.com>
1826 * macro.c (getstring): Don't treat parentheses special anymore.
1827 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1828 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1831 2006-02-28 Mat <mat@csail.mit.edu>
1833 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1835 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1837 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1839 (CFI_signal_frame): Define.
1840 (cfi_pseudo_table): Add .cfi_signal_frame.
1841 (dot_cfi): Handle CFI_signal_frame.
1842 (output_cie): Handle cie->signal_frame.
1843 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1844 different. Copy signal_frame from FDE to newly created CIE.
1845 * doc/as.texinfo: Document .cfi_signal_frame.
1847 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1849 * doc/Makefile.am: Add html target.
1850 * doc/Makefile.in: Regenerate.
1851 * po/Make-in: Add html target.
1853 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1855 * config/tc-i386.c (output_insn): Support Intel Merom New
1858 * config/tc-i386.h (CpuMNI): New.
1859 (CpuUnknownFlags): Add CpuMNI.
1861 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1863 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1864 (hpriv_reg_table): New table for hyperprivileged registers.
1865 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1868 2006-02-24 DJ Delorie <dj@redhat.com>
1870 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1871 (tc_gen_reloc): Don't define.
1872 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1873 (OPTION_LINKRELAX): New.
1874 (md_longopts): Add it.
1876 (md_parse_options): Set it.
1877 (md_assemble): Emit relaxation relocs as needed.
1878 (md_convert_frag): Emit relaxation relocs as needed.
1879 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1880 (m32c_apply_fix): New.
1881 (tc_gen_reloc): New.
1882 (m32c_force_relocation): Force out jump relocs when relaxing.
1883 (m32c_fix_adjustable): Return false if relaxing.
1885 2006-02-24 Paul Brook <paul@codesourcery.com>
1887 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1888 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1889 (struct asm_barrier_opt): Define.
1890 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1891 (parse_psr): Accept V7M psr names.
1892 (parse_barrier): New function.
1893 (enum operand_parse_code): Add OP_oBARRIER.
1894 (parse_operands): Implement OP_oBARRIER.
1895 (do_barrier): New function.
1896 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1897 (do_t_cpsi): Add V7M restrictions.
1898 (do_t_mrs, do_t_msr): Validate V7M variants.
1899 (md_assemble): Check for NULL variants.
1900 (v7m_psrs, barrier_opt_names): New tables.
1901 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1902 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1903 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1904 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1905 (struct cpu_arch_ver_table): Define.
1906 (cpu_arch_ver): New.
1907 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1908 Tag_CPU_arch_profile.
1909 * doc/c-arm.texi: Document new cpu and arch options.
1911 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1913 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1915 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1917 * config/tc-ia64.c: Update copyright years.
1919 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1921 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1924 2005-02-22 Paul Brook <paul@codesourcery.com>
1926 * config/tc-arm.c (do_pld): Remove incorrect write to
1928 (encode_thumb32_addr_mode): Use correct operand.
1930 2006-02-21 Paul Brook <paul@codesourcery.com>
1932 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1934 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1935 Anil Paranjape <anilp1@kpitcummins.com>
1936 Shilin Shakti <shilins@kpitcummins.com>
1938 * Makefile.am: Add xc16x related entry.
1939 * Makefile.in: Regenerate.
1940 * configure.in: Added xc16x related entry.
1941 * configure: Regenerate.
1942 * config/tc-xc16x.h: New file
1943 * config/tc-xc16x.c: New file
1944 * doc/c-xc16x.texi: New file for xc16x
1945 * doc/all.texi: Entry for xc16x
1946 * doc/Makefile.texi: Added c-xc16x.texi
1947 * NEWS: Announce the support for the new target.
1949 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1951 * configure.tgt: set emulation for mips-*-netbsd*
1953 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1955 * config.in: Rebuilt.
1957 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1959 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1960 from 1, not 0, in error messages.
1961 (md_assemble): Simplify special-case check for ENTRY instructions.
1962 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1963 operand in error message.
1965 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1967 * configure.tgt (arm-*-linux-gnueabi*): Change to
1970 2006-02-10 Nick Clifton <nickc@redhat.com>
1972 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1973 32-bit value is propagated into the upper bits of a 64-bit long.
1975 * config/tc-arc.c (init_opcode_tables): Fix cast.
1976 (arc_extoper, md_operand): Likewise.
1978 2006-02-09 David Heine <dlheine@tensilica.com>
1980 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1981 each relaxation step.
1983 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1985 * configure.in (CHECK_DECLS): Add vsnprintf.
1986 * configure: Regenerate.
1987 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1988 include/declare here, but...
1989 * as.h: Move code detecting VARARGS idiom to the top.
1990 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1991 (vsnprintf): Declare if not already declared.
1993 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1995 * as.c (close_output_file): New.
1996 (main): Register close_output_file with xatexit before
1997 dump_statistics. Don't call output_file_close.
1999 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2001 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2002 mcf5329_control_regs): New.
2003 (not_current_architecture, selected_arch, selected_cpu): New.
2004 (m68k_archs, m68k_extensions): New.
2005 (archs): Renamed to ...
2006 (m68k_cpus): ... here. Adjust.
2008 (md_pseudo_table): Add arch and cpu directives.
2009 (find_cf_chip, m68k_ip): Adjust table scanning.
2010 (no_68851, no_68881): Remove.
2011 (md_assemble): Lazily initialize.
2012 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2013 (md_init_after_args): Move functionality to m68k_init_arch.
2014 (mri_chip): Adjust table scanning.
2015 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2016 options with saner parsing.
2017 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2018 m68k_init_arch): New.
2019 (s_m68k_cpu, s_m68k_arch): New.
2020 (md_show_usage): Adjust.
2021 (m68k_elf_final_processing): Set CF EF flags.
2022 * config/tc-m68k.h (m68k_init_after_args): Remove.
2023 (tc_init_after_args): Remove.
2024 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2025 (M68k-Directives): Document .arch and .cpu directives.
2027 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2029 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2030 synonyms for equ and defl.
2031 (z80_cons_fix_new): New function.
2032 (emit_byte): Disallow relative jumps to absolute locations.
2033 (emit_data): Only handle defb, prototype changed, because defb is
2034 now handled as pseudo-op rather than an instruction.
2035 (instab): Entries for defb,defw,db,dw moved from here...
2036 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2037 Add entries for def24,def32,d24,d32.
2038 (md_assemble): Improved error handling.
2039 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2040 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2041 (z80_cons_fix_new): Declare.
2042 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2043 (def24,d24,def32,d32): New pseudo-ops.
2045 2006-02-02 Paul Brook <paul@codesourcery.com>
2047 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2049 2005-02-02 Paul Brook <paul@codesourcery.com>
2051 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2052 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2053 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2054 T2_OPCODE_RSB): Define.
2055 (thumb32_negate_data_op): New function.
2056 (md_apply_fix): Use it.
2058 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2060 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2062 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2063 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2065 (relaxation_requirements): Add pfinish_frag argument and use it to
2066 replace setting tinsn->record_fix fields.
2067 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2068 and vinsn_to_insnbuf. Remove references to record_fix and
2069 slot_sub_symbols fields.
2070 (xtensa_mark_narrow_branches): Delete unused code.
2071 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2073 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2075 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2076 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2077 of the record_fix field. Simplify error messages for unexpected
2079 (set_expr_symbol_offset_diff): Delete.
2081 2006-01-31 Paul Brook <paul@codesourcery.com>
2083 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2085 2006-01-31 Paul Brook <paul@codesourcery.com>
2086 Richard Earnshaw <rearnsha@arm.com>
2088 * config/tc-arm.c: Use arm_feature_set.
2089 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2090 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2091 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2094 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2095 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2096 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2097 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2099 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2100 (arm_opts): Move old cpu/arch options from here...
2101 (arm_legacy_opts): ... to here.
2102 (md_parse_option): Search arm_legacy_opts.
2103 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2104 (arm_float_abis, arm_eabis): Make const.
2106 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2108 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2110 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2112 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2113 in load immediate intruction.
2115 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2117 * config/bfin-parse.y (value_match): Use correct conversion
2118 specifications in template string for __FILE__ and __LINE__.
2122 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2124 Introduce TLS descriptors for i386 and x86_64.
2125 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2126 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2127 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2128 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2129 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2131 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2132 (lex_got): Handle @tlsdesc and @tlscall.
2133 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2135 2006-01-11 Nick Clifton <nickc@redhat.com>
2137 Fixes for building on 64-bit hosts:
2138 * config/tc-avr.c (mod_index): New union to allow conversion
2139 between pointers and integers.
2140 (md_begin, avr_ldi_expression): Use it.
2141 * config/tc-i370.c (md_assemble): Add cast for argument to print
2143 * config/tc-tic54x.c (subsym_substitute): Likewise.
2144 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2145 opindex field of fr_cgen structure into a pointer so that it can
2146 be stored in a frag.
2147 * config/tc-mn10300.c (md_assemble): Likewise.
2148 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2150 * config/tc-v850.c: Replace uses of (int) casts with correct
2153 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2156 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2158 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2161 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2162 a local-label reference.
2164 For older changes see ChangeLog-2005
2170 version-control: never
projects / platform / upstream / binutils.git / blob