1 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
3 * config/tc-score.c: New file.
4 * config/tc-score.h: Newf file.
5 * configure.tgt: Add Score target.
6 * Makefile.am: Add Score files.
7 * Makefile.in: Regenerate.
8 * NEWS: Mention new target support.
10 2006-09-16 Paul Brook <paul@codesourcery.com>
12 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
13 * doc/c-arm.texi (movsp): Document offset argument.
15 2006-09-16 Paul Brook <paul@codesourcery.com>
17 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
18 unsigned int to avoid 64-bit host problems.
20 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
22 * config/bfin-parse.y (binary): Do some more constant folding for
25 2006-09-13 Jan Beulich <jbeulich@novell.com>
27 * input-file.c (input_file_give_next_buffer): Demote as_bad to
30 2006-09-13 Alan Modra <amodra@bigpond.net.au>
33 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
36 2006-09-13 Alan Modra <amodra@bigpond.net.au>
38 * input-file.c (input_file_open): Replace as_perror with as_bad
39 so that gas exits with error on file errors. Correct error
41 (input_file_get, input_file_give_next_buffer): Likewise.
42 * input-file.h: Update comment.
44 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
47 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
48 registers as a sub-class of wC registers.
50 2006-09-11 Alan Modra <amodra@bigpond.net.au>
53 * config/tc-mips.h (enum dwarf2_format): Forward declare.
54 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
55 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
56 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
58 2006-09-08 Nick Clifton <nickc@redhat.com>
61 * doc/as.texinfo (Macro): Improve documentation about separating
62 macro arguments from following text.
64 2006-09-08 Paul Brook <paul@codesourcery.com>
66 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
68 2006-09-07 Paul Brook <paul@codesourcery.com>
70 * config/tc-arm.c (parse_operands): Mark operand as present.
72 2006-09-04 Paul Brook <paul@codesourcery.com>
74 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
75 (do_neon_dyadic_if_i_d): Avoid setting U bit.
76 (do_neon_mac_maybe_scalar): Ditto.
77 (do_neon_dyadic_narrow): Force operand type to NT_integer.
78 (insns): Remove out of date comments.
80 2006-08-29 Nick Clifton <nickc@redhat.com>
82 * read.c (s_align): Initialize the 'stopc' variable to prevent
83 compiler complaints about it being used without being
85 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
86 s_float_space, s_struct, cons_worker, equals): Likewise.
88 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
90 * ecoff.c (ecoff_directive_val): Fix message typo.
91 * config/tc-ns32k.c (convert_iif): Likewise.
92 * config/tc-sh64.c (shmedia_check_limits): Likewise.
94 2006-08-25 Sterling Augustine <sterling@tensilica.com>
95 Bob Wilson <bob.wilson@acm.org>
97 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
98 the state of the absolute_literals directive. Remove align frag at
99 the start of the literal pool position.
101 2006-08-25 Bob Wilson <bob.wilson@acm.org>
103 * doc/c-xtensa.texi: Add @group commands in examples.
105 2006-08-24 Bob Wilson <bob.wilson@acm.org>
107 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
108 (INIT_LITERAL_SECTION_NAME): Delete.
109 (lit_state struct): Remove segment names, init_lit_seg, and
110 fini_lit_seg. Add lit_prefix and current_text_seg.
111 (init_literal_head_h, init_literal_head): Delete.
112 (fini_literal_head_h, fini_literal_head): Delete.
113 (xtensa_begin_directive): Move argument parsing to
114 xtensa_literal_prefix function.
115 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
116 (xtensa_literal_prefix): Parse the directive argument here and
117 record it in the lit_prefix field. Remove code to derive literal
120 (get_is_linkonce_section): Use linkonce_len. Check for any
121 ".gnu.linkonce.*" section, not just text sections.
122 (md_begin): Remove initialization of deleted lit_state fields.
123 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
124 to init_literal_head and fini_literal_head.
125 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
126 when traversing literal_head list.
127 (match_section_group): New.
128 (cache_literal_section): Rewrite to determine the literal section
129 name on the fly, create the section and return it.
130 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
131 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
132 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
133 Use xtensa_get_property_section from bfd.
134 (retrieve_xtensa_section): Delete.
135 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
136 description to refer to plural literal sections and add xref to
137 the Literal Directive section.
138 (Literal Directive): Describe new rules for deriving literal section
139 names. Add footnote for special case of .init/.fini with
140 --text-section-literals.
141 (Literal Prefix Directive): Replace old naming rules with xref to the
142 Literal Directive section.
144 2006-08-21 Joseph Myers <joseph@codesourcery.com>
146 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
147 merging with previous long opcode.
149 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
151 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
152 * Makefile.in: Regenerate.
153 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
156 2006-08-16 Julian Brown <julian@codesourcery.com>
158 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
159 to use ARM instructions on non-ARM-supporting cores.
160 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
161 mode automatically based on cpu variant.
162 (md_begin): Call above function.
164 2006-08-16 Julian Brown <julian@codesourcery.com>
166 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
167 recognized in non-unified syntax mode.
169 2006-08-15 Thiemo Seufer <ths@mips.com>
170 Nigel Stephens <nigel@mips.com>
171 David Ung <davidu@mips.com>
173 * configure.tgt: Handle mips*-sde-elf*.
175 2006-08-12 Thiemo Seufer <ths@networkno.de>
177 * config/tc-mips.c (mips16_ip): Fix argument register handling
178 for restore instruction.
180 2006-08-08 Bob Wilson <bob.wilson@acm.org>
182 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
184 (out_fixed_inc_line_addr): New.
185 (process_entries): Use out_fixed_inc_line_addr when
186 DWARF2_USE_FIXED_ADVANCE_PC is set.
187 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
189 2006-08-08 DJ Delorie <dj@redhat.com>
191 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
192 vs full symbols so that we never have more than one pointer value
193 for any given symbol in our symbol table.
195 2006-08-08 Sterling Augustine <sterling@tensilica.com>
197 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
198 and emit DW_AT_ranges when code in compilation unit is not
200 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
202 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
203 (out_debug_ranges): New function to emit .debug_ranges section
204 when code is not contiguous.
206 2006-08-08 Nick Clifton <nickc@redhat.com>
208 * config/tc-arm.c (WARN_DEPRECATED): Enable.
210 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
212 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
214 (pe_directive_secrel) [TE_PE]: New function.
215 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
216 loc, loc_mark_labels.
217 [TE_PE]: Handle secrel32.
218 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
220 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
221 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
222 (md_section_align): Only round section sizes here for AOUT
224 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
225 (tc_pe_dwarf2_emit_offset): New function.
226 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
227 (cons_fix_new_arm): Handle O_secrel.
228 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
229 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
230 of OBJ_ELF only block.
231 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
232 tc_pe_dwarf2_emit_offset.
234 2006-08-04 Richard Sandiford <richard@codesourcery.com>
236 * config/tc-sh.c (apply_full_field_fix): New function.
237 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
238 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
239 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
240 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
242 2006-08-03 Nick Clifton <nickc@redhat.com>
245 * config.in: Regenerate.
247 2006-08-03 Joseph Myers <joseph@codesourcery.com>
249 * config/tc-arm.c (parse_operands): Handle invalid register name
252 2006-08-03 Joseph Myers <joseph@codesourcery.com>
254 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
255 (parse_operands): Handle it.
256 (insns): Use it for tmcr and tmrc.
258 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
261 * config/tc-i386.c (md_parse_option): Treat any target starting
262 with elf64_x86_64 as a viable target for the -64 switch.
263 (i386_target_format): For 64-bit ELF flavoured output use
265 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
267 2006-08-02 Nick Clifton <nickc@redhat.com>
270 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
272 * configure.in: Run BFD_BINARY_FOPEN.
273 * configure: Regenerate.
274 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
277 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
279 * config/tc-i386.c (md_assemble): Don't update
282 2006-08-01 Thiemo Seufer <ths@mips.com>
284 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
286 2006-08-01 Thiemo Seufer <ths@mips.com>
288 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
289 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
290 BFD_RELOC_32 and BFD_RELOC_16.
291 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
292 md_convert_frag, md_obj_end): Fix comment formatting.
294 2006-07-31 Thiemo Seufer <ths@mips.com>
296 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
297 handling for BFD_RELOC_MIPS16_JMP.
299 2006-07-24 Andreas Schwab <schwab@suse.de>
302 * read.c (read_a_source_file): Ignore unknown text after line
303 comment character. Fix misleading comment.
305 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
307 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
308 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
309 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
310 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
311 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
312 doc/c-z80.texi, doc/internals.texi: Fix some typos.
314 2006-07-21 Nick Clifton <nickc@redhat.com>
316 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
319 2006-07-20 Thiemo Seufer <ths@mips.com>
320 Nigel Stephens <nigel@mips.com>
322 * config/tc-mips.c (md_parse_option): Don't infer optimisation
323 options from debug options.
325 2006-07-20 Thiemo Seufer <ths@mips.com>
327 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
328 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
330 2006-07-19 Paul Brook <paul@codesourcery.com>
332 * config/tc-arm.c (insns): Fix rbit Arm opcode.
334 2006-07-18 Paul Brook <paul@codesourcery.com>
336 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
337 (md_convert_frag): Use correct reloc for add_pc. Use
338 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
339 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
340 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
342 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
344 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
345 when file and line unknown.
347 2006-07-17 Thiemo Seufer <ths@mips.com>
349 * read.c (s_struct): Use IS_ELF.
350 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
351 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
352 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
353 s_mips_mask): Likewise.
355 2006-07-16 Thiemo Seufer <ths@mips.com>
356 David Ung <davidu@mips.com>
358 * read.c (s_struct): Handle ELF section changing.
359 * config/tc-mips.c (s_align): Leave enabling auto-align to the
361 (s_change_sec): Try section changing only if we output ELF.
363 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
365 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
367 (smallest_imm_type): Remove Cpu086.
368 (i386_target_format): Likewise.
370 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
373 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
374 Michael Meissner <michael.meissner@amd.com>
376 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
377 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
378 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
380 (i386_align_code): Ditto.
381 (md_assemble_code): Add support for insertq/extrq instructions,
382 swapping as needed for intel syntax.
383 (swap_imm_operands): New function to swap immediate operands.
384 (swap_operands): Deal with 4 operand instructions.
385 (build_modrm_byte): Add support for insertq instruction.
387 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
389 * config/tc-i386.h (Size64): Fix a typo in comment.
391 2006-07-12 Nick Clifton <nickc@redhat.com>
393 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
394 fixup_segment() to repeat a range check on a value that has
395 already been checked here.
397 2006-07-07 James E Wilson <wilson@specifix.com>
399 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
401 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
402 Nick Clifton <nickc@redhat.com>
405 * doc/as.texi: Fix spelling typo: branchs => branches.
406 * doc/c-m68hc11.texi: Likewise.
407 * config/tc-m68hc11.c: Likewise.
408 Support old spelling of command line switch for backwards
411 2006-07-04 Thiemo Seufer <ths@mips.com>
412 David Ung <davidu@mips.com>
414 * config/tc-mips.c (s_is_linkonce): New function.
415 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
416 weak, external, and linkonce symbols.
417 (pic_need_relax): Use s_is_linkonce.
419 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
421 * doc/as.texinfo (Org): Remove space.
422 (P2align): Add "@var{abs-expr},".
424 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
426 * config/tc-i386.c (cpu_arch_tune_set): New.
427 (cpu_arch_isa): Likewise.
428 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
429 nops with short or long nop sequences based on -march=/.arch
431 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
432 set cpu_arch_tune and cpu_arch_tune_flags.
433 (md_parse_option): For -march=, set cpu_arch_isa and set
434 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
435 0. Set cpu_arch_tune_set to 1 for -mtune=.
436 (i386_target_format): Don't set cpu_arch_tune.
438 2006-06-23 Nigel Stephens <nigel@mips.com>
440 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
441 generated .sbss.* and .gnu.linkonce.sb.*.
443 2006-06-23 Thiemo Seufer <ths@mips.com>
444 David Ung <davidu@mips.com>
446 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
448 * config/tc-mips.c (label_list): Define per-segment label_list.
449 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
450 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
451 mips_from_file_after_relocs, mips_define_label): Use per-segment
454 2006-06-22 Thiemo Seufer <ths@mips.com>
456 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
457 (append_insn): Use it.
458 (md_apply_fix): Whitespace formatting.
459 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
460 mips16_extended_frag): Remove register specifier.
461 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
464 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
466 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
467 a directive saving VFP registers for ARMv6 or later.
468 (s_arm_unwind_save): Add parameter arch_v6 and call
469 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
471 (md_pseudo_table): Add entry for new "vsave" directive.
472 * doc/c-arm.texi: Correct error in example for "save"
473 directive (fstmdf -> fstmdx). Also document "vsave" directive.
475 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
476 Anatoly Sokolov <aesok@post.ru>
478 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
479 and atmega644p devices. Rename atmega164/atmega324 devices to
480 atmega164p/atmega324p.
481 * doc/c-avr.texi: Document new mcu and arch options.
483 2006-06-17 Nick Clifton <nickc@redhat.com>
485 * config/tc-arm.c (enum parse_operand_result): Move outside of
486 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
488 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
490 * config/tc-i386.h (processor_type): New.
491 (arch_entry): Add type.
493 * config/tc-i386.c (cpu_arch_tune): New.
494 (cpu_arch_tune_flags): Likewise.
495 (cpu_arch_isa_flags): Likewise.
497 (set_cpu_arch): Also update cpu_arch_isa_flags.
498 (md_assemble): Update cpu_arch_isa_flags.
500 (OPTION_MTUNE): Likewise.
501 (md_longopts): Add -march= and -mtune=.
502 (md_parse_option): Support -march= and -mtune=.
503 (md_show_usage): Add -march=CPU/-mtune=CPU.
504 (i386_target_format): Also update cpu_arch_isa_flags,
505 cpu_arch_tune and cpu_arch_tune_flags.
507 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
509 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
511 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
513 * config/tc-arm.c (enum parse_operand_result): New.
514 (struct group_reloc_table_entry): New.
515 (enum group_reloc_type): New.
516 (group_reloc_table): New array.
517 (find_group_reloc_table_entry): New function.
518 (parse_shifter_operand_group_reloc): New function.
519 (parse_address_main): New function, incorporating code
520 from the old parse_address function. To be used via...
521 (parse_address): wrapper for parse_address_main; and
522 (parse_address_group_reloc): new function, likewise.
523 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
524 OP_ADDRGLDRS, OP_ADDRGLDC.
525 (parse_operands): Support for these new operand codes.
526 New macro po_misc_or_fail_no_backtrack.
527 (encode_arm_cp_address): Preserve group relocations.
528 (insns): Modify to use the above operand codes where group
529 relocations are permitted.
530 (md_apply_fix): Handle the group relocations
531 ALU_PC_G0_NC through LDC_SB_G2.
532 (tc_gen_reloc): Likewise.
533 (arm_force_relocation): Leave group relocations for the linker.
534 (arm_fix_adjustable): Likewise.
536 2006-06-15 Julian Brown <julian@codesourcery.com>
538 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
539 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
542 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
544 * config/tc-i386.c (process_suffix): Don't add rex64 for
547 2006-06-09 Thiemo Seufer <ths@mips.com>
549 * config/tc-mips.c (mips_ip): Maintain argument count.
551 2006-06-09 Alan Modra <amodra@bigpond.net.au>
553 * config/tc-iq2000.c: Include sb.h.
555 2006-06-08 Nigel Stephens <nigel@mips.com>
557 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
558 aliases for better compatibility with SGI tools.
560 2006-06-08 Alan Modra <amodra@bigpond.net.au>
562 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
563 * Makefile.am (GASLIBS): Expand @BFDLIB@.
565 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
566 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
567 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
569 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
570 * Makefile.in: Regenerate.
571 * doc/Makefile.in: Regenerate.
572 * configure: Regenerate.
574 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
576 * po/Make-in (pdf, ps): New dummy targets.
578 2006-06-07 Julian Brown <julian@codesourcery.com>
580 * config/tc-arm.c (stdarg.h): include.
581 (arm_it): Add uncond_value field. Add isvec and issingle to operand
583 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
584 REG_TYPE_NSDQ (single, double or quad vector reg).
585 (reg_expected_msgs): Update.
586 (BAD_FPU): Add macro for unsupported FPU instruction error.
587 (parse_neon_type): Support 'd' as an alias for .f64.
588 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
590 (parse_vfp_reg_list): Don't update first arg on error.
591 (parse_neon_mov): Support extra syntax for VFP moves.
592 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
593 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
594 (parse_operands): Support isvec, issingle operands fields, new parse
596 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
598 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
599 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
600 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
601 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
603 (neon_shape): Redefine in terms of above.
604 (neon_shape_class): New enumeration, table of shape classes.
605 (neon_shape_el): New enumeration. One element of a shape.
606 (neon_shape_el_size): Register widths of above, where appropriate.
607 (neon_shape_info): New struct. Info for shape table.
608 (neon_shape_tab): New array.
609 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
610 (neon_check_shape): Rewrite as...
611 (neon_select_shape): New function to classify instruction shapes,
612 driven by new table neon_shape_tab array.
613 (neon_quad): New function. Return 1 if shape should set Q flag in
614 instructions (or equivalent), 0 otherwise.
615 (type_chk_of_el_type): Support F64.
616 (el_type_of_type_chk): Likewise.
617 (neon_check_type): Add support for VFP type checking (VFP data
618 elements fill their containing registers).
619 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
620 in thumb mode for VFP instructions.
621 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
622 and encode the current instruction as if it were that opcode.
623 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
624 arguments, call function in PFN.
625 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
626 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
627 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
628 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
629 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
630 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
631 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
632 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
633 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
634 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
635 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
636 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
637 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
638 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
639 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
641 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
642 between VFP and Neon turns out to belong to Neon. Perform
643 architecture check and fill in condition field if appropriate.
644 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
645 (do_neon_cvt): Add support for VFP variants of instructions.
646 (neon_cvt_flavour): Extend to cover VFP conversions.
647 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
649 (do_neon_ldr_str): Handle single-precision VFP load/store.
650 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
651 NS_NULL not NS_IGNORE.
652 (opcode_tag): Add OT_csuffixF for operands which either take a
653 conditional suffix, or have 0xF in the condition field.
654 (md_assemble): Add support for OT_csuffixF.
655 (NCE): Replace macro with...
656 (NCE_tag, NCE, NCEF): New macros.
657 (nCE): Replace macro with...
658 (nCE_tag, nCE, nCEF): New macros.
659 (insns): Add support for VFP insns or VFP versions of insns msr,
660 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
661 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
662 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
663 VFP/Neon insns together.
665 2006-06-07 Alan Modra <amodra@bigpond.net.au>
666 Ladislav Michl <ladis@linux-mips.org>
668 * app.c: Don't include headers already included by as.h.
670 * atof-generic.c: Likewise.
672 * dwarf2dbg.c: Likewise.
674 * input-file.c: Likewise.
675 * input-scrub.c: Likewise.
677 * output-file.c: Likewise.
680 * config/bfin-lex.l: Likewise.
681 * config/obj-coff.h: Likewise.
682 * config/obj-elf.h: Likewise.
683 * config/obj-som.h: Likewise.
684 * config/tc-arc.c: Likewise.
685 * config/tc-arm.c: Likewise.
686 * config/tc-avr.c: Likewise.
687 * config/tc-bfin.c: Likewise.
688 * config/tc-cris.c: Likewise.
689 * config/tc-d10v.c: Likewise.
690 * config/tc-d30v.c: Likewise.
691 * config/tc-dlx.h: Likewise.
692 * config/tc-fr30.c: Likewise.
693 * config/tc-frv.c: Likewise.
694 * config/tc-h8300.c: Likewise.
695 * config/tc-hppa.c: Likewise.
696 * config/tc-i370.c: Likewise.
697 * config/tc-i860.c: Likewise.
698 * config/tc-i960.c: Likewise.
699 * config/tc-ip2k.c: Likewise.
700 * config/tc-iq2000.c: Likewise.
701 * config/tc-m32c.c: Likewise.
702 * config/tc-m32r.c: Likewise.
703 * config/tc-maxq.c: Likewise.
704 * config/tc-mcore.c: Likewise.
705 * config/tc-mips.c: Likewise.
706 * config/tc-mmix.c: Likewise.
707 * config/tc-mn10200.c: Likewise.
708 * config/tc-mn10300.c: Likewise.
709 * config/tc-msp430.c: Likewise.
710 * config/tc-mt.c: Likewise.
711 * config/tc-ns32k.c: Likewise.
712 * config/tc-openrisc.c: Likewise.
713 * config/tc-ppc.c: Likewise.
714 * config/tc-s390.c: Likewise.
715 * config/tc-sh.c: Likewise.
716 * config/tc-sh64.c: Likewise.
717 * config/tc-sparc.c: Likewise.
718 * config/tc-tic30.c: Likewise.
719 * config/tc-tic4x.c: Likewise.
720 * config/tc-tic54x.c: Likewise.
721 * config/tc-v850.c: Likewise.
722 * config/tc-vax.c: Likewise.
723 * config/tc-xc16x.c: Likewise.
724 * config/tc-xstormy16.c: Likewise.
725 * config/tc-xtensa.c: Likewise.
726 * config/tc-z80.c: Likewise.
727 * config/tc-z8k.c: Likewise.
728 * macro.h: Don't include sb.h or ansidecl.h.
729 * sb.h: Don't include stdio.h or ansidecl.h.
730 * cond.c: Include sb.h.
731 * itbl-lex.l: Include as.h instead of other system headers.
732 * itbl-parse.y: Likewise.
733 * itbl-ops.c: Similarly.
734 * itbl-ops.h: Don't include as.h or ansidecl.h.
735 * config/bfin-defs.h: Don't include bfd.h or as.h.
736 * config/bfin-parse.y: Include as.h instead of other system headers.
738 2006-06-06 Ben Elliston <bje@au.ibm.com>
739 Anton Blanchard <anton@samba.org>
741 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
742 (md_show_usage): Document it.
743 (ppc_setup_opcodes): Test power6 opcode flag bits.
744 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
746 2006-06-06 Thiemo Seufer <ths@mips.com>
747 Chao-ying Fu <fu@mips.com>
749 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
750 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
751 (macro_build): Update comment.
752 (mips_ip): Allow DSP64 instructions for MIPS64R2.
753 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
755 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
756 MIPS_CPU_ASE_MDMX flags for sb1.
758 2006-06-05 Thiemo Seufer <ths@mips.com>
760 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
762 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
763 (mips_ip): Make overflowed/underflowed constant arguments in DSP
764 and MT instructions a fatal error. Use INSERT_OPERAND where
765 appropriate. Improve warnings for break and wait code overflows.
766 Use symbolic constant of OP_MASK_COPZ.
767 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
769 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
771 * po/Make-in (top_builddir): Define.
773 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
775 * doc/Makefile.am (TEXI2DVI): Define.
776 * doc/Makefile.in: Regenerate.
777 * doc/c-arc.texi: Fix typo.
779 2006-06-01 Alan Modra <amodra@bigpond.net.au>
781 * config/obj-ieee.c: Delete.
782 * config/obj-ieee.h: Delete.
783 * Makefile.am (OBJ_FORMATS): Remove ieee.
784 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
785 (obj-ieee.o): Remove rule.
786 * Makefile.in: Regenerate.
787 * configure.in (atof): Remove tahoe.
788 (OBJ_MAYBE_IEEE): Don't define.
789 * configure: Regenerate.
790 * config.in: Regenerate.
791 * doc/Makefile.in: Regenerate.
792 * po/POTFILES.in: Regenerate.
794 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
796 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
797 and LIBINTL_DEP everywhere.
799 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
800 * acinclude.m4: Include new gettext macros.
801 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
802 Remove local code for po/Makefile.
803 * Makefile.in, configure, doc/Makefile.in: Regenerated.
805 2006-05-30 Nick Clifton <nickc@redhat.com>
807 * po/es.po: Updated Spanish translation.
809 2006-05-06 Denis Chertykov <denisc@overta.ru>
811 * doc/c-avr.texi: New file.
812 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
813 * doc/all.texi: Set AVR
814 * doc/as.texinfo: Include c-avr.texi
816 2006-05-28 Jie Zhang <jie.zhang@analog.com>
818 * config/bfin-parse.y (check_macfunc): Loose the condition of
819 calling check_multiply_halfregs ().
821 2006-05-25 Jie Zhang <jie.zhang@analog.com>
823 * config/bfin-parse.y (asm_1): Better check and deal with
824 vector and scalar Multiply 16-Bit Operands instructions.
826 2006-05-24 Nick Clifton <nickc@redhat.com>
828 * config/tc-hppa.c: Convert to ISO C90 format.
829 * config/tc-hppa.h: Likewise.
831 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
832 Randolph Chung <randolph@tausq.org>
834 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
835 is_tls_ieoff, is_tls_leoff): Define.
836 (fix_new_hppa): Handle TLS.
837 (cons_fix_new_hppa): Likewise.
839 (md_apply_fix): Handle TLS relocs.
840 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
842 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
844 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
846 2006-05-23 Thiemo Seufer <ths@mips.com>
847 David Ung <davidu@mips.com>
848 Nigel Stephens <nigel@mips.com>
851 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
852 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
853 ISA_HAS_MXHC1): New macros.
854 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
855 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
856 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
857 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
858 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
859 (mips_after_parse_args): Change default handling of float register
860 size to account for 32bit code with 64bit FP. Better sanity checking
861 of ISA/ASE/ABI option combinations.
862 (s_mipsset): Support switching of GPR and FPR sizes via
863 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
865 (mips_elf_final_processing): We should record the use of 64bit FP
866 registers in 32bit code but we don't, because ELF header flags are
868 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
869 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
870 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
871 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
872 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
873 missing -march options. Document .set arch=CPU. Move .set smartmips
874 to ASE page. Use @code for .set FOO examples.
876 2006-05-23 Jie Zhang <jie.zhang@analog.com>
878 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
881 2006-05-23 Jie Zhang <jie.zhang@analog.com>
883 * config/bfin-defs.h (bfin_equals): Remove declaration.
884 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
885 * config/tc-bfin.c (bfin_name_is_register): Remove.
886 (bfin_equals): Remove.
887 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
888 (bfin_name_is_register): Remove declaration.
890 2006-05-19 Thiemo Seufer <ths@mips.com>
891 Nigel Stephens <nigel@mips.com>
893 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
894 (mips_oddfpreg_ok): New function.
897 2006-05-19 Thiemo Seufer <ths@mips.com>
898 David Ung <davidu@mips.com>
900 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
901 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
902 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
903 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
904 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
905 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
906 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
907 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
908 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
909 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
910 reg_names_o32, reg_names_n32n64): Define register classes.
911 (reg_lookup): New function, use register classes.
912 (md_begin): Reserve register names in the symbol table. Simplify
914 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
916 (mips16_ip): Use reg_lookup.
917 (tc_get_register): Likewise.
918 (tc_mips_regname_to_dw2regnum): New function.
920 2006-05-19 Thiemo Seufer <ths@mips.com>
922 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
923 Un-constify string argument.
924 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
926 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
928 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
930 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
932 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
934 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
937 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
939 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
940 cfloat/m68881 to correct architecture before using it.
942 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
944 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
947 2006-05-15 Paul Brook <paul@codesourcery.com>
949 * config/tc-arm.c (arm_adjust_symtab): Use
950 bfd_is_arm_special_symbol_name.
952 2006-05-15 Bob Wilson <bob.wilson@acm.org>
954 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
955 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
956 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
957 Handle errors from calls to xtensa_opcode_is_* functions.
959 2006-05-14 Thiemo Seufer <ths@mips.com>
961 * config/tc-mips.c (macro_build): Test for currently active
963 (mips16_ip): Reject invalid opcodes.
965 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
967 * doc/as.texinfo: Rename "Index" to "AS Index",
968 and "ABORT" to "ABORT (COFF)".
970 2006-05-11 Paul Brook <paul@codesourcery.com>
972 * config/tc-arm.c (parse_half): New function.
973 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
974 (parse_operands): Ditto.
975 (do_mov16): Reject invalid relocations.
976 (do_t_mov16): Ditto. Use Thumb reloc numbers.
977 (insns): Replace Iffff with HALF.
978 (md_apply_fix): Add MOVW and MOVT relocs.
979 (tc_gen_reloc): Ditto.
980 * doc/c-arm.texi: Document relocation operators
982 2006-05-11 Paul Brook <paul@codesourcery.com>
984 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
986 2006-05-11 Thiemo Seufer <ths@mips.com>
988 * config/tc-mips.c (append_insn): Don't check the range of j or
991 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
993 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
994 relocs against external symbols for WinCE targets.
995 (md_apply_fix): Likewise.
997 2006-05-09 David Ung <davidu@mips.com>
999 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1002 2006-05-09 Nick Clifton <nickc@redhat.com>
1004 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1005 against symbols which are not going to be placed into the symbol
1008 2006-05-09 Ben Elliston <bje@au.ibm.com>
1010 * expr.c (operand): Remove `if (0 && ..)' statement and
1011 subsequently unused target_op label. Collapse `if (1 || ..)'
1013 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1014 separately above the switch.
1016 2006-05-08 Nick Clifton <nickc@redhat.com>
1019 * config/tc-msp430.c (line_separator_character): Define as |.
1021 2006-05-08 Thiemo Seufer <ths@mips.com>
1022 Nigel Stephens <nigel@mips.com>
1023 David Ung <davidu@mips.com>
1025 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1026 (mips_opts): Likewise.
1027 (file_ase_smartmips): New variable.
1028 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1029 (macro_build): Handle SmartMIPS instructions.
1030 (mips_ip): Likewise.
1031 (md_longopts): Add argument handling for smartmips.
1032 (md_parse_options, mips_after_parse_args): Likewise.
1033 (s_mipsset): Add .set smartmips support.
1034 (md_show_usage): Document -msmartmips/-mno-smartmips.
1035 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1037 * doc/c-mips.texi: Likewise.
1039 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1041 * write.c (relax_segment): Add pass count arg. Don't error on
1042 negative org/space on first two passes.
1043 (relax_seg_info): New struct.
1044 (relax_seg, write_object_file): Adjust.
1045 * write.h (relax_segment): Update prototype.
1047 2006-05-05 Julian Brown <julian@codesourcery.com>
1049 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1051 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1052 architecture version checks.
1053 (insns): Allow overlapping instructions to be used in VFP mode.
1055 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1058 * config/obj-elf.c (obj_elf_change_section): Allow user
1059 specified SHF_ALPHA_GPREL.
1061 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1063 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1064 for PMEM related expressions.
1066 2006-05-05 Nick Clifton <nickc@redhat.com>
1069 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1070 insertion of a directory separator character into a string at a
1071 given offset. Uses heuristics to decide when to use a backslash
1072 character rather than a forward-slash character.
1073 (dwarf2_directive_loc): Use the macro.
1074 (out_debug_info): Likewise.
1076 2006-05-05 Thiemo Seufer <ths@mips.com>
1077 David Ung <davidu@mips.com>
1079 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1081 (macro): Add new case M_CACHE_AB.
1083 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1085 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1086 (opcode_lookup): Issue a warning for opcode with
1087 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1088 identical to OT_cinfix3.
1089 (TxC3w, TC3w, tC3w): New.
1090 (insns): Use tC3w and TC3w for comparison instructions with
1093 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1095 * subsegs.h (struct frchain): Delete frch_seg.
1096 (frchain_root): Delete.
1097 (seg_info): Define as macro.
1098 * subsegs.c (frchain_root): Delete.
1099 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1100 (subsegs_begin, subseg_change): Adjust for above.
1101 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1102 rather than to one big list.
1103 (subseg_get): Don't special case abs, und sections.
1104 (subseg_new, subseg_force_new): Don't set frchainP here.
1106 (subsegs_print_statistics): Adjust frag chain control list traversal.
1107 * debug.c (dmp_frags): Likewise.
1108 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1109 at frchain_root. Make use of known frchain ordering.
1110 (last_frag_for_seg): Likewise.
1111 (get_frag_fix): Likewise. Add seg param.
1112 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1113 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1114 (SUB_SEGMENT_ALIGN): Likewise.
1115 (subsegs_finish): Adjust frchain list traversal.
1116 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1117 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1118 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1119 (xtensa_fix_b_j_loop_end_frags): Likewise.
1120 (xtensa_fix_close_loop_end_frags): Likewise.
1121 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1122 (retrieve_segment_info): Delete frch_seg initialisation.
1124 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1126 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1127 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1128 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1129 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1131 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1133 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1135 (md_apply_fix3): Multiply offset by 4 here for
1136 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1138 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1139 Jan Beulich <jbeulich@novell.com>
1141 * config/tc-i386.c (output_invalid_buf): Change size for
1143 * config/tc-tic30.c (output_invalid_buf): Likewise.
1145 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1147 * config/tc-tic30.c (output_invalid): Likewise.
1149 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1151 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1152 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1153 (asconfig.texi): Don't set top_srcdir.
1154 * doc/as.texinfo: Don't use top_srcdir.
1155 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1157 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1159 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1160 * config/tc-tic30.c (output_invalid_buf): Likewise.
1162 * config/tc-i386.c (output_invalid): Use snprintf instead of
1164 * config/tc-ia64.c (declare_register_set): Likewise.
1165 (emit_one_bundle): Likewise.
1166 (check_dependencies): Likewise.
1167 * config/tc-tic30.c (output_invalid): Likewise.
1169 2006-05-02 Paul Brook <paul@codesourcery.com>
1171 * config/tc-arm.c (arm_optimize_expr): New function.
1172 * config/tc-arm.h (md_optimize_expr): Define
1173 (arm_optimize_expr): Add prototype.
1174 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1176 2006-05-02 Ben Elliston <bje@au.ibm.com>
1178 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1181 * sb.h (sb_list_vector): Move to sb.c.
1182 * sb.c (free_list): Use type of sb_list_vector directly.
1183 (sb_build): Fix off-by-one error in assertion about `size'.
1185 2006-05-01 Ben Elliston <bje@au.ibm.com>
1187 * listing.c (listing_listing): Remove useless loop.
1188 * macro.c (macro_expand): Remove is_positional local variable.
1189 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1190 and simplify surrounding expressions, where possible.
1191 (assign_symbol): Likewise.
1192 (s_weakref): Likewise.
1193 * symbols.c (colon): Likewise.
1195 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1197 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1199 2006-04-30 Thiemo Seufer <ths@mips.com>
1200 David Ung <davidu@mips.com>
1202 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1203 (mips_immed): New table that records various handling of udi
1204 instruction patterns.
1205 (mips_ip): Adds udi handling.
1207 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1209 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1210 of list rather than beginning.
1212 2006-04-26 Julian Brown <julian@codesourcery.com>
1214 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1215 (is_quarter_float): Rename from above. Simplify slightly.
1216 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1218 (parse_neon_mov): Parse floating-point constants.
1219 (neon_qfloat_bits): Fix encoding.
1220 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1221 preference to integer encoding when using the F32 type.
1223 2006-04-26 Julian Brown <julian@codesourcery.com>
1225 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1226 zero-initialising structures containing it will lead to invalid types).
1227 (arm_it): Add vectype to each operand.
1228 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1230 (neon_typed_alias): New structure. Extra information for typed
1232 (reg_entry): Add neon type info field.
1233 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1234 Break out alternative syntax for coprocessor registers, etc. into...
1235 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1236 out from arm_reg_parse.
1237 (parse_neon_type): Move. Return SUCCESS/FAIL.
1238 (first_error): New function. Call to ensure first error which occurs is
1240 (parse_neon_operand_type): Parse exactly one type.
1241 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1242 (parse_typed_reg_or_scalar): New function. Handle core of both
1243 arm_typed_reg_parse and parse_scalar.
1244 (arm_typed_reg_parse): Parse a register with an optional type.
1245 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1247 (parse_scalar): Parse a Neon scalar with optional type.
1248 (parse_reg_list): Use first_error.
1249 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1250 (neon_alias_types_same): New function. Return true if two (alias) types
1252 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1254 (insert_reg_alias): Return new reg_entry not void.
1255 (insert_neon_reg_alias): New function. Insert type/index information as
1256 well as register for alias.
1257 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1258 make typed register aliases accordingly.
1259 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1261 (s_unreq): Delete type information if present.
1262 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1263 (s_arm_unwind_save_mmxwcg): Likewise.
1264 (s_arm_unwind_movsp): Likewise.
1265 (s_arm_unwind_setfp): Likewise.
1266 (parse_shift): Likewise.
1267 (parse_shifter_operand): Likewise.
1268 (parse_address): Likewise.
1269 (parse_tb): Likewise.
1270 (tc_arm_regname_to_dw2regnum): Likewise.
1271 (md_pseudo_table): Add dn, qn.
1272 (parse_neon_mov): Handle typed operands.
1273 (parse_operands): Likewise.
1274 (neon_type_mask): Add N_SIZ.
1275 (N_ALLMODS): New macro.
1276 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1277 (el_type_of_type_chk): Add some safeguards.
1278 (modify_types_allowed): Fix logic bug.
1279 (neon_check_type): Handle operands with types.
1280 (neon_three_same): Remove redundant optional arg handling.
1281 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1282 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1283 (do_neon_step): Adjust accordingly.
1284 (neon_cmode_for_logic_imm): Use first_error.
1285 (do_neon_bitfield): Call neon_check_type.
1286 (neon_dyadic): Rename to...
1287 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1288 to allow modification of type of the destination.
1289 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1290 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1291 (do_neon_compare): Make destination be an untyped bitfield.
1292 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1293 (neon_mul_mac): Return early in case of errors.
1294 (neon_move_immediate): Use first_error.
1295 (neon_mac_reg_scalar_long): Fix type to include scalar.
1296 (do_neon_dup): Likewise.
1297 (do_neon_mov): Likewise (in several places).
1298 (do_neon_tbl_tbx): Fix type.
1299 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1300 (do_neon_ld_dup): Exit early in case of errors and/or use
1302 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1303 Handle .dn/.qn directives.
1304 (REGDEF): Add zero for reg_entry neon field.
1306 2006-04-26 Julian Brown <julian@codesourcery.com>
1308 * config/tc-arm.c (limits.h): Include.
1309 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1310 (fpu_vfp_v3_or_neon_ext): Declare constants.
1311 (neon_el_type): New enumeration of types for Neon vector elements.
1312 (neon_type_el): New struct. Define type and size of a vector element.
1313 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1315 (neon_type): Define struct. The type of an instruction.
1316 (arm_it): Add 'vectype' for the current instruction.
1317 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1318 (vfp_sp_reg_pos): Rename to...
1319 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1321 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1322 (Neon D or Q register).
1323 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1325 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1326 (my_get_expression): Allow above constant as argument to accept
1327 64-bit constants with optional prefix.
1328 (arm_reg_parse): Add extra argument to return the specific type of
1329 register in when either a D or Q register (REG_TYPE_NDQ) is
1330 requested. Can be NULL.
1331 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1332 (parse_reg_list): Update for new arm_reg_parse args.
1333 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1334 (parse_neon_el_struct_list): New function. Parse element/structure
1335 register lists for VLD<n>/VST<n> instructions.
1336 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1337 (s_arm_unwind_save_mmxwr): Likewise.
1338 (s_arm_unwind_save_mmxwcg): Likewise.
1339 (s_arm_unwind_movsp): Likewise.
1340 (s_arm_unwind_setfp): Likewise.
1341 (parse_big_immediate): New function. Parse an immediate, which may be
1342 64 bits wide. Put results in inst.operands[i].
1343 (parse_shift): Update for new arm_reg_parse args.
1344 (parse_address): Likewise. Add parsing of alignment specifiers.
1345 (parse_neon_mov): Parse the operands of a VMOV instruction.
1346 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1347 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1348 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1349 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1350 (parse_operands): Handle new codes above.
1351 (encode_arm_vfp_sp_reg): Rename to...
1352 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1353 selected VFP version only supports D0-D15.
1354 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1355 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1356 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1357 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1358 encode_arm_vfp_reg name, and allow 32 D regs.
1359 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1360 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1362 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1363 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1364 constant-load and conversion insns introduced with VFPv3.
1365 (neon_tab_entry): New struct.
1366 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1367 those which are the targets of pseudo-instructions.
1368 (neon_opc): Enumerate opcodes, use as indices into...
1369 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1370 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1371 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1372 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1374 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1376 (neon_type_mask): New. Compact type representation for type checking.
1377 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1378 permitted type combinations.
1379 (N_IGNORE_TYPE): New macro.
1380 (neon_check_shape): New function. Check an instruction shape for
1381 multiple alternatives. Return the specific shape for the current
1383 (neon_modify_type_size): New function. Modify a vector type and size,
1384 depending on the bit mask in argument 1.
1385 (neon_type_promote): New function. Convert a given "key" type (of an
1386 operand) into the correct type for a different operand, based on a bit
1388 (type_chk_of_el_type): New function. Convert a type and size into the
1389 compact representation used for type checking.
1390 (el_type_of_type_ckh): New function. Reverse of above (only when a
1391 single bit is set in the bit mask).
1392 (modify_types_allowed): New function. Alter a mask of allowed types
1393 based on a bit mask of modifications.
1394 (neon_check_type): New function. Check the type of the current
1395 instruction against the variable argument list. The "key" type of the
1396 instruction is returned.
1397 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1398 a Neon data-processing instruction depending on whether we're in ARM
1399 mode or Thumb-2 mode.
1400 (neon_logbits): New function.
1401 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1402 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1403 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1404 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1405 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1406 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1407 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1408 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1409 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1410 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1411 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1412 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1413 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1414 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1415 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1416 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1417 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1418 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1419 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1420 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1421 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1422 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1423 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1424 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1425 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1427 (parse_neon_type): New function. Parse Neon type specifier.
1428 (opcode_lookup): Allow parsing of Neon type specifiers.
1429 (REGNUM2, REGSETH, REGSET2): New macros.
1430 (reg_names): Add new VFPv3 and Neon registers.
1431 (NUF, nUF, NCE, nCE): New macros for opcode table.
1432 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1433 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1434 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1435 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1436 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1437 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1438 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1439 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1440 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1441 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1442 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1443 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1444 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1445 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1447 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1448 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1449 (arm_option_cpu_value): Add vfp3 and neon.
1450 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1453 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1455 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1456 syntax instead of hardcoded opcodes with ".w18" suffixes.
1457 (wide_branch_opcode): New.
1458 (build_transition): Use it to check for wide branch opcodes with
1459 either ".w18" or ".w15" suffixes.
1461 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1463 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1464 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1465 frag's is_literal flag.
1467 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1469 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1471 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1473 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1474 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1475 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1476 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1477 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1479 2005-04-20 Paul Brook <paul@codesourcery.com>
1481 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1483 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1485 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1487 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1488 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1489 Make some cpus unsupported on ELF. Run "make dep-am".
1490 * Makefile.in: Regenerate.
1492 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1494 * configure.in (--enable-targets): Indent help message.
1495 * configure: Regenerate.
1497 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1500 * config/tc-i386.c (i386_immediate): Check illegal immediate
1503 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1505 * config/tc-i386.c: Formatting.
1506 (output_disp, output_imm): ISO C90 params.
1508 * frags.c (frag_offset_fixed_p): Constify args.
1509 * frags.h (frag_offset_fixed_p): Ditto.
1511 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1512 (COFF_MAGIC): Delete.
1514 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1516 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1518 * po/POTFILES.in: Regenerated.
1520 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1522 * doc/as.texinfo: Mention that some .type syntaxes are not
1523 supported on all architectures.
1525 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1527 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1528 instructions when such transformations have been disabled.
1530 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1532 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1533 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1534 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1535 decoding the loop instructions. Remove current_offset variable.
1536 (xtensa_fix_short_loop_frags): Likewise.
1537 (min_bytes_to_other_loop_end): Remove current_offset argument.
1539 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1541 * config/tc-z80.c (z80_optimize_expr): Removed.
1542 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1544 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1546 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1547 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1548 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1549 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1550 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1551 at90can64, at90usb646, at90usb647, at90usb1286 and
1553 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1555 2006-04-07 Paul Brook <paul@codesourcery.com>
1557 * config/tc-arm.c (parse_operands): Set default error message.
1559 2006-04-07 Paul Brook <paul@codesourcery.com>
1561 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1563 2006-04-07 Paul Brook <paul@codesourcery.com>
1565 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1567 2006-04-07 Paul Brook <paul@codesourcery.com>
1569 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1570 (move_or_literal_pool): Handle Thumb-2 instructions.
1571 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1573 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1576 * config/tc-i386.c (match_template): Move 64-bit operand tests
1579 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1581 * po/Make-in: Add install-html target.
1582 * Makefile.am: Add install-html and install-html-recursive targets.
1583 * Makefile.in: Regenerate.
1584 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1585 * configure: Regenerate.
1586 * doc/Makefile.am: Add install-html and install-html-am targets.
1587 * doc/Makefile.in: Regenerate.
1589 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1591 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1594 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1595 Daniel Jacobowitz <dan@codesourcery.com>
1597 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1598 (GOTT_BASE, GOTT_INDEX): New.
1599 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1600 GOTT_INDEX when generating VxWorks PIC.
1601 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1602 use the generic *-*-vxworks* stanza instead.
1604 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1607 * frags.c (frag_offset_fixed_p): New function.
1608 * frags.h (frag_offset_fixed_p): Declare.
1609 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1610 (resolve_expression): Likewise.
1612 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1614 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1615 of the same length but different numbers of slots.
1617 2006-03-30 Andreas Schwab <schwab@suse.de>
1619 * configure.in: Fix help string for --enable-targets option.
1620 * configure: Regenerate.
1622 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1624 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1625 (m68k_ip): ... here. Use for all chips. Protect against buffer
1626 overrun and avoid excessive copying.
1628 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1629 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1630 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1631 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1632 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1633 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1634 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1635 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1636 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1637 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1638 (struct m68k_cpu): Change chip field to control_regs.
1639 (current_chip): Remove.
1640 (control_regs): New.
1641 (m68k_archs, m68k_extensions): Adjust.
1642 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1643 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1644 (find_cf_chip): Reimplement for new organization of cpu table.
1645 (select_control_regs): Remove.
1647 (struct save_opts): Save control regs, not chip.
1648 (s_save, s_restore): Adjust.
1649 (m68k_lookup_cpu): Give deprecated warning when necessary.
1650 (m68k_init_arch): Adjust.
1651 (md_show_usage): Adjust for new cpu table organization.
1653 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1655 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1656 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1657 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1659 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1660 (any_gotrel): New rule.
1661 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1662 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1664 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1665 (bfin_pic_ptr): New function.
1666 (md_pseudo_table): Add it for ".picptr".
1667 (OPTION_FDPIC): New macro.
1668 (md_longopts): Add -mfdpic.
1669 (md_parse_option): Handle it.
1670 (md_begin): Set BFD flags.
1671 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1672 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1674 * Makefile.am (bfin-parse.o): Update dependencies.
1675 (DEPTC_bfin_elf): Likewise.
1676 * Makefile.in: Regenerate.
1678 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1680 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1681 mcfemac instead of mcfmac.
1683 2006-03-23 Michael Matz <matz@suse.de>
1685 * config/tc-i386.c (type_names): Correct placement of 'static'.
1686 (reloc): Map some more relocs to their 64 bit counterpart when
1688 (output_insn): Work around breakage if DEBUG386 is defined.
1689 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1690 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1691 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1692 different from i386.
1693 (output_imm): Ditto.
1694 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1696 (md_convert_frag): Jumps can now be larger than 2GB away, error
1698 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1699 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1701 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1702 Daniel Jacobowitz <dan@codesourcery.com>
1703 Phil Edwards <phil@codesourcery.com>
1704 Zack Weinberg <zack@codesourcery.com>
1705 Mark Mitchell <mark@codesourcery.com>
1706 Nathan Sidwell <nathan@codesourcery.com>
1708 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1709 (md_begin): Complain about -G being used for PIC. Don't change
1710 the text, data and bss alignments on VxWorks.
1711 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1712 generating VxWorks PIC.
1713 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1714 (macro): Likewise, but do not treat la $25 specially for
1715 VxWorks PIC, and do not handle jal.
1716 (OPTION_MVXWORKS_PIC): New macro.
1717 (md_longopts): Add -mvxworks-pic.
1718 (md_parse_option): Don't complain about using PIC and -G together here.
1719 Handle OPTION_MVXWORKS_PIC.
1720 (md_estimate_size_before_relax): Always use the first relaxation
1721 sequence on VxWorks.
1722 * config/tc-mips.h (VXWORKS_PIC): New.
1724 2006-03-21 Paul Brook <paul@codesourcery.com>
1726 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1728 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1730 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1731 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1732 (get_loop_align_size): New.
1733 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1734 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1735 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1736 (get_noop_aligned_address): Use get_loop_align_size.
1737 (get_aligned_diff): Likewise.
1739 2006-03-21 Paul Brook <paul@codesourcery.com>
1741 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1743 2006-03-20 Paul Brook <paul@codesourcery.com>
1745 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1746 (do_t_branch): Encode branches inside IT blocks as unconditional.
1747 (do_t_cps): New function.
1748 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1749 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1750 (opcode_lookup): Allow conditional suffixes on all instructions in
1752 (md_assemble): Advance condexec state before checking for errors.
1753 (insns): Use do_t_cps.
1755 2006-03-20 Paul Brook <paul@codesourcery.com>
1757 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1758 outputting the insn.
1760 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1762 * config/tc-vax.c: Update copyright year.
1763 * config/tc-vax.h: Likewise.
1765 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1767 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1769 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1771 2006-03-17 Paul Brook <paul@codesourcery.com>
1773 * config/tc-arm.c (insns): Add ldm and stm.
1775 2006-03-17 Ben Elliston <bje@au.ibm.com>
1778 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1780 2006-03-16 Paul Brook <paul@codesourcery.com>
1782 * config/tc-arm.c (insns): Add "svc".
1784 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1786 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1787 flag and avoid double underscore prefixes.
1789 2006-03-10 Paul Brook <paul@codesourcery.com>
1791 * config/tc-arm.c (md_begin): Handle EABIv5.
1792 (arm_eabis): Add EF_ARM_EABI_VER5.
1793 * doc/c-arm.texi: Document -meabi=5.
1795 2006-03-10 Ben Elliston <bje@au.ibm.com>
1797 * app.c (do_scrub_chars): Simplify string handling.
1799 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1800 Daniel Jacobowitz <dan@codesourcery.com>
1801 Zack Weinberg <zack@codesourcery.com>
1802 Nathan Sidwell <nathan@codesourcery.com>
1803 Paul Brook <paul@codesourcery.com>
1804 Ricardo Anguiano <anguiano@codesourcery.com>
1805 Phil Edwards <phil@codesourcery.com>
1807 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1808 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1810 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1811 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1812 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1814 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1816 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1817 even when using the text-section-literals option.
1819 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1821 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1823 (m68k_ip): <case 'J'> Check we have some control regs.
1824 (md_parse_option): Allow raw arch switch.
1825 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1826 whether 68881 or cfloat was meant by -mfloat.
1827 (md_show_usage): Adjust extension display.
1828 (m68k_elf_final_processing): Adjust.
1830 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1832 * config/tc-avr.c (avr_mod_hash_value): New function.
1833 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1834 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1835 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1836 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1838 (tc_gen_reloc): Handle substractions of symbols, if possible do
1839 fixups, abort otherwise.
1840 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1841 tc_fix_adjustable): Define.
1843 2006-03-02 James E Wilson <wilson@specifix.com>
1845 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1846 change the template, then clear md.slot[curr].end_of_insn_group.
1848 2006-02-28 Jan Beulich <jbeulich@novell.com>
1850 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1852 2006-02-28 Jan Beulich <jbeulich@novell.com>
1855 * macro.c (getstring): Don't treat parentheses special anymore.
1856 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1857 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1860 2006-02-28 Mat <mat@csail.mit.edu>
1862 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1864 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1866 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1868 (CFI_signal_frame): Define.
1869 (cfi_pseudo_table): Add .cfi_signal_frame.
1870 (dot_cfi): Handle CFI_signal_frame.
1871 (output_cie): Handle cie->signal_frame.
1872 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1873 different. Copy signal_frame from FDE to newly created CIE.
1874 * doc/as.texinfo: Document .cfi_signal_frame.
1876 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1878 * doc/Makefile.am: Add html target.
1879 * doc/Makefile.in: Regenerate.
1880 * po/Make-in: Add html target.
1882 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1884 * config/tc-i386.c (output_insn): Support Intel Merom New
1887 * config/tc-i386.h (CpuMNI): New.
1888 (CpuUnknownFlags): Add CpuMNI.
1890 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1892 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1893 (hpriv_reg_table): New table for hyperprivileged registers.
1894 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1897 2006-02-24 DJ Delorie <dj@redhat.com>
1899 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1900 (tc_gen_reloc): Don't define.
1901 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1902 (OPTION_LINKRELAX): New.
1903 (md_longopts): Add it.
1905 (md_parse_options): Set it.
1906 (md_assemble): Emit relaxation relocs as needed.
1907 (md_convert_frag): Emit relaxation relocs as needed.
1908 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1909 (m32c_apply_fix): New.
1910 (tc_gen_reloc): New.
1911 (m32c_force_relocation): Force out jump relocs when relaxing.
1912 (m32c_fix_adjustable): Return false if relaxing.
1914 2006-02-24 Paul Brook <paul@codesourcery.com>
1916 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1917 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1918 (struct asm_barrier_opt): Define.
1919 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1920 (parse_psr): Accept V7M psr names.
1921 (parse_barrier): New function.
1922 (enum operand_parse_code): Add OP_oBARRIER.
1923 (parse_operands): Implement OP_oBARRIER.
1924 (do_barrier): New function.
1925 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1926 (do_t_cpsi): Add V7M restrictions.
1927 (do_t_mrs, do_t_msr): Validate V7M variants.
1928 (md_assemble): Check for NULL variants.
1929 (v7m_psrs, barrier_opt_names): New tables.
1930 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1931 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1932 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1933 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1934 (struct cpu_arch_ver_table): Define.
1935 (cpu_arch_ver): New.
1936 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1937 Tag_CPU_arch_profile.
1938 * doc/c-arm.texi: Document new cpu and arch options.
1940 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1942 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1944 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1946 * config/tc-ia64.c: Update copyright years.
1948 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1950 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1953 2005-02-22 Paul Brook <paul@codesourcery.com>
1955 * config/tc-arm.c (do_pld): Remove incorrect write to
1957 (encode_thumb32_addr_mode): Use correct operand.
1959 2006-02-21 Paul Brook <paul@codesourcery.com>
1961 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1963 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1964 Anil Paranjape <anilp1@kpitcummins.com>
1965 Shilin Shakti <shilins@kpitcummins.com>
1967 * Makefile.am: Add xc16x related entry.
1968 * Makefile.in: Regenerate.
1969 * configure.in: Added xc16x related entry.
1970 * configure: Regenerate.
1971 * config/tc-xc16x.h: New file
1972 * config/tc-xc16x.c: New file
1973 * doc/c-xc16x.texi: New file for xc16x
1974 * doc/all.texi: Entry for xc16x
1975 * doc/Makefile.texi: Added c-xc16x.texi
1976 * NEWS: Announce the support for the new target.
1978 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1980 * configure.tgt: set emulation for mips-*-netbsd*
1982 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1984 * config.in: Rebuilt.
1986 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1988 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1989 from 1, not 0, in error messages.
1990 (md_assemble): Simplify special-case check for ENTRY instructions.
1991 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1992 operand in error message.
1994 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1996 * configure.tgt (arm-*-linux-gnueabi*): Change to
1999 2006-02-10 Nick Clifton <nickc@redhat.com>
2001 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2002 32-bit value is propagated into the upper bits of a 64-bit long.
2004 * config/tc-arc.c (init_opcode_tables): Fix cast.
2005 (arc_extoper, md_operand): Likewise.
2007 2006-02-09 David Heine <dlheine@tensilica.com>
2009 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2010 each relaxation step.
2012 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2014 * configure.in (CHECK_DECLS): Add vsnprintf.
2015 * configure: Regenerate.
2016 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2017 include/declare here, but...
2018 * as.h: Move code detecting VARARGS idiom to the top.
2019 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2020 (vsnprintf): Declare if not already declared.
2022 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2024 * as.c (close_output_file): New.
2025 (main): Register close_output_file with xatexit before
2026 dump_statistics. Don't call output_file_close.
2028 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2030 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2031 mcf5329_control_regs): New.
2032 (not_current_architecture, selected_arch, selected_cpu): New.
2033 (m68k_archs, m68k_extensions): New.
2034 (archs): Renamed to ...
2035 (m68k_cpus): ... here. Adjust.
2037 (md_pseudo_table): Add arch and cpu directives.
2038 (find_cf_chip, m68k_ip): Adjust table scanning.
2039 (no_68851, no_68881): Remove.
2040 (md_assemble): Lazily initialize.
2041 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2042 (md_init_after_args): Move functionality to m68k_init_arch.
2043 (mri_chip): Adjust table scanning.
2044 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2045 options with saner parsing.
2046 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2047 m68k_init_arch): New.
2048 (s_m68k_cpu, s_m68k_arch): New.
2049 (md_show_usage): Adjust.
2050 (m68k_elf_final_processing): Set CF EF flags.
2051 * config/tc-m68k.h (m68k_init_after_args): Remove.
2052 (tc_init_after_args): Remove.
2053 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2054 (M68k-Directives): Document .arch and .cpu directives.
2056 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2058 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2059 synonyms for equ and defl.
2060 (z80_cons_fix_new): New function.
2061 (emit_byte): Disallow relative jumps to absolute locations.
2062 (emit_data): Only handle defb, prototype changed, because defb is
2063 now handled as pseudo-op rather than an instruction.
2064 (instab): Entries for defb,defw,db,dw moved from here...
2065 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2066 Add entries for def24,def32,d24,d32.
2067 (md_assemble): Improved error handling.
2068 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2069 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2070 (z80_cons_fix_new): Declare.
2071 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2072 (def24,d24,def32,d32): New pseudo-ops.
2074 2006-02-02 Paul Brook <paul@codesourcery.com>
2076 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2078 2005-02-02 Paul Brook <paul@codesourcery.com>
2080 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2081 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2082 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2083 T2_OPCODE_RSB): Define.
2084 (thumb32_negate_data_op): New function.
2085 (md_apply_fix): Use it.
2087 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2089 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2091 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2092 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2094 (relaxation_requirements): Add pfinish_frag argument and use it to
2095 replace setting tinsn->record_fix fields.
2096 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2097 and vinsn_to_insnbuf. Remove references to record_fix and
2098 slot_sub_symbols fields.
2099 (xtensa_mark_narrow_branches): Delete unused code.
2100 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2102 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2104 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2105 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2106 of the record_fix field. Simplify error messages for unexpected
2108 (set_expr_symbol_offset_diff): Delete.
2110 2006-01-31 Paul Brook <paul@codesourcery.com>
2112 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2114 2006-01-31 Paul Brook <paul@codesourcery.com>
2115 Richard Earnshaw <rearnsha@arm.com>
2117 * config/tc-arm.c: Use arm_feature_set.
2118 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2119 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2120 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2123 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2124 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2125 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2126 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2128 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2129 (arm_opts): Move old cpu/arch options from here...
2130 (arm_legacy_opts): ... to here.
2131 (md_parse_option): Search arm_legacy_opts.
2132 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2133 (arm_float_abis, arm_eabis): Make const.
2135 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2137 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2139 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2141 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2142 in load immediate intruction.
2144 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2146 * config/bfin-parse.y (value_match): Use correct conversion
2147 specifications in template string for __FILE__ and __LINE__.
2151 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2153 Introduce TLS descriptors for i386 and x86_64.
2154 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2155 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2156 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2157 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2158 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2160 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2161 (lex_got): Handle @tlsdesc and @tlscall.
2162 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2164 2006-01-11 Nick Clifton <nickc@redhat.com>
2166 Fixes for building on 64-bit hosts:
2167 * config/tc-avr.c (mod_index): New union to allow conversion
2168 between pointers and integers.
2169 (md_begin, avr_ldi_expression): Use it.
2170 * config/tc-i370.c (md_assemble): Add cast for argument to print
2172 * config/tc-tic54x.c (subsym_substitute): Likewise.
2173 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2174 opindex field of fr_cgen structure into a pointer so that it can
2175 be stored in a frag.
2176 * config/tc-mn10300.c (md_assemble): Likewise.
2177 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2179 * config/tc-v850.c: Replace uses of (int) casts with correct
2182 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2185 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2187 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2190 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2191 a local-label reference.
2193 For older changes see ChangeLog-2005
2199 version-control: never
projects / external / binutils.git / blob