1 2006-05-19 Thiemo Seufer <ths@mips.com>
2 David Ung <davidu@mips.com>
4 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
5 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
6 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
7 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
8 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
9 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
10 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
11 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
12 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
13 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
14 reg_names_o32, reg_names_n32n64): Define register classes.
15 (reg_lookup): New function, use register classes.
16 (md_begin): Reserve register names in the symbol table. Simplify
18 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
20 (mips16_ip): Use reg_lookup.
21 (tc_get_register): Likewise.
22 (tc_mips_regname_to_dw2regnum): New function.
24 2006-05-19 Thiemo Seufer <ths@mips.com>
26 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
27 Un-constify string argument.
28 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
30 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
32 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
34 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
36 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
38 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
41 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
43 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
44 cfloat/m68881 to correct architecture before using it.
46 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
48 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
51 2006-05-15 Paul Brook <paul@codesourcery.com>
53 * config/tc-arm.c (arm_adjust_symtab): Use
54 bfd_is_arm_special_symbol_name.
56 2006-05-15 Bob Wilson <bob.wilson@acm.org>
58 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
59 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
60 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
61 Handle errors from calls to xtensa_opcode_is_* functions.
63 2006-05-14 Thiemo Seufer <ths@mips.com>
65 * config/tc-mips.c (macro_build): Test for currently active
67 (mips16_ip): Reject invalid opcodes.
69 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
71 * doc/as.texinfo: Rename "Index" to "AS Index",
72 and "ABORT" to "ABORT (COFF)".
74 2006-05-11 Paul Brook <paul@codesourcery.com>
76 * config/tc-arm.c (parse_half): New function.
77 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
78 (parse_operands): Ditto.
79 (do_mov16): Reject invalid relocations.
80 (do_t_mov16): Ditto. Use Thumb reloc numbers.
81 (insns): Replace Iffff with HALF.
82 (md_apply_fix): Add MOVW and MOVT relocs.
83 (tc_gen_reloc): Ditto.
84 * doc/c-arm.texi: Document relocation operators
86 2006-05-11 Paul Brook <paul@codesourcery.com>
88 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
90 2006-05-11 Thiemo Seufer <ths@mips.com>
92 * config/tc-mips.c (append_insn): Don't check the range of j or
95 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
97 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
98 relocs against external symbols for WinCE targets.
99 (md_apply_fix): Likewise.
101 2006-05-09 David Ung <davidu@mips.com>
103 * config/tc-mips.c (append_insn): Only warn about an out-of-range
106 2006-05-09 Nick Clifton <nickc@redhat.com>
108 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
109 against symbols which are not going to be placed into the symbol
112 2006-05-09 Ben Elliston <bje@au.ibm.com>
114 * expr.c (operand): Remove `if (0 && ..)' statement and
115 subsequently unused target_op label. Collapse `if (1 || ..)'
117 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
118 separately above the switch.
120 2006-05-08 Nick Clifton <nickc@redhat.com>
123 * config/tc-msp430.c (line_separator_character): Define as |.
125 2006-05-08 Thiemo Seufer <ths@mips.com>
126 Nigel Stephens <nigel@mips.com>
127 David Ung <davidu@mips.com>
129 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
130 (mips_opts): Likewise.
131 (file_ase_smartmips): New variable.
132 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
133 (macro_build): Handle SmartMIPS instructions.
135 (md_longopts): Add argument handling for smartmips.
136 (md_parse_options, mips_after_parse_args): Likewise.
137 (s_mipsset): Add .set smartmips support.
138 (md_show_usage): Document -msmartmips/-mno-smartmips.
139 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
141 * doc/c-mips.texi: Likewise.
143 2006-05-08 Alan Modra <amodra@bigpond.net.au>
145 * write.c (relax_segment): Add pass count arg. Don't error on
146 negative org/space on first two passes.
147 (relax_seg_info): New struct.
148 (relax_seg, write_object_file): Adjust.
149 * write.h (relax_segment): Update prototype.
151 2006-05-05 Julian Brown <julian@codesourcery.com>
153 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
155 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
156 architecture version checks.
157 (insns): Allow overlapping instructions to be used in VFP mode.
159 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
162 * config/obj-elf.c (obj_elf_change_section): Allow user
163 specified SHF_ALPHA_GPREL.
165 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
167 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
168 for PMEM related expressions.
170 2006-05-05 Nick Clifton <nickc@redhat.com>
173 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
174 insertion of a directory separator character into a string at a
175 given offset. Uses heuristics to decide when to use a backslash
176 character rather than a forward-slash character.
177 (dwarf2_directive_loc): Use the macro.
178 (out_debug_info): Likewise.
180 2006-05-05 Thiemo Seufer <ths@mips.com>
181 David Ung <davidu@mips.com>
183 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
185 (macro): Add new case M_CACHE_AB.
187 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
189 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
190 (opcode_lookup): Issue a warning for opcode with
191 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
192 identical to OT_cinfix3.
193 (TxC3w, TC3w, tC3w): New.
194 (insns): Use tC3w and TC3w for comparison instructions with
197 2006-05-04 Alan Modra <amodra@bigpond.net.au>
199 * subsegs.h (struct frchain): Delete frch_seg.
200 (frchain_root): Delete.
201 (seg_info): Define as macro.
202 * subsegs.c (frchain_root): Delete.
203 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
204 (subsegs_begin, subseg_change): Adjust for above.
205 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
206 rather than to one big list.
207 (subseg_get): Don't special case abs, und sections.
208 (subseg_new, subseg_force_new): Don't set frchainP here.
210 (subsegs_print_statistics): Adjust frag chain control list traversal.
211 * debug.c (dmp_frags): Likewise.
212 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
213 at frchain_root. Make use of known frchain ordering.
214 (last_frag_for_seg): Likewise.
215 (get_frag_fix): Likewise. Add seg param.
216 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
217 * write.c (chain_frchains_together_1): Adjust for struct frchain.
218 (SUB_SEGMENT_ALIGN): Likewise.
219 (subsegs_finish): Adjust frchain list traversal.
220 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
221 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
222 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
223 (xtensa_fix_b_j_loop_end_frags): Likewise.
224 (xtensa_fix_close_loop_end_frags): Likewise.
225 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
226 (retrieve_segment_info): Delete frch_seg initialisation.
228 2006-05-03 Alan Modra <amodra@bigpond.net.au>
230 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
231 * config/obj-elf.h (obj_sec_set_private_data): Delete.
232 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
233 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
235 2006-05-02 Joseph Myers <joseph@codesourcery.com>
237 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
239 (md_apply_fix3): Multiply offset by 4 here for
240 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
242 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
243 Jan Beulich <jbeulich@novell.com>
245 * config/tc-i386.c (output_invalid_buf): Change size for
247 * config/tc-tic30.c (output_invalid_buf): Likewise.
249 * config/tc-i386.c (output_invalid): Cast none-ascii char to
251 * config/tc-tic30.c (output_invalid): Likewise.
253 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
255 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
256 (TEXI2POD): Use AM_MAKEINFOFLAGS.
257 (asconfig.texi): Don't set top_srcdir.
258 * doc/as.texinfo: Don't use top_srcdir.
259 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
261 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
263 * config/tc-i386.c (output_invalid_buf): Change size to 16.
264 * config/tc-tic30.c (output_invalid_buf): Likewise.
266 * config/tc-i386.c (output_invalid): Use snprintf instead of
268 * config/tc-ia64.c (declare_register_set): Likewise.
269 (emit_one_bundle): Likewise.
270 (check_dependencies): Likewise.
271 * config/tc-tic30.c (output_invalid): Likewise.
273 2006-05-02 Paul Brook <paul@codesourcery.com>
275 * config/tc-arm.c (arm_optimize_expr): New function.
276 * config/tc-arm.h (md_optimize_expr): Define
277 (arm_optimize_expr): Add prototype.
278 (TC_FORCE_RELOCATION_SUB_SAME): Define.
280 2006-05-02 Ben Elliston <bje@au.ibm.com>
282 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
285 * sb.h (sb_list_vector): Move to sb.c.
286 * sb.c (free_list): Use type of sb_list_vector directly.
287 (sb_build): Fix off-by-one error in assertion about `size'.
289 2006-05-01 Ben Elliston <bje@au.ibm.com>
291 * listing.c (listing_listing): Remove useless loop.
292 * macro.c (macro_expand): Remove is_positional local variable.
293 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
294 and simplify surrounding expressions, where possible.
295 (assign_symbol): Likewise.
296 (s_weakref): Likewise.
297 * symbols.c (colon): Likewise.
299 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
301 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
303 2006-04-30 Thiemo Seufer <ths@mips.com>
304 David Ung <davidu@mips.com>
306 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
307 (mips_immed): New table that records various handling of udi
308 instruction patterns.
309 (mips_ip): Adds udi handling.
311 2006-04-28 Alan Modra <amodra@bigpond.net.au>
313 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
314 of list rather than beginning.
316 2006-04-26 Julian Brown <julian@codesourcery.com>
318 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
319 (is_quarter_float): Rename from above. Simplify slightly.
320 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
322 (parse_neon_mov): Parse floating-point constants.
323 (neon_qfloat_bits): Fix encoding.
324 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
325 preference to integer encoding when using the F32 type.
327 2006-04-26 Julian Brown <julian@codesourcery.com>
329 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
330 zero-initialising structures containing it will lead to invalid types).
331 (arm_it): Add vectype to each operand.
332 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
334 (neon_typed_alias): New structure. Extra information for typed
336 (reg_entry): Add neon type info field.
337 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
338 Break out alternative syntax for coprocessor registers, etc. into...
339 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
340 out from arm_reg_parse.
341 (parse_neon_type): Move. Return SUCCESS/FAIL.
342 (first_error): New function. Call to ensure first error which occurs is
344 (parse_neon_operand_type): Parse exactly one type.
345 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
346 (parse_typed_reg_or_scalar): New function. Handle core of both
347 arm_typed_reg_parse and parse_scalar.
348 (arm_typed_reg_parse): Parse a register with an optional type.
349 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
351 (parse_scalar): Parse a Neon scalar with optional type.
352 (parse_reg_list): Use first_error.
353 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
354 (neon_alias_types_same): New function. Return true if two (alias) types
356 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
358 (insert_reg_alias): Return new reg_entry not void.
359 (insert_neon_reg_alias): New function. Insert type/index information as
360 well as register for alias.
361 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
362 make typed register aliases accordingly.
363 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
365 (s_unreq): Delete type information if present.
366 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
367 (s_arm_unwind_save_mmxwcg): Likewise.
368 (s_arm_unwind_movsp): Likewise.
369 (s_arm_unwind_setfp): Likewise.
370 (parse_shift): Likewise.
371 (parse_shifter_operand): Likewise.
372 (parse_address): Likewise.
373 (parse_tb): Likewise.
374 (tc_arm_regname_to_dw2regnum): Likewise.
375 (md_pseudo_table): Add dn, qn.
376 (parse_neon_mov): Handle typed operands.
377 (parse_operands): Likewise.
378 (neon_type_mask): Add N_SIZ.
379 (N_ALLMODS): New macro.
380 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
381 (el_type_of_type_chk): Add some safeguards.
382 (modify_types_allowed): Fix logic bug.
383 (neon_check_type): Handle operands with types.
384 (neon_three_same): Remove redundant optional arg handling.
385 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
386 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
387 (do_neon_step): Adjust accordingly.
388 (neon_cmode_for_logic_imm): Use first_error.
389 (do_neon_bitfield): Call neon_check_type.
390 (neon_dyadic): Rename to...
391 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
392 to allow modification of type of the destination.
393 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
394 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
395 (do_neon_compare): Make destination be an untyped bitfield.
396 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
397 (neon_mul_mac): Return early in case of errors.
398 (neon_move_immediate): Use first_error.
399 (neon_mac_reg_scalar_long): Fix type to include scalar.
400 (do_neon_dup): Likewise.
401 (do_neon_mov): Likewise (in several places).
402 (do_neon_tbl_tbx): Fix type.
403 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
404 (do_neon_ld_dup): Exit early in case of errors and/or use
406 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
407 Handle .dn/.qn directives.
408 (REGDEF): Add zero for reg_entry neon field.
410 2006-04-26 Julian Brown <julian@codesourcery.com>
412 * config/tc-arm.c (limits.h): Include.
413 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
414 (fpu_vfp_v3_or_neon_ext): Declare constants.
415 (neon_el_type): New enumeration of types for Neon vector elements.
416 (neon_type_el): New struct. Define type and size of a vector element.
417 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
419 (neon_type): Define struct. The type of an instruction.
420 (arm_it): Add 'vectype' for the current instruction.
421 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
422 (vfp_sp_reg_pos): Rename to...
423 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
425 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
426 (Neon D or Q register).
427 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
429 (GE_OPT_PREFIX_BIG): Define constant, for use in...
430 (my_get_expression): Allow above constant as argument to accept
431 64-bit constants with optional prefix.
432 (arm_reg_parse): Add extra argument to return the specific type of
433 register in when either a D or Q register (REG_TYPE_NDQ) is
434 requested. Can be NULL.
435 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
436 (parse_reg_list): Update for new arm_reg_parse args.
437 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
438 (parse_neon_el_struct_list): New function. Parse element/structure
439 register lists for VLD<n>/VST<n> instructions.
440 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
441 (s_arm_unwind_save_mmxwr): Likewise.
442 (s_arm_unwind_save_mmxwcg): Likewise.
443 (s_arm_unwind_movsp): Likewise.
444 (s_arm_unwind_setfp): Likewise.
445 (parse_big_immediate): New function. Parse an immediate, which may be
446 64 bits wide. Put results in inst.operands[i].
447 (parse_shift): Update for new arm_reg_parse args.
448 (parse_address): Likewise. Add parsing of alignment specifiers.
449 (parse_neon_mov): Parse the operands of a VMOV instruction.
450 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
451 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
452 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
453 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
454 (parse_operands): Handle new codes above.
455 (encode_arm_vfp_sp_reg): Rename to...
456 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
457 selected VFP version only supports D0-D15.
458 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
459 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
460 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
461 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
462 encode_arm_vfp_reg name, and allow 32 D regs.
463 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
464 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
466 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
467 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
468 constant-load and conversion insns introduced with VFPv3.
469 (neon_tab_entry): New struct.
470 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
471 those which are the targets of pseudo-instructions.
472 (neon_opc): Enumerate opcodes, use as indices into...
473 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
474 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
475 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
476 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
478 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
480 (neon_type_mask): New. Compact type representation for type checking.
481 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
482 permitted type combinations.
483 (N_IGNORE_TYPE): New macro.
484 (neon_check_shape): New function. Check an instruction shape for
485 multiple alternatives. Return the specific shape for the current
487 (neon_modify_type_size): New function. Modify a vector type and size,
488 depending on the bit mask in argument 1.
489 (neon_type_promote): New function. Convert a given "key" type (of an
490 operand) into the correct type for a different operand, based on a bit
492 (type_chk_of_el_type): New function. Convert a type and size into the
493 compact representation used for type checking.
494 (el_type_of_type_ckh): New function. Reverse of above (only when a
495 single bit is set in the bit mask).
496 (modify_types_allowed): New function. Alter a mask of allowed types
497 based on a bit mask of modifications.
498 (neon_check_type): New function. Check the type of the current
499 instruction against the variable argument list. The "key" type of the
500 instruction is returned.
501 (neon_dp_fixup): New function. Fill in and modify instruction bits for
502 a Neon data-processing instruction depending on whether we're in ARM
503 mode or Thumb-2 mode.
504 (neon_logbits): New function.
505 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
506 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
507 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
508 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
509 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
510 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
511 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
512 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
513 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
514 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
515 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
516 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
517 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
518 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
519 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
520 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
521 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
522 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
523 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
524 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
525 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
526 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
527 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
528 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
529 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
531 (parse_neon_type): New function. Parse Neon type specifier.
532 (opcode_lookup): Allow parsing of Neon type specifiers.
533 (REGNUM2, REGSETH, REGSET2): New macros.
534 (reg_names): Add new VFPv3 and Neon registers.
535 (NUF, nUF, NCE, nCE): New macros for opcode table.
536 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
537 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
538 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
539 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
540 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
541 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
542 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
543 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
544 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
545 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
546 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
547 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
548 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
549 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
551 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
552 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
553 (arm_option_cpu_value): Add vfp3 and neon.
554 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
557 2006-04-25 Bob Wilson <bob.wilson@acm.org>
559 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
560 syntax instead of hardcoded opcodes with ".w18" suffixes.
561 (wide_branch_opcode): New.
562 (build_transition): Use it to check for wide branch opcodes with
563 either ".w18" or ".w15" suffixes.
565 2006-04-25 Bob Wilson <bob.wilson@acm.org>
567 * config/tc-xtensa.c (xtensa_create_literal_symbol,
568 xg_assemble_literal, xg_assemble_literal_space): Do not set the
569 frag's is_literal flag.
571 2006-04-25 Bob Wilson <bob.wilson@acm.org>
573 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
575 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
577 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
578 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
579 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
580 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
581 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
583 2005-04-20 Paul Brook <paul@codesourcery.com>
585 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
587 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
589 2006-04-19 Alan Modra <amodra@bigpond.net.au>
591 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
592 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
593 Make some cpus unsupported on ELF. Run "make dep-am".
594 * Makefile.in: Regenerate.
596 2006-04-19 Alan Modra <amodra@bigpond.net.au>
598 * configure.in (--enable-targets): Indent help message.
599 * configure: Regenerate.
601 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
604 * config/tc-i386.c (i386_immediate): Check illegal immediate
607 2006-04-18 Alan Modra <amodra@bigpond.net.au>
609 * config/tc-i386.c: Formatting.
610 (output_disp, output_imm): ISO C90 params.
612 * frags.c (frag_offset_fixed_p): Constify args.
613 * frags.h (frag_offset_fixed_p): Ditto.
615 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
616 (COFF_MAGIC): Delete.
618 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
620 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
622 * po/POTFILES.in: Regenerated.
624 2006-04-16 Mark Mitchell <mark@codesourcery.com>
626 * doc/as.texinfo: Mention that some .type syntaxes are not
627 supported on all architectures.
629 2006-04-14 Sterling Augustine <sterling@tensilica.com>
631 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
632 instructions when such transformations have been disabled.
634 2006-04-10 Sterling Augustine <sterling@tensilica.com>
636 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
637 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
638 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
639 decoding the loop instructions. Remove current_offset variable.
640 (xtensa_fix_short_loop_frags): Likewise.
641 (min_bytes_to_other_loop_end): Remove current_offset argument.
643 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
645 * config/tc-z80.c (z80_optimize_expr): Removed.
646 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
648 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
650 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
651 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
652 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
653 atmega644, atmega329, atmega3290, atmega649, atmega6490,
654 atmega406, atmega640, atmega1280, atmega1281, at90can32,
655 at90can64, at90usb646, at90usb647, at90usb1286 and
657 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
659 2006-04-07 Paul Brook <paul@codesourcery.com>
661 * config/tc-arm.c (parse_operands): Set default error message.
663 2006-04-07 Paul Brook <paul@codesourcery.com>
665 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
667 2006-04-07 Paul Brook <paul@codesourcery.com>
669 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
671 2006-04-07 Paul Brook <paul@codesourcery.com>
673 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
674 (move_or_literal_pool): Handle Thumb-2 instructions.
675 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
677 2006-04-07 Alan Modra <amodra@bigpond.net.au>
680 * config/tc-i386.c (match_template): Move 64-bit operand tests
683 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
685 * po/Make-in: Add install-html target.
686 * Makefile.am: Add install-html and install-html-recursive targets.
687 * Makefile.in: Regenerate.
688 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
689 * configure: Regenerate.
690 * doc/Makefile.am: Add install-html and install-html-am targets.
691 * doc/Makefile.in: Regenerate.
693 2006-04-06 Alan Modra <amodra@bigpond.net.au>
695 * frags.c (frag_offset_fixed_p): Reinitialise offset before
698 2006-04-05 Richard Sandiford <richard@codesourcery.com>
699 Daniel Jacobowitz <dan@codesourcery.com>
701 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
702 (GOTT_BASE, GOTT_INDEX): New.
703 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
704 GOTT_INDEX when generating VxWorks PIC.
705 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
706 use the generic *-*-vxworks* stanza instead.
708 2006-04-04 Alan Modra <amodra@bigpond.net.au>
711 * frags.c (frag_offset_fixed_p): New function.
712 * frags.h (frag_offset_fixed_p): Declare.
713 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
714 (resolve_expression): Likewise.
716 2006-04-03 Sterling Augustine <sterling@tensilica.com>
718 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
719 of the same length but different numbers of slots.
721 2006-03-30 Andreas Schwab <schwab@suse.de>
723 * configure.in: Fix help string for --enable-targets option.
724 * configure: Regenerate.
726 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
728 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
729 (m68k_ip): ... here. Use for all chips. Protect against buffer
730 overrun and avoid excessive copying.
732 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
733 m68020_control_regs, m68040_control_regs, m68060_control_regs,
734 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
735 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
736 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
737 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
738 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
739 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
740 mcf5282_ctrl, mcfv4e_ctrl): ... these.
741 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
742 (struct m68k_cpu): Change chip field to control_regs.
743 (current_chip): Remove.
745 (m68k_archs, m68k_extensions): Adjust.
746 (m68k_cpus): Reorder to be in cpu number order. Adjust.
747 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
748 (find_cf_chip): Reimplement for new organization of cpu table.
749 (select_control_regs): Remove.
751 (struct save_opts): Save control regs, not chip.
752 (s_save, s_restore): Adjust.
753 (m68k_lookup_cpu): Give deprecated warning when necessary.
754 (m68k_init_arch): Adjust.
755 (md_show_usage): Adjust for new cpu table organization.
757 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
759 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
760 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
761 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
763 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
764 (any_gotrel): New rule.
765 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
766 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
768 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
769 (bfin_pic_ptr): New function.
770 (md_pseudo_table): Add it for ".picptr".
771 (OPTION_FDPIC): New macro.
772 (md_longopts): Add -mfdpic.
773 (md_parse_option): Handle it.
774 (md_begin): Set BFD flags.
775 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
776 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
778 * Makefile.am (bfin-parse.o): Update dependencies.
779 (DEPTC_bfin_elf): Likewise.
780 * Makefile.in: Regenerate.
782 2006-03-25 Richard Sandiford <richard@codesourcery.com>
784 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
785 mcfemac instead of mcfmac.
787 2006-03-23 Michael Matz <matz@suse.de>
789 * config/tc-i386.c (type_names): Correct placement of 'static'.
790 (reloc): Map some more relocs to their 64 bit counterpart when
792 (output_insn): Work around breakage if DEBUG386 is defined.
793 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
794 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
795 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
798 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
800 (md_convert_frag): Jumps can now be larger than 2GB away, error
802 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
803 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
805 2006-03-22 Richard Sandiford <richard@codesourcery.com>
806 Daniel Jacobowitz <dan@codesourcery.com>
807 Phil Edwards <phil@codesourcery.com>
808 Zack Weinberg <zack@codesourcery.com>
809 Mark Mitchell <mark@codesourcery.com>
810 Nathan Sidwell <nathan@codesourcery.com>
812 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
813 (md_begin): Complain about -G being used for PIC. Don't change
814 the text, data and bss alignments on VxWorks.
815 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
816 generating VxWorks PIC.
817 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
818 (macro): Likewise, but do not treat la $25 specially for
819 VxWorks PIC, and do not handle jal.
820 (OPTION_MVXWORKS_PIC): New macro.
821 (md_longopts): Add -mvxworks-pic.
822 (md_parse_option): Don't complain about using PIC and -G together here.
823 Handle OPTION_MVXWORKS_PIC.
824 (md_estimate_size_before_relax): Always use the first relaxation
826 * config/tc-mips.h (VXWORKS_PIC): New.
828 2006-03-21 Paul Brook <paul@codesourcery.com>
830 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
832 2006-03-21 Sterling Augustine <sterling@tensilica.com>
834 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
835 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
836 (get_loop_align_size): New.
837 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
838 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
839 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
840 (get_noop_aligned_address): Use get_loop_align_size.
841 (get_aligned_diff): Likewise.
843 2006-03-21 Paul Brook <paul@codesourcery.com>
845 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
847 2006-03-20 Paul Brook <paul@codesourcery.com>
849 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
850 (do_t_branch): Encode branches inside IT blocks as unconditional.
851 (do_t_cps): New function.
852 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
853 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
854 (opcode_lookup): Allow conditional suffixes on all instructions in
856 (md_assemble): Advance condexec state before checking for errors.
857 (insns): Use do_t_cps.
859 2006-03-20 Paul Brook <paul@codesourcery.com>
861 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
864 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
866 * config/tc-vax.c: Update copyright year.
867 * config/tc-vax.h: Likewise.
869 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
871 * config/tc-vax.c (md_chars_to_number): Used only locally, so
873 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
875 2006-03-17 Paul Brook <paul@codesourcery.com>
877 * config/tc-arm.c (insns): Add ldm and stm.
879 2006-03-17 Ben Elliston <bje@au.ibm.com>
882 * doc/as.texinfo (Ident): Document this directive more thoroughly.
884 2006-03-16 Paul Brook <paul@codesourcery.com>
886 * config/tc-arm.c (insns): Add "svc".
888 2006-03-13 Bob Wilson <bob.wilson@acm.org>
890 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
891 flag and avoid double underscore prefixes.
893 2006-03-10 Paul Brook <paul@codesourcery.com>
895 * config/tc-arm.c (md_begin): Handle EABIv5.
896 (arm_eabis): Add EF_ARM_EABI_VER5.
897 * doc/c-arm.texi: Document -meabi=5.
899 2006-03-10 Ben Elliston <bje@au.ibm.com>
901 * app.c (do_scrub_chars): Simplify string handling.
903 2006-03-07 Richard Sandiford <richard@codesourcery.com>
904 Daniel Jacobowitz <dan@codesourcery.com>
905 Zack Weinberg <zack@codesourcery.com>
906 Nathan Sidwell <nathan@codesourcery.com>
907 Paul Brook <paul@codesourcery.com>
908 Ricardo Anguiano <anguiano@codesourcery.com>
909 Phil Edwards <phil@codesourcery.com>
911 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
912 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
914 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
915 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
916 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
918 2006-03-06 Bob Wilson <bob.wilson@acm.org>
920 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
921 even when using the text-section-literals option.
923 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
925 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
927 (m68k_ip): <case 'J'> Check we have some control regs.
928 (md_parse_option): Allow raw arch switch.
929 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
930 whether 68881 or cfloat was meant by -mfloat.
931 (md_show_usage): Adjust extension display.
932 (m68k_elf_final_processing): Adjust.
934 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
936 * config/tc-avr.c (avr_mod_hash_value): New function.
937 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
938 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
939 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
940 instead of int avr_ldi_expression: use avr_mod_hash_value instead
942 (tc_gen_reloc): Handle substractions of symbols, if possible do
943 fixups, abort otherwise.
944 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
945 tc_fix_adjustable): Define.
947 2006-03-02 James E Wilson <wilson@specifix.com>
949 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
950 change the template, then clear md.slot[curr].end_of_insn_group.
952 2006-02-28 Jan Beulich <jbeulich@novell.com>
954 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
956 2006-02-28 Jan Beulich <jbeulich@novell.com>
959 * macro.c (getstring): Don't treat parentheses special anymore.
960 (get_any_string): Don't consider '(' and ')' as quoting anymore.
961 Special-case '(', ')', '[', and ']' when dealing with non-quoting
964 2006-02-28 Mat <mat@csail.mit.edu>
966 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
968 2006-02-27 Jakub Jelinek <jakub@redhat.com>
970 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
972 (CFI_signal_frame): Define.
973 (cfi_pseudo_table): Add .cfi_signal_frame.
974 (dot_cfi): Handle CFI_signal_frame.
975 (output_cie): Handle cie->signal_frame.
976 (select_cie_for_fde): Don't share CIE if signal_frame flag is
977 different. Copy signal_frame from FDE to newly created CIE.
978 * doc/as.texinfo: Document .cfi_signal_frame.
980 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
982 * doc/Makefile.am: Add html target.
983 * doc/Makefile.in: Regenerate.
984 * po/Make-in: Add html target.
986 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
988 * config/tc-i386.c (output_insn): Support Intel Merom New
991 * config/tc-i386.h (CpuMNI): New.
992 (CpuUnknownFlags): Add CpuMNI.
994 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
996 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
997 (hpriv_reg_table): New table for hyperprivileged registers.
998 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1001 2006-02-24 DJ Delorie <dj@redhat.com>
1003 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1004 (tc_gen_reloc): Don't define.
1005 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1006 (OPTION_LINKRELAX): New.
1007 (md_longopts): Add it.
1009 (md_parse_options): Set it.
1010 (md_assemble): Emit relaxation relocs as needed.
1011 (md_convert_frag): Emit relaxation relocs as needed.
1012 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1013 (m32c_apply_fix): New.
1014 (tc_gen_reloc): New.
1015 (m32c_force_relocation): Force out jump relocs when relaxing.
1016 (m32c_fix_adjustable): Return false if relaxing.
1018 2006-02-24 Paul Brook <paul@codesourcery.com>
1020 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1021 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1022 (struct asm_barrier_opt): Define.
1023 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1024 (parse_psr): Accept V7M psr names.
1025 (parse_barrier): New function.
1026 (enum operand_parse_code): Add OP_oBARRIER.
1027 (parse_operands): Implement OP_oBARRIER.
1028 (do_barrier): New function.
1029 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1030 (do_t_cpsi): Add V7M restrictions.
1031 (do_t_mrs, do_t_msr): Validate V7M variants.
1032 (md_assemble): Check for NULL variants.
1033 (v7m_psrs, barrier_opt_names): New tables.
1034 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1035 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1036 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1037 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1038 (struct cpu_arch_ver_table): Define.
1039 (cpu_arch_ver): New.
1040 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1041 Tag_CPU_arch_profile.
1042 * doc/c-arm.texi: Document new cpu and arch options.
1044 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1046 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1048 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1050 * config/tc-ia64.c: Update copyright years.
1052 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1054 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1057 2005-02-22 Paul Brook <paul@codesourcery.com>
1059 * config/tc-arm.c (do_pld): Remove incorrect write to
1061 (encode_thumb32_addr_mode): Use correct operand.
1063 2006-02-21 Paul Brook <paul@codesourcery.com>
1065 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1067 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1068 Anil Paranjape <anilp1@kpitcummins.com>
1069 Shilin Shakti <shilins@kpitcummins.com>
1071 * Makefile.am: Add xc16x related entry.
1072 * Makefile.in: Regenerate.
1073 * configure.in: Added xc16x related entry.
1074 * configure: Regenerate.
1075 * config/tc-xc16x.h: New file
1076 * config/tc-xc16x.c: New file
1077 * doc/c-xc16x.texi: New file for xc16x
1078 * doc/all.texi: Entry for xc16x
1079 * doc/Makefile.texi: Added c-xc16x.texi
1080 * NEWS: Announce the support for the new target.
1082 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1084 * configure.tgt: set emulation for mips-*-netbsd*
1086 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1088 * config.in: Rebuilt.
1090 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1092 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1093 from 1, not 0, in error messages.
1094 (md_assemble): Simplify special-case check for ENTRY instructions.
1095 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1096 operand in error message.
1098 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1100 * configure.tgt (arm-*-linux-gnueabi*): Change to
1103 2006-02-10 Nick Clifton <nickc@redhat.com>
1105 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1106 32-bit value is propagated into the upper bits of a 64-bit long.
1108 * config/tc-arc.c (init_opcode_tables): Fix cast.
1109 (arc_extoper, md_operand): Likewise.
1111 2006-02-09 David Heine <dlheine@tensilica.com>
1113 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1114 each relaxation step.
1116 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1118 * configure.in (CHECK_DECLS): Add vsnprintf.
1119 * configure: Regenerate.
1120 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1121 include/declare here, but...
1122 * as.h: Move code detecting VARARGS idiom to the top.
1123 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1124 (vsnprintf): Declare if not already declared.
1126 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1128 * as.c (close_output_file): New.
1129 (main): Register close_output_file with xatexit before
1130 dump_statistics. Don't call output_file_close.
1132 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1134 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1135 mcf5329_control_regs): New.
1136 (not_current_architecture, selected_arch, selected_cpu): New.
1137 (m68k_archs, m68k_extensions): New.
1138 (archs): Renamed to ...
1139 (m68k_cpus): ... here. Adjust.
1141 (md_pseudo_table): Add arch and cpu directives.
1142 (find_cf_chip, m68k_ip): Adjust table scanning.
1143 (no_68851, no_68881): Remove.
1144 (md_assemble): Lazily initialize.
1145 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1146 (md_init_after_args): Move functionality to m68k_init_arch.
1147 (mri_chip): Adjust table scanning.
1148 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1149 options with saner parsing.
1150 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1151 m68k_init_arch): New.
1152 (s_m68k_cpu, s_m68k_arch): New.
1153 (md_show_usage): Adjust.
1154 (m68k_elf_final_processing): Set CF EF flags.
1155 * config/tc-m68k.h (m68k_init_after_args): Remove.
1156 (tc_init_after_args): Remove.
1157 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1158 (M68k-Directives): Document .arch and .cpu directives.
1160 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1162 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1163 synonyms for equ and defl.
1164 (z80_cons_fix_new): New function.
1165 (emit_byte): Disallow relative jumps to absolute locations.
1166 (emit_data): Only handle defb, prototype changed, because defb is
1167 now handled as pseudo-op rather than an instruction.
1168 (instab): Entries for defb,defw,db,dw moved from here...
1169 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1170 Add entries for def24,def32,d24,d32.
1171 (md_assemble): Improved error handling.
1172 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1173 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1174 (z80_cons_fix_new): Declare.
1175 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1176 (def24,d24,def32,d32): New pseudo-ops.
1178 2006-02-02 Paul Brook <paul@codesourcery.com>
1180 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1182 2005-02-02 Paul Brook <paul@codesourcery.com>
1184 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1185 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1186 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1187 T2_OPCODE_RSB): Define.
1188 (thumb32_negate_data_op): New function.
1189 (md_apply_fix): Use it.
1191 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1193 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1195 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1196 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1198 (relaxation_requirements): Add pfinish_frag argument and use it to
1199 replace setting tinsn->record_fix fields.
1200 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1201 and vinsn_to_insnbuf. Remove references to record_fix and
1202 slot_sub_symbols fields.
1203 (xtensa_mark_narrow_branches): Delete unused code.
1204 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1206 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1208 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1209 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1210 of the record_fix field. Simplify error messages for unexpected
1212 (set_expr_symbol_offset_diff): Delete.
1214 2006-01-31 Paul Brook <paul@codesourcery.com>
1216 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1218 2006-01-31 Paul Brook <paul@codesourcery.com>
1219 Richard Earnshaw <rearnsha@arm.com>
1221 * config/tc-arm.c: Use arm_feature_set.
1222 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1223 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1224 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1227 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1228 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1229 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1230 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1232 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1233 (arm_opts): Move old cpu/arch options from here...
1234 (arm_legacy_opts): ... to here.
1235 (md_parse_option): Search arm_legacy_opts.
1236 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1237 (arm_float_abis, arm_eabis): Make const.
1239 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1241 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1243 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1245 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1246 in load immediate intruction.
1248 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1250 * config/bfin-parse.y (value_match): Use correct conversion
1251 specifications in template string for __FILE__ and __LINE__.
1255 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1257 Introduce TLS descriptors for i386 and x86_64.
1258 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1259 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1260 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1261 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1262 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1264 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1265 (lex_got): Handle @tlsdesc and @tlscall.
1266 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1268 2006-01-11 Nick Clifton <nickc@redhat.com>
1270 Fixes for building on 64-bit hosts:
1271 * config/tc-avr.c (mod_index): New union to allow conversion
1272 between pointers and integers.
1273 (md_begin, avr_ldi_expression): Use it.
1274 * config/tc-i370.c (md_assemble): Add cast for argument to print
1276 * config/tc-tic54x.c (subsym_substitute): Likewise.
1277 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1278 opindex field of fr_cgen structure into a pointer so that it can
1279 be stored in a frag.
1280 * config/tc-mn10300.c (md_assemble): Likewise.
1281 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1283 * config/tc-v850.c: Replace uses of (int) casts with correct
1286 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1289 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1291 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1294 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1295 a local-label reference.
1297 For older changes see ChangeLog-2005
1303 version-control: never