1 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
3 * config/bfin-parse.y (binary): Change sub of const to add of negated
6 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
8 * config/tc-score.c: New file.
9 * config/tc-score.h: Newf file.
10 * configure.tgt: Add Score target.
11 * Makefile.am: Add Score files.
12 * Makefile.in: Regenerate.
13 * NEWS: Mention new target support.
15 2006-09-16 Paul Brook <paul@codesourcery.com>
17 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
18 * doc/c-arm.texi (movsp): Document offset argument.
20 2006-09-16 Paul Brook <paul@codesourcery.com>
22 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
23 unsigned int to avoid 64-bit host problems.
25 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
27 * config/bfin-parse.y (binary): Do some more constant folding for
30 2006-09-13 Jan Beulich <jbeulich@novell.com>
32 * input-file.c (input_file_give_next_buffer): Demote as_bad to
35 2006-09-13 Alan Modra <amodra@bigpond.net.au>
38 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
41 2006-09-13 Alan Modra <amodra@bigpond.net.au>
43 * input-file.c (input_file_open): Replace as_perror with as_bad
44 so that gas exits with error on file errors. Correct error
46 (input_file_get, input_file_give_next_buffer): Likewise.
47 * input-file.h: Update comment.
49 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
52 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
53 registers as a sub-class of wC registers.
55 2006-09-11 Alan Modra <amodra@bigpond.net.au>
58 * config/tc-mips.h (enum dwarf2_format): Forward declare.
59 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
60 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
61 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
63 2006-09-08 Nick Clifton <nickc@redhat.com>
66 * doc/as.texinfo (Macro): Improve documentation about separating
67 macro arguments from following text.
69 2006-09-08 Paul Brook <paul@codesourcery.com>
71 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
73 2006-09-07 Paul Brook <paul@codesourcery.com>
75 * config/tc-arm.c (parse_operands): Mark operand as present.
77 2006-09-04 Paul Brook <paul@codesourcery.com>
79 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
80 (do_neon_dyadic_if_i_d): Avoid setting U bit.
81 (do_neon_mac_maybe_scalar): Ditto.
82 (do_neon_dyadic_narrow): Force operand type to NT_integer.
83 (insns): Remove out of date comments.
85 2006-08-29 Nick Clifton <nickc@redhat.com>
87 * read.c (s_align): Initialize the 'stopc' variable to prevent
88 compiler complaints about it being used without being
90 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
91 s_float_space, s_struct, cons_worker, equals): Likewise.
93 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
95 * ecoff.c (ecoff_directive_val): Fix message typo.
96 * config/tc-ns32k.c (convert_iif): Likewise.
97 * config/tc-sh64.c (shmedia_check_limits): Likewise.
99 2006-08-25 Sterling Augustine <sterling@tensilica.com>
100 Bob Wilson <bob.wilson@acm.org>
102 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
103 the state of the absolute_literals directive. Remove align frag at
104 the start of the literal pool position.
106 2006-08-25 Bob Wilson <bob.wilson@acm.org>
108 * doc/c-xtensa.texi: Add @group commands in examples.
110 2006-08-24 Bob Wilson <bob.wilson@acm.org>
112 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
113 (INIT_LITERAL_SECTION_NAME): Delete.
114 (lit_state struct): Remove segment names, init_lit_seg, and
115 fini_lit_seg. Add lit_prefix and current_text_seg.
116 (init_literal_head_h, init_literal_head): Delete.
117 (fini_literal_head_h, fini_literal_head): Delete.
118 (xtensa_begin_directive): Move argument parsing to
119 xtensa_literal_prefix function.
120 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
121 (xtensa_literal_prefix): Parse the directive argument here and
122 record it in the lit_prefix field. Remove code to derive literal
125 (get_is_linkonce_section): Use linkonce_len. Check for any
126 ".gnu.linkonce.*" section, not just text sections.
127 (md_begin): Remove initialization of deleted lit_state fields.
128 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
129 to init_literal_head and fini_literal_head.
130 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
131 when traversing literal_head list.
132 (match_section_group): New.
133 (cache_literal_section): Rewrite to determine the literal section
134 name on the fly, create the section and return it.
135 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
136 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
137 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
138 Use xtensa_get_property_section from bfd.
139 (retrieve_xtensa_section): Delete.
140 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
141 description to refer to plural literal sections and add xref to
142 the Literal Directive section.
143 (Literal Directive): Describe new rules for deriving literal section
144 names. Add footnote for special case of .init/.fini with
145 --text-section-literals.
146 (Literal Prefix Directive): Replace old naming rules with xref to the
147 Literal Directive section.
149 2006-08-21 Joseph Myers <joseph@codesourcery.com>
151 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
152 merging with previous long opcode.
154 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
156 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
157 * Makefile.in: Regenerate.
158 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
161 2006-08-16 Julian Brown <julian@codesourcery.com>
163 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
164 to use ARM instructions on non-ARM-supporting cores.
165 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
166 mode automatically based on cpu variant.
167 (md_begin): Call above function.
169 2006-08-16 Julian Brown <julian@codesourcery.com>
171 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
172 recognized in non-unified syntax mode.
174 2006-08-15 Thiemo Seufer <ths@mips.com>
175 Nigel Stephens <nigel@mips.com>
176 David Ung <davidu@mips.com>
178 * configure.tgt: Handle mips*-sde-elf*.
180 2006-08-12 Thiemo Seufer <ths@networkno.de>
182 * config/tc-mips.c (mips16_ip): Fix argument register handling
183 for restore instruction.
185 2006-08-08 Bob Wilson <bob.wilson@acm.org>
187 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
189 (out_fixed_inc_line_addr): New.
190 (process_entries): Use out_fixed_inc_line_addr when
191 DWARF2_USE_FIXED_ADVANCE_PC is set.
192 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
194 2006-08-08 DJ Delorie <dj@redhat.com>
196 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
197 vs full symbols so that we never have more than one pointer value
198 for any given symbol in our symbol table.
200 2006-08-08 Sterling Augustine <sterling@tensilica.com>
202 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
203 and emit DW_AT_ranges when code in compilation unit is not
205 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
207 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
208 (out_debug_ranges): New function to emit .debug_ranges section
209 when code is not contiguous.
211 2006-08-08 Nick Clifton <nickc@redhat.com>
213 * config/tc-arm.c (WARN_DEPRECATED): Enable.
215 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
217 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
219 (pe_directive_secrel) [TE_PE]: New function.
220 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
221 loc, loc_mark_labels.
222 [TE_PE]: Handle secrel32.
223 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
225 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
226 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
227 (md_section_align): Only round section sizes here for AOUT
229 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
230 (tc_pe_dwarf2_emit_offset): New function.
231 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
232 (cons_fix_new_arm): Handle O_secrel.
233 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
234 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
235 of OBJ_ELF only block.
236 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
237 tc_pe_dwarf2_emit_offset.
239 2006-08-04 Richard Sandiford <richard@codesourcery.com>
241 * config/tc-sh.c (apply_full_field_fix): New function.
242 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
243 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
244 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
245 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
247 2006-08-03 Nick Clifton <nickc@redhat.com>
250 * config.in: Regenerate.
252 2006-08-03 Joseph Myers <joseph@codesourcery.com>
254 * config/tc-arm.c (parse_operands): Handle invalid register name
257 2006-08-03 Joseph Myers <joseph@codesourcery.com>
259 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
260 (parse_operands): Handle it.
261 (insns): Use it for tmcr and tmrc.
263 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
266 * config/tc-i386.c (md_parse_option): Treat any target starting
267 with elf64_x86_64 as a viable target for the -64 switch.
268 (i386_target_format): For 64-bit ELF flavoured output use
270 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
272 2006-08-02 Nick Clifton <nickc@redhat.com>
275 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
277 * configure.in: Run BFD_BINARY_FOPEN.
278 * configure: Regenerate.
279 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
282 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
284 * config/tc-i386.c (md_assemble): Don't update
287 2006-08-01 Thiemo Seufer <ths@mips.com>
289 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
291 2006-08-01 Thiemo Seufer <ths@mips.com>
293 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
294 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
295 BFD_RELOC_32 and BFD_RELOC_16.
296 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
297 md_convert_frag, md_obj_end): Fix comment formatting.
299 2006-07-31 Thiemo Seufer <ths@mips.com>
301 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
302 handling for BFD_RELOC_MIPS16_JMP.
304 2006-07-24 Andreas Schwab <schwab@suse.de>
307 * read.c (read_a_source_file): Ignore unknown text after line
308 comment character. Fix misleading comment.
310 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
312 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
313 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
314 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
315 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
316 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
317 doc/c-z80.texi, doc/internals.texi: Fix some typos.
319 2006-07-21 Nick Clifton <nickc@redhat.com>
321 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
324 2006-07-20 Thiemo Seufer <ths@mips.com>
325 Nigel Stephens <nigel@mips.com>
327 * config/tc-mips.c (md_parse_option): Don't infer optimisation
328 options from debug options.
330 2006-07-20 Thiemo Seufer <ths@mips.com>
332 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
333 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
335 2006-07-19 Paul Brook <paul@codesourcery.com>
337 * config/tc-arm.c (insns): Fix rbit Arm opcode.
339 2006-07-18 Paul Brook <paul@codesourcery.com>
341 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
342 (md_convert_frag): Use correct reloc for add_pc. Use
343 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
344 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
345 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
347 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
349 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
350 when file and line unknown.
352 2006-07-17 Thiemo Seufer <ths@mips.com>
354 * read.c (s_struct): Use IS_ELF.
355 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
356 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
357 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
358 s_mips_mask): Likewise.
360 2006-07-16 Thiemo Seufer <ths@mips.com>
361 David Ung <davidu@mips.com>
363 * read.c (s_struct): Handle ELF section changing.
364 * config/tc-mips.c (s_align): Leave enabling auto-align to the
366 (s_change_sec): Try section changing only if we output ELF.
368 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
370 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
372 (smallest_imm_type): Remove Cpu086.
373 (i386_target_format): Likewise.
375 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
378 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
379 Michael Meissner <michael.meissner@amd.com>
381 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
382 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
383 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
385 (i386_align_code): Ditto.
386 (md_assemble_code): Add support for insertq/extrq instructions,
387 swapping as needed for intel syntax.
388 (swap_imm_operands): New function to swap immediate operands.
389 (swap_operands): Deal with 4 operand instructions.
390 (build_modrm_byte): Add support for insertq instruction.
392 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
394 * config/tc-i386.h (Size64): Fix a typo in comment.
396 2006-07-12 Nick Clifton <nickc@redhat.com>
398 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
399 fixup_segment() to repeat a range check on a value that has
400 already been checked here.
402 2006-07-07 James E Wilson <wilson@specifix.com>
404 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
406 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
407 Nick Clifton <nickc@redhat.com>
410 * doc/as.texi: Fix spelling typo: branchs => branches.
411 * doc/c-m68hc11.texi: Likewise.
412 * config/tc-m68hc11.c: Likewise.
413 Support old spelling of command line switch for backwards
416 2006-07-04 Thiemo Seufer <ths@mips.com>
417 David Ung <davidu@mips.com>
419 * config/tc-mips.c (s_is_linkonce): New function.
420 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
421 weak, external, and linkonce symbols.
422 (pic_need_relax): Use s_is_linkonce.
424 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
426 * doc/as.texinfo (Org): Remove space.
427 (P2align): Add "@var{abs-expr},".
429 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
431 * config/tc-i386.c (cpu_arch_tune_set): New.
432 (cpu_arch_isa): Likewise.
433 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
434 nops with short or long nop sequences based on -march=/.arch
436 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
437 set cpu_arch_tune and cpu_arch_tune_flags.
438 (md_parse_option): For -march=, set cpu_arch_isa and set
439 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
440 0. Set cpu_arch_tune_set to 1 for -mtune=.
441 (i386_target_format): Don't set cpu_arch_tune.
443 2006-06-23 Nigel Stephens <nigel@mips.com>
445 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
446 generated .sbss.* and .gnu.linkonce.sb.*.
448 2006-06-23 Thiemo Seufer <ths@mips.com>
449 David Ung <davidu@mips.com>
451 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
453 * config/tc-mips.c (label_list): Define per-segment label_list.
454 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
455 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
456 mips_from_file_after_relocs, mips_define_label): Use per-segment
459 2006-06-22 Thiemo Seufer <ths@mips.com>
461 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
462 (append_insn): Use it.
463 (md_apply_fix): Whitespace formatting.
464 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
465 mips16_extended_frag): Remove register specifier.
466 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
469 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
471 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
472 a directive saving VFP registers for ARMv6 or later.
473 (s_arm_unwind_save): Add parameter arch_v6 and call
474 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
476 (md_pseudo_table): Add entry for new "vsave" directive.
477 * doc/c-arm.texi: Correct error in example for "save"
478 directive (fstmdf -> fstmdx). Also document "vsave" directive.
480 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
481 Anatoly Sokolov <aesok@post.ru>
483 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
484 and atmega644p devices. Rename atmega164/atmega324 devices to
485 atmega164p/atmega324p.
486 * doc/c-avr.texi: Document new mcu and arch options.
488 2006-06-17 Nick Clifton <nickc@redhat.com>
490 * config/tc-arm.c (enum parse_operand_result): Move outside of
491 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
493 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
495 * config/tc-i386.h (processor_type): New.
496 (arch_entry): Add type.
498 * config/tc-i386.c (cpu_arch_tune): New.
499 (cpu_arch_tune_flags): Likewise.
500 (cpu_arch_isa_flags): Likewise.
502 (set_cpu_arch): Also update cpu_arch_isa_flags.
503 (md_assemble): Update cpu_arch_isa_flags.
505 (OPTION_MTUNE): Likewise.
506 (md_longopts): Add -march= and -mtune=.
507 (md_parse_option): Support -march= and -mtune=.
508 (md_show_usage): Add -march=CPU/-mtune=CPU.
509 (i386_target_format): Also update cpu_arch_isa_flags,
510 cpu_arch_tune and cpu_arch_tune_flags.
512 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
514 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
516 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
518 * config/tc-arm.c (enum parse_operand_result): New.
519 (struct group_reloc_table_entry): New.
520 (enum group_reloc_type): New.
521 (group_reloc_table): New array.
522 (find_group_reloc_table_entry): New function.
523 (parse_shifter_operand_group_reloc): New function.
524 (parse_address_main): New function, incorporating code
525 from the old parse_address function. To be used via...
526 (parse_address): wrapper for parse_address_main; and
527 (parse_address_group_reloc): new function, likewise.
528 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
529 OP_ADDRGLDRS, OP_ADDRGLDC.
530 (parse_operands): Support for these new operand codes.
531 New macro po_misc_or_fail_no_backtrack.
532 (encode_arm_cp_address): Preserve group relocations.
533 (insns): Modify to use the above operand codes where group
534 relocations are permitted.
535 (md_apply_fix): Handle the group relocations
536 ALU_PC_G0_NC through LDC_SB_G2.
537 (tc_gen_reloc): Likewise.
538 (arm_force_relocation): Leave group relocations for the linker.
539 (arm_fix_adjustable): Likewise.
541 2006-06-15 Julian Brown <julian@codesourcery.com>
543 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
544 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
547 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
549 * config/tc-i386.c (process_suffix): Don't add rex64 for
552 2006-06-09 Thiemo Seufer <ths@mips.com>
554 * config/tc-mips.c (mips_ip): Maintain argument count.
556 2006-06-09 Alan Modra <amodra@bigpond.net.au>
558 * config/tc-iq2000.c: Include sb.h.
560 2006-06-08 Nigel Stephens <nigel@mips.com>
562 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
563 aliases for better compatibility with SGI tools.
565 2006-06-08 Alan Modra <amodra@bigpond.net.au>
567 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
568 * Makefile.am (GASLIBS): Expand @BFDLIB@.
570 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
571 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
572 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
574 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
575 * Makefile.in: Regenerate.
576 * doc/Makefile.in: Regenerate.
577 * configure: Regenerate.
579 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
581 * po/Make-in (pdf, ps): New dummy targets.
583 2006-06-07 Julian Brown <julian@codesourcery.com>
585 * config/tc-arm.c (stdarg.h): include.
586 (arm_it): Add uncond_value field. Add isvec and issingle to operand
588 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
589 REG_TYPE_NSDQ (single, double or quad vector reg).
590 (reg_expected_msgs): Update.
591 (BAD_FPU): Add macro for unsupported FPU instruction error.
592 (parse_neon_type): Support 'd' as an alias for .f64.
593 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
595 (parse_vfp_reg_list): Don't update first arg on error.
596 (parse_neon_mov): Support extra syntax for VFP moves.
597 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
598 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
599 (parse_operands): Support isvec, issingle operands fields, new parse
601 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
603 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
604 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
605 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
606 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
608 (neon_shape): Redefine in terms of above.
609 (neon_shape_class): New enumeration, table of shape classes.
610 (neon_shape_el): New enumeration. One element of a shape.
611 (neon_shape_el_size): Register widths of above, where appropriate.
612 (neon_shape_info): New struct. Info for shape table.
613 (neon_shape_tab): New array.
614 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
615 (neon_check_shape): Rewrite as...
616 (neon_select_shape): New function to classify instruction shapes,
617 driven by new table neon_shape_tab array.
618 (neon_quad): New function. Return 1 if shape should set Q flag in
619 instructions (or equivalent), 0 otherwise.
620 (type_chk_of_el_type): Support F64.
621 (el_type_of_type_chk): Likewise.
622 (neon_check_type): Add support for VFP type checking (VFP data
623 elements fill their containing registers).
624 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
625 in thumb mode for VFP instructions.
626 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
627 and encode the current instruction as if it were that opcode.
628 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
629 arguments, call function in PFN.
630 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
631 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
632 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
633 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
634 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
635 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
636 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
637 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
638 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
639 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
640 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
641 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
642 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
643 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
644 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
646 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
647 between VFP and Neon turns out to belong to Neon. Perform
648 architecture check and fill in condition field if appropriate.
649 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
650 (do_neon_cvt): Add support for VFP variants of instructions.
651 (neon_cvt_flavour): Extend to cover VFP conversions.
652 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
654 (do_neon_ldr_str): Handle single-precision VFP load/store.
655 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
656 NS_NULL not NS_IGNORE.
657 (opcode_tag): Add OT_csuffixF for operands which either take a
658 conditional suffix, or have 0xF in the condition field.
659 (md_assemble): Add support for OT_csuffixF.
660 (NCE): Replace macro with...
661 (NCE_tag, NCE, NCEF): New macros.
662 (nCE): Replace macro with...
663 (nCE_tag, nCE, nCEF): New macros.
664 (insns): Add support for VFP insns or VFP versions of insns msr,
665 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
666 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
667 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
668 VFP/Neon insns together.
670 2006-06-07 Alan Modra <amodra@bigpond.net.au>
671 Ladislav Michl <ladis@linux-mips.org>
673 * app.c: Don't include headers already included by as.h.
675 * atof-generic.c: Likewise.
677 * dwarf2dbg.c: Likewise.
679 * input-file.c: Likewise.
680 * input-scrub.c: Likewise.
682 * output-file.c: Likewise.
685 * config/bfin-lex.l: Likewise.
686 * config/obj-coff.h: Likewise.
687 * config/obj-elf.h: Likewise.
688 * config/obj-som.h: Likewise.
689 * config/tc-arc.c: Likewise.
690 * config/tc-arm.c: Likewise.
691 * config/tc-avr.c: Likewise.
692 * config/tc-bfin.c: Likewise.
693 * config/tc-cris.c: Likewise.
694 * config/tc-d10v.c: Likewise.
695 * config/tc-d30v.c: Likewise.
696 * config/tc-dlx.h: Likewise.
697 * config/tc-fr30.c: Likewise.
698 * config/tc-frv.c: Likewise.
699 * config/tc-h8300.c: Likewise.
700 * config/tc-hppa.c: Likewise.
701 * config/tc-i370.c: Likewise.
702 * config/tc-i860.c: Likewise.
703 * config/tc-i960.c: Likewise.
704 * config/tc-ip2k.c: Likewise.
705 * config/tc-iq2000.c: Likewise.
706 * config/tc-m32c.c: Likewise.
707 * config/tc-m32r.c: Likewise.
708 * config/tc-maxq.c: Likewise.
709 * config/tc-mcore.c: Likewise.
710 * config/tc-mips.c: Likewise.
711 * config/tc-mmix.c: Likewise.
712 * config/tc-mn10200.c: Likewise.
713 * config/tc-mn10300.c: Likewise.
714 * config/tc-msp430.c: Likewise.
715 * config/tc-mt.c: Likewise.
716 * config/tc-ns32k.c: Likewise.
717 * config/tc-openrisc.c: Likewise.
718 * config/tc-ppc.c: Likewise.
719 * config/tc-s390.c: Likewise.
720 * config/tc-sh.c: Likewise.
721 * config/tc-sh64.c: Likewise.
722 * config/tc-sparc.c: Likewise.
723 * config/tc-tic30.c: Likewise.
724 * config/tc-tic4x.c: Likewise.
725 * config/tc-tic54x.c: Likewise.
726 * config/tc-v850.c: Likewise.
727 * config/tc-vax.c: Likewise.
728 * config/tc-xc16x.c: Likewise.
729 * config/tc-xstormy16.c: Likewise.
730 * config/tc-xtensa.c: Likewise.
731 * config/tc-z80.c: Likewise.
732 * config/tc-z8k.c: Likewise.
733 * macro.h: Don't include sb.h or ansidecl.h.
734 * sb.h: Don't include stdio.h or ansidecl.h.
735 * cond.c: Include sb.h.
736 * itbl-lex.l: Include as.h instead of other system headers.
737 * itbl-parse.y: Likewise.
738 * itbl-ops.c: Similarly.
739 * itbl-ops.h: Don't include as.h or ansidecl.h.
740 * config/bfin-defs.h: Don't include bfd.h or as.h.
741 * config/bfin-parse.y: Include as.h instead of other system headers.
743 2006-06-06 Ben Elliston <bje@au.ibm.com>
744 Anton Blanchard <anton@samba.org>
746 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
747 (md_show_usage): Document it.
748 (ppc_setup_opcodes): Test power6 opcode flag bits.
749 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
751 2006-06-06 Thiemo Seufer <ths@mips.com>
752 Chao-ying Fu <fu@mips.com>
754 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
755 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
756 (macro_build): Update comment.
757 (mips_ip): Allow DSP64 instructions for MIPS64R2.
758 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
760 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
761 MIPS_CPU_ASE_MDMX flags for sb1.
763 2006-06-05 Thiemo Seufer <ths@mips.com>
765 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
767 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
768 (mips_ip): Make overflowed/underflowed constant arguments in DSP
769 and MT instructions a fatal error. Use INSERT_OPERAND where
770 appropriate. Improve warnings for break and wait code overflows.
771 Use symbolic constant of OP_MASK_COPZ.
772 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
774 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
776 * po/Make-in (top_builddir): Define.
778 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
780 * doc/Makefile.am (TEXI2DVI): Define.
781 * doc/Makefile.in: Regenerate.
782 * doc/c-arc.texi: Fix typo.
784 2006-06-01 Alan Modra <amodra@bigpond.net.au>
786 * config/obj-ieee.c: Delete.
787 * config/obj-ieee.h: Delete.
788 * Makefile.am (OBJ_FORMATS): Remove ieee.
789 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
790 (obj-ieee.o): Remove rule.
791 * Makefile.in: Regenerate.
792 * configure.in (atof): Remove tahoe.
793 (OBJ_MAYBE_IEEE): Don't define.
794 * configure: Regenerate.
795 * config.in: Regenerate.
796 * doc/Makefile.in: Regenerate.
797 * po/POTFILES.in: Regenerate.
799 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
801 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
802 and LIBINTL_DEP everywhere.
804 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
805 * acinclude.m4: Include new gettext macros.
806 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
807 Remove local code for po/Makefile.
808 * Makefile.in, configure, doc/Makefile.in: Regenerated.
810 2006-05-30 Nick Clifton <nickc@redhat.com>
812 * po/es.po: Updated Spanish translation.
814 2006-05-06 Denis Chertykov <denisc@overta.ru>
816 * doc/c-avr.texi: New file.
817 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
818 * doc/all.texi: Set AVR
819 * doc/as.texinfo: Include c-avr.texi
821 2006-05-28 Jie Zhang <jie.zhang@analog.com>
823 * config/bfin-parse.y (check_macfunc): Loose the condition of
824 calling check_multiply_halfregs ().
826 2006-05-25 Jie Zhang <jie.zhang@analog.com>
828 * config/bfin-parse.y (asm_1): Better check and deal with
829 vector and scalar Multiply 16-Bit Operands instructions.
831 2006-05-24 Nick Clifton <nickc@redhat.com>
833 * config/tc-hppa.c: Convert to ISO C90 format.
834 * config/tc-hppa.h: Likewise.
836 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
837 Randolph Chung <randolph@tausq.org>
839 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
840 is_tls_ieoff, is_tls_leoff): Define.
841 (fix_new_hppa): Handle TLS.
842 (cons_fix_new_hppa): Likewise.
844 (md_apply_fix): Handle TLS relocs.
845 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
847 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
849 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
851 2006-05-23 Thiemo Seufer <ths@mips.com>
852 David Ung <davidu@mips.com>
853 Nigel Stephens <nigel@mips.com>
856 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
857 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
858 ISA_HAS_MXHC1): New macros.
859 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
860 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
861 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
862 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
863 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
864 (mips_after_parse_args): Change default handling of float register
865 size to account for 32bit code with 64bit FP. Better sanity checking
866 of ISA/ASE/ABI option combinations.
867 (s_mipsset): Support switching of GPR and FPR sizes via
868 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
870 (mips_elf_final_processing): We should record the use of 64bit FP
871 registers in 32bit code but we don't, because ELF header flags are
873 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
874 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
875 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
876 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
877 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
878 missing -march options. Document .set arch=CPU. Move .set smartmips
879 to ASE page. Use @code for .set FOO examples.
881 2006-05-23 Jie Zhang <jie.zhang@analog.com>
883 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
886 2006-05-23 Jie Zhang <jie.zhang@analog.com>
888 * config/bfin-defs.h (bfin_equals): Remove declaration.
889 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
890 * config/tc-bfin.c (bfin_name_is_register): Remove.
891 (bfin_equals): Remove.
892 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
893 (bfin_name_is_register): Remove declaration.
895 2006-05-19 Thiemo Seufer <ths@mips.com>
896 Nigel Stephens <nigel@mips.com>
898 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
899 (mips_oddfpreg_ok): New function.
902 2006-05-19 Thiemo Seufer <ths@mips.com>
903 David Ung <davidu@mips.com>
905 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
906 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
907 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
908 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
909 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
910 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
911 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
912 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
913 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
914 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
915 reg_names_o32, reg_names_n32n64): Define register classes.
916 (reg_lookup): New function, use register classes.
917 (md_begin): Reserve register names in the symbol table. Simplify
919 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
921 (mips16_ip): Use reg_lookup.
922 (tc_get_register): Likewise.
923 (tc_mips_regname_to_dw2regnum): New function.
925 2006-05-19 Thiemo Seufer <ths@mips.com>
927 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
928 Un-constify string argument.
929 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
931 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
933 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
935 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
937 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
939 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
942 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
944 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
945 cfloat/m68881 to correct architecture before using it.
947 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
949 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
952 2006-05-15 Paul Brook <paul@codesourcery.com>
954 * config/tc-arm.c (arm_adjust_symtab): Use
955 bfd_is_arm_special_symbol_name.
957 2006-05-15 Bob Wilson <bob.wilson@acm.org>
959 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
960 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
961 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
962 Handle errors from calls to xtensa_opcode_is_* functions.
964 2006-05-14 Thiemo Seufer <ths@mips.com>
966 * config/tc-mips.c (macro_build): Test for currently active
968 (mips16_ip): Reject invalid opcodes.
970 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
972 * doc/as.texinfo: Rename "Index" to "AS Index",
973 and "ABORT" to "ABORT (COFF)".
975 2006-05-11 Paul Brook <paul@codesourcery.com>
977 * config/tc-arm.c (parse_half): New function.
978 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
979 (parse_operands): Ditto.
980 (do_mov16): Reject invalid relocations.
981 (do_t_mov16): Ditto. Use Thumb reloc numbers.
982 (insns): Replace Iffff with HALF.
983 (md_apply_fix): Add MOVW and MOVT relocs.
984 (tc_gen_reloc): Ditto.
985 * doc/c-arm.texi: Document relocation operators
987 2006-05-11 Paul Brook <paul@codesourcery.com>
989 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
991 2006-05-11 Thiemo Seufer <ths@mips.com>
993 * config/tc-mips.c (append_insn): Don't check the range of j or
996 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
998 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
999 relocs against external symbols for WinCE targets.
1000 (md_apply_fix): Likewise.
1002 2006-05-09 David Ung <davidu@mips.com>
1004 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1007 2006-05-09 Nick Clifton <nickc@redhat.com>
1009 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1010 against symbols which are not going to be placed into the symbol
1013 2006-05-09 Ben Elliston <bje@au.ibm.com>
1015 * expr.c (operand): Remove `if (0 && ..)' statement and
1016 subsequently unused target_op label. Collapse `if (1 || ..)'
1018 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1019 separately above the switch.
1021 2006-05-08 Nick Clifton <nickc@redhat.com>
1024 * config/tc-msp430.c (line_separator_character): Define as |.
1026 2006-05-08 Thiemo Seufer <ths@mips.com>
1027 Nigel Stephens <nigel@mips.com>
1028 David Ung <davidu@mips.com>
1030 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1031 (mips_opts): Likewise.
1032 (file_ase_smartmips): New variable.
1033 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1034 (macro_build): Handle SmartMIPS instructions.
1035 (mips_ip): Likewise.
1036 (md_longopts): Add argument handling for smartmips.
1037 (md_parse_options, mips_after_parse_args): Likewise.
1038 (s_mipsset): Add .set smartmips support.
1039 (md_show_usage): Document -msmartmips/-mno-smartmips.
1040 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1042 * doc/c-mips.texi: Likewise.
1044 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1046 * write.c (relax_segment): Add pass count arg. Don't error on
1047 negative org/space on first two passes.
1048 (relax_seg_info): New struct.
1049 (relax_seg, write_object_file): Adjust.
1050 * write.h (relax_segment): Update prototype.
1052 2006-05-05 Julian Brown <julian@codesourcery.com>
1054 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1056 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1057 architecture version checks.
1058 (insns): Allow overlapping instructions to be used in VFP mode.
1060 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1063 * config/obj-elf.c (obj_elf_change_section): Allow user
1064 specified SHF_ALPHA_GPREL.
1066 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1068 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1069 for PMEM related expressions.
1071 2006-05-05 Nick Clifton <nickc@redhat.com>
1074 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1075 insertion of a directory separator character into a string at a
1076 given offset. Uses heuristics to decide when to use a backslash
1077 character rather than a forward-slash character.
1078 (dwarf2_directive_loc): Use the macro.
1079 (out_debug_info): Likewise.
1081 2006-05-05 Thiemo Seufer <ths@mips.com>
1082 David Ung <davidu@mips.com>
1084 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1086 (macro): Add new case M_CACHE_AB.
1088 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1090 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1091 (opcode_lookup): Issue a warning for opcode with
1092 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1093 identical to OT_cinfix3.
1094 (TxC3w, TC3w, tC3w): New.
1095 (insns): Use tC3w and TC3w for comparison instructions with
1098 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1100 * subsegs.h (struct frchain): Delete frch_seg.
1101 (frchain_root): Delete.
1102 (seg_info): Define as macro.
1103 * subsegs.c (frchain_root): Delete.
1104 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1105 (subsegs_begin, subseg_change): Adjust for above.
1106 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1107 rather than to one big list.
1108 (subseg_get): Don't special case abs, und sections.
1109 (subseg_new, subseg_force_new): Don't set frchainP here.
1111 (subsegs_print_statistics): Adjust frag chain control list traversal.
1112 * debug.c (dmp_frags): Likewise.
1113 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1114 at frchain_root. Make use of known frchain ordering.
1115 (last_frag_for_seg): Likewise.
1116 (get_frag_fix): Likewise. Add seg param.
1117 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1118 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1119 (SUB_SEGMENT_ALIGN): Likewise.
1120 (subsegs_finish): Adjust frchain list traversal.
1121 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1122 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1123 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1124 (xtensa_fix_b_j_loop_end_frags): Likewise.
1125 (xtensa_fix_close_loop_end_frags): Likewise.
1126 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1127 (retrieve_segment_info): Delete frch_seg initialisation.
1129 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1131 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1132 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1133 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1134 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1136 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1138 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1140 (md_apply_fix3): Multiply offset by 4 here for
1141 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1143 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1144 Jan Beulich <jbeulich@novell.com>
1146 * config/tc-i386.c (output_invalid_buf): Change size for
1148 * config/tc-tic30.c (output_invalid_buf): Likewise.
1150 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1152 * config/tc-tic30.c (output_invalid): Likewise.
1154 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1156 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1157 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1158 (asconfig.texi): Don't set top_srcdir.
1159 * doc/as.texinfo: Don't use top_srcdir.
1160 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1162 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1164 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1165 * config/tc-tic30.c (output_invalid_buf): Likewise.
1167 * config/tc-i386.c (output_invalid): Use snprintf instead of
1169 * config/tc-ia64.c (declare_register_set): Likewise.
1170 (emit_one_bundle): Likewise.
1171 (check_dependencies): Likewise.
1172 * config/tc-tic30.c (output_invalid): Likewise.
1174 2006-05-02 Paul Brook <paul@codesourcery.com>
1176 * config/tc-arm.c (arm_optimize_expr): New function.
1177 * config/tc-arm.h (md_optimize_expr): Define
1178 (arm_optimize_expr): Add prototype.
1179 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1181 2006-05-02 Ben Elliston <bje@au.ibm.com>
1183 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1186 * sb.h (sb_list_vector): Move to sb.c.
1187 * sb.c (free_list): Use type of sb_list_vector directly.
1188 (sb_build): Fix off-by-one error in assertion about `size'.
1190 2006-05-01 Ben Elliston <bje@au.ibm.com>
1192 * listing.c (listing_listing): Remove useless loop.
1193 * macro.c (macro_expand): Remove is_positional local variable.
1194 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1195 and simplify surrounding expressions, where possible.
1196 (assign_symbol): Likewise.
1197 (s_weakref): Likewise.
1198 * symbols.c (colon): Likewise.
1200 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1202 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1204 2006-04-30 Thiemo Seufer <ths@mips.com>
1205 David Ung <davidu@mips.com>
1207 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1208 (mips_immed): New table that records various handling of udi
1209 instruction patterns.
1210 (mips_ip): Adds udi handling.
1212 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1214 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1215 of list rather than beginning.
1217 2006-04-26 Julian Brown <julian@codesourcery.com>
1219 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1220 (is_quarter_float): Rename from above. Simplify slightly.
1221 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1223 (parse_neon_mov): Parse floating-point constants.
1224 (neon_qfloat_bits): Fix encoding.
1225 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1226 preference to integer encoding when using the F32 type.
1228 2006-04-26 Julian Brown <julian@codesourcery.com>
1230 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1231 zero-initialising structures containing it will lead to invalid types).
1232 (arm_it): Add vectype to each operand.
1233 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1235 (neon_typed_alias): New structure. Extra information for typed
1237 (reg_entry): Add neon type info field.
1238 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1239 Break out alternative syntax for coprocessor registers, etc. into...
1240 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1241 out from arm_reg_parse.
1242 (parse_neon_type): Move. Return SUCCESS/FAIL.
1243 (first_error): New function. Call to ensure first error which occurs is
1245 (parse_neon_operand_type): Parse exactly one type.
1246 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1247 (parse_typed_reg_or_scalar): New function. Handle core of both
1248 arm_typed_reg_parse and parse_scalar.
1249 (arm_typed_reg_parse): Parse a register with an optional type.
1250 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1252 (parse_scalar): Parse a Neon scalar with optional type.
1253 (parse_reg_list): Use first_error.
1254 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1255 (neon_alias_types_same): New function. Return true if two (alias) types
1257 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1259 (insert_reg_alias): Return new reg_entry not void.
1260 (insert_neon_reg_alias): New function. Insert type/index information as
1261 well as register for alias.
1262 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1263 make typed register aliases accordingly.
1264 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1266 (s_unreq): Delete type information if present.
1267 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1268 (s_arm_unwind_save_mmxwcg): Likewise.
1269 (s_arm_unwind_movsp): Likewise.
1270 (s_arm_unwind_setfp): Likewise.
1271 (parse_shift): Likewise.
1272 (parse_shifter_operand): Likewise.
1273 (parse_address): Likewise.
1274 (parse_tb): Likewise.
1275 (tc_arm_regname_to_dw2regnum): Likewise.
1276 (md_pseudo_table): Add dn, qn.
1277 (parse_neon_mov): Handle typed operands.
1278 (parse_operands): Likewise.
1279 (neon_type_mask): Add N_SIZ.
1280 (N_ALLMODS): New macro.
1281 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1282 (el_type_of_type_chk): Add some safeguards.
1283 (modify_types_allowed): Fix logic bug.
1284 (neon_check_type): Handle operands with types.
1285 (neon_three_same): Remove redundant optional arg handling.
1286 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1287 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1288 (do_neon_step): Adjust accordingly.
1289 (neon_cmode_for_logic_imm): Use first_error.
1290 (do_neon_bitfield): Call neon_check_type.
1291 (neon_dyadic): Rename to...
1292 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1293 to allow modification of type of the destination.
1294 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1295 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1296 (do_neon_compare): Make destination be an untyped bitfield.
1297 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1298 (neon_mul_mac): Return early in case of errors.
1299 (neon_move_immediate): Use first_error.
1300 (neon_mac_reg_scalar_long): Fix type to include scalar.
1301 (do_neon_dup): Likewise.
1302 (do_neon_mov): Likewise (in several places).
1303 (do_neon_tbl_tbx): Fix type.
1304 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1305 (do_neon_ld_dup): Exit early in case of errors and/or use
1307 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1308 Handle .dn/.qn directives.
1309 (REGDEF): Add zero for reg_entry neon field.
1311 2006-04-26 Julian Brown <julian@codesourcery.com>
1313 * config/tc-arm.c (limits.h): Include.
1314 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1315 (fpu_vfp_v3_or_neon_ext): Declare constants.
1316 (neon_el_type): New enumeration of types for Neon vector elements.
1317 (neon_type_el): New struct. Define type and size of a vector element.
1318 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1320 (neon_type): Define struct. The type of an instruction.
1321 (arm_it): Add 'vectype' for the current instruction.
1322 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1323 (vfp_sp_reg_pos): Rename to...
1324 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1326 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1327 (Neon D or Q register).
1328 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1330 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1331 (my_get_expression): Allow above constant as argument to accept
1332 64-bit constants with optional prefix.
1333 (arm_reg_parse): Add extra argument to return the specific type of
1334 register in when either a D or Q register (REG_TYPE_NDQ) is
1335 requested. Can be NULL.
1336 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1337 (parse_reg_list): Update for new arm_reg_parse args.
1338 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1339 (parse_neon_el_struct_list): New function. Parse element/structure
1340 register lists for VLD<n>/VST<n> instructions.
1341 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1342 (s_arm_unwind_save_mmxwr): Likewise.
1343 (s_arm_unwind_save_mmxwcg): Likewise.
1344 (s_arm_unwind_movsp): Likewise.
1345 (s_arm_unwind_setfp): Likewise.
1346 (parse_big_immediate): New function. Parse an immediate, which may be
1347 64 bits wide. Put results in inst.operands[i].
1348 (parse_shift): Update for new arm_reg_parse args.
1349 (parse_address): Likewise. Add parsing of alignment specifiers.
1350 (parse_neon_mov): Parse the operands of a VMOV instruction.
1351 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1352 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1353 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1354 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1355 (parse_operands): Handle new codes above.
1356 (encode_arm_vfp_sp_reg): Rename to...
1357 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1358 selected VFP version only supports D0-D15.
1359 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1360 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1361 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1362 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1363 encode_arm_vfp_reg name, and allow 32 D regs.
1364 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1365 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1367 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1368 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1369 constant-load and conversion insns introduced with VFPv3.
1370 (neon_tab_entry): New struct.
1371 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1372 those which are the targets of pseudo-instructions.
1373 (neon_opc): Enumerate opcodes, use as indices into...
1374 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1375 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1376 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1377 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1379 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1381 (neon_type_mask): New. Compact type representation for type checking.
1382 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1383 permitted type combinations.
1384 (N_IGNORE_TYPE): New macro.
1385 (neon_check_shape): New function. Check an instruction shape for
1386 multiple alternatives. Return the specific shape for the current
1388 (neon_modify_type_size): New function. Modify a vector type and size,
1389 depending on the bit mask in argument 1.
1390 (neon_type_promote): New function. Convert a given "key" type (of an
1391 operand) into the correct type for a different operand, based on a bit
1393 (type_chk_of_el_type): New function. Convert a type and size into the
1394 compact representation used for type checking.
1395 (el_type_of_type_ckh): New function. Reverse of above (only when a
1396 single bit is set in the bit mask).
1397 (modify_types_allowed): New function. Alter a mask of allowed types
1398 based on a bit mask of modifications.
1399 (neon_check_type): New function. Check the type of the current
1400 instruction against the variable argument list. The "key" type of the
1401 instruction is returned.
1402 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1403 a Neon data-processing instruction depending on whether we're in ARM
1404 mode or Thumb-2 mode.
1405 (neon_logbits): New function.
1406 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1407 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1408 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1409 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1410 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1411 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1412 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1413 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1414 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1415 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1416 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1417 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1418 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1419 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1420 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1421 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1422 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1423 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1424 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1425 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1426 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1427 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1428 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1429 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1430 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1432 (parse_neon_type): New function. Parse Neon type specifier.
1433 (opcode_lookup): Allow parsing of Neon type specifiers.
1434 (REGNUM2, REGSETH, REGSET2): New macros.
1435 (reg_names): Add new VFPv3 and Neon registers.
1436 (NUF, nUF, NCE, nCE): New macros for opcode table.
1437 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1438 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1439 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1440 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1441 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1442 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1443 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1444 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1445 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1446 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1447 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1448 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1449 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1450 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1452 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1453 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1454 (arm_option_cpu_value): Add vfp3 and neon.
1455 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1458 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1460 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1461 syntax instead of hardcoded opcodes with ".w18" suffixes.
1462 (wide_branch_opcode): New.
1463 (build_transition): Use it to check for wide branch opcodes with
1464 either ".w18" or ".w15" suffixes.
1466 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1468 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1469 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1470 frag's is_literal flag.
1472 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1474 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1476 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1478 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1479 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1480 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1481 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1482 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1484 2005-04-20 Paul Brook <paul@codesourcery.com>
1486 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1488 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1490 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1492 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1493 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1494 Make some cpus unsupported on ELF. Run "make dep-am".
1495 * Makefile.in: Regenerate.
1497 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1499 * configure.in (--enable-targets): Indent help message.
1500 * configure: Regenerate.
1502 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1505 * config/tc-i386.c (i386_immediate): Check illegal immediate
1508 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1510 * config/tc-i386.c: Formatting.
1511 (output_disp, output_imm): ISO C90 params.
1513 * frags.c (frag_offset_fixed_p): Constify args.
1514 * frags.h (frag_offset_fixed_p): Ditto.
1516 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1517 (COFF_MAGIC): Delete.
1519 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1521 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1523 * po/POTFILES.in: Regenerated.
1525 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1527 * doc/as.texinfo: Mention that some .type syntaxes are not
1528 supported on all architectures.
1530 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1532 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1533 instructions when such transformations have been disabled.
1535 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1537 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1538 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1539 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1540 decoding the loop instructions. Remove current_offset variable.
1541 (xtensa_fix_short_loop_frags): Likewise.
1542 (min_bytes_to_other_loop_end): Remove current_offset argument.
1544 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1546 * config/tc-z80.c (z80_optimize_expr): Removed.
1547 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1549 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1551 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1552 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1553 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1554 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1555 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1556 at90can64, at90usb646, at90usb647, at90usb1286 and
1558 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1560 2006-04-07 Paul Brook <paul@codesourcery.com>
1562 * config/tc-arm.c (parse_operands): Set default error message.
1564 2006-04-07 Paul Brook <paul@codesourcery.com>
1566 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1568 2006-04-07 Paul Brook <paul@codesourcery.com>
1570 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1572 2006-04-07 Paul Brook <paul@codesourcery.com>
1574 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1575 (move_or_literal_pool): Handle Thumb-2 instructions.
1576 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1578 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1581 * config/tc-i386.c (match_template): Move 64-bit operand tests
1584 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1586 * po/Make-in: Add install-html target.
1587 * Makefile.am: Add install-html and install-html-recursive targets.
1588 * Makefile.in: Regenerate.
1589 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1590 * configure: Regenerate.
1591 * doc/Makefile.am: Add install-html and install-html-am targets.
1592 * doc/Makefile.in: Regenerate.
1594 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1596 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1599 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1600 Daniel Jacobowitz <dan@codesourcery.com>
1602 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1603 (GOTT_BASE, GOTT_INDEX): New.
1604 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1605 GOTT_INDEX when generating VxWorks PIC.
1606 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1607 use the generic *-*-vxworks* stanza instead.
1609 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1612 * frags.c (frag_offset_fixed_p): New function.
1613 * frags.h (frag_offset_fixed_p): Declare.
1614 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1615 (resolve_expression): Likewise.
1617 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1619 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1620 of the same length but different numbers of slots.
1622 2006-03-30 Andreas Schwab <schwab@suse.de>
1624 * configure.in: Fix help string for --enable-targets option.
1625 * configure: Regenerate.
1627 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1629 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1630 (m68k_ip): ... here. Use for all chips. Protect against buffer
1631 overrun and avoid excessive copying.
1633 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1634 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1635 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1636 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1637 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1638 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1639 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1640 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1641 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1642 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1643 (struct m68k_cpu): Change chip field to control_regs.
1644 (current_chip): Remove.
1645 (control_regs): New.
1646 (m68k_archs, m68k_extensions): Adjust.
1647 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1648 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1649 (find_cf_chip): Reimplement for new organization of cpu table.
1650 (select_control_regs): Remove.
1652 (struct save_opts): Save control regs, not chip.
1653 (s_save, s_restore): Adjust.
1654 (m68k_lookup_cpu): Give deprecated warning when necessary.
1655 (m68k_init_arch): Adjust.
1656 (md_show_usage): Adjust for new cpu table organization.
1658 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1660 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1661 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1662 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1664 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1665 (any_gotrel): New rule.
1666 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1667 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1669 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1670 (bfin_pic_ptr): New function.
1671 (md_pseudo_table): Add it for ".picptr".
1672 (OPTION_FDPIC): New macro.
1673 (md_longopts): Add -mfdpic.
1674 (md_parse_option): Handle it.
1675 (md_begin): Set BFD flags.
1676 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1677 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1679 * Makefile.am (bfin-parse.o): Update dependencies.
1680 (DEPTC_bfin_elf): Likewise.
1681 * Makefile.in: Regenerate.
1683 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1685 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1686 mcfemac instead of mcfmac.
1688 2006-03-23 Michael Matz <matz@suse.de>
1690 * config/tc-i386.c (type_names): Correct placement of 'static'.
1691 (reloc): Map some more relocs to their 64 bit counterpart when
1693 (output_insn): Work around breakage if DEBUG386 is defined.
1694 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1695 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1696 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1697 different from i386.
1698 (output_imm): Ditto.
1699 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1701 (md_convert_frag): Jumps can now be larger than 2GB away, error
1703 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1704 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1706 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1707 Daniel Jacobowitz <dan@codesourcery.com>
1708 Phil Edwards <phil@codesourcery.com>
1709 Zack Weinberg <zack@codesourcery.com>
1710 Mark Mitchell <mark@codesourcery.com>
1711 Nathan Sidwell <nathan@codesourcery.com>
1713 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1714 (md_begin): Complain about -G being used for PIC. Don't change
1715 the text, data and bss alignments on VxWorks.
1716 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1717 generating VxWorks PIC.
1718 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1719 (macro): Likewise, but do not treat la $25 specially for
1720 VxWorks PIC, and do not handle jal.
1721 (OPTION_MVXWORKS_PIC): New macro.
1722 (md_longopts): Add -mvxworks-pic.
1723 (md_parse_option): Don't complain about using PIC and -G together here.
1724 Handle OPTION_MVXWORKS_PIC.
1725 (md_estimate_size_before_relax): Always use the first relaxation
1726 sequence on VxWorks.
1727 * config/tc-mips.h (VXWORKS_PIC): New.
1729 2006-03-21 Paul Brook <paul@codesourcery.com>
1731 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1733 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1735 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1736 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1737 (get_loop_align_size): New.
1738 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1739 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1740 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1741 (get_noop_aligned_address): Use get_loop_align_size.
1742 (get_aligned_diff): Likewise.
1744 2006-03-21 Paul Brook <paul@codesourcery.com>
1746 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1748 2006-03-20 Paul Brook <paul@codesourcery.com>
1750 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1751 (do_t_branch): Encode branches inside IT blocks as unconditional.
1752 (do_t_cps): New function.
1753 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1754 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1755 (opcode_lookup): Allow conditional suffixes on all instructions in
1757 (md_assemble): Advance condexec state before checking for errors.
1758 (insns): Use do_t_cps.
1760 2006-03-20 Paul Brook <paul@codesourcery.com>
1762 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1763 outputting the insn.
1765 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1767 * config/tc-vax.c: Update copyright year.
1768 * config/tc-vax.h: Likewise.
1770 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1772 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1774 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1776 2006-03-17 Paul Brook <paul@codesourcery.com>
1778 * config/tc-arm.c (insns): Add ldm and stm.
1780 2006-03-17 Ben Elliston <bje@au.ibm.com>
1783 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1785 2006-03-16 Paul Brook <paul@codesourcery.com>
1787 * config/tc-arm.c (insns): Add "svc".
1789 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1791 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1792 flag and avoid double underscore prefixes.
1794 2006-03-10 Paul Brook <paul@codesourcery.com>
1796 * config/tc-arm.c (md_begin): Handle EABIv5.
1797 (arm_eabis): Add EF_ARM_EABI_VER5.
1798 * doc/c-arm.texi: Document -meabi=5.
1800 2006-03-10 Ben Elliston <bje@au.ibm.com>
1802 * app.c (do_scrub_chars): Simplify string handling.
1804 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1805 Daniel Jacobowitz <dan@codesourcery.com>
1806 Zack Weinberg <zack@codesourcery.com>
1807 Nathan Sidwell <nathan@codesourcery.com>
1808 Paul Brook <paul@codesourcery.com>
1809 Ricardo Anguiano <anguiano@codesourcery.com>
1810 Phil Edwards <phil@codesourcery.com>
1812 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1813 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1815 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1816 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1817 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1819 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1821 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1822 even when using the text-section-literals option.
1824 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1826 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1828 (m68k_ip): <case 'J'> Check we have some control regs.
1829 (md_parse_option): Allow raw arch switch.
1830 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1831 whether 68881 or cfloat was meant by -mfloat.
1832 (md_show_usage): Adjust extension display.
1833 (m68k_elf_final_processing): Adjust.
1835 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1837 * config/tc-avr.c (avr_mod_hash_value): New function.
1838 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1839 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1840 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1841 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1843 (tc_gen_reloc): Handle substractions of symbols, if possible do
1844 fixups, abort otherwise.
1845 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1846 tc_fix_adjustable): Define.
1848 2006-03-02 James E Wilson <wilson@specifix.com>
1850 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1851 change the template, then clear md.slot[curr].end_of_insn_group.
1853 2006-02-28 Jan Beulich <jbeulich@novell.com>
1855 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1857 2006-02-28 Jan Beulich <jbeulich@novell.com>
1860 * macro.c (getstring): Don't treat parentheses special anymore.
1861 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1862 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1865 2006-02-28 Mat <mat@csail.mit.edu>
1867 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1869 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1871 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1873 (CFI_signal_frame): Define.
1874 (cfi_pseudo_table): Add .cfi_signal_frame.
1875 (dot_cfi): Handle CFI_signal_frame.
1876 (output_cie): Handle cie->signal_frame.
1877 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1878 different. Copy signal_frame from FDE to newly created CIE.
1879 * doc/as.texinfo: Document .cfi_signal_frame.
1881 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1883 * doc/Makefile.am: Add html target.
1884 * doc/Makefile.in: Regenerate.
1885 * po/Make-in: Add html target.
1887 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1889 * config/tc-i386.c (output_insn): Support Intel Merom New
1892 * config/tc-i386.h (CpuMNI): New.
1893 (CpuUnknownFlags): Add CpuMNI.
1895 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1897 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1898 (hpriv_reg_table): New table for hyperprivileged registers.
1899 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1902 2006-02-24 DJ Delorie <dj@redhat.com>
1904 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1905 (tc_gen_reloc): Don't define.
1906 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1907 (OPTION_LINKRELAX): New.
1908 (md_longopts): Add it.
1910 (md_parse_options): Set it.
1911 (md_assemble): Emit relaxation relocs as needed.
1912 (md_convert_frag): Emit relaxation relocs as needed.
1913 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1914 (m32c_apply_fix): New.
1915 (tc_gen_reloc): New.
1916 (m32c_force_relocation): Force out jump relocs when relaxing.
1917 (m32c_fix_adjustable): Return false if relaxing.
1919 2006-02-24 Paul Brook <paul@codesourcery.com>
1921 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1922 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1923 (struct asm_barrier_opt): Define.
1924 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1925 (parse_psr): Accept V7M psr names.
1926 (parse_barrier): New function.
1927 (enum operand_parse_code): Add OP_oBARRIER.
1928 (parse_operands): Implement OP_oBARRIER.
1929 (do_barrier): New function.
1930 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1931 (do_t_cpsi): Add V7M restrictions.
1932 (do_t_mrs, do_t_msr): Validate V7M variants.
1933 (md_assemble): Check for NULL variants.
1934 (v7m_psrs, barrier_opt_names): New tables.
1935 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1936 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1937 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1938 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1939 (struct cpu_arch_ver_table): Define.
1940 (cpu_arch_ver): New.
1941 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1942 Tag_CPU_arch_profile.
1943 * doc/c-arm.texi: Document new cpu and arch options.
1945 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1947 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1949 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1951 * config/tc-ia64.c: Update copyright years.
1953 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1955 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1958 2005-02-22 Paul Brook <paul@codesourcery.com>
1960 * config/tc-arm.c (do_pld): Remove incorrect write to
1962 (encode_thumb32_addr_mode): Use correct operand.
1964 2006-02-21 Paul Brook <paul@codesourcery.com>
1966 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1968 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1969 Anil Paranjape <anilp1@kpitcummins.com>
1970 Shilin Shakti <shilins@kpitcummins.com>
1972 * Makefile.am: Add xc16x related entry.
1973 * Makefile.in: Regenerate.
1974 * configure.in: Added xc16x related entry.
1975 * configure: Regenerate.
1976 * config/tc-xc16x.h: New file
1977 * config/tc-xc16x.c: New file
1978 * doc/c-xc16x.texi: New file for xc16x
1979 * doc/all.texi: Entry for xc16x
1980 * doc/Makefile.texi: Added c-xc16x.texi
1981 * NEWS: Announce the support for the new target.
1983 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1985 * configure.tgt: set emulation for mips-*-netbsd*
1987 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1989 * config.in: Rebuilt.
1991 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1993 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1994 from 1, not 0, in error messages.
1995 (md_assemble): Simplify special-case check for ENTRY instructions.
1996 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1997 operand in error message.
1999 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2001 * configure.tgt (arm-*-linux-gnueabi*): Change to
2004 2006-02-10 Nick Clifton <nickc@redhat.com>
2006 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2007 32-bit value is propagated into the upper bits of a 64-bit long.
2009 * config/tc-arc.c (init_opcode_tables): Fix cast.
2010 (arc_extoper, md_operand): Likewise.
2012 2006-02-09 David Heine <dlheine@tensilica.com>
2014 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2015 each relaxation step.
2017 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2019 * configure.in (CHECK_DECLS): Add vsnprintf.
2020 * configure: Regenerate.
2021 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2022 include/declare here, but...
2023 * as.h: Move code detecting VARARGS idiom to the top.
2024 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2025 (vsnprintf): Declare if not already declared.
2027 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2029 * as.c (close_output_file): New.
2030 (main): Register close_output_file with xatexit before
2031 dump_statistics. Don't call output_file_close.
2033 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2035 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2036 mcf5329_control_regs): New.
2037 (not_current_architecture, selected_arch, selected_cpu): New.
2038 (m68k_archs, m68k_extensions): New.
2039 (archs): Renamed to ...
2040 (m68k_cpus): ... here. Adjust.
2042 (md_pseudo_table): Add arch and cpu directives.
2043 (find_cf_chip, m68k_ip): Adjust table scanning.
2044 (no_68851, no_68881): Remove.
2045 (md_assemble): Lazily initialize.
2046 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2047 (md_init_after_args): Move functionality to m68k_init_arch.
2048 (mri_chip): Adjust table scanning.
2049 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2050 options with saner parsing.
2051 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2052 m68k_init_arch): New.
2053 (s_m68k_cpu, s_m68k_arch): New.
2054 (md_show_usage): Adjust.
2055 (m68k_elf_final_processing): Set CF EF flags.
2056 * config/tc-m68k.h (m68k_init_after_args): Remove.
2057 (tc_init_after_args): Remove.
2058 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2059 (M68k-Directives): Document .arch and .cpu directives.
2061 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2063 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2064 synonyms for equ and defl.
2065 (z80_cons_fix_new): New function.
2066 (emit_byte): Disallow relative jumps to absolute locations.
2067 (emit_data): Only handle defb, prototype changed, because defb is
2068 now handled as pseudo-op rather than an instruction.
2069 (instab): Entries for defb,defw,db,dw moved from here...
2070 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2071 Add entries for def24,def32,d24,d32.
2072 (md_assemble): Improved error handling.
2073 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2074 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2075 (z80_cons_fix_new): Declare.
2076 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2077 (def24,d24,def32,d32): New pseudo-ops.
2079 2006-02-02 Paul Brook <paul@codesourcery.com>
2081 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2083 2005-02-02 Paul Brook <paul@codesourcery.com>
2085 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2086 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2087 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2088 T2_OPCODE_RSB): Define.
2089 (thumb32_negate_data_op): New function.
2090 (md_apply_fix): Use it.
2092 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2094 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2096 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2097 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2099 (relaxation_requirements): Add pfinish_frag argument and use it to
2100 replace setting tinsn->record_fix fields.
2101 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2102 and vinsn_to_insnbuf. Remove references to record_fix and
2103 slot_sub_symbols fields.
2104 (xtensa_mark_narrow_branches): Delete unused code.
2105 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2107 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2109 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2110 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2111 of the record_fix field. Simplify error messages for unexpected
2113 (set_expr_symbol_offset_diff): Delete.
2115 2006-01-31 Paul Brook <paul@codesourcery.com>
2117 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2119 2006-01-31 Paul Brook <paul@codesourcery.com>
2120 Richard Earnshaw <rearnsha@arm.com>
2122 * config/tc-arm.c: Use arm_feature_set.
2123 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2124 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2125 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2128 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2129 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2130 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2131 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2133 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2134 (arm_opts): Move old cpu/arch options from here...
2135 (arm_legacy_opts): ... to here.
2136 (md_parse_option): Search arm_legacy_opts.
2137 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2138 (arm_float_abis, arm_eabis): Make const.
2140 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2142 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2144 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2146 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2147 in load immediate intruction.
2149 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2151 * config/bfin-parse.y (value_match): Use correct conversion
2152 specifications in template string for __FILE__ and __LINE__.
2156 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2158 Introduce TLS descriptors for i386 and x86_64.
2159 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2160 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2161 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2162 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2163 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2165 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2166 (lex_got): Handle @tlsdesc and @tlscall.
2167 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2169 2006-01-11 Nick Clifton <nickc@redhat.com>
2171 Fixes for building on 64-bit hosts:
2172 * config/tc-avr.c (mod_index): New union to allow conversion
2173 between pointers and integers.
2174 (md_begin, avr_ldi_expression): Use it.
2175 * config/tc-i370.c (md_assemble): Add cast for argument to print
2177 * config/tc-tic54x.c (subsym_substitute): Likewise.
2178 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2179 opindex field of fr_cgen structure into a pointer so that it can
2180 be stored in a frag.
2181 * config/tc-mn10300.c (md_assemble): Likewise.
2182 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2184 * config/tc-v850.c: Replace uses of (int) casts with correct
2187 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2190 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2192 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2195 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2196 a local-label reference.
2198 For older changes see ChangeLog-2005
2204 version-control: never
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