1 /* The dpalloc function used and implemented in this file was derieved
2 * from PPCBoot/U-Boot file "arch/powerpc/cpu/mpc8260/commproc.c".
5 /* Author: Arun Dharankar <ADharankar@ATTBI.Com>
6 * This example is meant to only demonstrate how the IDMA could be used.
10 * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's
13 * General Purpose functions for the global management of the
14 * 8260 Communication Processor Module.
15 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
16 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
19 * In addition to the individual control of the communication
20 * channels, there are a few functions that globally affect the
21 * communication processor.
23 * Buffer descriptors must be allocated from the dual ported memory
24 * space. The allocator for that is here. When the communication
25 * process is reset, we reclaim the memory available. There is
26 * currently no deallocator for this memory.
34 DECLARE_GLOBAL_DATA_PTR;
38 #ifndef STANDALONE /* Linked into/Part of PPCBoot */
41 #else /* Standalone app of PPCBoot */
42 #define WATCHDOG_RESET() { \
43 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0x556c; \
44 *(ushort *)(CONFIG_SYS_IMMR + 0x1000E) = 0xaa39; \
46 #endif /* STANDALONE */
50 #define DEBUG(fmt, args...) { \
52 printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__); \
53 printf(fmt, ##args); \
57 #define CPM_CR_IDMA1_SBLOCK (0x14)
58 #define CPM_CR_IDMA2_SBLOCK (0x15)
59 #define CPM_CR_IDMA3_SBLOCK (0x16)
60 #define CPM_CR_IDMA4_SBLOCK (0x17)
61 #define CPM_CR_IDMA1_PAGE (0x07)
62 #define CPM_CR_IDMA2_PAGE (0x08)
63 #define CPM_CR_IDMA3_PAGE (0x09)
64 #define CPM_CR_IDMA4_PAGE (0x0a)
65 #define PROFF_IDMA1_BASE ((uint)0x87fe)
66 #define PROFF_IDMA2_BASE ((uint)0x88fe)
67 #define PROFF_IDMA3_BASE ((uint)0x89fe)
68 #define PROFF_IDMA4_BASE ((uint)0x8afe)
70 #define CPM_CR_INIT_TRX ((ushort)0x0000)
71 #define CPM_CR_FLG ((ushort)0x0001)
73 #define mk_cr_cmd(PG, SBC, MCN, OP) \
74 ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
78 typedef struct ibdbits {
82 unsigned b_interrupt:1;
102 typedef union ibdbitsu {
108 typedef struct idma_buf_desc {
109 ibdbitsu_t ibd_bits; /* Status and Control */
110 uint ibd_datlen; /* Data length in buffer */
111 uint ibd_sbuf; /* Source buffer addr in host mem */
112 uint ibd_dbuf; /* Destination buffer addr in host mem */
117 typedef struct dcmbits {
132 typedef union dcmbitsu {
138 typedef struct pram_idma {
140 dcmbitsu_t pi_dcmbits;
143 ushort pi_bufinv; /* internal to CPM */
145 ushort pi_dprinptr; /* internal to CPM */
147 ushort pi_dproutptr; /* internal to CPM */
152 ushort pi_resv1; /* internal to CPM */
160 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
162 volatile pram_idma_t *piptr;
164 volatile int dmadone;
165 volatile int *dmadonep = &dmadone;
166 void dmadone_handler (void *);
168 int idma_init (void);
169 void idma_start (int, int, int, uint, uint, int);
170 uint dpalloc (uint, uint);
173 uint dpinit_done = 0;
181 case 0x03: /* ^C - Control C */
189 int memcmp(const void * cs,const void * ct,size_t count)
191 const unsigned char *su1, *su2;
193 for( su1 = cs, su2 = ct; 0 < count; ++su1, ++su2, count--)
194 if ((res = *su1 - *su2) != 0)
198 #endif /* STANDALONE */
201 int mem_to_mem_idma2intr (int argc, char * const argv[])
203 int do_idma (bd_t * bd, int argc, char * const argv[])
204 #endif /* STANDALONE */
213 DEBUG ("Installing dma handler\n");
214 install_hdlr (7, dmadone_handler, (void *) bdf);
216 memset ((void *) 0x100000, 'a', 512);
217 memset ((void *) 0x200000, 'b', 512);
219 for (i = 0; i < 32; i++) {
220 printf ("Startin IDMA, iteration=%d\n", i);
221 idma_start (1, 1, 512, 0x100000, 0x200000, 3);
224 DEBUG ("Uninstalling dma handler\n");
231 idma_start (int sinc, int dinc, int sz, uint sbuf, uint dbuf, int ttype)
233 /* ttype is for M-M, M-P, P-M or P-P: not used for now */
235 piptr->pi_istate = 0; /* manual says: clear it before every START_IDMA */
236 piptr->pi_dcmbits.b.b_resv1 = 0;
239 piptr->pi_dcmbits.b.b_sinc = 1;
241 piptr->pi_dcmbits.b.b_sinc = 0;
244 piptr->pi_dcmbits.b.b_dinc = 1;
246 piptr->pi_dcmbits.b.b_dinc = 0;
248 piptr->pi_dcmbits.b.b_erm = 0;
249 piptr->pi_dcmbits.b.b_sd = 0x00; /* M-M */
251 bdf->ibd_sbuf = sbuf;
252 bdf->ibd_dbuf = dbuf;
253 bdf->ibd_bits.b.b_cm = 0;
254 bdf->ibd_bits.b.b_interrupt = 1;
255 bdf->ibd_bits.b.b_wrap = 1;
256 bdf->ibd_bits.b.b_last = 1;
257 bdf->ibd_bits.b.b_sdn = 0;
258 bdf->ibd_bits.b.b_ddn = 0;
259 bdf->ibd_bits.b.b_dgbl = 0;
260 bdf->ibd_bits.b.b_ddtb = 0;
261 bdf->ibd_bits.b.b_sgbl = 0;
262 bdf->ibd_bits.b.b_sdtb = 0;
263 bdf->ibd_bits.b.b_dbo = 1;
264 bdf->ibd_bits.b.b_sbo = 1;
265 bdf->ibd_bits.b.b_valid = 1;
266 bdf->ibd_datlen = 512;
270 immap->im_sdma.sdma_idmr2 = (uchar) 0xf;
272 immap->im_cpm.cp_cpcr = mk_cr_cmd (CPM_CR_IDMA2_PAGE,
273 CPM_CR_IDMA2_SBLOCK, 0x0,
276 while (*dmadonep != 1) {
278 DEBUG ("\nInterrupted waiting for DMA interrupt.\n");
281 printf ("Waiting for DMA interrupt (dmadone=%d b_valid = %d)...\n",
282 dmadone, bdf->ibd_bits.b.b_valid);
285 printf ("DMA complete notification received!\n");
288 DEBUG ("memcmp(0x%08x, 0x%08x, 512) = %d\n",
289 sbuf, dbuf, memcmp ((void *) sbuf, (void *) dbuf, 512));
294 #define MAX_INT_BUFSZ 64
295 #define DCM_WRAP 0 /* MUST be consistant with MAX_INT_BUFSZ */
301 immap->im_cpm.cp_rccr &= ~0x00F3FFFF;
302 immap->im_cpm.cp_rccr |= 0x00A00A00;
304 memaddr = dpalloc (sizeof (pram_idma_t), 64);
306 *(volatile u16 *)&immap->im_dprambase16
307 [PROFF_IDMA2_BASE / sizeof(u16)] = memaddr;
308 piptr = (volatile pram_idma_t *) ((uint) (immap) + memaddr);
310 piptr->pi_resv1 = 0; /* manual says: clear it */
311 piptr->pi_dcmbits.b.b_fb = 0;
312 piptr->pi_dcmbits.b.b_lp = 1;
313 piptr->pi_dcmbits.b.b_erm = 0;
314 piptr->pi_dcmbits.b.b_dt = 0;
316 memaddr = (uint) dpalloc (sizeof (ibd_t), 64);
317 piptr->pi_ibase = piptr->pi_ibdptr = (volatile short) memaddr;
318 bdf = (volatile ibd_t *) ((uint) (immap) + memaddr);
319 bdf->ibd_bits.b.b_valid = 0;
321 memaddr = (uint) dpalloc (64, 64);
322 piptr->pi_dprbuf = (volatile ushort) memaddr;
323 piptr->pi_dcmbits.b.b_wrap = 4;
324 piptr->pi_ssmax = 32;
326 piptr->pi_sts = piptr->pi_ssmax;
327 piptr->pi_dts = piptr->pi_ssmax;
332 void dmadone_handler (void *arg)
334 immap->im_sdma.sdma_idmr2 = (uchar) 0x0;
342 static uint dpbase = 0;
344 uint dpalloc (uint size, uint align)
346 volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
348 uint align_mask, off;
351 /* Pointer to initial global data area */
353 if (dpinit_done == 0) {
354 dpbase = gd->arch.dp_alloc_base;
358 align_mask = align - 1;
361 if ((off = (dpbase & align_mask)) != 0)
362 dpbase += (align - off);
364 if ((off = size & align_mask) != 0)
367 if ((dpbase + size) >= gd->arch.dp_alloc_top) {
369 printf ("dpalloc: ran out of dual port ram!");
376 memset ((void *) &immr->im_dprambase[retloc], 0, size);