3 * Copyright (c) 2020 Project CHIP Authors
4 * Copyright (c) 2019 Google LLC.
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
11 * http://www.apache.org/licenses/LICENSE-2.0
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
20 #include <support/CHIPPlatformMemory.h>
22 #include <mbedtls/platform.h>
23 #include <openthread/cli.h>
24 #include <openthread/dataset.h>
25 #include <openthread/error.h>
26 #include <openthread/heap.h>
27 #include <openthread/icmp6.h>
28 #include <openthread/instance.h>
29 #include <openthread/link.h>
30 #include <openthread/platform/openthread-system.h>
31 #include <openthread/platform/uart.h>
32 #include <openthread/tasklet.h>
33 #include <openthread/thread.h>
35 #include <openthread-core-config.h>
36 #include <openthread/config.h>
41 #include "common/logging.hpp"
48 #include "em_system.h"
49 #include "hal-config.h"
50 #include "hal_common.h"
53 #include "sl_sleeptimer.h"
55 #include "platform-efr32.h"
58 #include "fem-control.h"
65 void halInitChipSpecific(void);
67 void initOtSysEFR(void)
70 uint32_t PrioGoupPos = 0;
72 #if defined(EFR32MG21)
73 // FreeRTOS recommends a lower configuration for CortexM3 and asserts
74 // in some places if using default PRIGROUP_POSITION.
80 #undef FIXED_EXCEPTION
81 #define FIXED_EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler)
82 #define EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler, priorityLevel, subpriority) \
83 PrioGoupPos = PRIGROUP_POSITION - SubPrio; \
84 NVIC_SetPriority(deviceIrqn, NVIC_EncodePriority(PrioGoupPos, priorityLevel, subpriority));
88 NVIC_SetPriorityGrouping(PrioGoupPos);
90 halInitChipSpecific();
94 BSP_Init(BSP_INIT_BCC);
96 #if defined(EFR32MG12)
97 CMU_ClockSelectSet(cmuClock_LFE, cmuSelect_LFRCO);
98 CMU_ClockEnable(cmuClock_CORELE, true);
99 #elif defined(EFR32MG21)
100 CMU_OscillatorEnable(cmuOsc_LFRCO, true, true);
102 #error "Enable Clocks for the used board"
103 #endif /* EFR32 PLATFORM */
104 CMU_ClockEnable(cmuClock_RTCC, true);
105 status = sl_sleeptimer_init();
106 assert(status == SL_STATUS_OK);
115 #if EFR32_LOG_ENABLED
123 #endif /* EFR32 PLATFORM */
124 otHeapSetCAllocFree(CHIPPlatformMemoryCalloc, CHIPPlatformMemoryFree);