50d6f3503ad10feff34b8071677125d0b04a6fe4
[platform/upstream/connectedhomeip.git] / examples / platform / efr32 / init_otSystem.c
1 /*
2  *
3  *    Copyright (c) 2020 Project CHIP Authors
4  *    Copyright (c) 2019 Google LLC.
5  *    All rights reserved.
6  *
7  *    Licensed under the Apache License, Version 2.0 (the "License");
8  *    you may not use this file except in compliance with the License.
9  *    You may obtain a copy of the License at
10  *
11  *        http://www.apache.org/licenses/LICENSE-2.0
12  *
13  *    Unless required by applicable law or agreed to in writing, software
14  *    distributed under the License is distributed on an "AS IS" BASIS,
15  *    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  *    See the License for the specific language governing permissions and
17  *    limitations under the License.
18  */
19
20 #include <support/CHIPPlatformMemory.h>
21
22 #include <mbedtls/platform.h>
23 #include <openthread/cli.h>
24 #include <openthread/dataset.h>
25 #include <openthread/error.h>
26 #include <openthread/heap.h>
27 #include <openthread/icmp6.h>
28 #include <openthread/instance.h>
29 #include <openthread/link.h>
30 #include <openthread/platform/openthread-system.h>
31 #include <openthread/platform/uart.h>
32 #include <openthread/tasklet.h>
33 #include <openthread/thread.h>
34
35 #include <openthread-core-config.h>
36 #include <openthread/config.h>
37
38 #include <assert.h>
39 #include <string.h>
40
41 #include "common/logging.hpp"
42
43 #include "bsp.h"
44 #include "em_chip.h"
45 #include "em_cmu.h"
46 #include "em_core.h"
47 #include "em_emu.h"
48 #include "em_system.h"
49 #include "hal-config.h"
50 #include "hal_common.h"
51 #include "rail.h"
52 #include "sl_mpu.h"
53 #include "sl_sleeptimer.h"
54
55 #include "platform-efr32.h"
56
57 #if (HAL_FEM_ENABLE)
58 #include "fem-control.h"
59 #endif
60
61 #if DISPLAY_ENABLED
62 #include "lcd.h"
63 #endif
64
65 void halInitChipSpecific(void);
66
67 void initOtSysEFR(void)
68 {
69     sl_status_t status;
70     uint32_t PrioGoupPos = 0;
71     uint32_t SubPrio     = 0;
72 #if defined(EFR32MG21)
73     // FreeRTOS recommends a lower configuration for CortexM3 and asserts
74     // in some places if using default PRIGROUP_POSITION.
75     SubPrio = 1;
76 #endif
77
78     __disable_irq();
79
80 #undef FIXED_EXCEPTION
81 #define FIXED_EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler)
82 #define EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler, priorityLevel, subpriority)                            \
83     PrioGoupPos = PRIGROUP_POSITION - SubPrio;                                                                                     \
84     NVIC_SetPriority(deviceIrqn, NVIC_EncodePriority(PrioGoupPos, priorityLevel, subpriority));
85 #include NVIC_CONFIG
86 #undef EXCEPTION
87
88     NVIC_SetPriorityGrouping(PrioGoupPos);
89     CHIP_Init();
90     halInitChipSpecific();
91 #if DISPLAY_ENABLED
92     initLCD();
93 #endif
94     BSP_Init(BSP_INIT_BCC);
95
96 #if defined(EFR32MG12)
97     CMU_ClockSelectSet(cmuClock_LFE, cmuSelect_LFRCO);
98     CMU_ClockEnable(cmuClock_CORELE, true);
99 #elif defined(EFR32MG21)
100     CMU_OscillatorEnable(cmuOsc_LFRCO, true, true);
101 #else
102 #error "Enable Clocks for the used board"
103 #endif /* EFR32 PLATFORM */
104     CMU_ClockEnable(cmuClock_RTCC, true);
105     status = sl_sleeptimer_init();
106     assert(status == SL_STATUS_OK);
107
108 #if (HAL_FEM_ENABLE)
109     initFem();
110     wakeupFem();
111 #endif
112
113     __enable_irq();
114
115 #if EFR32_LOG_ENABLED
116     efr32LogInit();
117 #endif
118     efr32RadioInit();
119     efr32AlarmInit();
120     efr32MiscInit();
121 #ifndef EFR32MG21
122     efr32RandomInit();
123 #endif /* EFR32 PLATFORM */
124     otHeapSetCAllocFree(CHIPPlatformMemoryCalloc, CHIPPlatformMemoryFree);
125 }