3 * Copyright (c) 2020 Project CHIP Authors
4 * Copyright (c) 2019 Google LLC.
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
11 * http://www.apache.org/licenses/LICENSE-2.0
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
20 #include "AppConfig.h"
21 #include <platform/CHIPDeviceLayer.h>
22 #include <support/CHIPPlatformMemory.h>
30 #include <mbedtls/platform.h>
32 #if CHIP_ENABLE_OPENTHREAD
33 #include <openthread-core-config.h>
34 #include <openthread/cli.h>
35 #include <openthread/config.h>
36 #include <openthread/dataset.h>
37 #include <openthread/error.h>
38 #include <openthread/heap.h>
39 #include <openthread/icmp6.h>
40 #include <openthread/instance.h>
41 #include <openthread/link.h>
42 #include <openthread/platform/openthread-system.h>
43 #include <openthread/platform/uart.h>
44 #include <openthread/tasklet.h>
45 #include <openthread/thread.h>
47 #include "platform-efr32.h"
49 #if OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
50 #include "openthread/heap.h"
51 #include "sl_malloc.h"
52 #endif // OPENTHREAD_CONFIG_HEAP_EXTERNAL_ENABLE
53 #endif // CHIP_ENABLE_OPENTHREAD
62 #include "em_device.h"
64 #include "em_system.h"
65 #include "hal-config.h"
66 #include "hal_common.h"
67 #include "init_efrPlatform.h"
70 #include "sl_sleeptimer.h"
73 #include "fem-control.h"
80 static void halInitChipSpecific(void);
81 void initAntenna(void);
83 void init_efrPlatform(void)
86 uint32_t PrioGoupPos = 0;
88 #if defined(EFR32MG21)
89 // FreeRTOS recommends a lower configuration for CortexM3 and asserts
90 // in some places if using default PRIGROUP_POSITION.
96 #undef FIXED_EXCEPTION
97 #define FIXED_EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler)
98 #define EXCEPTION(vectorNumber, functionName, deviceIrqn, deviceIrqHandler, priorityLevel, subpriority) \
99 PrioGoupPos = PRIGROUP_POSITION - SubPrio; \
100 NVIC_SetPriority(deviceIrqn, NVIC_EncodePriority(PrioGoupPos, priorityLevel, subpriority));
104 NVIC_SetPriorityGrouping(PrioGoupPos);
106 halInitChipSpecific();
110 BSP_Init(BSP_INIT_BCC);
112 // Enable LE peripheral clock. Needed for RTCC initialization in sl_sleeptimer_init()
113 #if !defined(_SILICON_LABS_32B_SERIES_2)
114 CMU_ClockEnable(cmuClock_HFLE, true);
115 CMU_OscillatorEnable(cmuOsc_LFRCO, true, true);
116 #endif // !defined(_SILICON_LABS_32B_SERIES_2)
118 status = sl_sleeptimer_init();
119 assert(status == SL_STATUS_OK);
128 #if EFR32_LOG_ENABLED
132 #if CHIP_ENABLE_OPENTHREAD
136 #endif // CHIP_ENABLE_OPENTHREAD
139 void halInitChipSpecific(void)
141 #if defined(BSP_DK) && !defined(RAIL_IC_SIM_BUILD)
142 BSP_Init(BSP_INIT_DK_SPI);
146 #if !defined(RAIL_IC_SIM_BUILD)
151 RAIL_PtiConfig_t railPtiConfig = {
152 #if HAL_PTI_MODE == HAL_PTI_MODE_SPI
153 .mode = RAIL_PTI_MODE_SPI,
154 #elif HAL_PTI_MODE == HAL_PTI_MODE_UART
155 .mode = RAIL_PTI_MODE_UART,
156 #elif HAL_PTI_MODE == HAL_PTI_MODE_UART_ONEWIRE
157 .mode = RAIL_PTI_MODE_UART_ONEWIRE,
159 .mode = RAIL_PTI_MODE_DISABLED,
161 .baud = HAL_PTI_BAUD_RATE,
162 #ifdef BSP_PTI_DOUT_LOC
163 .doutLoc = BSP_PTI_DOUT_LOC,
165 .doutPort = (uint8_t) BSP_PTI_DOUT_PORT,
166 .doutPin = BSP_PTI_DOUT_PIN,
167 #if HAL_PTI_MODE == HAL_PTI_MODE_SPI
168 #ifdef BSP_PTI_DCLK_LOC
169 .dclkLoc = BSP_PTI_DCLK_LOC,
171 .dclkPort = (uint8_t) BSP_PTI_DCLK_PORT,
172 .dclkPin = BSP_PTI_DCLK_PIN,
174 #if HAL_PTI_MODE != HAL_PTI_MODE_UART_ONEWIRE
175 #ifdef BSP_PTI_DFRAME_LOC
176 .dframeLoc = BSP_PTI_DFRAME_LOC,
178 .dframePort = (uint8_t) BSP_PTI_DFRAME_PORT,
179 .dframePin = BSP_PTI_DFRAME_PIN
183 RAIL_ConfigPti(RAIL_EFR32_HANDLE, &railPtiConfig);
184 #endif // HAL_PTI_ENABLE
186 #if !defined(RAIL_IC_SIM_BUILD)
187 #if CHIP_ENABLE_OPENTHREAD
189 #endif // CHIP_ENABLE_OPENTHREAD
191 // Disable any unused peripherals to ensure we enter a low power mode
192 #if defined(BSP_EXTFLASH_USART) && !defined(HAL_DISABLE_EXTFLASH)
193 #include "mx25flash_spi.h"
198 #endif // RAIL_IC_SIM_BUILD
200 #if defined(HAL_VCOM_ENABLE)
201 // Enable VCOM if requested
202 GPIO_PinModeSet(BSP_VCOM_ENABLE_PORT, BSP_VCOM_ENABLE_PIN, gpioModePushPull, HAL_VCOM_ENABLE);
203 #endif // HAL_VCOM_ENABLE
205 #if RAIL_DMA_CHANNEL == DMA_CHANNEL_DMADRV
206 Ecode_t dmaError = DMADRV_Init();
207 if ((dmaError == ECODE_EMDRV_DMADRV_ALREADY_INITIALIZED) || (dmaError == ECODE_EMDRV_DMADRV_OK))
209 unsigned int channel;
210 dmaError = DMADRV_AllocateChannel(&channel, NULL);
211 if (dmaError == ECODE_EMDRV_DMADRV_OK)
213 RAIL_UseDma(channel);
216 #elif defined(RAIL_DMA_CHANNEL) && (RAIL_DMA_CHANNEL != DMA_CHANNEL_INVALID)
217 LDMA_Init_t ldmaInit = LDMA_INIT_DEFAULT;
218 LDMA_Init(&ldmaInit);
219 RAIL_UseDma(RAIL_DMA_CHANNEL);