packaging: update the changelog
[profile/ivi/intel-emgd-kmod.git] / emgd / pal / ch7036 / ch7036_pm.c
1 /*-----------------------------------------------------------------------------
2 * Copyright (c) Chrontel Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 *
22 *-----------------------------------------------------------------------------
23 * @file  ch7036_pm.c
24 * @version 1.2.4
25 *-----------------------------------------------------------------------------
26 */
27
28
29
30 #include "ch7036_intf.h"
31
32
33
34 void ch7036_set_power_lvds(DEV_CONTEXT* pDevContext);
35 void ch7036_set_power_hdmi(DEV_CONTEXT* pDevContext);
36 void ch7036_set_power_crt(DEV_CONTEXT* pDevContext);
37
38 void ch7036_set_power_lvds(DEV_CONTEXT* p_ch7xxx_context)
39 {
40
41         OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
42         uint8 reg=0x00;
43
44         PD_DEBUG("ch7036: ch7036_set_power_lvds()-enter...channel [%lu]\n", pOutput_Info->channel);
45         if(pOutput_Info->channel & CHANNEL_LVDS)
46         {
47
48
49                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
50                 reg = I2CRead(p_ch7xxx_context,0x1A);
51                 reg = reg & 0xEF;
52                 I2CWrite(p_ch7xxx_context,0x1A, reg);
53
54                 reg = I2CRead(p_ch7xxx_context,0x11);
55                 reg = reg & 0xEF;
56           if(((pOutput_Info->channel & CHANNEL_HDMI)==0x00)&&
57                  ((pOutput_Info->channel & CHANNEL_VGA) == 0x00))
58             {
59
60                         reg = reg | 0x80;
61             }
62                  I2CWrite(p_ch7xxx_context,0x11, reg);
63
64                 I2CWrite(p_ch7xxx_context,0x03, 0x04);
65                 reg = I2CRead(p_ch7xxx_context,0x66);
66                 reg = reg & 0xFD;
67                 I2CWrite(p_ch7xxx_context,0x66, reg);
68
69         reg = I2CRead(p_ch7xxx_context,0x64);
70                 reg = reg & 0xFE;
71                 I2CWrite(p_ch7xxx_context,0x64, reg);
72
73         reg = I2CRead(p_ch7xxx_context,0x63);
74                 reg = reg & 0x03;
75                 I2CWrite(p_ch7xxx_context,0x63, reg);
76
77         I2CWrite(p_ch7xxx_context,0x03, 0x00);
78                 reg = I2CRead(p_ch7xxx_context,0x0A);
79                 reg = reg & 0xF7;
80         I2CWrite(p_ch7xxx_context,0x0A, reg);
81
82
83                 I2CWrite(p_ch7xxx_context,0x4E, I2CRead(p_ch7xxx_context,0x4E) | 0x80 );
84
85
86                 if((pOutput_Info->channel & CHANNEL_HDMI) == 0x00 && (pOutput_Info->channel & CHANNEL_VGA) == 0x00){
87
88
89                  I2CWrite(p_ch7xxx_context,0x03, 0x00);
90                  reg = I2CRead(p_ch7xxx_context,0x07);
91                  reg = reg | 0x02;
92                  I2CWrite(p_ch7xxx_context,0x07, reg);
93
94                  I2CWrite(p_ch7xxx_context,0x03, 0x04);
95                  reg = I2CRead(p_ch7xxx_context,0x54);
96                  reg = reg | 0x10;
97                  I2CWrite(p_ch7xxx_context,0x54, reg);
98
99                  I2CWrite(p_ch7xxx_context,0x03, 0x02);
100                  reg = I2CRead(p_ch7xxx_context,0x16);
101                  reg = reg | 0x08;
102
103
104                  I2CWrite(p_ch7xxx_context,0x16, reg);
105
106                 }
107
108
109
110         }
111
112         if((pOutput_Info->channel & CHANNEL_LVDS) == 0x00)
113         {
114
115
116
117         I2CWrite(p_ch7xxx_context,0x03, 0x00);
118
119                 I2CWrite(p_ch7xxx_context,0x4E, I2CRead(p_ch7xxx_context,0x4E) & 0x7F );
120
121                 reg = I2CRead(p_ch7xxx_context,0x0A);
122                 reg = reg | 0x08;
123         I2CWrite(p_ch7xxx_context,0x0A, reg);
124
125                 if((pOutput_Info->channel & CHANNEL_HDMI) == 0x00 && (pOutput_Info->channel & CHANNEL_VGA)==0x00)
126                 {
127
128                         I2CWrite(p_ch7xxx_context,0x03, 0x04);
129                         reg = I2CRead(p_ch7xxx_context,0x63);
130                         reg = reg | 0xFC;
131                         I2CWrite(p_ch7xxx_context,0x63, reg);
132
133                         reg = I2CRead(p_ch7xxx_context,0x64);
134                         reg = reg | 0x01;
135                         I2CWrite(p_ch7xxx_context,0x64, reg);
136                 }
137
138                 I2CWrite(p_ch7xxx_context,0x03, 0x04);
139                 reg = I2CRead(p_ch7xxx_context,0x66);
140                 reg = reg | 0x02;
141                 I2CWrite(p_ch7xxx_context,0x66, reg);
142
143                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
144                 reg = I2CRead(p_ch7xxx_context,0x11);
145                 reg = reg | 0x10;
146                 I2CWrite(p_ch7xxx_context,0x11, reg);
147
148                 reg = I2CRead(p_ch7xxx_context,0x1A);
149                 reg = reg | 0x10;
150                 I2CWrite(p_ch7xxx_context,0x1A, reg);
151
152         }
153
154
155 }
156
157 void ch7036_set_power_hdmi(DEV_CONTEXT* p_ch7xxx_context)
158 {
159
160         OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
161         INPUT_INFO* pInput_Info = p_ch7xxx_context->pInput_Info;
162         uint8 reg=0x00;
163
164         PD_DEBUG("ch7036: ch7036_set_power_hdmi()-enter...channel [%lu]\n", pOutput_Info->channel);
165    if(pOutput_Info->channel  & CHANNEL_HDMI)
166    {
167
168
169         I2CWrite(p_ch7xxx_context,0x03, 0x04);
170                 reg = I2CRead(p_ch7xxx_context,0x52);
171                 reg = reg & 0xEF;
172                 I2CWrite(p_ch7xxx_context,0x52, reg);
173
174                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
175                 reg = I2CRead(p_ch7xxx_context,0x0A);
176                 reg = reg & 0xDF;
177                 I2CWrite(p_ch7xxx_context,0x0A, reg);
178
179                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
180                 reg = I2CRead(p_ch7xxx_context,0x09);
181                 reg = reg & 0xBF;
182                 I2CWrite(p_ch7xxx_context,0x09, reg);
183
184                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
185                 reg = I2CRead(p_ch7xxx_context,0x09);
186                 reg = reg & 0xF7;
187                 I2CWrite(p_ch7xxx_context,0x09, reg);
188
189                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
190                 reg = I2CRead(p_ch7xxx_context,0x09);
191                 reg = reg & 0xEF;
192                 I2CWrite(p_ch7xxx_context,0x09, reg);
193
194
195
196            I2CWrite(p_ch7xxx_context,0x03, 0x01);
197                 reg = I2CRead(p_ch7xxx_context,0x11);
198                 reg = reg & 0x7F;
199             I2CWrite(p_ch7xxx_context,0x11, reg);
200
201                  I2CWrite(p_ch7xxx_context,0x03, 0x00);
202                  reg = I2CRead(p_ch7xxx_context,0x07);
203                  reg = reg & 0xFD;
204                  I2CWrite(p_ch7xxx_context,0x07, reg);
205
206                  I2CWrite(p_ch7xxx_context,0x03, 0x04);
207                 reg = I2CRead(p_ch7xxx_context,0x54);
208                 reg = reg & 0xEF;
209                 I2CWrite(p_ch7xxx_context,0x54, reg);
210
211
212
213                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
214                 reg = I2CRead(p_ch7xxx_context,0x07);
215                 reg = reg & 0xFB;
216                 I2CWrite(p_ch7xxx_context,0x07, reg);
217
218                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
219                 reg = I2CRead(p_ch7xxx_context,0x09);
220                 reg = reg & 0xFB;
221                 I2CWrite(p_ch7xxx_context,0x09, reg);
222
223                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
224                 reg = I2CRead(p_ch7xxx_context,0x0E);
225                 reg = reg & 0x7F;
226                 I2CWrite(p_ch7xxx_context,0x0E, reg);
227
228                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
229                 reg = I2CRead(p_ch7xxx_context,0x07);
230
231                 if(pInput_Info->audio_type == AUDIO_I2S){
232
233                    reg = reg & 0xBF;
234                    reg = reg | 0x01;
235                 }else{
236
237            reg = reg | 0x40;
238                    reg = reg & 0xFE;
239                 }
240                 I2CWrite(p_ch7xxx_context,0x07, reg);
241
242
243                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
244                 reg = I2CRead(p_ch7xxx_context,0x16);
245                 reg = reg & 0xF7;
246                 I2CWrite(p_ch7xxx_context,0x16, reg);
247
248                 reg = I2CRead(p_ch7xxx_context,0x16);
249                 reg = reg & 0xFE;
250                 I2CWrite(p_ch7xxx_context,0x16, reg);
251
252                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
253                 reg = I2CRead(p_ch7xxx_context,0x08);
254                 reg = reg & 0x0F;
255                 I2CWrite(p_ch7xxx_context,0x08, reg);
256
257                 reg = I2CRead(p_ch7xxx_context,0x07);
258                 reg = reg & 0xF7;
259                 I2CWrite(p_ch7xxx_context,0x07, reg);
260
261                 reg = I2CRead(p_ch7xxx_context,0x07);
262                 reg = reg | 0x10;
263                 I2CWrite(p_ch7xxx_context,0x07, reg);
264
265                 reg = I2CRead(p_ch7xxx_context,0x09);
266                 reg = reg & 0xFE;
267                 I2CWrite(p_ch7xxx_context,0x09, reg);
268
269
270
271    }else {
272
273
274            if((pOutput_Info->channel  & CHANNEL_VGA) == 0x00){
275
276
277         I2CWrite(p_ch7xxx_context,0x03, 0x00);
278                 reg = I2CRead(p_ch7xxx_context,0x0A);
279                 reg = reg | 0x20;
280                 I2CWrite(p_ch7xxx_context,0x0A, reg);
281
282                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
283                 reg = I2CRead(p_ch7xxx_context,0x09);
284                 reg = reg | 0x40;
285                 I2CWrite(p_ch7xxx_context,0x09, reg);
286
287                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
288                 reg = I2CRead(p_ch7xxx_context,0x09);
289                 reg = reg | 0x08;
290                 I2CWrite(p_ch7xxx_context,0x09, reg);
291
292                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
293                 reg = I2CRead(p_ch7xxx_context,0x09);
294                 reg = reg | 0x10;
295                 I2CWrite(p_ch7xxx_context,0x09, reg);
296
297                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
298                 reg = I2CRead(p_ch7xxx_context,0x07);
299                 reg = reg | 0x04;
300                 I2CWrite(p_ch7xxx_context,0x07, reg);
301
302                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
303                  reg = I2CRead(p_ch7xxx_context,0x11);
304                  reg = reg | 0x80;
305                  I2CWrite(p_ch7xxx_context,0x11, reg);
306
307
308                  I2CWrite(p_ch7xxx_context,0x03, 0x00);
309                  reg = I2CRead(p_ch7xxx_context,0x07);
310                  reg = reg | 0x02;
311                  I2CWrite(p_ch7xxx_context,0x07, reg);
312
313
314                  I2CWrite(p_ch7xxx_context,0x03, 0x04);
315                  reg = I2CRead(p_ch7xxx_context,0x54);
316                  reg = reg | 0x10;
317                  I2CWrite(p_ch7xxx_context,0x54, reg);
318
319                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
320                  reg = I2CRead(p_ch7xxx_context,0x09);
321                  reg = reg | 0x04;
322                  I2CWrite(p_ch7xxx_context,0x09, reg);
323
324                 }
325
326
327                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
328                 reg = I2CRead(p_ch7xxx_context,0x07);
329                 reg = reg | 0x40;
330                 reg = reg | 0x01;
331                 I2CWrite(p_ch7xxx_context,0x07, reg);
332
333
334
335                 if((pOutput_Info->channel  & CHANNEL_LVDS) == 0x00)
336                 {
337                  I2CWrite(p_ch7xxx_context,0x03, 0x01);
338                  reg = I2CRead(p_ch7xxx_context,0x16);
339                  reg = reg | 0x08;
340                  I2CWrite(p_ch7xxx_context,0x16, reg);
341                 }
342
343                 I2CWrite(p_ch7xxx_context,0x03, 0x01);
344                 reg = I2CRead(p_ch7xxx_context,0x16);
345                 reg = reg | 0x01;
346                 I2CWrite(p_ch7xxx_context,0x16, reg);
347
348                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
349                 reg = I2CRead(p_ch7xxx_context,0x08);
350                 reg = reg | 0xF0;
351                 I2CWrite(p_ch7xxx_context,0x08, reg);
352
353                 reg = I2CRead(p_ch7xxx_context,0x07);
354                 reg = reg | 0x08;
355                 I2CWrite(p_ch7xxx_context,0x07, reg);
356
357                 reg = I2CRead(p_ch7xxx_context,0x07);
358                 reg = reg | 0x10;
359                 I2CWrite(p_ch7xxx_context,0x07, reg);
360
361                 reg = I2CRead(p_ch7xxx_context,0x09);
362                 reg = reg | 0x01;
363                 I2CWrite(p_ch7xxx_context,0x09, reg);
364
365
366    }
367
368 }
369
370 void ch7036_set_power_crt(DEV_CONTEXT* p_ch7xxx_context)
371 {
372
373
374         OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
375         uint8 reg=0x00;
376
377         PD_DEBUG("ch7036: ch7036_set_power_crt()-enter...channel [%lu]\n", pOutput_Info->channel);
378         if(pOutput_Info->channel & CHANNEL_VGA)
379          {
380
381
382            I2CWrite(p_ch7xxx_context,0x03, 0x01);
383                 reg = I2CRead(p_ch7xxx_context,0x11);
384                 reg = reg & 0x7F;
385             I2CWrite(p_ch7xxx_context,0x11, reg);
386
387
388                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
389                 reg = I2CRead(p_ch7xxx_context,0x0A);
390                 reg = reg & 0xDF;
391                 I2CWrite(p_ch7xxx_context,0x0A, reg);
392
393                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
394                 reg = I2CRead(p_ch7xxx_context,0x09);
395                 reg = reg & 0xBF;
396                 I2CWrite(p_ch7xxx_context,0x09, reg);
397
398                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
399                 reg = I2CRead(p_ch7xxx_context,0x09);
400                 reg = reg & 0xF7;
401                 I2CWrite(p_ch7xxx_context,0x09, reg);
402
403                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
404                 reg = I2CRead(p_ch7xxx_context,0x09);
405                 reg = reg & 0xEF;
406                 I2CWrite(p_ch7xxx_context,0x09, reg);
407
408                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
409                 reg = I2CRead(p_ch7xxx_context,0x07);
410                 reg = reg & 0xF9;
411                 I2CWrite(p_ch7xxx_context,0x07, reg);
412
413                 I2CWrite(p_ch7xxx_context,0x03, 0x04);
414                 reg = I2CRead(p_ch7xxx_context,0x54);
415                 reg = reg & 0xEF;
416                 I2CWrite(p_ch7xxx_context,0x54, reg);
417
418
419                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
420                 reg = I2CRead(p_ch7xxx_context,0x08);
421                 reg = reg & 0xF1;
422                 I2CWrite(p_ch7xxx_context,0x08, reg);
423
424                 reg = I2CRead(p_ch7xxx_context,0x09);
425                 reg = reg & 0xFB;
426                 I2CWrite(p_ch7xxx_context,0x09, reg);
427
428         }else if((pOutput_Info->channel & CHANNEL_VGA) == 0x00){
429
430
431
432                 I2CWrite(p_ch7xxx_context,0x03, 0x00);
433
434                  reg = I2CRead(p_ch7xxx_context,0x08);
435                 reg = reg | 0x0E;
436                 I2CWrite(p_ch7xxx_context,0x08, reg);
437
438
439
440                 if((pOutput_Info->channel & CHANNEL_HDMI)==0x00){
441
442
443
444              I2CWrite(p_ch7xxx_context,0x03, 0x01);
445                  reg = I2CRead(p_ch7xxx_context,0x11);
446                  reg = reg | 0x80;
447              I2CWrite(p_ch7xxx_context,0x11, reg);
448
449                   I2CWrite(p_ch7xxx_context,0x03, 0x00);
450                  reg = I2CRead(p_ch7xxx_context,0x07);
451                  reg = reg | 0x02;
452                  I2CWrite(p_ch7xxx_context,0x07, reg);
453
454
455                  I2CWrite(p_ch7xxx_context,0x03, 0x04);
456                  reg = I2CRead(p_ch7xxx_context,0x54);
457                  reg = reg | 0x10;
458                  I2CWrite(p_ch7xxx_context,0x54, reg);
459
460
461         I2CWrite(p_ch7xxx_context,0x03, 0x00);
462                 reg = I2CRead(p_ch7xxx_context,0x0A);
463                 reg = reg | 0x20;
464                 I2CWrite(p_ch7xxx_context,0x0A, reg);
465
466                 reg = I2CRead(p_ch7xxx_context,0x09);
467                 reg = reg | 0x40;
468                 I2CWrite(p_ch7xxx_context,0x09, reg);
469
470                 reg = I2CRead(p_ch7xxx_context,0x09);
471                 reg = reg | 0x08;
472                 I2CWrite(p_ch7xxx_context,0x09, reg);
473
474                 reg = I2CRead(p_ch7xxx_context,0x09);
475                 reg = reg | 0x10;
476                 I2CWrite(p_ch7xxx_context,0x09, reg);
477
478                 reg = I2CRead(p_ch7xxx_context,0x07);
479                 reg = reg | 0x04;
480                 I2CWrite(p_ch7xxx_context,0x07, reg);
481
482
483                  reg = I2CRead(p_ch7xxx_context,0x09);
484                  reg = reg | 0x04;
485                  I2CWrite(p_ch7xxx_context,0x09, reg);
486            }
487         }
488
489         return;
490 }