1 /*-----------------------------------------------------------------------------
2 * Copyright (c) Chrontel Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 *-----------------------------------------------------------------------------
25 *-----------------------------------------------------------------------------
30 #include "ch7036_intf.h"
34 void ch7036_set_power_lvds(DEV_CONTEXT* pDevContext);
35 void ch7036_set_power_hdmi(DEV_CONTEXT* pDevContext);
36 void ch7036_set_power_crt(DEV_CONTEXT* pDevContext);
38 void ch7036_set_power_lvds(DEV_CONTEXT* p_ch7xxx_context)
41 OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
44 PD_DEBUG("ch7036: ch7036_set_power_lvds()-enter...channel [%lu]\n", pOutput_Info->channel);
45 if(pOutput_Info->channel & CHANNEL_LVDS)
49 I2CWrite(p_ch7xxx_context,0x03, 0x01);
50 reg = I2CRead(p_ch7xxx_context,0x1A);
52 I2CWrite(p_ch7xxx_context,0x1A, reg);
54 reg = I2CRead(p_ch7xxx_context,0x11);
56 if(((pOutput_Info->channel & CHANNEL_HDMI)==0x00)&&
57 ((pOutput_Info->channel & CHANNEL_VGA) == 0x00))
62 I2CWrite(p_ch7xxx_context,0x11, reg);
64 I2CWrite(p_ch7xxx_context,0x03, 0x04);
65 reg = I2CRead(p_ch7xxx_context,0x66);
67 I2CWrite(p_ch7xxx_context,0x66, reg);
69 reg = I2CRead(p_ch7xxx_context,0x64);
71 I2CWrite(p_ch7xxx_context,0x64, reg);
73 reg = I2CRead(p_ch7xxx_context,0x63);
75 I2CWrite(p_ch7xxx_context,0x63, reg);
77 I2CWrite(p_ch7xxx_context,0x03, 0x00);
78 reg = I2CRead(p_ch7xxx_context,0x0A);
80 I2CWrite(p_ch7xxx_context,0x0A, reg);
83 I2CWrite(p_ch7xxx_context,0x4E, I2CRead(p_ch7xxx_context,0x4E) | 0x80 );
86 if((pOutput_Info->channel & CHANNEL_HDMI) == 0x00 && (pOutput_Info->channel & CHANNEL_VGA) == 0x00){
89 I2CWrite(p_ch7xxx_context,0x03, 0x00);
90 reg = I2CRead(p_ch7xxx_context,0x07);
92 I2CWrite(p_ch7xxx_context,0x07, reg);
94 I2CWrite(p_ch7xxx_context,0x03, 0x04);
95 reg = I2CRead(p_ch7xxx_context,0x54);
97 I2CWrite(p_ch7xxx_context,0x54, reg);
99 I2CWrite(p_ch7xxx_context,0x03, 0x02);
100 reg = I2CRead(p_ch7xxx_context,0x16);
104 I2CWrite(p_ch7xxx_context,0x16, reg);
112 if((pOutput_Info->channel & CHANNEL_LVDS) == 0x00)
117 I2CWrite(p_ch7xxx_context,0x03, 0x00);
119 I2CWrite(p_ch7xxx_context,0x4E, I2CRead(p_ch7xxx_context,0x4E) & 0x7F );
121 reg = I2CRead(p_ch7xxx_context,0x0A);
123 I2CWrite(p_ch7xxx_context,0x0A, reg);
125 if((pOutput_Info->channel & CHANNEL_HDMI) == 0x00 && (pOutput_Info->channel & CHANNEL_VGA)==0x00)
128 I2CWrite(p_ch7xxx_context,0x03, 0x04);
129 reg = I2CRead(p_ch7xxx_context,0x63);
131 I2CWrite(p_ch7xxx_context,0x63, reg);
133 reg = I2CRead(p_ch7xxx_context,0x64);
135 I2CWrite(p_ch7xxx_context,0x64, reg);
138 I2CWrite(p_ch7xxx_context,0x03, 0x04);
139 reg = I2CRead(p_ch7xxx_context,0x66);
141 I2CWrite(p_ch7xxx_context,0x66, reg);
143 I2CWrite(p_ch7xxx_context,0x03, 0x01);
144 reg = I2CRead(p_ch7xxx_context,0x11);
146 I2CWrite(p_ch7xxx_context,0x11, reg);
148 reg = I2CRead(p_ch7xxx_context,0x1A);
150 I2CWrite(p_ch7xxx_context,0x1A, reg);
157 void ch7036_set_power_hdmi(DEV_CONTEXT* p_ch7xxx_context)
160 OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
161 INPUT_INFO* pInput_Info = p_ch7xxx_context->pInput_Info;
164 PD_DEBUG("ch7036: ch7036_set_power_hdmi()-enter...channel [%lu]\n", pOutput_Info->channel);
165 if(pOutput_Info->channel & CHANNEL_HDMI)
169 I2CWrite(p_ch7xxx_context,0x03, 0x04);
170 reg = I2CRead(p_ch7xxx_context,0x52);
172 I2CWrite(p_ch7xxx_context,0x52, reg);
174 I2CWrite(p_ch7xxx_context,0x03, 0x00);
175 reg = I2CRead(p_ch7xxx_context,0x0A);
177 I2CWrite(p_ch7xxx_context,0x0A, reg);
179 I2CWrite(p_ch7xxx_context,0x03, 0x00);
180 reg = I2CRead(p_ch7xxx_context,0x09);
182 I2CWrite(p_ch7xxx_context,0x09, reg);
184 I2CWrite(p_ch7xxx_context,0x03, 0x00);
185 reg = I2CRead(p_ch7xxx_context,0x09);
187 I2CWrite(p_ch7xxx_context,0x09, reg);
189 I2CWrite(p_ch7xxx_context,0x03, 0x00);
190 reg = I2CRead(p_ch7xxx_context,0x09);
192 I2CWrite(p_ch7xxx_context,0x09, reg);
196 I2CWrite(p_ch7xxx_context,0x03, 0x01);
197 reg = I2CRead(p_ch7xxx_context,0x11);
199 I2CWrite(p_ch7xxx_context,0x11, reg);
201 I2CWrite(p_ch7xxx_context,0x03, 0x00);
202 reg = I2CRead(p_ch7xxx_context,0x07);
204 I2CWrite(p_ch7xxx_context,0x07, reg);
206 I2CWrite(p_ch7xxx_context,0x03, 0x04);
207 reg = I2CRead(p_ch7xxx_context,0x54);
209 I2CWrite(p_ch7xxx_context,0x54, reg);
213 I2CWrite(p_ch7xxx_context,0x03, 0x00);
214 reg = I2CRead(p_ch7xxx_context,0x07);
216 I2CWrite(p_ch7xxx_context,0x07, reg);
218 I2CWrite(p_ch7xxx_context,0x03, 0x00);
219 reg = I2CRead(p_ch7xxx_context,0x09);
221 I2CWrite(p_ch7xxx_context,0x09, reg);
223 I2CWrite(p_ch7xxx_context,0x03, 0x01);
224 reg = I2CRead(p_ch7xxx_context,0x0E);
226 I2CWrite(p_ch7xxx_context,0x0E, reg);
228 I2CWrite(p_ch7xxx_context,0x03, 0x00);
229 reg = I2CRead(p_ch7xxx_context,0x07);
231 if(pInput_Info->audio_type == AUDIO_I2S){
240 I2CWrite(p_ch7xxx_context,0x07, reg);
243 I2CWrite(p_ch7xxx_context,0x03, 0x01);
244 reg = I2CRead(p_ch7xxx_context,0x16);
246 I2CWrite(p_ch7xxx_context,0x16, reg);
248 reg = I2CRead(p_ch7xxx_context,0x16);
250 I2CWrite(p_ch7xxx_context,0x16, reg);
252 I2CWrite(p_ch7xxx_context,0x03, 0x00);
253 reg = I2CRead(p_ch7xxx_context,0x08);
255 I2CWrite(p_ch7xxx_context,0x08, reg);
257 reg = I2CRead(p_ch7xxx_context,0x07);
259 I2CWrite(p_ch7xxx_context,0x07, reg);
261 reg = I2CRead(p_ch7xxx_context,0x07);
263 I2CWrite(p_ch7xxx_context,0x07, reg);
265 reg = I2CRead(p_ch7xxx_context,0x09);
267 I2CWrite(p_ch7xxx_context,0x09, reg);
274 if((pOutput_Info->channel & CHANNEL_VGA) == 0x00){
277 I2CWrite(p_ch7xxx_context,0x03, 0x00);
278 reg = I2CRead(p_ch7xxx_context,0x0A);
280 I2CWrite(p_ch7xxx_context,0x0A, reg);
282 I2CWrite(p_ch7xxx_context,0x03, 0x00);
283 reg = I2CRead(p_ch7xxx_context,0x09);
285 I2CWrite(p_ch7xxx_context,0x09, reg);
287 I2CWrite(p_ch7xxx_context,0x03, 0x00);
288 reg = I2CRead(p_ch7xxx_context,0x09);
290 I2CWrite(p_ch7xxx_context,0x09, reg);
292 I2CWrite(p_ch7xxx_context,0x03, 0x00);
293 reg = I2CRead(p_ch7xxx_context,0x09);
295 I2CWrite(p_ch7xxx_context,0x09, reg);
297 I2CWrite(p_ch7xxx_context,0x03, 0x00);
298 reg = I2CRead(p_ch7xxx_context,0x07);
300 I2CWrite(p_ch7xxx_context,0x07, reg);
302 I2CWrite(p_ch7xxx_context,0x03, 0x01);
303 reg = I2CRead(p_ch7xxx_context,0x11);
305 I2CWrite(p_ch7xxx_context,0x11, reg);
308 I2CWrite(p_ch7xxx_context,0x03, 0x00);
309 reg = I2CRead(p_ch7xxx_context,0x07);
311 I2CWrite(p_ch7xxx_context,0x07, reg);
314 I2CWrite(p_ch7xxx_context,0x03, 0x04);
315 reg = I2CRead(p_ch7xxx_context,0x54);
317 I2CWrite(p_ch7xxx_context,0x54, reg);
319 I2CWrite(p_ch7xxx_context,0x03, 0x00);
320 reg = I2CRead(p_ch7xxx_context,0x09);
322 I2CWrite(p_ch7xxx_context,0x09, reg);
327 I2CWrite(p_ch7xxx_context,0x03, 0x00);
328 reg = I2CRead(p_ch7xxx_context,0x07);
331 I2CWrite(p_ch7xxx_context,0x07, reg);
335 if((pOutput_Info->channel & CHANNEL_LVDS) == 0x00)
337 I2CWrite(p_ch7xxx_context,0x03, 0x01);
338 reg = I2CRead(p_ch7xxx_context,0x16);
340 I2CWrite(p_ch7xxx_context,0x16, reg);
343 I2CWrite(p_ch7xxx_context,0x03, 0x01);
344 reg = I2CRead(p_ch7xxx_context,0x16);
346 I2CWrite(p_ch7xxx_context,0x16, reg);
348 I2CWrite(p_ch7xxx_context,0x03, 0x00);
349 reg = I2CRead(p_ch7xxx_context,0x08);
351 I2CWrite(p_ch7xxx_context,0x08, reg);
353 reg = I2CRead(p_ch7xxx_context,0x07);
355 I2CWrite(p_ch7xxx_context,0x07, reg);
357 reg = I2CRead(p_ch7xxx_context,0x07);
359 I2CWrite(p_ch7xxx_context,0x07, reg);
361 reg = I2CRead(p_ch7xxx_context,0x09);
363 I2CWrite(p_ch7xxx_context,0x09, reg);
370 void ch7036_set_power_crt(DEV_CONTEXT* p_ch7xxx_context)
374 OUTPUT_INFO* pOutput_Info = p_ch7xxx_context->pOutput_Info;
377 PD_DEBUG("ch7036: ch7036_set_power_crt()-enter...channel [%lu]\n", pOutput_Info->channel);
378 if(pOutput_Info->channel & CHANNEL_VGA)
382 I2CWrite(p_ch7xxx_context,0x03, 0x01);
383 reg = I2CRead(p_ch7xxx_context,0x11);
385 I2CWrite(p_ch7xxx_context,0x11, reg);
388 I2CWrite(p_ch7xxx_context,0x03, 0x00);
389 reg = I2CRead(p_ch7xxx_context,0x0A);
391 I2CWrite(p_ch7xxx_context,0x0A, reg);
393 I2CWrite(p_ch7xxx_context,0x03, 0x00);
394 reg = I2CRead(p_ch7xxx_context,0x09);
396 I2CWrite(p_ch7xxx_context,0x09, reg);
398 I2CWrite(p_ch7xxx_context,0x03, 0x00);
399 reg = I2CRead(p_ch7xxx_context,0x09);
401 I2CWrite(p_ch7xxx_context,0x09, reg);
403 I2CWrite(p_ch7xxx_context,0x03, 0x00);
404 reg = I2CRead(p_ch7xxx_context,0x09);
406 I2CWrite(p_ch7xxx_context,0x09, reg);
408 I2CWrite(p_ch7xxx_context,0x03, 0x00);
409 reg = I2CRead(p_ch7xxx_context,0x07);
411 I2CWrite(p_ch7xxx_context,0x07, reg);
413 I2CWrite(p_ch7xxx_context,0x03, 0x04);
414 reg = I2CRead(p_ch7xxx_context,0x54);
416 I2CWrite(p_ch7xxx_context,0x54, reg);
419 I2CWrite(p_ch7xxx_context,0x03, 0x00);
420 reg = I2CRead(p_ch7xxx_context,0x08);
422 I2CWrite(p_ch7xxx_context,0x08, reg);
424 reg = I2CRead(p_ch7xxx_context,0x09);
426 I2CWrite(p_ch7xxx_context,0x09, reg);
428 }else if((pOutput_Info->channel & CHANNEL_VGA) == 0x00){
432 I2CWrite(p_ch7xxx_context,0x03, 0x00);
434 reg = I2CRead(p_ch7xxx_context,0x08);
436 I2CWrite(p_ch7xxx_context,0x08, reg);
440 if((pOutput_Info->channel & CHANNEL_HDMI)==0x00){
444 I2CWrite(p_ch7xxx_context,0x03, 0x01);
445 reg = I2CRead(p_ch7xxx_context,0x11);
447 I2CWrite(p_ch7xxx_context,0x11, reg);
449 I2CWrite(p_ch7xxx_context,0x03, 0x00);
450 reg = I2CRead(p_ch7xxx_context,0x07);
452 I2CWrite(p_ch7xxx_context,0x07, reg);
455 I2CWrite(p_ch7xxx_context,0x03, 0x04);
456 reg = I2CRead(p_ch7xxx_context,0x54);
458 I2CWrite(p_ch7xxx_context,0x54, reg);
461 I2CWrite(p_ch7xxx_context,0x03, 0x00);
462 reg = I2CRead(p_ch7xxx_context,0x0A);
464 I2CWrite(p_ch7xxx_context,0x0A, reg);
466 reg = I2CRead(p_ch7xxx_context,0x09);
468 I2CWrite(p_ch7xxx_context,0x09, reg);
470 reg = I2CRead(p_ch7xxx_context,0x09);
472 I2CWrite(p_ch7xxx_context,0x09, reg);
474 reg = I2CRead(p_ch7xxx_context,0x09);
476 I2CWrite(p_ch7xxx_context,0x09, reg);
478 reg = I2CRead(p_ch7xxx_context,0x07);
480 I2CWrite(p_ch7xxx_context,0x07, reg);
483 reg = I2CRead(p_ch7xxx_context,0x09);
485 I2CWrite(p_ch7xxx_context,0x09, reg);