drivers: w1-gpio: add flag to force read-polling while delaying
[platform/kernel/linux-rpi.git] / drivers / watchdog / wd501p.h
1 /* SPDX-License-Identifier: GPL-1.0+ */
2 /*
3  *      Industrial Computer Source WDT500/501 driver
4  *
5  *      (c) Copyright 1995      CymruNET Ltd
6  *                              Innovation Centre
7  *                              Singleton Park
8  *                              Swansea
9  *                              Wales
10  *                              UK
11  *                              SA2 8PP
12  *
13  *      http://www.cymru.net
14  *
15  *      Release 0.04.
16  */
17
18
19 #define WDT_COUNT0              (io+0)
20 #define WDT_COUNT1              (io+1)
21 #define WDT_COUNT2              (io+2)
22 #define WDT_CR                  (io+3)
23 #define WDT_SR                  (io+4)  /* Start buzzer on PCI write */
24 #define WDT_RT                  (io+5)  /* Stop buzzer on PCI write */
25 #define WDT_BUZZER              (io+6)  /* PCI only: rd=disable, wr=enable */
26 #define WDT_DC                  (io+7)
27
28 /* The following are only on the PCI card, they're outside of I/O space on
29  * the ISA card: */
30 #define WDT_CLOCK               (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */
31 /* inverted opto isolated reset output: */
32 #define WDT_OPTONOTRST          (io+13) /* wr=enable, rd=disable */
33 /* opto isolated reset output: */
34 #define WDT_OPTORST             (io+14) /* wr=enable, rd=disable */
35 /* programmable outputs: */
36 #define WDT_PROGOUT             (io+15) /* wr=enable, rd=disable */
37
38                                                          /* FAN 501 500 */
39 #define WDC_SR_WCCR             1       /* Active low */ /*  X   X   X  */
40 #define WDC_SR_TGOOD            2                        /*  X   X   -  */
41 #define WDC_SR_ISOI0            4                        /*  X   X   X  */
42 #define WDC_SR_ISII1            8                        /*  X   X   X  */
43 #define WDC_SR_FANGOOD          16                       /*  X   -   -  */
44 #define WDC_SR_PSUOVER          32      /* Active low */ /*  X   X   -  */
45 #define WDC_SR_PSUUNDR          64      /* Active low */ /*  X   X   -  */
46 #define WDC_SR_IRQ              128     /* Active low */ /*  X   X   X  */
47