1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
9 #include <asm/arch/imx-regs.h>
12 * MX7ULP WDOG Register Map
21 #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
22 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 0x1500
25 #define REFRESH_WORD0 0xA602 /* 1st refresh word */
26 #define REFRESH_WORD1 0xB480 /* 2nd refresh word */
28 #define UNLOCK_WORD0 0xC520 /* 1st unlock word */
29 #define UNLOCK_WORD1 0xD928 /* 2nd unlock word */
31 #define WDGCS_WDGE BIT(7)
32 #define WDGCS_WDGUPDATE BIT(5)
34 #define WDGCS_RCS BIT(10)
35 #define WDGCS_ULK BIT(11)
36 #define WDGCS_FLG BIT(14)
38 #define WDG_BUS_CLK (0x0)
39 #define WDG_LPO_CLK (0x1)
40 #define WDG_32KHZ_CLK (0x2)
41 #define WDG_EXT_CLK (0x3)
43 void hw_watchdog_set_timeout(u16 val)
45 /* setting timeout value */
46 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
48 writel(val, &wdog->toval);
51 void hw_watchdog_reset(void)
53 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
56 __raw_writel(REFRESH_WORD0, &wdog->cnt);
57 __raw_writel(REFRESH_WORD1, &wdog->cnt);
61 void hw_watchdog_init(void)
63 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
66 __raw_writel(UNLOCK_WORD0, &wdog->cnt);
67 __raw_writel(UNLOCK_WORD1, &wdog->cnt);
70 /* Wait WDOG Unlock */
71 while (!(readl(&wdog->cs) & WDGCS_ULK))
74 hw_watchdog_set_timeout(CONFIG_WATCHDOG_TIMEOUT_MSECS);
75 writel(0, &wdog->win);
77 /* setting 1-kHz clock source, enable counter running, and clear interrupt */
78 writel((WDGCS_WDGE | WDGCS_WDGUPDATE |(WDG_LPO_CLK << 8) | WDGCS_FLG), &wdog->cs);
80 /* Wait WDOG reconfiguration */
81 while (!(readl(&wdog->cs) & WDGCS_RCS))
89 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR;
92 __raw_writel(UNLOCK_WORD0, &wdog->cnt);
93 __raw_writel(UNLOCK_WORD1, &wdog->cnt);
96 /* Wait WDOG Unlock */
97 while (!(readl(&wdog->cs) & WDGCS_ULK))
100 hw_watchdog_set_timeout(5); /* 5ms timeout */
101 writel(0, &wdog->win);
103 /* enable counter running */
104 writel((WDGCS_WDGE | (WDG_LPO_CLK << 8)), &wdog->cs);
106 /* Wait WDOG reconfiguration */
107 while (!(readl(&wdog->cs) & WDGCS_RCS))