1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2017 Intel Corporation
12 /* Hardware timeout in seconds */
13 #define WDT_PRETIMEOUT 15
14 #define WDT_TIMEOUT_MIN (1 + WDT_PRETIMEOUT)
15 #define WDT_TIMEOUT_MAX 170
18 * Note, firmware chooses 90 seconds as a default timeout for watchdog on
19 * Intel Tangier SoC. It means that without handling it in the running code
20 * the reboot will happen.
24 SCU_WATCHDOG_START = 0,
25 SCU_WATCHDOG_STOP = 1,
26 SCU_WATCHDOG_KEEPALIVE = 2,
27 SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT = 3,
30 static int tangier_wdt_reset(struct udevice *dev)
32 scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
36 static int tangier_wdt_stop(struct udevice *dev)
38 return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
41 static int tangier_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
50 /* Calculate timeout in seconds and restrict to min and max value */
51 do_div(timeout_ms, 1000);
52 timeout_sec = clamp_t(u32, timeout_ms, WDT_TIMEOUT_MIN, WDT_TIMEOUT_MAX);
54 /* Update values in the IPC request */
55 ipc_wd_start.pretimeout = timeout_sec - WDT_PRETIMEOUT;
56 ipc_wd_start.timeout = timeout_sec;
59 * SCU expects the input size for watchdog IPC
60 * to be based on 4 bytes
62 in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
64 scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
65 (u32 *)&ipc_wd_start, in_size, NULL, 0);
70 static const struct wdt_ops tangier_wdt_ops = {
71 .reset = tangier_wdt_reset,
72 .start = tangier_wdt_start,
73 .stop = tangier_wdt_stop,
76 static const struct udevice_id tangier_wdt_ids[] = {
77 { .compatible = "intel,tangier-wdt" },
81 static int tangier_wdt_probe(struct udevice *dev)
83 debug("%s: Probing wdt%u\n", __func__, dev->seq);
87 U_BOOT_DRIVER(wdt_tangier) = {
88 .name = "wdt_tangier",
90 .of_match = tangier_wdt_ids,
91 .ops = &tangier_wdt_ops,
92 .probe = tangier_wdt_probe,