1 // SPDX-License-Identifier: GPL-2.0+
3 * Watchdog driver for SP805 on some Layerscape SoC
12 #include <dm/device.h>
13 #include <dm/fdtaddr.h>
15 #include <linux/bitops.h>
18 #include <linux/err.h>
21 #define WDTCONTROL 0x008
22 #define WDTINTCLR 0x00C
25 #define TIME_OUT_MIN_MSECS 1
26 #define TIME_OUT_MAX_MSECS 120000
27 #define SYS_FSL_WDT_CLK_DIV 16
28 #define INT_ENABLE BIT(0)
29 #define RESET_ENABLE BIT(1)
31 #define UNLOCK 0x1ACCE551
32 #define LOCK 0x00000001
33 #define INT_MASK BIT(0)
35 DECLARE_GLOBAL_DATA_PTR;
37 struct sp805_wdt_priv {
39 unsigned long clk_rate;
42 static int sp805_wdt_reset(struct udevice *dev)
44 struct sp805_wdt_priv *priv = dev_get_priv(dev);
46 writel(UNLOCK, priv->reg + WDTLOCK);
47 writel(INT_MASK, priv->reg + WDTINTCLR);
48 writel(LOCK, priv->reg + WDTLOCK);
49 readl(priv->reg + WDTLOCK);
54 static int sp805_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
58 struct sp805_wdt_priv *priv = dev_get_priv(dev);
60 load_time = (u32)timeout;
61 if (timeout < TIME_OUT_MIN_MSECS)
62 load_time = TIME_OUT_MIN_MSECS;
63 else if (timeout > TIME_OUT_MAX_MSECS)
64 load_time = TIME_OUT_MAX_MSECS;
65 /* sp805 runs counter with given value twice, so when the max timeout is
66 * set 120s, the gd->bus_clk is less than 1145MHz, the load_value will
70 load_value = (gd->bus_clk) /
71 (2 * 1000 * SYS_FSL_WDT_CLK_DIV) * load_time;
73 /* platform provide clk */
74 load_value = (timeout / 2) * (priv->clk_rate / 1000);
77 writel(UNLOCK, priv->reg + WDTLOCK);
78 writel(load_value, priv->reg + WDTLOAD);
79 writel(INT_MASK, priv->reg + WDTINTCLR);
80 writel(INT_ENABLE | RESET_ENABLE, priv->reg + WDTCONTROL);
81 writel(LOCK, priv->reg + WDTLOCK);
82 readl(priv->reg + WDTLOCK);
87 static int sp805_wdt_stop(struct udevice *dev)
89 struct sp805_wdt_priv *priv = dev_get_priv(dev);
91 writel(UNLOCK, priv->reg + WDTLOCK);
92 writel(DISABLE, priv->reg + WDTCONTROL);
93 writel(LOCK, priv->reg + WDTLOCK);
94 readl(priv->reg + WDTLOCK);
99 static int sp805_wdt_expire_now(struct udevice *dev, ulong flags)
101 sp805_wdt_start(dev, 0, flags);
106 static int sp805_wdt_probe(struct udevice *dev)
108 debug("%s: Probing wdt%u (sp805-wdt)\n", __func__, dev->seq);
113 static int sp805_wdt_ofdata_to_platdata(struct udevice *dev)
115 struct sp805_wdt_priv *priv = dev_get_priv(dev);
118 priv->reg = (void __iomem *)dev_read_addr(dev);
119 if (IS_ERR(priv->reg))
120 return PTR_ERR(priv->reg);
122 if (!clk_get_by_index(dev, 0, &clk))
123 priv->clk_rate = clk_get_rate(&clk);
128 static const struct wdt_ops sp805_wdt_ops = {
129 .start = sp805_wdt_start,
130 .reset = sp805_wdt_reset,
131 .stop = sp805_wdt_stop,
132 .expire_now = sp805_wdt_expire_now,
135 static const struct udevice_id sp805_wdt_ids[] = {
136 { .compatible = "arm,sp805-wdt" },
140 U_BOOT_DRIVER(sp805_wdt) = {
143 .of_match = sp805_wdt_ids,
144 .probe = sp805_wdt_probe,
145 .priv_auto_alloc_size = sizeof(struct sp805_wdt_priv),
146 .ofdata_to_platdata = sp805_wdt_ofdata_to_platdata,
147 .ops = &sp805_wdt_ops,