1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) Siemens AG, 2020
6 * Jan Kiszka <jan.kiszka@siemens.com>
8 * Derived from linux/drivers/watchdog/rti_wdt.c
14 #include <dm/device_compat.h>
15 #include <power-domain.h>
18 #include <remoteproc.h>
20 /* Timer register set definition */
21 #define RTIDWDCTRL 0x90
22 #define RTIDWDPRLD 0x94
23 #define RTIWDSTATUS 0x98
25 #define RTIDWDCNTR 0xa0
26 #define RTIWWDRXCTRL 0xa4
27 #define RTIWWDSIZECTRL 0xa8
29 #define RTIWWDRX_NMI 0xa
31 #define RTIWWDSIZE_50P 0x50
33 #define WDENABLE_KEY 0xa98559da
35 #define WDKEY_SEQ0 0xe51a
36 #define WDKEY_SEQ1 0xa35c
38 #define WDT_PRELOAD_SHIFT 13
40 #define WDT_PRELOAD_MAX 0xfff
47 #ifdef CONFIG_WDT_K3_RTI_LOAD_FW
48 #define RTI_WDT_FIT_PATH "/fit-images/k3-rti-wdt-firmware"
50 static int rti_wdt_load_fw(struct udevice *dev)
52 struct udevice *rproc_dev;
53 int primary_core, ret;
59 node = ofnode_path(RTI_WDT_FIT_PATH);
60 if (!ofnode_valid(node))
63 ret = ofnode_read_u64(node, "load", &rti_wdt_fw);
66 ret = ofnode_read_u32(node, "size", &rti_wdt_fw_size);
70 node = ofnode_by_compatible(ofnode_null(), "ti,am654-r5fss");
71 if (!ofnode_valid(node))
74 ret = ofnode_read_u32(node, "ti,cluster-mode", &cluster_mode);
78 node = ofnode_by_compatible(node, "ti,am654-r5f");
79 if (!ofnode_valid(node))
82 ret = uclass_get_device_by_ofnode(UCLASS_REMOTEPROC, node, &rproc_dev);
86 primary_core = dev_seq(rproc_dev);
88 ret = rproc_dev_init(primary_core);
92 if (cluster_mode == 1) {
93 ret = rproc_dev_init(primary_core + 1);
98 ret = rproc_load(primary_core, (ulong)rti_wdt_fw,
103 ret = rproc_start(primary_core);
110 dev_err(dev, "No loadable firmware found under %s\n", RTI_WDT_FIT_PATH);
114 dev_err(dev, "No compatible firmware target processor found\n");
118 dev_err(dev, "Failed to load watchdog firmware into remote processor %d\n",
123 static inline int rti_wdt_load_fw(struct udevice *dev)
129 static int rti_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
131 struct rti_wdt_priv *priv = dev_get_priv(dev);
135 if (readl(priv->regs + RTIDWDCTRL) == WDENABLE_KEY)
138 ret = rti_wdt_load_fw(dev);
142 timer_margin = timeout_ms * priv->clk_hz / 1000;
143 timer_margin >>= WDT_PRELOAD_SHIFT;
144 if (timer_margin > WDT_PRELOAD_MAX)
145 timer_margin = WDT_PRELOAD_MAX;
147 writel(timer_margin, priv->regs + RTIDWDPRLD);
148 writel(RTIWWDRX_NMI, priv->regs + RTIWWDRXCTRL);
149 writel(RTIWWDSIZE_50P, priv->regs + RTIWWDSIZECTRL);
151 readl(priv->regs + RTIWWDSIZECTRL);
153 writel(WDENABLE_KEY, priv->regs + RTIDWDCTRL);
158 static int rti_wdt_reset(struct udevice *dev)
160 struct rti_wdt_priv *priv = dev_get_priv(dev);
163 /* Make sure we do not reset too early */
164 prld = readl(priv->regs + RTIDWDPRLD) << WDT_PRELOAD_SHIFT;
165 if (readl(priv->regs + RTIDWDCNTR) >= prld / 2)
168 writel(WDKEY_SEQ0, priv->regs + RTIWDKEY);
169 writel(WDKEY_SEQ1, priv->regs + RTIWDKEY);
174 static int rti_wdt_probe(struct udevice *dev)
176 struct rti_wdt_priv *priv = dev_get_priv(dev);
180 priv->regs = devfdt_get_addr(dev);
184 ret = clk_get_by_index(dev, 0, &clk);
188 priv->clk_hz = clk_get_rate(&clk);
191 * If watchdog is running at 32k clock, it is not accurate.
192 * Adjust frequency down in this case so that it does not expire
193 * earlier than expected.
195 if (priv->clk_hz < 32768)
196 priv->clk_hz = priv->clk_hz * 9 / 10;
201 static const struct wdt_ops rti_wdt_ops = {
202 .start = rti_wdt_start,
203 .reset = rti_wdt_reset,
206 static const struct udevice_id rti_wdt_ids[] = {
207 { .compatible = "ti,j7-rti-wdt" },
211 U_BOOT_DRIVER(rti_wdt) = {
214 .of_match = rti_wdt_ids,
216 .probe = rti_wdt_probe,
217 .priv_auto = sizeof(struct rti_wdt_priv),
218 .flags = DM_FLAG_LEAVE_PD_ON,