2 * PIKA FPGA based Watchdog Timer
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/init.h>
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/types.h>
15 #include <linux/kernel.h>
17 #include <linux/miscdevice.h>
18 #include <linux/watchdog.h>
19 #include <linux/reboot.h>
20 #include <linux/jiffies.h>
21 #include <linux/timer.h>
22 #include <linux/bitops.h>
23 #include <linux/uaccess.h>
25 #include <linux/of_platform.h>
27 #define DRV_NAME "PIKA-WDT"
29 /* Hardware timeout in seconds */
30 #define WDT_HW_TIMEOUT 2
32 /* Timer heartbeat (500ms) */
33 #define WDT_TIMEOUT (HZ/2)
35 /* User land timeout */
36 #define WDT_HEARTBEAT 15
37 static int heartbeat = WDT_HEARTBEAT;
38 module_param(heartbeat, int, 0);
39 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
40 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
42 static bool nowayout = WATCHDOG_NOWAYOUT;
43 module_param(nowayout, bool, 0);
44 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
45 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
49 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
53 struct timer_list timer; /* The timer that pings the watchdog */
56 static struct watchdog_info ident = {
58 .options = WDIOF_CARDRESET |
65 * Reload the watchdog timer. (ie, pat the watchdog)
67 static inline void pikawdt_reset(void)
69 /* -- FPGA: Reset Control Register (32bit R/W) (Offset: 0x14) --
70 * Bit 7, WTCHDG_EN: When set to 1, the watchdog timer is enabled.
71 * Once enabled, it cannot be disabled. The watchdog can be
72 * kicked by performing any write access to the reset
73 * control register (this register).
74 * Bit 8-11, WTCHDG_TIMEOUT_SEC: Sets the watchdog timeout value in
75 * seconds. Valid ranges are 1 to 15 seconds. The value can
76 * be modified dynamically.
78 unsigned reset = in_be32(pikawdt_private.fpga + 0x14);
79 /* enable with max timeout - 15 seconds */
80 reset |= (1 << 7) + (WDT_HW_TIMEOUT << 8);
81 out_be32(pikawdt_private.fpga + 0x14, reset);
87 static void pikawdt_ping(unsigned long data)
89 if (time_before(jiffies, pikawdt_private.next_heartbeat) ||
90 (!nowayout && !pikawdt_private.open)) {
92 mod_timer(&pikawdt_private.timer, jiffies + WDT_TIMEOUT);
94 pr_crit("I will reset your machine !\n");
98 static void pikawdt_keepalive(void)
100 pikawdt_private.next_heartbeat = jiffies + heartbeat * HZ;
103 static void pikawdt_start(void)
106 mod_timer(&pikawdt_private.timer, jiffies + WDT_TIMEOUT);
110 * Watchdog device is opened, and watchdog starts running.
112 static int pikawdt_open(struct inode *inode, struct file *file)
114 /* /dev/watchdog can only be opened once */
115 if (test_and_set_bit(0, &pikawdt_private.open))
120 return nonseekable_open(inode, file);
124 * Close the watchdog device.
126 static int pikawdt_release(struct inode *inode, struct file *file)
128 /* stop internal ping */
129 if (!pikawdt_private.expect_close)
130 del_timer(&pikawdt_private.timer);
132 clear_bit(0, &pikawdt_private.open);
133 pikawdt_private.expect_close = 0;
138 * Pat the watchdog whenever device is written to.
140 static ssize_t pikawdt_write(struct file *file, const char __user *data,
141 size_t len, loff_t *ppos)
146 /* Scan for magic character */
150 pikawdt_private.expect_close = 0;
152 for (i = 0; i < len; i++) {
154 if (get_user(c, data + i))
157 pikawdt_private.expect_close = 42;
169 * Handle commands from user-space.
171 static long pikawdt_ioctl(struct file *file,
172 unsigned int cmd, unsigned long arg)
174 void __user *argp = (void __user *)arg;
175 int __user *p = argp;
179 case WDIOC_GETSUPPORT:
180 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
182 case WDIOC_GETSTATUS:
183 return put_user(0, p);
185 case WDIOC_GETBOOTSTATUS:
186 return put_user(pikawdt_private.bootstatus, p);
188 case WDIOC_KEEPALIVE:
192 case WDIOC_SETTIMEOUT:
193 if (get_user(new_value, p))
196 heartbeat = new_value;
199 return put_user(new_value, p); /* return current value */
201 case WDIOC_GETTIMEOUT:
202 return put_user(heartbeat, p);
208 static const struct file_operations pikawdt_fops = {
209 .owner = THIS_MODULE,
211 .open = pikawdt_open,
212 .release = pikawdt_release,
213 .write = pikawdt_write,
214 .unlocked_ioctl = pikawdt_ioctl,
217 static struct miscdevice pikawdt_miscdev = {
218 .minor = WATCHDOG_MINOR,
220 .fops = &pikawdt_fops,
223 static int __init pikawdt_init(void)
225 struct device_node *np;
230 np = of_find_compatible_node(NULL, NULL, "pika,fpga");
232 pr_err("Unable to find fpga\n");
236 pikawdt_private.fpga = of_iomap(np, 0);
238 if (pikawdt_private.fpga == NULL) {
239 pr_err("Unable to map fpga\n");
243 ident.firmware_version = in_be32(pikawdt_private.fpga + 0x1c) & 0xffff;
245 /* POST information is in the sd area. */
246 np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd");
248 pr_err("Unable to find fpga-sd\n");
253 fpga = of_iomap(np, 0);
256 pr_err("Unable to map fpga-sd\n");
261 /* -- FPGA: POST Test Results Register 1 (32bit R/W) (Offset: 0x4040) --
262 * Bit 31, WDOG: Set to 1 when the last reset was caused by a watchdog
265 post1 = in_be32(fpga + 0x40);
266 if (post1 & 0x80000000)
267 pikawdt_private.bootstatus = WDIOF_CARDRESET;
271 setup_timer(&pikawdt_private.timer, pikawdt_ping, 0);
273 ret = misc_register(&pikawdt_miscdev);
275 pr_err("Unable to register miscdev\n");
279 pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
280 heartbeat, nowayout);
284 iounmap(pikawdt_private.fpga);
288 static void __exit pikawdt_exit(void)
290 misc_deregister(&pikawdt_miscdev);
292 iounmap(pikawdt_private.fpga);
295 module_init(pikawdt_init);
296 module_exit(pikawdt_exit);
298 MODULE_AUTHOR("Sean MacLennan <smaclennan@pikatech.com>");
299 MODULE_DESCRIPTION("PIKA FPGA based Watchdog Timer");
300 MODULE_LICENSE("GPL");
301 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);