1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019 Marvell International Ltd.
5 * https://spdx.org/licenses
13 DECLARE_GLOBAL_DATA_PTR;
15 #define CORE0_POKE_OFFSET 0x50000
16 #define CORE0_POKE_OFFSET_MASK 0xfffffULL
22 static int octeontx_wdt_reset(struct udevice *dev)
24 struct octeontx_wdt *priv = dev_get_priv(dev);
26 writeq(~0ULL, priv->reg);
31 static int octeontx_wdt_probe(struct udevice *dev)
33 struct octeontx_wdt *priv = dev_get_priv(dev);
35 priv->reg = dev_remap_addr(dev);
40 * Save core poke register address in reg (its not 0xa0000 as
41 * extracted from the DT but 0x50000 instead)
43 priv->reg = (void __iomem *)(((u64)priv->reg &
44 ~CORE0_POKE_OFFSET_MASK) |
50 static const struct wdt_ops octeontx_wdt_ops = {
51 .reset = octeontx_wdt_reset,
54 static const struct udevice_id octeontx_wdt_ids[] = {
55 { .compatible = "arm,sbsa-gwdt" },
59 U_BOOT_DRIVER(wdt_octeontx) = {
60 .name = "wdt_octeontx",
62 .of_match = octeontx_wdt_ids,
63 .ops = &octeontx_wdt_ops,
64 .priv_auto_alloc_size = sizeof(struct octeontx_wdt),
65 .probe = octeontx_wdt_probe,