1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #include <linux/err.h>
24 #include <linux/init.h>
26 #include <linux/ioport.h>
27 #include <linux/miscdevice.h>
28 #include <linux/module.h>
29 #include <linux/mutex.h>
30 #include <linux/notifier.h>
31 #include <linux/reboot.h>
32 #include <linux/uaccess.h>
33 #include <linux/watchdog.h>
35 #define DRVNAME "f71808e_wdt"
37 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
38 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
39 #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
41 #define SIO_REG_LDSEL 0x07 /* Logical device select */
42 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
43 #define SIO_REG_DEVREV 0x22 /* Device revision */
44 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
45 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
46 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
47 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
48 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
49 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
50 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
52 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
53 #define SIO_F71808_ID 0x0901 /* Chipset ID */
54 #define SIO_F71858_ID 0x0507 /* Chipset ID */
55 #define SIO_F71862_ID 0x0601 /* Chipset ID */
56 #define SIO_F71869_ID 0x0814 /* Chipset ID */
57 #define SIO_F71882_ID 0x0541 /* Chipset ID */
58 #define SIO_F71889_ID 0x0723 /* Chipset ID */
60 #define F71808FG_REG_WDO_CONF 0xf0
61 #define F71808FG_REG_WDT_CONF 0xf5
62 #define F71808FG_REG_WD_TIME 0xf6
64 #define F71808FG_FLAG_WDOUT_EN 7
66 #define F71808FG_FLAG_WDTMOUT_STS 5
67 #define F71808FG_FLAG_WD_EN 5
68 #define F71808FG_FLAG_WD_PULSE 4
69 #define F71808FG_FLAG_WD_UNIT 3
72 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
73 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
74 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
76 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
79 static unsigned short force_id;
80 module_param(force_id, ushort, 0);
81 MODULE_PARM_DESC(force_id, "Override the detected device ID");
83 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
84 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
85 module_param(timeout, int, 0);
86 MODULE_PARM_DESC(timeout,
87 "Watchdog timeout in seconds. 1<= timeout <="
88 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
89 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
91 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
92 module_param(pulse_width, uint, 0);
93 MODULE_PARM_DESC(pulse_width,
94 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
95 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
97 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
98 module_param(f71862fg_pin, uint, 0);
99 MODULE_PARM_DESC(f71862fg_pin,
100 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
101 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
103 static int nowayout = WATCHDOG_NOWAYOUT;
104 module_param(nowayout, bool, 0444);
105 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
107 static unsigned int start_withtimeout;
108 module_param(start_withtimeout, uint, 0);
109 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
110 " given initial timeout. Zero (default) disables this feature.");
112 enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
114 static const char *f71808e_names[] = {
123 /* Super-I/O Function prototypes */
124 static inline int superio_inb(int base, int reg);
125 static inline int superio_inw(int base, int reg);
126 static inline void superio_outb(int base, int reg, u8 val);
127 static inline void superio_set_bit(int base, int reg, int bit);
128 static inline void superio_clear_bit(int base, int reg, int bit);
129 static inline int superio_enter(int base);
130 static inline void superio_select(int base, int ld);
131 static inline void superio_exit(int base);
133 struct watchdog_data {
134 unsigned short sioaddr;
136 unsigned long opened;
139 struct watchdog_info ident;
141 unsigned short timeout;
142 u8 timer_val; /* content for the wd_time register */
144 u8 pulse_val; /* pulse width flag */
145 char pulse_mode; /* enable pulse output mode? */
146 char caused_reboot; /* last reboot was by the watchdog */
149 static struct watchdog_data watchdog = {
150 .lock = __MUTEX_INITIALIZER(watchdog.lock),
153 /* Super I/O functions */
154 static inline int superio_inb(int base, int reg)
157 return inb(base + 1);
160 static int superio_inw(int base, int reg)
163 val = superio_inb(base, reg) << 8;
164 val |= superio_inb(base, reg + 1);
168 static inline void superio_outb(int base, int reg, u8 val)
174 static inline void superio_set_bit(int base, int reg, int bit)
176 unsigned long val = superio_inb(base, reg);
177 __set_bit(bit, &val);
178 superio_outb(base, reg, val);
181 static inline void superio_clear_bit(int base, int reg, int bit)
183 unsigned long val = superio_inb(base, reg);
184 __clear_bit(bit, &val);
185 superio_outb(base, reg, val);
188 static inline int superio_enter(int base)
190 /* Don't step on other drivers' I/O space by accident */
191 if (!request_muxed_region(base, 2, DRVNAME)) {
192 printk(KERN_ERR DRVNAME ": I/O address 0x%04x already in use\n",
197 /* according to the datasheet the key must be send twice! */
198 outb(SIO_UNLOCK_KEY, base);
199 outb(SIO_UNLOCK_KEY, base);
204 static inline void superio_select(int base, int ld)
206 outb(SIO_REG_LDSEL, base);
210 static inline void superio_exit(int base)
212 outb(SIO_LOCK_KEY, base);
213 release_region(base, 2);
216 static int watchdog_set_timeout(int timeout)
219 || timeout > max_timeout) {
220 printk(KERN_ERR DRVNAME ": watchdog timeout out of range\n");
224 mutex_lock(&watchdog.lock);
226 watchdog.timeout = timeout;
227 if (timeout > 0xff) {
228 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
229 watchdog.minutes_mode = true;
231 watchdog.timer_val = timeout;
232 watchdog.minutes_mode = false;
235 mutex_unlock(&watchdog.lock);
240 static int watchdog_set_pulse_width(unsigned int pw)
244 mutex_lock(&watchdog.lock);
247 watchdog.pulse_val = 0;
248 } else if (pw <= 25) {
249 watchdog.pulse_val = 1;
250 } else if (pw <= 125) {
251 watchdog.pulse_val = 2;
252 } else if (pw <= 5000) {
253 watchdog.pulse_val = 3;
255 printk(KERN_ERR DRVNAME ": pulse width out of range\n");
260 watchdog.pulse_mode = pw;
263 mutex_unlock(&watchdog.lock);
267 static int watchdog_keepalive(void)
271 mutex_lock(&watchdog.lock);
272 err = superio_enter(watchdog.sioaddr);
275 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
277 if (watchdog.minutes_mode)
278 /* select minutes for timer units */
279 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
280 F71808FG_FLAG_WD_UNIT);
282 /* select seconds for timer units */
283 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
284 F71808FG_FLAG_WD_UNIT);
286 /* Set timer value */
287 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
290 superio_exit(watchdog.sioaddr);
293 mutex_unlock(&watchdog.lock);
297 static int f71862fg_pin_configure(unsigned short ioaddr)
299 /* When ioaddr is non-zero the calling function has to take care of
300 mutex handling and superio preparation! */
302 if (f71862fg_pin == 63) {
304 /* SPI must be disabled first to use this pin! */
305 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
306 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
308 } else if (f71862fg_pin == 56) {
310 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
312 printk(KERN_ERR DRVNAME ": Invalid argument f71862fg_pin=%d\n",
319 static int watchdog_start(void)
321 /* Make sure we don't die as soon as the watchdog is enabled below */
322 int err = watchdog_keepalive();
326 mutex_lock(&watchdog.lock);
327 err = superio_enter(watchdog.sioaddr);
330 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
332 /* Watchdog pin configuration */
333 switch (watchdog.type) {
335 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
336 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
337 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
341 err = f71862fg_pin_configure(watchdog.sioaddr);
347 /* GPIO14 --> WDTRST# */
348 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
352 /* Set pin 56 to WDTRST# */
353 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
357 /* set pin 40 to WDTRST# */
358 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
359 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
364 * 'default' label to shut up the compiler and catch
371 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
372 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
373 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
374 F71808FG_FLAG_WDOUT_EN);
376 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
377 F71808FG_FLAG_WD_EN);
379 if (watchdog.pulse_mode) {
380 /* Select "pulse" output mode with given duration */
381 u8 wdt_conf = superio_inb(watchdog.sioaddr,
382 F71808FG_REG_WDT_CONF);
384 /* Set WD_PSWIDTH bits (1:0) */
385 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
386 /* Set WD_PULSE to "pulse" mode */
387 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
389 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
392 /* Select "level" output mode */
393 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
394 F71808FG_FLAG_WD_PULSE);
398 superio_exit(watchdog.sioaddr);
400 mutex_unlock(&watchdog.lock);
405 static int watchdog_stop(void)
409 mutex_lock(&watchdog.lock);
410 err = superio_enter(watchdog.sioaddr);
413 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
415 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
416 F71808FG_FLAG_WD_EN);
418 superio_exit(watchdog.sioaddr);
421 mutex_unlock(&watchdog.lock);
426 static int watchdog_get_status(void)
430 mutex_lock(&watchdog.lock);
431 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
432 mutex_unlock(&watchdog.lock);
437 static bool watchdog_is_running(void)
440 * if we fail to determine the watchdog's status assume it to be
441 * running to be on the safe side
443 bool is_running = true;
445 mutex_lock(&watchdog.lock);
446 if (superio_enter(watchdog.sioaddr))
448 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
450 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
451 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
452 & F71808FG_FLAG_WD_EN);
454 superio_exit(watchdog.sioaddr);
457 mutex_unlock(&watchdog.lock);
461 /* /dev/watchdog api */
463 static int watchdog_open(struct inode *inode, struct file *file)
467 /* If the watchdog is alive we don't need to start it again */
468 if (test_and_set_bit(0, &watchdog.opened))
471 err = watchdog_start();
473 clear_bit(0, &watchdog.opened);
478 __module_get(THIS_MODULE);
480 watchdog.expect_close = 0;
481 return nonseekable_open(inode, file);
484 static int watchdog_release(struct inode *inode, struct file *file)
486 clear_bit(0, &watchdog.opened);
488 if (!watchdog.expect_close) {
489 watchdog_keepalive();
490 printk(KERN_CRIT DRVNAME
491 ": Unexpected close, not stopping watchdog!\n");
492 } else if (!nowayout) {
500 * @file: file handle to the watchdog
501 * @buf: buffer to write
502 * @count: count of bytes
503 * @ppos: pointer to the position to write. No seeks allowed
505 * A write to a watchdog device is defined as a keepalive signal. Any
506 * write of data will do, as we we don't define content meaning.
509 static ssize_t watchdog_write(struct file *file, const char __user *buf,
510 size_t count, loff_t *ppos)
516 /* In case it was set long ago */
517 bool expect_close = false;
519 for (i = 0; i != count; i++) {
521 if (get_user(c, buf + i))
523 expect_close = (c == 'V');
526 /* Properly order writes across fork()ed processes */
527 mutex_lock(&watchdog.lock);
528 watchdog.expect_close = expect_close;
529 mutex_unlock(&watchdog.lock);
532 /* someone wrote to us, we should restart timer */
533 watchdog_keepalive();
540 * @inode: inode of the device
541 * @file: file handle to the device
542 * @cmd: watchdog command
543 * @arg: argument pointer
545 * The watchdog API defines a common set of functions for all watchdogs
546 * according to their available features.
548 static long watchdog_ioctl(struct file *file, unsigned int cmd,
555 struct watchdog_info __user *ident;
559 uarg.i = (int __user *)arg;
562 case WDIOC_GETSUPPORT:
563 return copy_to_user(uarg.ident, &watchdog.ident,
564 sizeof(watchdog.ident)) ? -EFAULT : 0;
566 case WDIOC_GETSTATUS:
567 status = watchdog_get_status();
570 return put_user(status, uarg.i);
572 case WDIOC_GETBOOTSTATUS:
573 return put_user(0, uarg.i);
575 case WDIOC_SETOPTIONS:
576 if (get_user(new_options, uarg.i))
579 if (new_options & WDIOS_DISABLECARD)
582 if (new_options & WDIOS_ENABLECARD)
583 return watchdog_start();
586 case WDIOC_KEEPALIVE:
587 watchdog_keepalive();
590 case WDIOC_SETTIMEOUT:
591 if (get_user(new_timeout, uarg.i))
594 if (watchdog_set_timeout(new_timeout))
597 watchdog_keepalive();
600 case WDIOC_GETTIMEOUT:
601 return put_user(watchdog.timeout, uarg.i);
609 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
612 if (code == SYS_DOWN || code == SYS_HALT)
617 static const struct file_operations watchdog_fops = {
618 .owner = THIS_MODULE,
620 .open = watchdog_open,
621 .release = watchdog_release,
622 .write = watchdog_write,
623 .unlocked_ioctl = watchdog_ioctl,
626 static struct miscdevice watchdog_miscdev = {
627 .minor = WATCHDOG_MINOR,
629 .fops = &watchdog_fops,
632 static struct notifier_block watchdog_notifier = {
633 .notifier_call = watchdog_notify_sys,
636 static int __init watchdog_init(int sioaddr)
638 int wdt_conf, err = 0;
640 /* No need to lock watchdog.lock here because no entry points
641 * into the module have been registered yet.
643 watchdog.sioaddr = sioaddr;
644 watchdog.ident.options = WDIOC_SETTIMEOUT
646 | WDIOF_KEEPALIVEPING;
648 snprintf(watchdog.ident.identity,
649 sizeof(watchdog.ident.identity), "%s watchdog",
650 f71808e_names[watchdog.type]);
652 err = superio_enter(sioaddr);
655 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
657 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
658 watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
660 superio_exit(sioaddr);
662 err = watchdog_set_timeout(timeout);
665 err = watchdog_set_pulse_width(pulse_width);
669 err = register_reboot_notifier(&watchdog_notifier);
673 err = misc_register(&watchdog_miscdev);
675 printk(KERN_ERR DRVNAME
676 ": cannot register miscdev on minor=%d\n",
677 watchdog_miscdev.minor);
681 if (start_withtimeout) {
682 if (start_withtimeout <= 0
683 || start_withtimeout > max_timeout) {
684 printk(KERN_ERR DRVNAME
685 ": starting timeout out of range\n");
690 err = watchdog_start();
692 printk(KERN_ERR DRVNAME
693 ": cannot start watchdog timer\n");
697 mutex_lock(&watchdog.lock);
698 err = superio_enter(sioaddr);
701 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
703 if (start_withtimeout > 0xff) {
704 /* select minutes for timer units */
705 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
706 F71808FG_FLAG_WD_UNIT);
707 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
708 DIV_ROUND_UP(start_withtimeout, 60));
710 /* select seconds for timer units */
711 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
712 F71808FG_FLAG_WD_UNIT);
713 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
717 superio_exit(sioaddr);
718 mutex_unlock(&watchdog.lock);
721 __module_get(THIS_MODULE);
723 printk(KERN_INFO DRVNAME
724 ": watchdog started with initial timeout of %u sec\n",
731 mutex_unlock(&watchdog.lock);
733 misc_deregister(&watchdog_miscdev);
735 unregister_reboot_notifier(&watchdog_notifier);
740 static int __init f71808e_find(int sioaddr)
743 int err = superio_enter(sioaddr);
747 devid = superio_inw(sioaddr, SIO_REG_MANID);
748 if (devid != SIO_FINTEK_ID) {
749 pr_debug(DRVNAME ": Not a Fintek device\n");
754 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
757 watchdog.type = f71808fg;
760 watchdog.type = f71862fg;
761 err = f71862fg_pin_configure(0); /* validate module parameter */
764 watchdog.type = f71869;
767 watchdog.type = f71882fg;
770 watchdog.type = f71889fg;
773 /* Confirmed (by datasheet) not to have a watchdog. */
777 printk(KERN_INFO DRVNAME ": Unrecognized Fintek device: %04x\n",
778 (unsigned int)devid);
783 printk(KERN_INFO DRVNAME ": Found %s watchdog chip, revision %d\n",
784 f71808e_names[watchdog.type],
785 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
787 superio_exit(sioaddr);
791 static int __init f71808e_init(void)
793 static const unsigned short addrs[] = { 0x2e, 0x4e };
797 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
798 err = f71808e_find(addrs[i]);
802 if (i == ARRAY_SIZE(addrs))
805 return watchdog_init(addrs[i]);
808 static void __exit f71808e_exit(void)
810 if (watchdog_is_running()) {
811 printk(KERN_WARNING DRVNAME
812 ": Watchdog timer still running, stopping it\n");
815 misc_deregister(&watchdog_miscdev);
816 unregister_reboot_notifier(&watchdog_notifier);
819 MODULE_DESCRIPTION("F71808E Watchdog Driver");
820 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
821 MODULE_LICENSE("GPL");
823 module_init(f71808e_init);
824 module_exit(f71808e_exit);