1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24 #include <linux/err.h>
26 #include <linux/init.h>
28 #include <linux/ioport.h>
29 #include <linux/miscdevice.h>
30 #include <linux/module.h>
31 #include <linux/mutex.h>
32 #include <linux/notifier.h>
33 #include <linux/reboot.h>
34 #include <linux/uaccess.h>
35 #include <linux/watchdog.h>
37 #define DRVNAME "f71808e_wdt"
39 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
40 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
41 #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
43 #define SIO_REG_LDSEL 0x07 /* Logical device select */
44 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
45 #define SIO_REG_DEVREV 0x22 /* Device revision */
46 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
47 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
48 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
49 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
50 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
51 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
52 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
54 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
55 #define SIO_F71808_ID 0x0901 /* Chipset ID */
56 #define SIO_F71858_ID 0x0507 /* Chipset ID */
57 #define SIO_F71862_ID 0x0601 /* Chipset ID */
58 #define SIO_F71869_ID 0x0814 /* Chipset ID */
59 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
60 #define SIO_F71882_ID 0x0541 /* Chipset ID */
61 #define SIO_F71889_ID 0x0723 /* Chipset ID */
63 #define F71808FG_REG_WDO_CONF 0xf0
64 #define F71808FG_REG_WDT_CONF 0xf5
65 #define F71808FG_REG_WD_TIME 0xf6
67 #define F71808FG_FLAG_WDOUT_EN 7
69 #define F71808FG_FLAG_WDTMOUT_STS 5
70 #define F71808FG_FLAG_WD_EN 5
71 #define F71808FG_FLAG_WD_PULSE 4
72 #define F71808FG_FLAG_WD_UNIT 3
75 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
76 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
77 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
79 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
82 static unsigned short force_id;
83 module_param(force_id, ushort, 0);
84 MODULE_PARM_DESC(force_id, "Override the detected device ID");
86 static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
87 static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
88 module_param(timeout, int, 0);
89 MODULE_PARM_DESC(timeout,
90 "Watchdog timeout in seconds. 1<= timeout <="
91 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
92 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
94 static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
95 module_param(pulse_width, uint, 0);
96 MODULE_PARM_DESC(pulse_width,
97 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
98 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
100 static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
101 module_param(f71862fg_pin, uint, 0);
102 MODULE_PARM_DESC(f71862fg_pin,
103 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
104 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
106 static bool nowayout = WATCHDOG_NOWAYOUT;
107 module_param(nowayout, bool, 0444);
108 MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
110 static unsigned int start_withtimeout;
111 module_param(start_withtimeout, uint, 0);
112 MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
113 " given initial timeout. Zero (default) disables this feature.");
115 enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
117 static const char *f71808e_names[] = {
126 /* Super-I/O Function prototypes */
127 static inline int superio_inb(int base, int reg);
128 static inline int superio_inw(int base, int reg);
129 static inline void superio_outb(int base, int reg, u8 val);
130 static inline void superio_set_bit(int base, int reg, int bit);
131 static inline void superio_clear_bit(int base, int reg, int bit);
132 static inline int superio_enter(int base);
133 static inline void superio_select(int base, int ld);
134 static inline void superio_exit(int base);
136 struct watchdog_data {
137 unsigned short sioaddr;
139 unsigned long opened;
142 struct watchdog_info ident;
144 unsigned short timeout;
145 u8 timer_val; /* content for the wd_time register */
147 u8 pulse_val; /* pulse width flag */
148 char pulse_mode; /* enable pulse output mode? */
149 char caused_reboot; /* last reboot was by the watchdog */
152 static struct watchdog_data watchdog = {
153 .lock = __MUTEX_INITIALIZER(watchdog.lock),
156 /* Super I/O functions */
157 static inline int superio_inb(int base, int reg)
160 return inb(base + 1);
163 static int superio_inw(int base, int reg)
166 val = superio_inb(base, reg) << 8;
167 val |= superio_inb(base, reg + 1);
171 static inline void superio_outb(int base, int reg, u8 val)
177 static inline void superio_set_bit(int base, int reg, int bit)
179 unsigned long val = superio_inb(base, reg);
180 __set_bit(bit, &val);
181 superio_outb(base, reg, val);
184 static inline void superio_clear_bit(int base, int reg, int bit)
186 unsigned long val = superio_inb(base, reg);
187 __clear_bit(bit, &val);
188 superio_outb(base, reg, val);
191 static inline int superio_enter(int base)
193 /* Don't step on other drivers' I/O space by accident */
194 if (!request_muxed_region(base, 2, DRVNAME)) {
195 pr_err("I/O address 0x%04x already in use\n", (int)base);
199 /* according to the datasheet the key must be sent twice! */
200 outb(SIO_UNLOCK_KEY, base);
201 outb(SIO_UNLOCK_KEY, base);
206 static inline void superio_select(int base, int ld)
208 outb(SIO_REG_LDSEL, base);
212 static inline void superio_exit(int base)
214 outb(SIO_LOCK_KEY, base);
215 release_region(base, 2);
218 static int watchdog_set_timeout(int timeout)
221 || timeout > max_timeout) {
222 pr_err("watchdog timeout out of range\n");
226 mutex_lock(&watchdog.lock);
228 watchdog.timeout = timeout;
229 if (timeout > 0xff) {
230 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
231 watchdog.minutes_mode = true;
233 watchdog.timer_val = timeout;
234 watchdog.minutes_mode = false;
237 mutex_unlock(&watchdog.lock);
242 static int watchdog_set_pulse_width(unsigned int pw)
246 mutex_lock(&watchdog.lock);
249 watchdog.pulse_val = 0;
250 } else if (pw <= 25) {
251 watchdog.pulse_val = 1;
252 } else if (pw <= 125) {
253 watchdog.pulse_val = 2;
254 } else if (pw <= 5000) {
255 watchdog.pulse_val = 3;
257 pr_err("pulse width out of range\n");
262 watchdog.pulse_mode = pw;
265 mutex_unlock(&watchdog.lock);
269 static int watchdog_keepalive(void)
273 mutex_lock(&watchdog.lock);
274 err = superio_enter(watchdog.sioaddr);
277 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
279 if (watchdog.minutes_mode)
280 /* select minutes for timer units */
281 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
282 F71808FG_FLAG_WD_UNIT);
284 /* select seconds for timer units */
285 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
286 F71808FG_FLAG_WD_UNIT);
288 /* Set timer value */
289 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
292 superio_exit(watchdog.sioaddr);
295 mutex_unlock(&watchdog.lock);
299 static int f71862fg_pin_configure(unsigned short ioaddr)
301 /* When ioaddr is non-zero the calling function has to take care of
302 mutex handling and superio preparation! */
304 if (f71862fg_pin == 63) {
306 /* SPI must be disabled first to use this pin! */
307 superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
308 superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
310 } else if (f71862fg_pin == 56) {
312 superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
314 pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
320 static int watchdog_start(void)
322 /* Make sure we don't die as soon as the watchdog is enabled below */
323 int err = watchdog_keepalive();
327 mutex_lock(&watchdog.lock);
328 err = superio_enter(watchdog.sioaddr);
331 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
333 /* Watchdog pin configuration */
334 switch (watchdog.type) {
336 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
337 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
338 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
342 err = f71862fg_pin_configure(watchdog.sioaddr);
348 /* GPIO14 --> WDTRST# */
349 superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
353 /* Set pin 56 to WDTRST# */
354 superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
358 /* set pin 40 to WDTRST# */
359 superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
360 superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
365 * 'default' label to shut up the compiler and catch
372 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
373 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
374 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
375 F71808FG_FLAG_WDOUT_EN);
377 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
378 F71808FG_FLAG_WD_EN);
380 if (watchdog.pulse_mode) {
381 /* Select "pulse" output mode with given duration */
382 u8 wdt_conf = superio_inb(watchdog.sioaddr,
383 F71808FG_REG_WDT_CONF);
385 /* Set WD_PSWIDTH bits (1:0) */
386 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
387 /* Set WD_PULSE to "pulse" mode */
388 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
390 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
393 /* Select "level" output mode */
394 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
395 F71808FG_FLAG_WD_PULSE);
399 superio_exit(watchdog.sioaddr);
401 mutex_unlock(&watchdog.lock);
406 static int watchdog_stop(void)
410 mutex_lock(&watchdog.lock);
411 err = superio_enter(watchdog.sioaddr);
414 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
416 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
417 F71808FG_FLAG_WD_EN);
419 superio_exit(watchdog.sioaddr);
422 mutex_unlock(&watchdog.lock);
427 static int watchdog_get_status(void)
431 mutex_lock(&watchdog.lock);
432 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
433 mutex_unlock(&watchdog.lock);
438 static bool watchdog_is_running(void)
441 * if we fail to determine the watchdog's status assume it to be
442 * running to be on the safe side
444 bool is_running = true;
446 mutex_lock(&watchdog.lock);
447 if (superio_enter(watchdog.sioaddr))
449 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
451 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
452 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
453 & F71808FG_FLAG_WD_EN);
455 superio_exit(watchdog.sioaddr);
458 mutex_unlock(&watchdog.lock);
462 /* /dev/watchdog api */
464 static int watchdog_open(struct inode *inode, struct file *file)
468 /* If the watchdog is alive we don't need to start it again */
469 if (test_and_set_bit(0, &watchdog.opened))
472 err = watchdog_start();
474 clear_bit(0, &watchdog.opened);
479 __module_get(THIS_MODULE);
481 watchdog.expect_close = 0;
482 return nonseekable_open(inode, file);
485 static int watchdog_release(struct inode *inode, struct file *file)
487 clear_bit(0, &watchdog.opened);
489 if (!watchdog.expect_close) {
490 watchdog_keepalive();
491 pr_crit("Unexpected close, not stopping watchdog!\n");
492 } else if (!nowayout) {
500 * @file: file handle to the watchdog
501 * @buf: buffer to write
502 * @count: count of bytes
503 * @ppos: pointer to the position to write. No seeks allowed
505 * A write to a watchdog device is defined as a keepalive signal. Any
506 * write of data will do, as we we don't define content meaning.
509 static ssize_t watchdog_write(struct file *file, const char __user *buf,
510 size_t count, loff_t *ppos)
516 /* In case it was set long ago */
517 bool expect_close = false;
519 for (i = 0; i != count; i++) {
521 if (get_user(c, buf + i))
523 expect_close = (c == 'V');
526 /* Properly order writes across fork()ed processes */
527 mutex_lock(&watchdog.lock);
528 watchdog.expect_close = expect_close;
529 mutex_unlock(&watchdog.lock);
532 /* someone wrote to us, we should restart timer */
533 watchdog_keepalive();
540 * @inode: inode of the device
541 * @file: file handle to the device
542 * @cmd: watchdog command
543 * @arg: argument pointer
545 * The watchdog API defines a common set of functions for all watchdogs
546 * according to their available features.
548 static long watchdog_ioctl(struct file *file, unsigned int cmd,
555 struct watchdog_info __user *ident;
559 uarg.i = (int __user *)arg;
562 case WDIOC_GETSUPPORT:
563 return copy_to_user(uarg.ident, &watchdog.ident,
564 sizeof(watchdog.ident)) ? -EFAULT : 0;
566 case WDIOC_GETSTATUS:
567 status = watchdog_get_status();
570 return put_user(status, uarg.i);
572 case WDIOC_GETBOOTSTATUS:
573 return put_user(0, uarg.i);
575 case WDIOC_SETOPTIONS:
576 if (get_user(new_options, uarg.i))
579 if (new_options & WDIOS_DISABLECARD)
582 if (new_options & WDIOS_ENABLECARD)
583 return watchdog_start();
586 case WDIOC_KEEPALIVE:
587 watchdog_keepalive();
590 case WDIOC_SETTIMEOUT:
591 if (get_user(new_timeout, uarg.i))
594 if (watchdog_set_timeout(new_timeout))
597 watchdog_keepalive();
600 case WDIOC_GETTIMEOUT:
601 return put_user(watchdog.timeout, uarg.i);
609 static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
612 if (code == SYS_DOWN || code == SYS_HALT)
617 static const struct file_operations watchdog_fops = {
618 .owner = THIS_MODULE,
620 .open = watchdog_open,
621 .release = watchdog_release,
622 .write = watchdog_write,
623 .unlocked_ioctl = watchdog_ioctl,
626 static struct miscdevice watchdog_miscdev = {
627 .minor = WATCHDOG_MINOR,
629 .fops = &watchdog_fops,
632 static struct notifier_block watchdog_notifier = {
633 .notifier_call = watchdog_notify_sys,
636 static int __init watchdog_init(int sioaddr)
638 int wdt_conf, err = 0;
640 /* No need to lock watchdog.lock here because no entry points
641 * into the module have been registered yet.
643 watchdog.sioaddr = sioaddr;
644 watchdog.ident.options = WDIOC_SETTIMEOUT
646 | WDIOF_KEEPALIVEPING;
648 snprintf(watchdog.ident.identity,
649 sizeof(watchdog.ident.identity), "%s watchdog",
650 f71808e_names[watchdog.type]);
652 err = superio_enter(sioaddr);
655 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
657 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
658 watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
660 superio_exit(sioaddr);
662 err = watchdog_set_timeout(timeout);
665 err = watchdog_set_pulse_width(pulse_width);
669 err = register_reboot_notifier(&watchdog_notifier);
673 err = misc_register(&watchdog_miscdev);
675 pr_err("cannot register miscdev on minor=%d\n",
676 watchdog_miscdev.minor);
680 if (start_withtimeout) {
681 if (start_withtimeout <= 0
682 || start_withtimeout > max_timeout) {
683 pr_err("starting timeout out of range\n");
688 err = watchdog_start();
690 pr_err("cannot start watchdog timer\n");
694 mutex_lock(&watchdog.lock);
695 err = superio_enter(sioaddr);
698 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
700 if (start_withtimeout > 0xff) {
701 /* select minutes for timer units */
702 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
703 F71808FG_FLAG_WD_UNIT);
704 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
705 DIV_ROUND_UP(start_withtimeout, 60));
707 /* select seconds for timer units */
708 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
709 F71808FG_FLAG_WD_UNIT);
710 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
714 superio_exit(sioaddr);
715 mutex_unlock(&watchdog.lock);
718 __module_get(THIS_MODULE);
720 pr_info("watchdog started with initial timeout of %u sec\n",
727 mutex_unlock(&watchdog.lock);
729 misc_deregister(&watchdog_miscdev);
731 unregister_reboot_notifier(&watchdog_notifier);
736 static int __init f71808e_find(int sioaddr)
739 int err = superio_enter(sioaddr);
743 devid = superio_inw(sioaddr, SIO_REG_MANID);
744 if (devid != SIO_FINTEK_ID) {
745 pr_debug("Not a Fintek device\n");
750 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
753 watchdog.type = f71808fg;
756 watchdog.type = f71862fg;
757 err = f71862fg_pin_configure(0); /* validate module parameter */
761 watchdog.type = f71869;
764 watchdog.type = f71882fg;
767 watchdog.type = f71889fg;
770 /* Confirmed (by datasheet) not to have a watchdog. */
774 pr_info("Unrecognized Fintek device: %04x\n",
775 (unsigned int)devid);
780 pr_info("Found %s watchdog chip, revision %d\n",
781 f71808e_names[watchdog.type],
782 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
784 superio_exit(sioaddr);
788 static int __init f71808e_init(void)
790 static const unsigned short addrs[] = { 0x2e, 0x4e };
794 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
795 err = f71808e_find(addrs[i]);
799 if (i == ARRAY_SIZE(addrs))
802 return watchdog_init(addrs[i]);
805 static void __exit f71808e_exit(void)
807 if (watchdog_is_running()) {
808 pr_warn("Watchdog timer still running, stopping it\n");
811 misc_deregister(&watchdog_miscdev);
812 unregister_reboot_notifier(&watchdog_notifier);
815 MODULE_DESCRIPTION("F71808E Watchdog Driver");
816 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
817 MODULE_LICENSE("GPL");
819 module_init(f71808e_init);
820 module_exit(f71808e_exit);