1 // SPDX-License-Identifier: GPL-2.0-only
2 /* cpwd.c - driver implementation for hardware watchdog
3 * timers found on Sun Microsystems CP1400 and CP1500 boards.
5 * This device supports both the generic Linux watchdog
6 * interface and Solaris-compatible ioctls as best it is
9 * NOTE: CP1400 systems appear to have a defective intr_mask
10 * register on the PLD, preventing the disabling of
11 * timer interrupts. We use a timer to periodically
12 * reset 'stopped' watchdogs on affected platforms.
14 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
15 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kernel.h>
21 #include <linux/module.h>
23 #include <linux/errno.h>
24 #include <linux/major.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/ioport.h>
28 #include <linux/timer.h>
29 #include <linux/compat.h>
30 #include <linux/slab.h>
31 #include <linux/mutex.h>
34 #include <linux/of_device.h>
35 #include <linux/uaccess.h>
38 #include <asm/watchdog.h>
40 #define DRIVER_NAME "cpwd"
42 #define WD_OBPNAME "watchdog"
43 #define WD_BADMODEL "SUNW,501-5336"
44 #define WD_BTIMEOUT (jiffies + (HZ * 1000))
45 #define WD_BLIMIT 0xFFFF
51 /* Internal driver definitions. */
60 #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
61 #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
62 #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
64 /* Register value definitions
66 #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
67 #define WD1_INTR_MASK 0x02
68 #define WD2_INTR_MASK 0x04
70 #define WD_S_RUNNING 0x01 /* Watchdog device status running */
71 #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
79 unsigned long timeout;
86 struct miscdevice misc;
94 static DEFINE_MUTEX(cpwd_mutex);
95 static struct cpwd *cpwd_device;
97 /* Sun uses Altera PLD EPF8820ATC144-4
98 * providing three hardware watchdogs:
100 * 1) RIC - sends an interrupt when triggered
101 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
102 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
104 *** Timer register block definition (struct wd_timer_regblk)
106 * dcntr and limit registers (halfword access):
107 * -------------------
108 * | 15 | ...| 1 | 0 |
109 * -------------------
111 * -------------------
112 * dcntr - Current 16-bit downcounter value.
113 * When downcounter reaches '0' watchdog expires.
114 * Reading this register resets downcounter with
116 * limit - 16-bit countdown value in 1/10th second increments.
117 * Writing this register begins countdown with input value.
118 * Reading from this register does not affect counter.
119 * NOTES: After watchdog reset, dcntr and limit contain '1'
121 * status register (byte access):
122 * ---------------------------
123 * | 7 | ... | 2 | 1 | 0 |
124 * --------------+------------
125 * |- UNUSED -| EXP | RUN |
126 * ---------------------------
127 * status- Bit 0 - Watchdog is running
128 * Bit 1 - Watchdog has expired
130 *** PLD register block definition (struct wd_pld_regblk)
132 * intr_mask register (byte access):
133 * ---------------------------------
134 * | 7 | ... | 3 | 2 | 1 | 0 |
135 * +-------------+------------------
136 * |- UNUSED -| WD3 | WD2 | WD1 |
137 * ---------------------------------
138 * WD3 - 1 == Interrupt disabled for watchdog 3
139 * WD2 - 1 == Interrupt disabled for watchdog 2
140 * WD1 - 1 == Interrupt disabled for watchdog 1
142 * pld_status register (byte access):
143 * UNKNOWN, MAGICAL MYSTERY REGISTER
146 #define WD_TIMER_REGSZ 16
148 #define WD1_OFF (WD_TIMER_REGSZ * 1)
149 #define WD2_OFF (WD_TIMER_REGSZ * 2)
150 #define PLD_OFF (WD_TIMER_REGSZ * 3)
152 #define WD_DCNTR 0x00
153 #define WD_LIMIT 0x04
154 #define WD_STATUS 0x08
156 #define PLD_IMASK (PLD_OFF + 0x00)
157 #define PLD_STATUS (PLD_OFF + 0x04)
159 static struct timer_list cpwd_timer;
161 static int wd0_timeout;
162 static int wd1_timeout;
163 static int wd2_timeout;
165 module_param(wd0_timeout, int, 0);
166 MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
167 module_param(wd1_timeout, int, 0);
168 MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
169 module_param(wd2_timeout, int, 0);
170 MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
172 MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
173 MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
174 MODULE_LICENSE("GPL");
176 static void cpwd_writew(u16 val, void __iomem *addr)
178 writew(cpu_to_le16(val), addr);
180 static u16 cpwd_readw(void __iomem *addr)
182 u16 val = readw(addr);
184 return le16_to_cpu(val);
187 static void cpwd_writeb(u8 val, void __iomem *addr)
192 static u8 cpwd_readb(void __iomem *addr)
197 /* Enable or disable watchdog interrupts
198 * Because of the CP1400 defect this should only be
199 * called during initialzation or by wd_[start|stop]timer()
201 * index - sub-device index, or -1 for 'all'
202 * enable - non-zero to enable interrupts, zero to disable
204 static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
206 unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
207 unsigned char setregs =
209 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
210 (p->devs[index].intr_mask);
212 if (enable == WD_INTR_ON)
217 cpwd_writeb(curregs, p->regs + PLD_IMASK);
220 /* Restarts timer with maximum limit value and
221 * does not unset 'brokenstop' value.
223 static void cpwd_resetbrokentimer(struct cpwd *p, int index)
225 cpwd_toggleintr(p, index, WD_INTR_ON);
226 cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
229 /* Timer method called to reset stopped watchdogs--
230 * because of the PLD bug on CP1400, we cannot mask
231 * interrupts within the PLD so me must continually
232 * reset the timers ad infinitum.
234 static void cpwd_brokentimer(struct timer_list *unused)
236 struct cpwd *p = cpwd_device;
239 /* kill a running timer instance, in case we
240 * were called directly instead of by kernel timer
242 if (timer_pending(&cpwd_timer))
243 del_timer(&cpwd_timer);
245 for (id = 0; id < WD_NUMDEVS; id++) {
246 if (p->devs[id].runstatus & WD_STAT_BSTOP) {
248 cpwd_resetbrokentimer(p, id);
253 /* there is at least one timer brokenstopped-- reschedule */
254 cpwd_timer.expires = WD_BTIMEOUT;
255 add_timer(&cpwd_timer);
259 /* Reset countdown timer with 'limit' value and continue countdown.
260 * This will not start a stopped timer.
262 static void cpwd_pingtimer(struct cpwd *p, int index)
264 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
265 cpwd_readw(p->devs[index].regs + WD_DCNTR);
268 /* Stop a running watchdog timer-- the timer actually keeps
269 * running, but the interrupt is masked so that no action is
270 * taken upon expiration.
272 static void cpwd_stoptimer(struct cpwd *p, int index)
274 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
275 cpwd_toggleintr(p, index, WD_INTR_OFF);
278 p->devs[index].runstatus |= WD_STAT_BSTOP;
279 cpwd_brokentimer(NULL);
284 /* Start a watchdog timer with the specified limit value
285 * If the watchdog is running, it will be restarted with
286 * the provided limit value.
288 * This function will enable interrupts on the specified
291 static void cpwd_starttimer(struct cpwd *p, int index)
294 p->devs[index].runstatus &= ~WD_STAT_BSTOP;
296 p->devs[index].runstatus &= ~WD_STAT_SVCD;
298 cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
299 cpwd_toggleintr(p, index, WD_INTR_ON);
302 static int cpwd_getstatus(struct cpwd *p, int index)
304 unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
305 unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
306 unsigned char ret = WD_STOPPED;
308 /* determine STOPPED */
312 /* determine EXPIRED vs FREERUN vs RUNNING */
313 else if (WD_S_EXPIRED & stat) {
315 } else if (WD_S_RUNNING & stat) {
316 if (intr & p->devs[index].intr_mask) {
319 /* Fudge WD_EXPIRED status for defective CP1400--
320 * IF timer is running
321 * AND brokenstop is set
322 * AND an interrupt has been serviced
325 * IF timer is running
326 * AND brokenstop is set
327 * AND no interrupt has been serviced
331 (p->devs[index].runstatus & WD_STAT_BSTOP)) {
332 if (p->devs[index].runstatus & WD_STAT_SVCD) {
335 /* we could as well pretend
345 /* determine SERVICED */
346 if (p->devs[index].runstatus & WD_STAT_SVCD)
352 static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
354 struct cpwd *p = dev_id;
356 /* Only WD0 will interrupt-- others are NMI and we won't
359 spin_lock_irq(&p->lock);
361 cpwd_stoptimer(p, WD0_ID);
362 p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
364 spin_unlock_irq(&p->lock);
369 static int cpwd_open(struct inode *inode, struct file *f)
371 struct cpwd *p = cpwd_device;
373 mutex_lock(&cpwd_mutex);
374 switch (iminor(inode)) {
381 mutex_unlock(&cpwd_mutex);
385 /* Register IRQ on first open of device */
386 if (!p->initialized) {
387 if (request_irq(p->irq, &cpwd_interrupt,
388 IRQF_SHARED, DRIVER_NAME, p)) {
389 pr_err("Cannot register IRQ %d\n", p->irq);
390 mutex_unlock(&cpwd_mutex);
393 p->initialized = true;
396 mutex_unlock(&cpwd_mutex);
398 return stream_open(inode, f);
401 static int cpwd_release(struct inode *inode, struct file *file)
406 static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
408 static const struct watchdog_info info = {
409 .options = WDIOF_SETTIMEOUT,
410 .firmware_version = 1,
411 .identity = DRIVER_NAME,
413 void __user *argp = (void __user *)arg;
414 struct inode *inode = file_inode(file);
415 int index = iminor(inode) - WD0_MINOR;
416 struct cpwd *p = cpwd_device;
420 /* Generic Linux IOCTLs */
421 case WDIOC_GETSUPPORT:
422 if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
426 case WDIOC_GETSTATUS:
427 case WDIOC_GETBOOTSTATUS:
428 if (put_user(0, (int __user *)argp))
432 case WDIOC_KEEPALIVE:
433 cpwd_pingtimer(p, index);
436 case WDIOC_SETOPTIONS:
437 if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
440 if (setopt & WDIOS_DISABLECARD) {
443 cpwd_stoptimer(p, index);
444 } else if (setopt & WDIOS_ENABLECARD) {
445 cpwd_starttimer(p, index);
451 /* Solaris-compatible IOCTLs */
453 setopt = cpwd_getstatus(p, index);
454 if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
459 cpwd_starttimer(p, index);
466 cpwd_stoptimer(p, index);
476 static long cpwd_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
478 return cpwd_ioctl(file, cmd, (unsigned long)compat_ptr(arg));
481 static ssize_t cpwd_write(struct file *file, const char __user *buf,
482 size_t count, loff_t *ppos)
484 struct inode *inode = file_inode(file);
485 struct cpwd *p = cpwd_device;
486 int index = iminor(inode);
489 cpwd_pingtimer(p, index);
496 static ssize_t cpwd_read(struct file *file, char __user *buffer,
497 size_t count, loff_t *ppos)
502 static const struct file_operations cpwd_fops = {
503 .owner = THIS_MODULE,
504 .unlocked_ioctl = cpwd_ioctl,
505 .compat_ioctl = cpwd_compat_ioctl,
509 .release = cpwd_release,
513 static int cpwd_probe(struct platform_device *op)
515 struct device_node *options;
516 const char *str_prop;
517 const void *prop_val;
518 int i, err = -EINVAL;
524 p = devm_kzalloc(&op->dev, sizeof(*p), GFP_KERNEL);
528 p->irq = op->archdata.irqs[0];
530 spin_lock_init(&p->lock);
532 p->regs = of_ioremap(&op->resource[0], 0,
533 4 * WD_TIMER_REGSZ, DRIVER_NAME);
535 pr_err("Unable to map registers\n");
539 options = of_find_node_by_path("/options");
542 pr_err("Unable to find /options node\n");
546 prop_val = of_get_property(options, "watchdog-enable?", NULL);
547 p->enabled = (prop_val ? true : false);
549 prop_val = of_get_property(options, "watchdog-reboot?", NULL);
550 p->reboot = (prop_val ? true : false);
552 str_prop = of_get_property(options, "watchdog-timeout", NULL);
554 p->timeout = simple_strtoul(str_prop, NULL, 10);
556 of_node_put(options);
558 /* CP1400s seem to have broken PLD implementations-- the
559 * interrupt_mask register cannot be written, so no timer
560 * interrupts can be masked within the PLD.
562 str_prop = of_get_property(op->dev.of_node, "model", NULL);
563 p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
566 cpwd_toggleintr(p, -1, WD_INTR_OFF);
568 for (i = 0; i < WD_NUMDEVS; i++) {
569 static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
570 static int *parms[] = { &wd0_timeout,
573 struct miscdevice *mp = &p->devs[i].misc;
575 mp->minor = WD0_MINOR + i;
576 mp->name = cpwd_names[i];
577 mp->fops = &cpwd_fops;
579 p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
580 p->devs[i].intr_mask = (WD0_INTR_MASK << i);
581 p->devs[i].runstatus &= ~WD_STAT_BSTOP;
582 p->devs[i].runstatus |= WD_STAT_INIT;
583 p->devs[i].timeout = p->timeout;
585 p->devs[i].timeout = *parms[i];
587 err = misc_register(&p->devs[i].misc);
589 pr_err("Could not register misc device for dev %d\n",
596 timer_setup(&cpwd_timer, cpwd_brokentimer, 0);
597 cpwd_timer.expires = WD_BTIMEOUT;
599 pr_info("PLD defect workaround enabled for model %s\n",
603 platform_set_drvdata(op, p);
608 for (i--; i >= 0; i--)
609 misc_deregister(&p->devs[i].misc);
612 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
617 static int cpwd_remove(struct platform_device *op)
619 struct cpwd *p = platform_get_drvdata(op);
622 for (i = 0; i < WD_NUMDEVS; i++) {
623 misc_deregister(&p->devs[i].misc);
626 cpwd_stoptimer(p, i);
627 if (p->devs[i].runstatus & WD_STAT_BSTOP)
628 cpwd_resetbrokentimer(p, i);
633 del_timer_sync(&cpwd_timer);
638 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
645 static const struct of_device_id cpwd_match[] = {
651 MODULE_DEVICE_TABLE(of, cpwd_match);
653 static struct platform_driver cpwd_driver = {
656 .of_match_table = cpwd_match,
659 .remove = cpwd_remove,
662 module_platform_driver(cpwd_driver);