2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/system.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/funcmux.h>
15 #include <asm/arch/pinmux.h>
16 #include <asm/arch/pwm.h>
17 #include <asm/arch/display.h>
18 #include <asm/arch-tegra/timer.h>
20 DECLARE_GLOBAL_DATA_PTR;
22 /* These are the stages we go throuh in enabling the LCD */
33 static enum stage_t stage; /* Current stage we are at */
34 static unsigned long timer_next; /* Time we can move onto next stage */
36 /* Our LCD config, set up in handle_stage() */
37 static struct fdt_panel_config config;
38 struct fdt_disp_config *disp_config; /* Display controller config */
41 /* Maximum LCD size we support */
44 LCD_MAX_LOG2_BPP = 4, /* 2^4 = 16 bpp */
47 vidinfo_t panel_info = {
48 /* Insert a value here so that we don't end up in the BSS */
52 #ifndef CONFIG_OF_CONTROL
53 #error "You must enable CONFIG_OF_CONTROL to get Tegra LCD support"
56 static void update_panel_size(struct fdt_disp_config *config)
58 panel_info.vl_col = config->width;
59 panel_info.vl_row = config->height;
60 panel_info.vl_bpix = config->log2_bpp;
64 * Main init function called by lcd driver.
65 * Inits and then prints test pattern if required.
68 void lcd_ctrl_init(void *lcdbase)
70 int type = DCACHE_OFF;
75 /* Make sure that we can acommodate the selected LCD */
76 assert(disp_config->width <= LCD_MAX_WIDTH);
77 assert(disp_config->height <= LCD_MAX_HEIGHT);
78 assert(disp_config->log2_bpp <= LCD_MAX_LOG2_BPP);
79 if (disp_config->width <= LCD_MAX_WIDTH
80 && disp_config->height <= LCD_MAX_HEIGHT
81 && disp_config->log2_bpp <= LCD_MAX_LOG2_BPP)
82 update_panel_size(disp_config);
83 size = lcd_get_size(&lcd_line_length);
85 /* Set up the LCD caching as requested */
86 if (config.cache_type & FDT_LCD_CACHE_WRITE_THROUGH)
87 type = DCACHE_WRITETHROUGH;
88 else if (config.cache_type & FDT_LCD_CACHE_WRITE_BACK)
89 type = DCACHE_WRITEBACK;
90 mmu_set_region_dcache_behaviour(disp_config->frame_buffer, size, type);
92 /* Enable flushing after LCD writes if requested */
93 lcd_set_flush_dcache(config.cache_type & FDT_LCD_CACHE_FLUSH);
95 debug("LCD frame buffer at %08X\n", disp_config->frame_buffer);
98 ulong calc_fbsize(void)
100 return (panel_info.vl_col * panel_info.vl_row *
101 NBITS(panel_info.vl_bpix)) / 8;
104 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
108 void tegra_lcd_early_init(const void *blob)
111 * Go with the maximum size for now. We will fix this up after
112 * relocation. These values are only used for memory alocation.
114 panel_info.vl_col = LCD_MAX_WIDTH;
115 panel_info.vl_row = LCD_MAX_HEIGHT;
116 panel_info.vl_bpix = LCD_MAX_LOG2_BPP;
120 * Decode the panel information from the fdt.
122 * @param blob fdt blob
123 * @param config structure to store fdt config into
124 * @return 0 if ok, -ve on error
126 static int fdt_decode_lcd(const void *blob, struct fdt_panel_config *config)
130 disp_config = tegra_display_get_config();
132 debug("%s: Display controller is not configured\n", __func__);
135 display_node = disp_config->panel_node;
136 if (display_node < 0) {
137 debug("%s: No panel configuration available\n", __func__);
141 config->pwm_channel = pwm_request(blob, display_node, "nvidia,pwm");
142 if (config->pwm_channel < 0) {
143 debug("%s: Unable to request PWM channel\n", __func__);
147 config->cache_type = fdtdec_get_int(blob, display_node,
149 FDT_LCD_CACHE_WRITE_BACK_FLUSH);
151 /* These GPIOs are all optional */
152 fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-enable-gpios",
153 &config->backlight_en);
154 fdtdec_decode_gpio(blob, display_node, "nvidia,lvds-shutdown-gpios",
155 &config->lvds_shutdown);
156 fdtdec_decode_gpio(blob, display_node, "nvidia,backlight-vdd-gpios",
157 &config->backlight_vdd);
158 fdtdec_decode_gpio(blob, display_node, "nvidia,panel-vdd-gpios",
161 return fdtdec_get_int_array(blob, display_node, "nvidia,panel-timings",
162 config->panel_timings, FDT_LCD_TIMINGS);
166 * Handle the next stage of device init
168 static int handle_stage(const void *blob)
170 debug("%s: stage %d\n", __func__, stage);
172 /* do the things for this stage */
175 /* Initialize the Tegra display controller */
176 if (tegra_display_probe(gd->fdt_blob, (void *)gd->fb_base)) {
177 printf("%s: Failed to probe display driver\n",
182 /* get panel details */
183 if (fdt_decode_lcd(blob, &config)) {
184 printf("No valid LCD information in device tree\n");
189 * It is possible that the FDT has requested that the LCD be
190 * disabled. We currently don't support this. It would require
191 * changes to U-Boot LCD subsystem to have LCD support
192 * compiled in but not used. An easier option might be to
193 * still have a frame buffer, but leave the backlight off and
194 * remove all mention of lcd in the stdout environment
198 funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT);
200 fdtdec_setup_gpio(&config.panel_vdd);
201 fdtdec_setup_gpio(&config.lvds_shutdown);
202 fdtdec_setup_gpio(&config.backlight_vdd);
203 fdtdec_setup_gpio(&config.backlight_en);
206 * TODO: If fdt includes output flag we can omit this code
207 * since fdtdec_setup_gpio will do it for us.
209 if (fdt_gpio_isvalid(&config.panel_vdd))
210 gpio_direction_output(config.panel_vdd.gpio, 0);
211 if (fdt_gpio_isvalid(&config.lvds_shutdown))
212 gpio_direction_output(config.lvds_shutdown.gpio, 0);
213 if (fdt_gpio_isvalid(&config.backlight_vdd))
214 gpio_direction_output(config.backlight_vdd.gpio, 0);
215 if (fdt_gpio_isvalid(&config.backlight_en))
216 gpio_direction_output(config.backlight_en.gpio, 0);
218 case STAGE_PANEL_VDD:
219 if (fdt_gpio_isvalid(&config.panel_vdd))
220 gpio_direction_output(config.panel_vdd.gpio, 1);
223 if (fdt_gpio_isvalid(&config.lvds_shutdown))
224 gpio_set_value(config.lvds_shutdown.gpio, 1);
226 case STAGE_BACKLIGHT_VDD:
227 if (fdt_gpio_isvalid(&config.backlight_vdd))
228 gpio_set_value(config.backlight_vdd.gpio, 1);
231 /* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
232 pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
233 pinmux_tristate_disable(PMUX_PINGRP_GPU);
235 pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
237 case STAGE_BACKLIGHT_EN:
238 if (fdt_gpio_isvalid(&config.backlight_en))
239 gpio_set_value(config.backlight_en.gpio, 1);
245 /* set up timer for next stage */
246 timer_next = timer_get_us();
247 if (stage < FDT_LCD_TIMINGS)
248 timer_next += config.panel_timings[stage] * 1000;
250 /* move to next stage */
255 int tegra_lcd_check_next_stage(const void *blob, int wait)
257 if (stage == STAGE_DONE)
261 /* wait if we need to */
262 debug("%s: stage %d\n", __func__, stage);
263 if (stage != STAGE_START) {
264 int delay = timer_next - timer_get_us();
274 if (handle_stage(blob))
276 } while (wait && stage != STAGE_DONE);
277 if (stage == STAGE_DONE)
278 debug("%s: LCD init complete\n", __func__);
283 void lcd_enable(void)
286 * Backlight and power init will be done separately in
287 * tegra_lcd_check_next_stage(), which should be called in
290 * U-Boot code supports only colour depth, selected at compile time.
291 * The device tree setting should match this. Otherwise the display
292 * will not look right, and U-Boot may crash.
294 if (disp_config->log2_bpp != LCD_BPP) {
295 printf("%s: Error: LCD depth configured in FDT (%d = %dbpp)"
296 " must match setting of LCD_BPP (%d)\n", __func__,
297 disp_config->log2_bpp, disp_config->bpp, LCD_BPP);