drivers/video/s6e8ax0.c

   1 /* linux/drivers/video/s6e8ax0.c
   2  *
   3  * MIPI-DSI based s6e8ax0 AMOLED panel driver.
   4  *
   5  * Inki Dae, <inki.dae@samsung.com>
   6  * Donghwa Lee, <dh09.lee@samsung.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <ubi_uboot.h>
  14 #include <common.h>
  15 #include <lcd.h>
  16 #include <mipi_ddi.h>
  17 #include <mipi_display.h>
  18 #include <asm/errno.h>
  19 #include <asm/arch/regs-dsim.h>
  20 #include <asm/arch/mipi_dsim.h>
  21 #include <asm/arch/power.h>
  22 #include <asm/arch/cpu.h>
  23 #include <linux/types.h>
  24 #include <linux/list.h>
  25
  26 #include "s5p_mipi_dsi_lowlevel.h"
  27 #include "s5p_mipi_dsi_common.h"
  28
  29 #define DSIM_PM_STABLE_TIME     (10)
  30 #define MIN_BRIGHTNESS          (0)
  31 #define MAX_BRIGHTNESS          (10)
  32
  33 #define lcd_to_master(a)        (a->dsim_dev->master)
  34 #define lcd_to_master_ops(a)    ((lcd_to_master(a))->master_ops)
  35
  36 enum panel_type {
  37         TYPE_AMS465GS01_M3,     /* U1HD */
  38         TYPE_AMS465GS01_SM2,    /* M0_PROXIMA */
  39         TYPE_AMS465GS02,        /* MIDAS */
  40         TYPE_AMS480GYXX_SM2,    /* M0_REAL_PROXIMA */
  41         TYPE_AMS529HA01,        /* Q1 */
  42         TYPE_AMS767KC01,        /* P8 */
  43 };
  44
  45 enum {
  46         DSIM_NONE_STATE = 0,
  47         DSIM_RESUME_COMPLETE = 1,
  48         DSIM_FRAME_DONE = 2,
  49 };
  50
  51 struct s6e8ax0 {
  52         unsigned int                    power;
  53         unsigned int                    updated;
  54         unsigned int                    gamma;
  55         unsigned int                    resume_complete;
  56
  57         struct mipi_dsim_lcd_device     *lcd_dev;
  58         struct lcd_platform_data        *ddi_pd;
  59 };
  60
  61 struct s6e8ax0_device_id {
  62         char name[16];
  63         enum panel_type type;
  64 };
  65
  66 static struct s6e8ax0_device_id s6e8ax0_ids[] = {
  67         {
  68                 .name = "ams465gs01-m3",
  69                 .type = TYPE_AMS465GS01_M3,     /* U1, U1HD */
  70         }, {
  71                 .name = "ams465gs01-sm2",
  72                 .type = TYPE_AMS465GS01_SM2,    /* U1HD_5INCH, M0_PROXIMA */
  73         }, {
  74                 .name = "ams465gs02",
  75                 .type = TYPE_AMS465GS02,        /* MIDAS */
  76         }, {
  77                 .name = "ams480gyxx-sm2",
  78                 .type = TYPE_AMS480GYXX_SM2,    /* M0_REAL_PROXIMA */
  79         }, {
  80                 .name = "ams529ha01",
  81                 .type = TYPE_AMS529HA01,        /* Q1 */
  82         }, {
  83                 .name = "ams767kc01",
  84                 .type = TYPE_AMS767KC01,        /* P8 */
  85         }, { },
  86 };
  87
  88 const enum panel_type s6e8ax0_get_device_type(const struct mipi_dsim_lcd_device *lcd_dev)
  89 {
  90         struct s6e8ax0_device_id *id = s6e8ax0_ids;
  91
  92         while (id->name[0]) {
  93                 if (!strcmp(lcd_dev->panel_id, id->name))
  94                         return id->type;
  95                 id++;
  96         }
  97         return -1;
  98 }
  99
 100 static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
 101 {
 102         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 103         int reverse = dsim_dev->dsim_lcd_dev->reverse;
 104
 105         const unsigned char data_to_send_ams465gs01[] = {
 106                 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
 107                 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
 108                 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
 109                 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
 110                 0xff, 0xff, 0xc8
 111         };
 112
 113         /* U1HD_5INCH - scan direction is reversed
 114            against U1, U1HD, PROXIMA */
 115         const unsigned char data_to_send_reverse_ams465gs01[] = {
 116                 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
 117                 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
 118                 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
 119                 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
 120                 0xf6, 0xf6, 0xc1
 121         };
 122
 123         const unsigned char data_to_send_ams465gs02[] = {
 124                 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
 125                 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
 126                 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
 127                 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
 128                 0xf6, 0xf6, 0xc1
 129         };
 130
 131         const unsigned char data_to_send_ams480gyxx[] = {
 132                 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
 133                 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
 134                 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
 135                 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
 136                 0xf6, 0xf6, 0xc1
 137         };
 138
 139         const unsigned char data_to_send_ams529ha01[] = {
 140                 0xf8, 0x25, 0x34, 0x00, 0x00, 0x00, 0x95, 0x00, 0x3c,
 141                 0x7d, 0x08, 0x27, 0x00, 0x00, 0x10, 0x00, 0x00, 0x20,
 142                 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
 143                 0x23, 0x63, 0xc0, 0xc1, 0x01, 0x81, 0xc1, 0x00, 0xc8,
 144                 0xc1, 0xd3, 0x01
 145         };
 146
 147         const unsigned char data_to_send_ams767kc01[] = {
 148                 0xf8, 0x01, 0x8e, 0x00, 0x00, 0x00, 0xac, 0x00, 0x9e,
 149                 0x8d, 0x1f, 0x4e, 0x9c, 0x7d, 0x3f, 0x10, 0x00, 0x20,
 150                 0x02, 0x10, 0x7d, 0x10, 0x00, 0x00, 0x02, 0x08, 0x10,
 151                 0x34, 0x34, 0x34, 0xc0, 0xc1, 0x01, 0x00, 0xc1, 0x82,
 152                 0x00, 0xc8, 0xc1, 0xe3, 0x01
 153         };
 154
 155         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 156         case TYPE_AMS465GS02:
 157                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 158                         (unsigned int)data_to_send_ams465gs02,
 159                         ARRAY_SIZE(data_to_send_ams465gs02));
 160                 break;
 161         case TYPE_AMS529HA01:
 162                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 163                         (unsigned int)data_to_send_ams529ha01,
 164                         ARRAY_SIZE(data_to_send_ams529ha01));
 165                 break;
 166         case TYPE_AMS767KC01:
 167                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 168                         (unsigned int)data_to_send_ams767kc01,
 169                         ARRAY_SIZE(data_to_send_ams767kc01));
 170                 break;
 171         case TYPE_AMS480GYXX_SM2:
 172                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 173                         (unsigned int)data_to_send_ams480gyxx,
 174                         ARRAY_SIZE(data_to_send_ams767kc01));
 175                 break;
 176         case TYPE_AMS465GS01_M3:
 177         case TYPE_AMS465GS01_SM2:
 178         default:
 179                 if (reverse)
 180                         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 181                                 (unsigned int)data_to_send_reverse_ams465gs01,
 182                                 ARRAY_SIZE(data_to_send_reverse_ams465gs01));
 183                 else
 184                         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 185                                 (unsigned int)data_to_send_ams465gs01,
 186                                 ARRAY_SIZE(data_to_send_ams465gs01));
 187                 break;
 188         }
 189 }
 190
 191 static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
 192 {
 193         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 194
 195         const unsigned char data_to_send_default[] = {
 196                 0xf2, 0x80, 0x03, 0x0d
 197         };
 198         const unsigned char data_to_send_ams767kc01[] = {
 199                 0xf2, 0xc8, 0x05, 0x0d
 200         };
 201
 202         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 203         case TYPE_AMS767KC01:
 204                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 205                         (unsigned int)data_to_send_ams767kc01,
 206                         ARRAY_SIZE(data_to_send_ams767kc01));
 207                 break;
 208         case TYPE_AMS465GS01_M3:
 209         case TYPE_AMS465GS01_SM2:
 210         case TYPE_AMS465GS02:
 211         case TYPE_AMS480GYXX_SM2:
 212         case TYPE_AMS529HA01:
 213         default:
 214                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 215                         (unsigned int)data_to_send_default,
 216                         ARRAY_SIZE(data_to_send_default));
 217         }
 218 }
 219
 220 static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
 221 {
 222         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 223
 224         /* 7500K 2.2 Set (M3, 300cd) */
 225         const unsigned char data_to_send_default[] = {
 226                 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8,
 227                 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf,
 228                 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1
 229         };
 230
 231         /* 7500K 2.2 Set (SM2, 300cd) */
 232         const unsigned char data_to_send_ams465gs01_sm2[] = {
 233                 0xfa, 0x01, 0x58, 0x1f, 0x63, 0xac, 0xb4, 0x99, 0xad,
 234                 0xba, 0xa3, 0xc0, 0xc8, 0xbb, 0x93, 0x9f, 0x8b, 0xad,
 235                 0xb4, 0xa7, 0x00, 0xbe, 0x00, 0xab, 0x00, 0xe7
 236         };
 237
 238         const unsigned char data_to_send_ams767kc01[] = {
 239                 0xfa, 0x36, 0x10, 0x48, 0xb8, 0xaa, 0xa9, 0xb8, 0xc3,
 240                 0xb7, 0xc6, 0xd2, 0xc1, 0x9a, 0xaa, 0x91, 0xb5, 0xc0,
 241                 0xab, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0xc9
 242         };
 243
 244         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 245         case TYPE_AMS465GS01_SM2:
 246         case TYPE_AMS480GYXX_SM2:
 247                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 248                         (unsigned int)data_to_send_ams465gs01_sm2,
 249                         ARRAY_SIZE(data_to_send_ams465gs01_sm2));
 250                 break;
 251         case TYPE_AMS767KC01:
 252                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 253                         (unsigned int)data_to_send_ams767kc01,
 254                         ARRAY_SIZE(data_to_send_ams767kc01));
 255                 break;
 256         case TYPE_AMS465GS01_M3:
 257         case TYPE_AMS465GS02:
 258         case TYPE_AMS529HA01:
 259         default:
 260                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 261                         (unsigned int)data_to_send_default,
 262                         ARRAY_SIZE(data_to_send_default));
 263         }
 264 }
 265
 266 static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
 267 {
 268         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 269         unsigned char param;
 270
 271         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 272         case TYPE_AMS767KC01:
 273                 param = 0x02;
 274                 break;
 275         case TYPE_AMS465GS01_M3:
 276         case TYPE_AMS465GS01_SM2:
 277         case TYPE_AMS465GS02:
 278         case TYPE_AMS480GYXX_SM2:
 279         case TYPE_AMS529HA01:
 280         default:
 281                 param = 0x03;
 282         }
 283
 284         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xf7, param);
 285 }
 286
 287 static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
 288 {
 289         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 290
 291         const unsigned char data_to_send_default[] = {
 292                 0xf6, 0x00, 0x02, 0x00
 293         };
 294
 295         const unsigned char data_to_send_ams767kc01[] = {
 296                 0xd1, 0xfe, 0x80, 0x00, 0x01, 0x0b, 0x00, 0x00, 0x40,
 297                 0x0d, 0x00, 0x00
 298         };
 299
 300         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 301         case TYPE_AMS767KC01:
 302                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 303                         (unsigned int)data_to_send_ams767kc01,
 304                         ARRAY_SIZE(data_to_send_ams767kc01));
 305                 break;
 306         case TYPE_AMS465GS01_M3:
 307         case TYPE_AMS465GS01_SM2:
 308         case TYPE_AMS465GS02:
 309         case TYPE_AMS480GYXX_SM2:
 310         case TYPE_AMS529HA01:
 311         default:
 312                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 313                         (unsigned int)data_to_send_default,
 314                         ARRAY_SIZE(data_to_send_default));
 315         }
 316 }
 317
 318 static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
 319 {
 320         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 321
 322         const unsigned char data_to_send_default[] = {
 323                 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
 324                 0x00
 325         };
 326
 327         const unsigned char data_to_send_ams767kc01[] = {
 328                 0xd9, 0x14, 0x5c, 0x20, 0x0c, 0x0f, 0x41, 0x00, 0x10,
 329                 0x11, 0x12, 0xa8, 0xd1, 0x00, 0x00, 0x00, 0x00, 0x80,
 330                 0xcb, 0xed, 0x64, 0xaf
 331         };
 332
 333         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 334         case TYPE_AMS767KC01:
 335                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 336                         (unsigned int)data_to_send_ams767kc01,
 337                         ARRAY_SIZE(data_to_send_ams767kc01));
 338                 break;
 339         case TYPE_AMS465GS01_M3:
 340         case TYPE_AMS465GS01_SM2:
 341         case TYPE_AMS465GS02:
 342         case TYPE_AMS480GYXX_SM2:
 343         case TYPE_AMS529HA01:
 344         default:
 345                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 346                         (unsigned int)data_to_send_default,
 347                         ARRAY_SIZE(data_to_send_default));
 348         }
 349 }
 350
 351 static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
 352 {
 353         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 354
 355         const unsigned char data_to_send_default[] = {
 356                 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
 357         };
 358
 359         const unsigned char data_to_send_ams767kc01[] = {
 360                 0xf4, 0x0b, 0x0a, 0x06, 0x0b, 0x33, 0x02
 361         };
 362
 363         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 364         case TYPE_AMS767KC01:
 365                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 366                         (unsigned int)data_to_send_ams767kc01,
 367                         ARRAY_SIZE(data_to_send_ams767kc01));
 368                 break;
 369         case TYPE_AMS465GS01_M3:
 370         case TYPE_AMS465GS01_SM2:
 371         case TYPE_AMS465GS02:
 372         case TYPE_AMS480GYXX_SM2:
 373         case TYPE_AMS529HA01:
 374         default:
 375                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 376                         (unsigned int)data_to_send_default,
 377                         ARRAY_SIZE(data_to_send_default));
 378         }
 379 }
 380
 381 static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
 382 {
 383         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 384         const unsigned char data_to_send_default[] = {
 385                 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
 386         };
 387
 388         const unsigned char data_to_send_ams767kc01[] = {
 389                 0xf6, 0x04, 0x00, 0x02
 390         };
 391
 392         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 393         case TYPE_AMS767KC01:
 394                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 395                         (unsigned int)data_to_send_ams767kc01,
 396                         ARRAY_SIZE(data_to_send_ams767kc01));
 397                 break;
 398         case TYPE_AMS465GS01_M3:
 399         case TYPE_AMS465GS01_SM2:
 400         case TYPE_AMS465GS02:
 401         case TYPE_AMS480GYXX_SM2:
 402         case TYPE_AMS529HA01:
 403         default:
 404                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 405                         (unsigned int)data_to_send_default,
 406                         ARRAY_SIZE(data_to_send_default));
 407         }
 408 }
 409
 410 static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
 411 {
 412         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 413         const unsigned char data_to_send[] = {
 414                 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
 415         };
 416
 417         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 418                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 419 }
 420 static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
 421 {
 422         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 423         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xe3, 0x40);
 424 }
 425
 426 static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
 427 {
 428         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 429         const unsigned char data_to_send[] = {
 430                 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
 431         };
 432
 433         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 434                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 435 }
 436
 437 static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
 438 {
 439         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 440
 441         const unsigned char data_to_send_default[] = {
 442                 0xb1, 0x04, 0x00
 443         };
 444
 445         const unsigned char data_to_send_ams767kc01_1[] = {
 446                 0xb2, 0x04, 0x04, 0x04, 0x04, 0x04
 447         };
 448
 449         const unsigned char data_to_send_ams767kc01_2[] = {
 450                 0xb1, 0x42, 0x00
 451         };
 452
 453
 454         switch (dsim_dev->dsim_lcd_dev->panel_type) {
 455         case TYPE_AMS767KC01:
 456                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 457                         (unsigned int)data_to_send_ams767kc01_1,
 458                         ARRAY_SIZE(data_to_send_ams767kc01_1));
 459                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 460                         (unsigned int)data_to_send_ams767kc01_2,
 461                         ARRAY_SIZE(data_to_send_ams767kc01_2));
 462                 break;
 463         case TYPE_AMS465GS01_M3:
 464         case TYPE_AMS465GS01_SM2:
 465         case TYPE_AMS465GS02:
 466         case TYPE_AMS480GYXX_SM2:
 467         case TYPE_AMS529HA01:
 468         default:
 469                 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 470                         (unsigned int)data_to_send_default,
 471                         ARRAY_SIZE(data_to_send_default));
 472         }
 473 }
 474
 475 static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
 476 {
 477         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 478         ops->cmd_write(dsim_dev,
 479                 MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
 480 }
 481
 482 static void s6e8ax0_sleep_in(struct mipi_dsim_device *dsim_dev)
 483 {
 484         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 485         ops->cmd_write(dsim_dev,
 486                 MIPI_DSI_DCS_SHORT_WRITE, 0x10, 0x00);
 487 }
 488
 489 static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
 490 {
 491         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 492         ops->cmd_write(dsim_dev,
 493                 MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
 494 }
 495
 496 static void s6e8ax0_display_off(struct mipi_dsim_device *dsim_dev)
 497 {
 498         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 499         ops->cmd_write(dsim_dev,
 500                 MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00);
 501 }
 502
 503 static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
 504 {
 505         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 506         const unsigned char data_to_send[] = {
 507                 0xf0, 0x5a, 0x5a
 508         };
 509
 510         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 511                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 512 }
 513
 514 static void s6e8ax0_apply_level2_key(struct mipi_dsim_device *dsim_dev)
 515 {
 516         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 517         const unsigned char data_to_send[] = {
 518                 0xfc, 0x5a, 0x5a
 519         };
 520
 521         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 522                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 523 }
 524
 525 static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
 526 {
 527         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 528         const unsigned char data_to_send[] = {
 529                 0xf1, 0x5a, 0x5a
 530         };
 531
 532         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 533                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 534 }
 535
 536 /* Full white 50% reducing setting */
 537 static void s6e8ax0_acl_ctrl_set(struct mipi_dsim_device *dsim_dev)
 538 {
 539         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 540         const unsigned char data_to_send[] = {
 541                 0xc1, 0x47, 0x53, 0x13, 0x53, 0x00, 0x00, 0x03, 0x1f,
 542                 0x00, 0x00, 0x04, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00,
 543                 0x00, 0x01, 0x0f, 0x16, 0x1d, 0x24, 0x2a, 0x31, 0x38,
 544                 0x3f, 0x46
 545         };
 546
 547         ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
 548                 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
 549 }
 550
 551 static void s6e8ax0_acl_on(struct mipi_dsim_device *dsim_dev)
 552 {
 553         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 554         ops->cmd_write(dsim_dev,
 555                 MIPI_DSI_DCS_SHORT_WRITE, 0xc0, 0x01);
 556 }
 557
 558 static void s6e8ax0_acl_off(struct mipi_dsim_device *dsim_dev)
 559 {
 560         struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
 561         ops->cmd_write(dsim_dev,
 562                 MIPI_DSI_DCS_SHORT_WRITE, 0xc0, 0x00);
 563 }
 564
 565 static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
 566 {
 567         enum panel_type panel = dsim_dev->dsim_lcd_dev->panel_type;
 568
 569         /*
 570          * in case of setting gamma and panel condition at first,
 571          * it shuold be setting like below.
 572          * set_gamma() -> set_panel_condition()
 573          */
 574
 575         s6e8ax0_apply_level1_key(dsim_dev);
 576         if (panel == TYPE_AMS529HA01)
 577                 s6e8ax0_apply_level2_key(dsim_dev);
 578         else
 579                 s6e8ax0_apply_mtp_key(dsim_dev);
 580
 581         s6e8ax0_sleep_out(dsim_dev);
 582         udelay(5 * 1000);
 583         s6e8ax0_panel_cond(dsim_dev);
 584         s6e8ax0_display_cond(dsim_dev);
 585         s6e8ax0_gamma_cond(dsim_dev);
 586         s6e8ax0_gamma_update(dsim_dev);
 587
 588         s6e8ax0_etc_source_control(dsim_dev);
 589         s6e8ax0_elvss_set(dsim_dev);
 590         s6e8ax0_etc_pentile_control(dsim_dev);
 591         s6e8ax0_etc_mipi_control1(dsim_dev);
 592         s6e8ax0_etc_mipi_control2(dsim_dev);
 593         if (panel != TYPE_AMS767KC01) {
 594                 s6e8ax0_etc_power_control(dsim_dev);
 595                 s6e8ax0_etc_mipi_control3(dsim_dev);
 596                 s6e8ax0_etc_mipi_control4(dsim_dev);
 597         }
 598 }
 599
 600 static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
 601 {
 602         struct mipi_dsim_lcd_device *dsim_lcd_dev = dsim_dev->dsim_lcd_dev;
 603         dsim_lcd_dev->panel_type = s6e8ax0_get_device_type(dsim_lcd_dev);
 604         if (dsim_lcd_dev->panel_type == -1)
 605                 printf("error: can't found panel type on s6e8ax0\n");
 606
 607         s6e8ax0_panel_init(dsim_dev);
 608         return 0;
 609 }
 610
 611 static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
 612 {
 613         s6e8ax0_display_on(dsim_dev);
 614 }
 615
 616 static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
 617         .name = "s6e8ax0",
 618         .id = -1,
 619
 620         .mipi_panel_init = s6e8ax0_panel_set,
 621         .mipi_display_on = s6e8ax0_display_enable,
 622 };
 623
 624 void s6e8ax0_init(void)
 625 {
 626         s5p_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);
 627 }