2 * drivers/video/pvr2fb.c
4 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
7 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
8 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
10 * This driver is mostly based on the excellent amifb and vfb sources. It uses
11 * an odd scheme for converting hardware values to/from framebuffer values,
12 * here are some hacked-up formulas:
14 * The Dreamcast has screen offsets from each side of its four borders and
15 * the start offsets of the display window. I used these values to calculate
16 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
17 * that when it came time to convert these values back into their hardware
18 * values, I could just add mode- specific offsets to get the correct mode
21 * left_margin = diwstart_h - borderstart_h;
22 * right_margin = borderstop_h - (diwstart_h + xres);
23 * upper_margin = diwstart_v - borderstart_v;
24 * lower_margin = borderstop_v - (diwstart_h + yres);
26 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
27 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
29 * Then, when it's time to convert back to hardware settings, the only
30 * constants are the borderstart_* offsets, all other values are derived from
34 * borderstart_h = 116;
37 * borderstop_h = borderstart_h + hsync_total - hsync_len;
39 * diwstart_v = borderstart_v - upper_margin;
41 * However, in the current implementation, the borderstart values haven't had
42 * the benefit of being fully researched, so some modes may be broken.
47 #include <linux/module.h>
48 #include <linux/kernel.h>
49 #include <linux/errno.h>
50 #include <linux/string.h>
52 #include <linux/slab.h>
53 #include <linux/delay.h>
54 #include <linux/interrupt.h>
56 #include <linux/init.h>
57 #include <linux/pci.h>
59 #ifdef CONFIG_SH_DREAMCAST
60 #include <asm/machvec.h>
61 #include <mach-dreamcast/mach/sysasic.h>
64 #ifdef CONFIG_PVR2_DMA
65 #include <linux/pagemap.h>
70 #ifdef CONFIG_SH_STORE_QUEUES
71 #include <linux/uaccess.h>
75 #ifndef PCI_DEVICE_ID_NEC_NEON250
76 # define PCI_DEVICE_ID_NEC_NEON250 0x0067
79 /* 2D video registers */
80 #define DISP_BASE par->mmio_base
81 #define DISP_BRDRCOLR (DISP_BASE + 0x40)
82 #define DISP_DIWMODE (DISP_BASE + 0x44)
83 #define DISP_DIWADDRL (DISP_BASE + 0x50)
84 #define DISP_DIWADDRS (DISP_BASE + 0x54)
85 #define DISP_DIWSIZE (DISP_BASE + 0x5c)
86 #define DISP_SYNCCONF (DISP_BASE + 0xd0)
87 #define DISP_BRDRHORZ (DISP_BASE + 0xd4)
88 #define DISP_SYNCSIZE (DISP_BASE + 0xd8)
89 #define DISP_BRDRVERT (DISP_BASE + 0xdc)
90 #define DISP_DIWCONF (DISP_BASE + 0xe8)
91 #define DISP_DIWHSTRT (DISP_BASE + 0xec)
92 #define DISP_DIWVSTRT (DISP_BASE + 0xf0)
93 #define DISP_PIXDEPTH (DISP_BASE + 0x108)
95 /* Pixel clocks, one for TV output, doubled for VGA output */
99 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
100 #define PAL_HTOTAL 863
101 #define PAL_VTOTAL 312
102 #define NTSC_HTOTAL 857
103 #define NTSC_VTOTAL 262
105 /* Supported cable types */
106 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
108 /* Supported video output types */
109 enum { VO_PAL, VO_NTSC, VO_VGA };
111 /* Supported palette types */
112 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
114 struct pvr2_params { unsigned int val; char *name; };
115 static struct pvr2_params cables[] = {
116 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
119 static struct pvr2_params outputs[] = {
120 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
124 * This describes the current video mode
127 static struct pvr2fb_par {
128 unsigned int hsync_total; /* Clocks/line */
129 unsigned int vsync_total; /* Lines/field */
130 unsigned int borderstart_h;
131 unsigned int borderstop_h;
132 unsigned int borderstart_v;
133 unsigned int borderstop_v;
134 unsigned int diwstart_h; /* Horizontal offset of the display field */
135 unsigned int diwstart_v; /* Vertical offset of the display field, for
136 interlaced modes, this is the long field */
137 unsigned long disp_start; /* Address of image within VRAM */
138 unsigned char is_interlaced; /* Is the display interlaced? */
139 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
140 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
142 unsigned long mmio_base; /* MMIO base */
146 static struct fb_info *fb_info;
148 static struct fb_fix_screeninfo pvr2_fix = {
149 .id = "NEC PowerVR2",
150 .type = FB_TYPE_PACKED_PIXELS,
151 .visual = FB_VISUAL_TRUECOLOR,
154 .accel = FB_ACCEL_NONE,
157 static struct fb_var_screeninfo pvr2_var = {
164 .green = { 5, 6, 0 },
166 .activate = FB_ACTIVATE_NOW,
169 .vmode = FB_VMODE_NONINTERLACED,
172 static int cable_type = CT_VGA;
173 static int video_output = VO_VGA;
175 static int nopan = 0;
176 static int nowrap = 1;
179 * We do all updating, blanking, etc. during the vertical retrace period
181 static unsigned int do_vmode_full = 0; /* Change the video mode */
182 static unsigned int do_vmode_pan = 0; /* Update the video mode */
183 static short do_blank = 0; /* (Un)Blank the screen */
185 static unsigned int is_blanked = 0; /* Is the screen blanked? */
187 #ifdef CONFIG_SH_STORE_QUEUES
188 static unsigned long pvr2fb_map;
191 #ifdef CONFIG_PVR2_DMA
192 static unsigned int shdma = PVR2_CASCADE_CHAN;
193 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
196 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue,
197 unsigned int transp, struct fb_info *info);
198 static int pvr2fb_blank(int blank, struct fb_info *info);
199 static unsigned long get_line_length(int xres_virtual, int bpp);
200 static void set_color_bitfields(struct fb_var_screeninfo *var);
201 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
202 static int pvr2fb_set_par(struct fb_info *info);
203 static void pvr2_update_display(struct fb_info *info);
204 static void pvr2_init_display(struct fb_info *info);
205 static void pvr2_do_blank(void);
206 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id);
207 static int pvr2_init_cable(void);
208 static int pvr2_get_param(const struct pvr2_params *p, const char *s,
210 #ifdef CONFIG_PVR2_DMA
211 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
212 size_t count, loff_t *ppos);
215 static struct fb_ops pvr2fb_ops = {
216 .owner = THIS_MODULE,
217 .fb_setcolreg = pvr2fb_setcolreg,
218 .fb_blank = pvr2fb_blank,
219 .fb_check_var = pvr2fb_check_var,
220 .fb_set_par = pvr2fb_set_par,
221 #ifdef CONFIG_PVR2_DMA
222 .fb_write = pvr2fb_write,
224 .fb_fillrect = cfb_fillrect,
225 .fb_copyarea = cfb_copyarea,
226 .fb_imageblit = cfb_imageblit,
229 static struct fb_videomode pvr2_modedb[] = {
231 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
232 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
233 * NTSC, so it shouldn't be a problem (I hope).
237 /* 640x480 @ 60Hz interlaced (NTSC) */
238 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
239 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
241 /* 640x240 @ 60Hz (NTSC) */
242 /* XXX: Broken! Don't use... */
243 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
244 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
246 /* 640x480 @ 60hz (VGA) */
247 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
252 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
254 #define DEFMODE_NTSC 0
255 #define DEFMODE_PAL 0
256 #define DEFMODE_VGA 2
258 static int defmode = DEFMODE_NTSC;
259 static char *mode_option = NULL;
261 static inline void pvr2fb_set_pal_type(unsigned int type)
263 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
265 fb_writel(type, par->mmio_base + 0x108);
268 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
272 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
275 static int pvr2fb_blank(int blank, struct fb_info *info)
277 do_blank = blank ? blank : -1;
281 static inline unsigned long get_line_length(int xres_virtual, int bpp)
283 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
286 static void set_color_bitfields(struct fb_var_screeninfo *var)
288 switch (var->bits_per_pixel) {
289 case 16: /* RGB 565 */
290 pvr2fb_set_pal_type(PAL_RGB565);
291 var->red.offset = 11; var->red.length = 5;
292 var->green.offset = 5; var->green.length = 6;
293 var->blue.offset = 0; var->blue.length = 5;
294 var->transp.offset = 0; var->transp.length = 0;
296 case 24: /* RGB 888 */
297 var->red.offset = 16; var->red.length = 8;
298 var->green.offset = 8; var->green.length = 8;
299 var->blue.offset = 0; var->blue.length = 8;
300 var->transp.offset = 0; var->transp.length = 0;
302 case 32: /* ARGB 8888 */
303 pvr2fb_set_pal_type(PAL_ARGB8888);
304 var->red.offset = 16; var->red.length = 8;
305 var->green.offset = 8; var->green.length = 8;
306 var->blue.offset = 0; var->blue.length = 8;
307 var->transp.offset = 24; var->transp.length = 8;
312 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
313 unsigned int green, unsigned int blue,
314 unsigned int transp, struct fb_info *info)
316 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
319 if (regno > info->cmap.len)
323 * We only support the hardware palette for 16 and 32bpp. It's also
324 * expected that the palette format has been set by the time we get
325 * here, so we don't waste time setting it again.
327 switch (info->var.bits_per_pixel) {
328 case 16: /* RGB 565 */
329 tmp = (red & 0xf800) |
330 ((green & 0xfc00) >> 5) |
331 ((blue & 0xf800) >> 11);
333 pvr2fb_set_pal_entry(par, regno, tmp);
335 case 24: /* RGB 888 */
336 red >>= 8; green >>= 8; blue >>= 8;
337 tmp = (red << 16) | (green << 8) | blue;
339 case 32: /* ARGB 8888 */
340 red >>= 8; green >>= 8; blue >>= 8;
341 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
343 pvr2fb_set_pal_entry(par, regno, tmp);
346 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
351 ((u32*)(info->pseudo_palette))[regno] = tmp;
356 static int pvr2fb_set_par(struct fb_info *info)
358 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
359 struct fb_var_screeninfo *var = &info->var;
360 unsigned long line_length;
364 * XXX: It's possible that a user could use a VGA box, change the cable
365 * type in hardware (i.e. switch from VGA<->composite), then change
366 * modes (i.e. switching to another VT). If that happens we should
367 * automagically change the output format to cope, but currently I
368 * don't have a VGA box to make sure this works properly.
370 cable_type = pvr2_init_cable();
371 if (cable_type == CT_VGA && video_output != VO_VGA)
372 video_output = VO_VGA;
374 var->vmode &= FB_VMODE_MASK;
375 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
376 par->is_interlaced = 1;
378 * XXX: Need to be more creative with this (i.e. allow doublecan for
381 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
382 par->is_doublescan = 1;
384 par->hsync_total = var->left_margin + var->xres + var->right_margin +
386 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
389 if (var->sync & FB_SYNC_BROADCAST) {
390 vtotal = par->vsync_total;
391 if (par->is_interlaced)
393 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
394 /* XXX: Check for start values here... */
395 /* XXX: Check hardware for PAL-compatibility */
396 par->borderstart_h = 116;
397 par->borderstart_v = 44;
399 /* NTSC video output */
400 par->borderstart_h = 126;
401 par->borderstart_v = 18;
405 /* XXX: What else needs to be checked? */
407 * XXX: We have a little freedom in VGA modes, what ranges
408 * should be here (i.e. hsync/vsync totals, etc.)?
410 par->borderstart_h = 126;
411 par->borderstart_v = 40;
414 /* Calculate the remainding offsets */
415 par->diwstart_h = par->borderstart_h + var->left_margin;
416 par->diwstart_v = par->borderstart_v + var->upper_margin;
417 par->borderstop_h = par->diwstart_h + var->xres +
419 par->borderstop_v = par->diwstart_v + var->yres +
422 if (!par->is_interlaced)
423 par->borderstop_v /= 2;
424 if (info->var.xres < 640)
427 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
428 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
429 info->fix.line_length = line_length;
433 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
435 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
436 unsigned int vtotal, hsync_total;
437 unsigned long line_length;
439 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
440 pr_debug("Invalid pixclock value %d\n", var->pixclock);
448 if (var->xres_virtual < var->xres)
449 var->xres_virtual = var->xres;
450 if (var->yres_virtual < var->yres)
451 var->yres_virtual = var->yres;
453 if (var->bits_per_pixel <= 16)
454 var->bits_per_pixel = 16;
455 else if (var->bits_per_pixel <= 24)
456 var->bits_per_pixel = 24;
457 else if (var->bits_per_pixel <= 32)
458 var->bits_per_pixel = 32;
460 set_color_bitfields(var);
462 if (var->vmode & FB_VMODE_YWRAP) {
463 if (var->xoffset || var->yoffset < 0 ||
464 var->yoffset >= var->yres_virtual) {
465 var->xoffset = var->yoffset = 0;
467 if (var->xoffset > var->xres_virtual - var->xres ||
468 var->yoffset > var->yres_virtual - var->yres ||
469 var->xoffset < 0 || var->yoffset < 0)
470 var->xoffset = var->yoffset = 0;
473 var->xoffset = var->yoffset = 0;
477 * XXX: Need to be more creative with this (i.e. allow doublecan for
480 if (var->yres < 480 && video_output == VO_VGA)
481 var->vmode |= FB_VMODE_DOUBLE;
483 if (video_output != VO_VGA) {
484 var->sync |= FB_SYNC_BROADCAST;
485 var->vmode |= FB_VMODE_INTERLACED;
487 var->sync &= ~FB_SYNC_BROADCAST;
488 var->vmode &= ~FB_VMODE_INTERLACED;
489 var->vmode |= FB_VMODE_NONINTERLACED;
492 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
493 var->right_margin = par->borderstop_h -
494 (par->diwstart_h + var->xres);
495 var->left_margin = par->diwstart_h - par->borderstart_h;
496 var->hsync_len = par->borderstart_h +
497 (par->hsync_total - par->borderstop_h);
499 var->upper_margin = par->diwstart_v - par->borderstart_v;
500 var->lower_margin = par->borderstop_v -
501 (par->diwstart_v + var->yres);
502 var->vsync_len = par->borderstop_v +
503 (par->vsync_total - par->borderstop_v);
506 hsync_total = var->left_margin + var->xres + var->right_margin +
508 vtotal = var->upper_margin + var->yres + var->lower_margin +
511 if (var->sync & FB_SYNC_BROADCAST) {
512 if (var->vmode & FB_VMODE_INTERLACED)
514 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
515 /* PAL video output */
516 /* XXX: Should be using a range here ... ? */
517 if (hsync_total != PAL_HTOTAL) {
518 pr_debug("invalid hsync total for PAL\n");
522 /* NTSC video output */
523 if (hsync_total != NTSC_HTOTAL) {
524 pr_debug("invalid hsync total for NTSC\n");
530 /* Check memory sizes */
531 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
532 if (line_length * var->yres_virtual > info->fix.smem_len)
538 static void pvr2_update_display(struct fb_info *info)
540 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
541 struct fb_var_screeninfo *var = &info->var;
543 /* Update the start address of the display image */
544 fb_writel(par->disp_start, DISP_DIWADDRL);
545 fb_writel(par->disp_start +
546 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
551 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
552 * very stable. It's probably due to the fact that a lot of the 2D video
553 * registers are still undocumented.
556 static void pvr2_init_display(struct fb_info *info)
558 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
559 struct fb_var_screeninfo *var = &info->var;
560 unsigned int diw_height, diw_width, diw_modulo = 1;
561 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
563 /* hsync and vsync totals */
564 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
566 /* column height, modulo, row width */
567 /* since we're "panning" within vram, we need to offset things based
568 * on the offset from the virtual x start to our real gfx. */
569 if (video_output != VO_VGA && par->is_interlaced)
570 diw_modulo += info->fix.line_length / 4;
571 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
572 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
573 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
576 /* display address, long and short fields */
577 fb_writel(par->disp_start, DISP_DIWADDRL);
578 fb_writel(par->disp_start +
579 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
582 /* border horizontal, border vertical, border color */
583 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
584 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
585 fb_writel(0, DISP_BRDRCOLR);
587 /* display window start position */
588 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
589 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
592 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
594 /* clock doubler (for VGA), scan doubler, display enable */
595 fb_writel(((video_output == VO_VGA) << 23) |
596 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
599 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
600 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH);
602 /* video enable, color sync, interlace,
603 * hsync and vsync polarity (currently unused) */
604 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
607 /* Simulate blanking by making the border cover the entire screen */
609 #define BLANK_BIT (1<<3)
611 static void pvr2_do_blank(void)
613 struct pvr2fb_par *par = currentpar;
614 unsigned long diwconf;
616 diwconf = fb_readl(DISP_DIWCONF);
618 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
620 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
622 is_blanked = do_blank > 0 ? do_blank : 0;
625 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id)
627 struct fb_info *info = dev_id;
629 if (do_vmode_pan || do_vmode_full)
630 pvr2_update_display(info);
632 pvr2_init_display(info);
645 * Determine the cable type and initialize the cable output format. Don't do
646 * anything if the cable type has been overidden (via "cable:XX").
649 #define PCTRA 0xff80002c
650 #define PDTRA 0xff800030
651 #define VOUTC 0xa0702c00
653 static int pvr2_init_cable(void)
655 if (cable_type < 0) {
656 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
658 cable_type = (fb_readw(PDTRA) >> 8) & 3;
661 /* Now select the output format (either composite or other) */
662 /* XXX: Save the previous val first, as this reg is also AICA
664 if (cable_type == CT_COMPOSITE)
665 fb_writel(3 << 8, VOUTC);
666 else if (cable_type == CT_RGB)
667 fb_writel(1 << 9, VOUTC);
674 #ifdef CONFIG_PVR2_DMA
675 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
676 size_t count, loff_t *ppos)
678 unsigned long dst, start, end, len;
679 unsigned int nr_pages;
683 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
685 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
689 down_read(¤t->mm->mmap_sem);
690 ret = get_user_pages(current, current->mm, (unsigned long)buf,
691 nr_pages, WRITE, 0, pages, NULL);
692 up_read(¤t->mm->mmap_sem);
694 if (ret < nr_pages) {
700 dma_configure_channel(shdma, 0x12c1);
702 dst = (unsigned long)fb_info->screen_base + *ppos;
703 start = (unsigned long)page_address(pages[0]);
704 end = (unsigned long)page_address(pages[nr_pages]);
705 len = nr_pages << PAGE_SHIFT;
707 /* Half-assed contig check */
708 if (start + len == end) {
709 /* As we do this in one shot, it's either all or nothing.. */
710 if ((*ppos + len) > fb_info->fix.smem_len) {
715 dma_write(shdma, start, 0, len);
716 dma_write(pvr2dma, 0, dst, len);
717 dma_wait_for_completion(pvr2dma);
722 /* Not contiguous, writeout per-page instead.. */
723 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
724 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
729 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
730 dma_write_page(pvr2dma, 0, dst);
731 dma_wait_for_completion(pvr2dma);
739 for (i = 0; i < nr_pages; i++)
740 page_cache_release(pages[i]);
746 #endif /* CONFIG_PVR2_DMA */
751 * Common init code for the PVR2 chips.
753 * This mostly takes care of the common aspects of the fb setup and
754 * registration. It's expected that the board-specific init code has
755 * already setup pvr2_fix with something meaningful at this point.
757 * Device info reporting is also done here, as well as picking a sane
758 * default from the modedb. For board-specific modelines, simply define
759 * a per-board modedb.
761 * Also worth noting is that the cable and video output types are likely
762 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
763 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
764 * PCI-based version of these things ;-)
766 static int pvr2fb_common_init(void)
768 struct pvr2fb_par *par = currentpar;
769 unsigned long modememused, rev;
771 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
774 if (!fb_info->screen_base) {
775 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
779 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
781 if (!par->mmio_base) {
782 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
786 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
788 pvr2_fix.ypanstep = nopan ? 0 : 1;
789 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
791 fb_info->fbops = &pvr2fb_ops;
792 fb_info->fix = pvr2_fix;
793 fb_info->par = currentpar;
794 fb_info->pseudo_palette = currentpar->palette;
795 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
797 if (video_output == VO_VGA)
798 defmode = DEFMODE_VGA;
801 mode_option = "640x480@60";
803 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
804 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
805 fb_info->var = pvr2_var;
807 fb_alloc_cmap(&fb_info->cmap, 256, 0);
809 if (register_framebuffer(fb_info) < 0)
811 /*Must write PIXDEPTH to register before anything is displayed - so force init */
812 pvr2_init_display(fb_info);
814 modememused = get_line_length(fb_info->var.xres_virtual,
815 fb_info->var.bits_per_pixel);
816 modememused *= fb_info->var.yres_virtual;
818 rev = fb_readl(par->mmio_base + 0x04);
820 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
821 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
822 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
823 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
824 fb_info->node, fb_info->var.xres, fb_info->var.yres,
825 fb_info->var.bits_per_pixel,
826 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
827 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
828 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
830 #ifdef CONFIG_SH_STORE_QUEUES
831 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
833 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
834 fb_info->fix.id, PAGE_SHARED);
836 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
837 fb_info->node, pvr2fb_map);
843 if (fb_info->screen_base)
844 iounmap(fb_info->screen_base);
846 iounmap((void *)par->mmio_base);
851 #ifdef CONFIG_SH_DREAMCAST
852 static int __init pvr2fb_dc_init(void)
854 if (!mach_is_dreamcast())
857 /* Make a guess at the monitor based on the attached cable */
858 if (pvr2_init_cable() == CT_VGA) {
859 fb_info->monspecs.hfmin = 30000;
860 fb_info->monspecs.hfmax = 70000;
861 fb_info->monspecs.vfmin = 60;
862 fb_info->monspecs.vfmax = 60;
864 /* Not VGA, using a TV (taken from acornfb) */
865 fb_info->monspecs.hfmin = 15469;
866 fb_info->monspecs.hfmax = 15781;
867 fb_info->monspecs.vfmin = 49;
868 fb_info->monspecs.vfmax = 51;
872 * XXX: This needs to pull default video output via BIOS or other means
874 if (video_output < 0) {
875 if (cable_type == CT_VGA) {
876 video_output = VO_VGA;
878 video_output = VO_NTSC;
883 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
885 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
886 pvr2_fix.smem_len = 8 << 20;
888 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
889 pvr2_fix.mmio_len = 0x2000;
891 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED,
892 "pvr2 VBL handler", fb_info)) {
896 #ifdef CONFIG_PVR2_DMA
897 if (request_dma(pvr2dma, "pvr2") != 0) {
898 free_irq(HW_EVENT_VSYNC, fb_info);
903 return pvr2fb_common_init();
906 static void __exit pvr2fb_dc_exit(void)
908 if (fb_info->screen_base) {
909 iounmap(fb_info->screen_base);
910 fb_info->screen_base = NULL;
912 if (currentpar->mmio_base) {
913 iounmap((void *)currentpar->mmio_base);
914 currentpar->mmio_base = 0;
917 free_irq(HW_EVENT_VSYNC, fb_info);
918 #ifdef CONFIG_PVR2_DMA
922 #endif /* CONFIG_SH_DREAMCAST */
925 static int pvr2fb_pci_probe(struct pci_dev *pdev,
926 const struct pci_device_id *ent)
930 ret = pci_enable_device(pdev);
932 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
936 ret = pci_request_regions(pdev, "pvr2fb");
938 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
943 * Slightly more exciting than the DC PVR2 .. 16MiB!
945 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
946 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
948 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
949 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
951 fb_info->device = &pdev->dev;
953 return pvr2fb_common_init();
956 static void pvr2fb_pci_remove(struct pci_dev *pdev)
958 if (fb_info->screen_base) {
959 iounmap(fb_info->screen_base);
960 fb_info->screen_base = NULL;
962 if (currentpar->mmio_base) {
963 iounmap((void *)currentpar->mmio_base);
964 currentpar->mmio_base = 0;
967 pci_release_regions(pdev);
970 static struct pci_device_id pvr2fb_pci_tbl[] = {
971 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
972 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
976 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
978 static struct pci_driver pvr2fb_pci_driver = {
980 .id_table = pvr2fb_pci_tbl,
981 .probe = pvr2fb_pci_probe,
982 .remove = pvr2fb_pci_remove,
985 static int __init pvr2fb_pci_init(void)
987 return pci_register_driver(&pvr2fb_pci_driver);
990 static void __exit pvr2fb_pci_exit(void)
992 pci_unregister_driver(&pvr2fb_pci_driver);
994 #endif /* CONFIG_PCI */
996 static int pvr2_get_param(const struct pvr2_params *p, const char *s, int val,
1001 for (i = 0 ; i < size ; i++ ) {
1003 if (!strnicmp(p[i].name, s, strlen(s)))
1006 if (p[i].val == val)
1007 return (int)p[i].name;
1014 * Parse command arguments. Supported arguments are:
1015 * inverse Use inverse color maps
1016 * cable:composite|rgb|vga Override the video cable type
1017 * output:NTSC|PAL|VGA Override the video output format
1019 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1020 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1024 static int __init pvr2fb_setup(char *options)
1028 char output_arg[80];
1030 if (!options || !*options)
1033 while ((this_opt = strsep(&options, ","))) {
1036 if (!strcmp(this_opt, "inverse")) {
1038 } else if (!strncmp(this_opt, "cable:", 6)) {
1039 strcpy(cable_arg, this_opt + 6);
1040 } else if (!strncmp(this_opt, "output:", 7)) {
1041 strcpy(output_arg, this_opt + 7);
1042 } else if (!strncmp(this_opt, "nopan", 5)) {
1044 } else if (!strncmp(this_opt, "nowrap", 6)) {
1047 mode_option = this_opt;
1052 cable_type = pvr2_get_param(cables, cable_arg, 0, 3);
1054 video_output = pvr2_get_param(outputs, output_arg, 0, 3);
1060 static struct pvr2_board {
1064 } board_driver[] __refdata = {
1065 #ifdef CONFIG_SH_DREAMCAST
1066 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1069 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1074 static int __init pvr2fb_init(void)
1076 int i, ret = -ENODEV;
1080 char *option = NULL;
1082 if (fb_get_options("pvr2fb", &option))
1084 pvr2fb_setup(option);
1086 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1088 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL);
1091 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1096 currentpar = fb_info->par;
1098 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1099 struct pvr2_board *pvr_board = board_driver + i;
1101 if (!pvr_board->init)
1104 ret = pvr_board->init();
1107 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1109 framebuffer_release(fb_info);
1117 static void __exit pvr2fb_exit(void)
1121 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1122 struct pvr2_board *pvr_board = board_driver + i;
1124 if (pvr_board->exit)
1128 #ifdef CONFIG_SH_STORE_QUEUES
1129 sq_unmap(pvr2fb_map);
1132 unregister_framebuffer(fb_info);
1133 framebuffer_release(fb_info);
1136 module_init(pvr2fb_init);
1137 module_exit(pvr2fb_exit);
1139 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1140 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1141 MODULE_LICENSE("GPL");