2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/export.h>
28 #include <linux/vmalloc.h>
29 #include <linux/clk.h>
31 #include <linux/delay.h>
32 #include <linux/kfifo.h>
33 #include <linux/ktime.h>
34 #include <linux/hrtimer.h>
35 #include <linux/seq_file.h>
36 #include <linux/semaphore.h>
37 #include <linux/platform_device.h>
38 #include <linux/pm_runtime.h>
40 #include <video/omapdss.h>
43 struct rfbi_reg { u16 idx; };
45 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
47 #define RFBI_REVISION RFBI_REG(0x0000)
48 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
49 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
50 #define RFBI_CONTROL RFBI_REG(0x0040)
51 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
52 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
53 #define RFBI_CMD RFBI_REG(0x004c)
54 #define RFBI_PARAM RFBI_REG(0x0050)
55 #define RFBI_DATA RFBI_REG(0x0054)
56 #define RFBI_READ RFBI_REG(0x0058)
57 #define RFBI_STATUS RFBI_REG(0x005c)
59 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
60 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
61 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
62 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
63 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
64 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
66 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
67 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
69 #define REG_FLD_MOD(idx, val, start, end) \
70 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
72 enum omap_rfbi_cycleformat {
73 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
74 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
75 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
76 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
79 enum omap_rfbi_datatype {
80 OMAP_DSS_RFBI_DATATYPE_12 = 0,
81 OMAP_DSS_RFBI_DATATYPE_16 = 1,
82 OMAP_DSS_RFBI_DATATYPE_18 = 2,
83 OMAP_DSS_RFBI_DATATYPE_24 = 3,
86 enum omap_rfbi_parallelmode {
87 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
88 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
89 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
90 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
93 static int rfbi_convert_timings(struct rfbi_timings *t);
94 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
97 struct platform_device *pdev;
100 unsigned long l4_khz;
102 enum omap_rfbi_datatype datatype;
103 enum omap_rfbi_parallelmode parallelmode;
105 enum omap_rfbi_te_mode te_mode;
108 void (*framedone_callback)(void *data);
109 void *framedone_callback_data;
111 struct omap_dss_device *dssdev[2];
113 struct semaphore bus_lock;
116 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
118 __raw_writel(val, rfbi.base + idx.idx);
121 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
123 return __raw_readl(rfbi.base + idx.idx);
126 static int rfbi_runtime_get(void)
130 DSSDBG("rfbi_runtime_get\n");
132 r = pm_runtime_get_sync(&rfbi.pdev->dev);
134 return r < 0 ? r : 0;
137 static void rfbi_runtime_put(void)
141 DSSDBG("rfbi_runtime_put\n");
143 r = pm_runtime_put(&rfbi.pdev->dev);
147 void rfbi_bus_lock(void)
149 down(&rfbi.bus_lock);
151 EXPORT_SYMBOL(rfbi_bus_lock);
153 void rfbi_bus_unlock(void)
157 EXPORT_SYMBOL(rfbi_bus_unlock);
159 void omap_rfbi_write_command(const void *buf, u32 len)
161 switch (rfbi.parallelmode) {
162 case OMAP_DSS_RFBI_PARALLELMODE_8:
166 rfbi_write_reg(RFBI_CMD, *b++);
170 case OMAP_DSS_RFBI_PARALLELMODE_16:
174 for (; len; len -= 2)
175 rfbi_write_reg(RFBI_CMD, *w++);
179 case OMAP_DSS_RFBI_PARALLELMODE_9:
180 case OMAP_DSS_RFBI_PARALLELMODE_12:
185 EXPORT_SYMBOL(omap_rfbi_write_command);
187 void omap_rfbi_read_data(void *buf, u32 len)
189 switch (rfbi.parallelmode) {
190 case OMAP_DSS_RFBI_PARALLELMODE_8:
194 rfbi_write_reg(RFBI_READ, 0);
195 *b++ = rfbi_read_reg(RFBI_READ);
200 case OMAP_DSS_RFBI_PARALLELMODE_16:
204 for (; len; len -= 2) {
205 rfbi_write_reg(RFBI_READ, 0);
206 *w++ = rfbi_read_reg(RFBI_READ);
211 case OMAP_DSS_RFBI_PARALLELMODE_9:
212 case OMAP_DSS_RFBI_PARALLELMODE_12:
217 EXPORT_SYMBOL(omap_rfbi_read_data);
219 void omap_rfbi_write_data(const void *buf, u32 len)
221 switch (rfbi.parallelmode) {
222 case OMAP_DSS_RFBI_PARALLELMODE_8:
226 rfbi_write_reg(RFBI_PARAM, *b++);
230 case OMAP_DSS_RFBI_PARALLELMODE_16:
234 for (; len; len -= 2)
235 rfbi_write_reg(RFBI_PARAM, *w++);
239 case OMAP_DSS_RFBI_PARALLELMODE_9:
240 case OMAP_DSS_RFBI_PARALLELMODE_12:
246 EXPORT_SYMBOL(omap_rfbi_write_data);
248 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
252 int start_offset = scr_width * y + x;
253 int horiz_offset = scr_width - w;
256 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
257 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
258 const u16 __iomem *pd = buf;
262 for (i = 0; i < w; ++i) {
263 const u8 __iomem *b = (const u8 __iomem *)pd;
264 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
265 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
270 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
271 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
272 const u32 __iomem *pd = buf;
276 for (i = 0; i < w; ++i) {
277 const u8 __iomem *b = (const u8 __iomem *)pd;
278 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
279 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
280 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
285 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
286 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
287 const u16 __iomem *pd = buf;
291 for (i = 0; i < w; ++i) {
292 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
301 EXPORT_SYMBOL(omap_rfbi_write_pixels);
303 static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
304 u16 height, void (*callback)(void *data), void *data)
308 /*BUG_ON(callback == 0);*/
309 BUG_ON(rfbi.framedone_callback != NULL);
311 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
313 dispc_mgr_set_lcd_size(dssdev->manager->id, width, height);
315 dispc_mgr_enable(dssdev->manager->id, true);
317 rfbi.framedone_callback = callback;
318 rfbi.framedone_callback_data = data;
320 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
322 l = rfbi_read_reg(RFBI_CONTROL);
323 l = FLD_MOD(l, 1, 0, 0); /* enable */
324 if (!rfbi.te_enabled)
325 l = FLD_MOD(l, 1, 4, 4); /* ITE */
327 rfbi_write_reg(RFBI_CONTROL, l);
330 static void framedone_callback(void *data, u32 mask)
332 void (*callback)(void *data);
334 DSSDBG("FRAMEDONE\n");
336 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
338 callback = rfbi.framedone_callback;
339 rfbi.framedone_callback = NULL;
341 if (callback != NULL)
342 callback(rfbi.framedone_callback_data);
346 static void rfbi_print_timings(void)
351 l = rfbi_read_reg(RFBI_CONFIG(0));
352 time = 1000000000 / rfbi.l4_khz;
356 DSSDBG("Tick time %u ps\n", time);
357 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
358 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
359 "REONTIME %d, REOFFTIME %d\n",
360 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
361 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
363 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
364 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
366 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
370 static void rfbi_print_timings(void) {}
376 static u32 extif_clk_period;
378 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
380 int bus_tick = extif_clk_period * div;
381 return (ps + bus_tick - 1) / bus_tick * bus_tick;
384 static int calc_reg_timing(struct rfbi_timings *t, int div)
388 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
390 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
391 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
392 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
394 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
395 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
396 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
398 t->access_time = round_to_extif_ticks(t->access_time, div);
399 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
400 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
402 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
403 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
404 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
405 t->we_on_time, t->we_off_time, t->re_cycle_time,
407 DSSDBG("[reg]rdaccess %d cspulse %d\n",
408 t->access_time, t->cs_pulse_width);
410 return rfbi_convert_timings(t);
413 static int calc_extif_timings(struct rfbi_timings *t)
418 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
419 for (div = 1; div <= max_clk_div; div++) {
420 if (calc_reg_timing(t, div) == 0)
424 if (div <= max_clk_div)
427 DSSERR("can't setup timings\n");
432 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
437 r = calc_extif_timings(t);
439 DSSERR("Failed to calc timings\n");
442 BUG_ON(!t->converted);
444 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
445 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
447 /* TIMEGRANULARITY */
448 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
449 (t->tim[2] ? 1 : 0), 4, 4);
451 rfbi_print_timings();
454 static int ps_to_rfbi_ticks(int time, int div)
456 unsigned long tick_ps;
459 /* Calculate in picosecs to yield more exact results */
460 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
462 ret = (time + tick_ps - 1) / tick_ps;
467 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
469 *clk_period = 1000000000 / rfbi.l4_khz;
473 static int rfbi_convert_timings(struct rfbi_timings *t)
476 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
477 int actim, recyc, wecyc;
478 int div = t->clk_div;
480 if (div <= 0 || div > 2)
483 /* Make sure that after conversion it still holds that:
484 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
485 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
487 weon = ps_to_rfbi_ticks(t->we_on_time, div);
488 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
496 reon = ps_to_rfbi_ticks(t->re_on_time, div);
497 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
505 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
506 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
509 if (csoff < max(weoff, reoff))
510 csoff = max(weoff, reoff);
525 actim = ps_to_rfbi_ticks(t->access_time, div);
531 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
537 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
543 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
561 /* xxx FIX module selection missing */
562 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
563 unsigned hs_pulse_time, unsigned vs_pulse_time,
564 int hs_pol_inv, int vs_pol_inv, int extif_div)
570 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
571 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
574 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
576 else /* OMAP_DSS_RFBI_TE_MODE_1 */
583 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
584 mode, hs, vs, hs_pol_inv, vs_pol_inv);
586 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
587 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
589 l = rfbi_read_reg(RFBI_CONFIG(0));
601 EXPORT_SYMBOL(omap_rfbi_setup_te);
603 /* xxx FIX module selection missing */
604 int omap_rfbi_enable_te(bool enable, unsigned line)
608 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
609 if (line > (1 << 11) - 1)
612 l = rfbi_read_reg(RFBI_CONFIG(0));
616 l |= rfbi.te_mode << 2;
619 rfbi_write_reg(RFBI_CONFIG(0), l);
620 rfbi_write_reg(RFBI_LINE_NUMBER, line);
624 EXPORT_SYMBOL(omap_rfbi_enable_te);
626 static int rfbi_configure(int rfbi_module, int bpp, int lines)
629 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
630 enum omap_rfbi_cycleformat cycleformat;
631 enum omap_rfbi_datatype datatype;
632 enum omap_rfbi_parallelmode parallelmode;
636 datatype = OMAP_DSS_RFBI_DATATYPE_12;
639 datatype = OMAP_DSS_RFBI_DATATYPE_16;
642 datatype = OMAP_DSS_RFBI_DATATYPE_18;
645 datatype = OMAP_DSS_RFBI_DATATYPE_24;
651 rfbi.datatype = datatype;
655 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
658 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
661 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
664 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
670 rfbi.parallelmode = parallelmode;
672 if ((bpp % lines) == 0) {
673 switch (bpp / lines) {
675 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
678 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
681 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
687 } else if ((2 * bpp % lines) == 0) {
688 if ((2 * bpp / lines) == 3)
689 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
699 switch (cycleformat) {
700 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
704 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
709 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
715 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
717 cycle2 = (lines / 2) | ((lines / 2) << 16);
718 cycle3 = (lines << 16);
722 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
725 l |= FLD_VAL(parallelmode, 1, 0);
726 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
727 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
728 l |= FLD_VAL(datatype, 6, 5);
729 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
730 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
731 l |= FLD_VAL(cycleformat, 10, 9);
732 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
733 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
734 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
735 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
736 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
737 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
738 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
739 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
741 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
742 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
743 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
746 l = rfbi_read_reg(RFBI_CONTROL);
747 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
748 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
749 rfbi_write_reg(RFBI_CONTROL, l);
752 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
753 bpp, lines, cycle1, cycle2, cycle3);
758 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
761 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
763 EXPORT_SYMBOL(omap_rfbi_configure);
765 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
766 u16 *x, u16 *y, u16 *w, u16 *h)
770 dssdev->driver->get_resolution(dssdev, &dw, &dh);
772 if (*x > dw || *y > dh)
784 if (*w == 0 || *h == 0)
787 dss_setup_partial_planes(dssdev, x, y, w, h, true);
788 dispc_mgr_set_lcd_size(dssdev->manager->id, *w, *h);
792 EXPORT_SYMBOL(omap_rfbi_prepare_update);
794 int omap_rfbi_update(struct omap_dss_device *dssdev,
795 u16 x, u16 y, u16 w, u16 h,
796 void (*callback)(void *), void *data)
798 rfbi_transfer_area(dssdev, w, h, callback, data);
801 EXPORT_SYMBOL(omap_rfbi_update);
803 void rfbi_dump_regs(struct seq_file *s)
805 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
807 if (rfbi_runtime_get())
810 DUMPREG(RFBI_REVISION);
811 DUMPREG(RFBI_SYSCONFIG);
812 DUMPREG(RFBI_SYSSTATUS);
813 DUMPREG(RFBI_CONTROL);
814 DUMPREG(RFBI_PIXEL_CNT);
815 DUMPREG(RFBI_LINE_NUMBER);
820 DUMPREG(RFBI_STATUS);
822 DUMPREG(RFBI_CONFIG(0));
823 DUMPREG(RFBI_ONOFF_TIME(0));
824 DUMPREG(RFBI_CYCLE_TIME(0));
825 DUMPREG(RFBI_DATA_CYCLE1(0));
826 DUMPREG(RFBI_DATA_CYCLE2(0));
827 DUMPREG(RFBI_DATA_CYCLE3(0));
829 DUMPREG(RFBI_CONFIG(1));
830 DUMPREG(RFBI_ONOFF_TIME(1));
831 DUMPREG(RFBI_CYCLE_TIME(1));
832 DUMPREG(RFBI_DATA_CYCLE1(1));
833 DUMPREG(RFBI_DATA_CYCLE2(1));
834 DUMPREG(RFBI_DATA_CYCLE3(1));
836 DUMPREG(RFBI_VSYNC_WIDTH);
837 DUMPREG(RFBI_HSYNC_WIDTH);
843 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
847 if (dssdev->manager == NULL) {
848 DSSERR("failed to enable display: no manager\n");
852 r = rfbi_runtime_get();
856 r = omap_dss_start_device(dssdev);
858 DSSERR("failed to start device\n");
862 r = omap_dispc_register_isr(framedone_callback, NULL,
863 DISPC_IRQ_FRAMEDONE);
865 DSSERR("can't get FRAMEDONE irq\n");
869 dispc_mgr_set_lcd_display_type(dssdev->manager->id,
870 OMAP_DSS_LCD_DISPLAY_TFT);
872 dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_RFBI);
873 dispc_mgr_enable_stallmode(dssdev->manager->id, true);
875 dispc_mgr_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
877 rfbi_configure(dssdev->phy.rfbi.channel,
878 dssdev->ctrl.pixel_size,
879 dssdev->phy.rfbi.data_lines);
881 rfbi_set_timings(dssdev->phy.rfbi.channel,
882 &dssdev->ctrl.rfbi_timings);
887 omap_dss_stop_device(dssdev);
892 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
894 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
896 omap_dispc_unregister_isr(framedone_callback, NULL,
897 DISPC_IRQ_FRAMEDONE);
898 omap_dss_stop_device(dssdev);
902 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
904 int rfbi_init_display(struct omap_dss_device *dssdev)
906 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
907 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
911 /* RFBI HW IP initialisation */
912 static int omap_rfbihw_probe(struct platform_device *pdev)
915 struct resource *rfbi_mem;
921 sema_init(&rfbi.bus_lock, 1);
923 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
925 DSSERR("can't get IORESOURCE_MEM RFBI\n");
929 rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem));
931 DSSERR("can't ioremap RFBI\n");
936 pm_runtime_enable(&pdev->dev);
938 r = rfbi_runtime_get();
944 clk = clk_get(&pdev->dev, "ick");
946 DSSERR("can't get ick\n");
951 rfbi.l4_khz = clk_get_rate(clk) / 1000;
955 rev = rfbi_read_reg(RFBI_REVISION);
956 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
957 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
966 pm_runtime_disable(&pdev->dev);
972 static int omap_rfbihw_remove(struct platform_device *pdev)
974 pm_runtime_disable(&pdev->dev);
979 static int rfbi_runtime_suspend(struct device *dev)
987 static int rfbi_runtime_resume(struct device *dev)
991 r = dss_runtime_get();
995 r = dispc_runtime_get();
1007 static const struct dev_pm_ops rfbi_pm_ops = {
1008 .runtime_suspend = rfbi_runtime_suspend,
1009 .runtime_resume = rfbi_runtime_resume,
1012 static struct platform_driver omap_rfbihw_driver = {
1013 .probe = omap_rfbihw_probe,
1014 .remove = omap_rfbihw_remove,
1016 .name = "omapdss_rfbi",
1017 .owner = THIS_MODULE,
1022 int rfbi_init_platform_driver(void)
1024 return platform_driver_register(&omap_rfbihw_driver);
1027 void rfbi_uninit_platform_driver(void)
1029 return platform_driver_unregister(&omap_rfbihw_driver);