1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Driver for XILINX LogiCore DisplayPort v6.1 TX (Source)
8 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
11 #ifndef __GDSYS_LOGICORE_DP_TX_H__
12 #define __GDSYS_LOGICORE_DP_TX_H__
15 * struct logicore_dp_tx_msa - Main Stream Attributes (MSA)
16 * @pixel_clock_hz: The pixel clock of the stream (in Hz)
17 * @bits_per_color: Number of bits per color component
18 * @h_active: Horizontal active resolution (pixels)
19 * @h_start: Horizontal blank start (in pixels)
20 * @h_sync_polarity: Horizontal sync polarity
21 * (0 = negative | 1 = positive)
22 * @h_sync_width: Horizontal sync width (pixels)
23 * @h_total: Horizontal total (pixels)
24 * @v_active: Vertical active resolution (lines)
25 * @v_start: Vertical blank start (in lines).
26 * @v_sync_polarity: Vertical sync polarity
27 * (0 = negative | 1 = positive)
28 * @v_sync_width: Vertical sync width (lines)
29 * @v_total: Vertical total (lines)
30 * @override_user_pixel_width: If true, the value stored for user_pixel_width
31 * will be used as the pixel width.
32 * @user_pixel_width: The width of the user data input port.
34 * This is a stripped down version of struct main_stream_attributes that
35 * contains only the parameters that are not set by cfg_msa_recalculate()
37 struct logicore_dp_tx_msa {
50 bool override_user_pixel_width;
54 #endif /* __GDSYS_LOGICORE_DP_TX_H__ */