drivers/video/hx8238d.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copied from simple-panel
   4  * Copyright (c) 2016 Google, Inc
   5  * Written by Simon Glass <sjg@chromium.org>
   6  * Copyright (c) 2018 Sjoerd Simons <sjoerd.simons@collabora.co.uk>
   7  * Modified by Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
   8  *
   9  * Panel Initialization for HX8238D panel from Himax
  10  * Resolution: 320x240
  11  * Color-Mode: RGB
  12  *
  13  */
  14
  15 #include <common.h>
  16 #include <dm.h>
  17 #include <panel.h>
  18 #include <spi.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 /* Register Address */
  23 #define HX8238D_OUTPUT_CTRL_ADDR        0x01
  24 #define HX8238D_LCD_AC_CTRL_ADDR        0x02
  25 #define HX8238D_POWER_CTRL_1_ADDR       0x03
  26 #define HX8238D_DATA_CLR_CTRL_ADDR      0X04
  27 #define HX8238D_FUNCTION_CTRL_ADDR      0x05
  28 #define HX8238D_LED_CTRL_ADDR           0x08
  29 #define HX8238D_CONT_BRIGHT_CTRL_ADDR   0x0A
  30 #define HX8238D_FRAME_CYCLE_CTRL_ADDR   0x0B
  31 #define HX8238D_POWER_CTRL_2_ADDR       0x0D
  32 #define HX8238D_POWER_CTRL_3_ADDR       0x0E
  33 #define HX8238D_GATE_SCAN_POS_ADDR      0x0F
  34 #define HX8238D_HORIZONTAL_PORCH_ADDR   0x16
  35 #define HX8238D_VERTICAL_PORCH_ADDR     0x17
  36 #define HX8238D_POWER_CTRL_4_ADDR       0x1E
  37 #define HX8238D_GAMMA_CTRL_1_ADDR       0x30
  38 #define HX8238D_GAMMA_CTRL_2_ADDR       0x31
  39 #define HX8238D_GAMMA_CTRL_3_ADDR       0x32
  40 #define HX8238D_GAMMA_CTRL_4_ADDR       0x33
  41 #define HX8238D_GAMMA_CTRL_5_ADDR       0x34
  42 #define HX8238D_GAMMA_CTRL_6_ADDR       0x35
  43 #define HX8238D_GAMMA_CTRL_7_ADDR       0x36
  44 #define HX8238D_GAMMA_CTRL_8_ADDR       0x37
  45 #define HX8238D_GAMMA_CTRL_9_ADDR       0x3A
  46 #define HX8238D_GAMMA_CTRL_10_ADDR      0x3B
  47
  48 /* Register Data */
  49 #define HX8238D_OUTPUT_CTRL             0x6300
  50 #define HX8238D_LCD_AC_CTRL             0x0200
  51 #define HX8238D_POWER_CTRL_1            0x6564
  52 #define HX8238D_DATA_CLR_CTRL           0x04C7
  53 #define HX8238D_FUNCTION_CTRL           0xA884
  54 #define HX8238D_LED_CTRL                0x00CE
  55 #define HX8238D_CONT_BRIGHT_CTRL        0x4008
  56 #define HX8238D_FRAME_CYCLE_CTRL        0xD400
  57 #define HX8238D_POWER_CTRL_2            0x3229
  58 #define HX8238D_POWER_CTRL_3            0x1200
  59 #define HX8238D_GATE_SCAN_POS           0x0000
  60 #define HX8238D_HORIZONTAL_PORCH        0x9F80
  61 #define HX8238D_VERTICAL_PORCH          0x3F02
  62 #define HX8238D_POWER_CTRL_4            0x005C
  63
  64 /* Gamma Control */
  65 #define HX8238D_GAMMA_CTRL_1            0x0103
  66 #define HX8238D_GAMMA_CTRL_2            0x0407
  67 #define HX8238D_GAMMA_CTRL_3            0x0705
  68 #define HX8238D_GAMMA_CTRL_4            0x0002
  69 #define HX8238D_GAMMA_CTRL_5            0x0505
  70 #define HX8238D_GAMMA_CTRL_6            0x0303
  71 #define HX8238D_GAMMA_CTRL_7            0x0707
  72 #define HX8238D_GAMMA_CTRL_8            0x0100
  73 #define HX8238D_GAMMA_CTRL_9            0x1F00
  74 #define HX8238D_GAMMA_CTRL_10           0x000F
  75
  76 /* Primary SPI register identification, 011100 */
  77 /* Select register, RS=0, RS=0 */
  78 /* Write  register, RS=1, RW=0 */
  79 #define HX8238D_PRIMARY_SELECT_REG 0x70
  80 #define HX8238D_PRIMARY_WRITE_REG  (HX8238D_PRIMARY_SELECT_REG | (0x1 << 1))
  81
  82 #define HX8238D_REG_BIT_LEN        24
  83
  84 struct hx8238d_priv {
  85         struct spi_slave *spi;
  86 };
  87
  88 static int hx8238d_ofdata_to_platdata(struct udevice *dev)
  89 {
  90         struct hx8238d_priv *priv = dev_get_priv(dev);
  91
  92         priv->spi = dev_get_parent_priv(dev);
  93
  94         return 0;
  95 }
  96
  97 /* data[0] => REGISTER ADDRESS */
  98 /* data[1] => REGISTER VALUE   */
  99 struct hx8238d_command {
 100         u16 data[2];
 101 };
 102
 103 static struct hx8238d_command hx8238d_init_commands[] = {
 104         { .data = { HX8238D_OUTPUT_CTRL_ADDR,      HX8238D_OUTPUT_CTRL } },
 105         { .data = { HX8238D_LCD_AC_CTRL_ADDR,      HX8238D_LCD_AC_CTRL } },
 106         { .data = { HX8238D_POWER_CTRL_1_ADDR,     HX8238D_POWER_CTRL_1 } },
 107         { .data = { HX8238D_DATA_CLR_CTRL_ADDR,    HX8238D_DATA_CLR_CTRL } },
 108         { .data = { HX8238D_FUNCTION_CTRL_ADDR,    HX8238D_FUNCTION_CTRL } },
 109         { .data = { HX8238D_LED_CTRL_ADDR,         HX8238D_LED_CTRL } },
 110         { .data = { HX8238D_CONT_BRIGHT_CTRL_ADDR, HX8238D_CONT_BRIGHT_CTRL } },
 111         { .data = { HX8238D_FRAME_CYCLE_CTRL_ADDR, HX8238D_FRAME_CYCLE_CTRL } },
 112         { .data = { HX8238D_POWER_CTRL_2_ADDR,     HX8238D_POWER_CTRL_2 } },
 113         { .data = { HX8238D_POWER_CTRL_3_ADDR,     HX8238D_POWER_CTRL_3 } },
 114         { .data = { HX8238D_GATE_SCAN_POS_ADDR,    HX8238D_GATE_SCAN_POS } },
 115         { .data = { HX8238D_HORIZONTAL_PORCH_ADDR, HX8238D_HORIZONTAL_PORCH } },
 116         { .data = { HX8238D_VERTICAL_PORCH_ADDR,   HX8238D_VERTICAL_PORCH } },
 117         { .data = { HX8238D_POWER_CTRL_4_ADDR,     HX8238D_POWER_CTRL_4 } },
 118         { .data = { HX8238D_GAMMA_CTRL_1_ADDR,     HX8238D_GAMMA_CTRL_1 } },
 119         { .data = { HX8238D_GAMMA_CTRL_2_ADDR,     HX8238D_GAMMA_CTRL_2 } },
 120         { .data = { HX8238D_GAMMA_CTRL_3_ADDR,     HX8238D_GAMMA_CTRL_3 } },
 121         { .data = { HX8238D_GAMMA_CTRL_4_ADDR,     HX8238D_GAMMA_CTRL_4 } },
 122         { .data = { HX8238D_GAMMA_CTRL_5_ADDR,     HX8238D_GAMMA_CTRL_5 } },
 123         { .data = { HX8238D_GAMMA_CTRL_6_ADDR,     HX8238D_GAMMA_CTRL_6 } },
 124         { .data = { HX8238D_GAMMA_CTRL_7_ADDR,     HX8238D_GAMMA_CTRL_7 } },
 125         { .data = { HX8238D_GAMMA_CTRL_8_ADDR,     HX8238D_GAMMA_CTRL_8 } },
 126         { .data = { HX8238D_GAMMA_CTRL_9_ADDR,     HX8238D_GAMMA_CTRL_9 } },
 127         { .data = { HX8238D_GAMMA_CTRL_10_ADDR,    HX8238D_GAMMA_CTRL_10 } },
 128 };
 129
 130 /*
 131  * Generate Primary Register Buffer for Register Select and Register Write
 132  * First 6 MSB bits of Primary Register is represented with 011100
 133  *
 134  */
 135 static void hx8238d_generate_reg_buffers(struct hx8238d_command command,
 136                                          u8 *sr_buf, uint8_t *wr_buf)
 137 {
 138         struct hx8238d_command cmd = command;
 139
 140         sr_buf[0] = HX8238D_PRIMARY_SELECT_REG;
 141         sr_buf[1] = (cmd.data[0] >> 8) & 0xff;
 142         sr_buf[2] = (cmd.data[0]) & 0xff;
 143
 144         wr_buf[0] = HX8238D_PRIMARY_WRITE_REG;
 145         wr_buf[1] = (cmd.data[1] >> 8) & 0xff;
 146         wr_buf[2] = (cmd.data[1]) & 0xff;
 147 }
 148
 149 static int hx8238d_probe(struct udevice *dev)
 150 {
 151         struct hx8238d_priv *priv = dev_get_priv(dev);
 152         int ret;
 153
 154         ret = spi_claim_bus(priv->spi);
 155         if (ret) {
 156                 debug("Failed to claim bus: %d\n", ret);
 157                 return ret;
 158         }
 159
 160         for (int i = 0; i < ARRAY_SIZE(hx8238d_init_commands); i++) {
 161                 u8 sr_buf[3], wr_buf[3];
 162                 const struct hx8238d_command cmd = hx8238d_init_commands[i];
 163
 164                 hx8238d_generate_reg_buffers(cmd, sr_buf, wr_buf);
 165                 ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, sr_buf, NULL,
 166                                SPI_XFER_BEGIN | SPI_XFER_END);
 167                 if (ret) {
 168                         debug("Failed to select register %d\n", ret);
 169                         goto free;
 170                 }
 171
 172                 ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, wr_buf, NULL,
 173                                SPI_XFER_BEGIN | SPI_XFER_END);
 174                 if (ret) {
 175                         debug("Failed to write value %d\n", ret);
 176                         goto free;
 177                 }
 178         }
 179
 180 free:
 181         spi_release_bus(priv->spi);
 182         return ret;
 183 }
 184
 185 static const struct udevice_id hx8238d_ids[] = {
 186         { .compatible = "himax,hx8238d" },
 187         { }
 188 };
 189
 190 U_BOOT_DRIVER(hx8238d) = {
 191         .name = "hx8238d",
 192         .id = UCLASS_PANEL,
 193         .of_match = hx8238d_ids,
 194         .of_to_plat = hx8238d_ofdata_to_platdata,
 195         .probe = hx8238d_probe,
 196         .priv_auto = sizeof(struct hx8238d_priv),
 197 };