1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Hannu Mallat <hmallat@cc.hut.fi>
8 * Copyright © 1999 Hannu Mallat
11 * Created : Thu Sep 23 18:17:43 1999, hmallat
12 * Last modified: Tue Nov 2 21:19:47 1999, hmallat
14 * I2C part copied from the i2c-voodoo3.c driver by:
15 * Frodo Looijaard <frodol@dds.nl>,
16 * Philip Edelbrock <phil@netroedge.com>,
17 * Ralph Metzler <rjkm@thp.uni-koeln.de>, and
18 * Mark D. Studebaker <mdsxyz123@yahoo.com>
20 * Lots of the information here comes from the Daryll Strauss' Banshee
21 * patches to the XF86 server, and the rest comes from the 3dfx
22 * Banshee specification. I'm very much indebted to Daryll for his
23 * work on the X server.
25 * Voodoo3 support was contributed Harold Oga. Lots of additions
26 * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila
27 * Kesmarki. Thanks guys!
29 * Voodoo1 and Voodoo2 support aren't relevant to this driver as they
30 * behave very differently from the Voodoo3/4/5. For anyone wanting to
31 * use frame buffer on the Voodoo1/2, see the sstfb driver (which is
32 * located at http://www.sourceforge.net/projects/sstfb).
34 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
35 * I do wish the next version is a bit more complete. Without the XF86
36 * patches I couldn't have gotten even this far... for instance, the
37 * extensions to the VGA register set go completely unmentioned in the
38 * spec! Also, lots of references are made to the 'SST core', but no
39 * spec is publicly available, AFAIK.
41 * The structure of this driver comes pretty much from the Permedia
42 * driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
45 * - multihead support (basically need to support an array of fb_infos)
46 * - support other architectures (PPC, Alpha); does the fact that the VGA
47 * core can be accessed only thru I/O (not memory mapped) complicate
52 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
54 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
55 * reorg, hwcursor address page size alignment
56 * (for mmapping both frame buffer and regs),
57 * and my changes to get rid of hardcoded
58 * VGA i/o register locations (uses PCI
59 * configuration info now)
60 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
62 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
63 * 0.1.0 (released 1999-10-06) initial version
67 #include <linux/aperture.h>
68 #include <linux/module.h>
69 #include <linux/kernel.h>
70 #include <linux/errno.h>
71 #include <linux/string.h>
73 #include <linux/slab.h>
75 #include <linux/init.h>
76 #include <linux/pci.h>
79 #include <video/tdfx.h>
81 #define DPRINTK(a, b...) pr_debug("fb: %s: " a, __func__ , ## b)
83 #define BANSHEE_MAX_PIXCLOCK 270000
84 #define VOODOO3_MAX_PIXCLOCK 300000
85 #define VOODOO5_MAX_PIXCLOCK 350000
87 static const struct fb_fix_screeninfo tdfx_fix = {
88 .type = FB_TYPE_PACKED_PIXELS,
89 .visual = FB_VISUAL_PSEUDOCOLOR,
92 .accel = FB_ACCEL_3DFX_BANSHEE
95 static const struct fb_var_screeninfo tdfx_var = {
96 /* "640x480, 8 bpp @ 60 Hz */
100 .yres_virtual = 1024,
105 .activate = FB_ACTIVATE_NOW,
108 .accel_flags = FB_ACCELF_TEXT,
116 .vmode = FB_VMODE_NONINTERLACED
120 * PCI driver prototypes
122 static int tdfxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id);
123 static void tdfxfb_remove(struct pci_dev *pdev);
125 static const struct pci_device_id tdfxfb_id_table[] = {
126 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
127 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
129 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3,
130 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
132 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5,
133 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
138 static struct pci_driver tdfxfb_driver = {
140 .id_table = tdfxfb_id_table,
141 .probe = tdfxfb_probe,
142 .remove = tdfxfb_remove,
145 MODULE_DEVICE_TABLE(pci, tdfxfb_id_table);
151 static int nowrap = 1; /* not implemented (yet) */
152 static int hwcursor = 1;
153 static char *mode_option;
156 /* -------------------------------------------------------------------------
157 * Hardware-specific funcions
158 * ------------------------------------------------------------------------- */
160 static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
162 return inb(par->iobase + reg - 0x300);
165 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
167 outb(val, par->iobase + reg - 0x300);
170 static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
172 vga_outb(par, GRA_I, idx);
174 vga_outb(par, GRA_D, val);
178 static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val)
180 vga_outb(par, SEQ_I, idx);
182 vga_outb(par, SEQ_D, val);
186 static inline u8 seq_inb(struct tdfx_par *par, u32 idx)
188 vga_outb(par, SEQ_I, idx);
190 return vga_inb(par, SEQ_D);
193 static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val)
195 vga_outb(par, CRT_I, idx);
197 vga_outb(par, CRT_D, val);
201 static inline u8 crt_inb(struct tdfx_par *par, u32 idx)
203 vga_outb(par, CRT_I, idx);
205 return vga_inb(par, CRT_D);
208 static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val)
211 vga_outb(par, ATT_IW, idx);
212 vga_outb(par, ATT_IW, val);
215 static inline void vga_disable_video(struct tdfx_par *par)
219 s = seq_inb(par, 0x01) | 0x20;
220 seq_outb(par, 0x00, 0x01);
221 seq_outb(par, 0x01, s);
222 seq_outb(par, 0x00, 0x03);
225 static inline void vga_enable_video(struct tdfx_par *par)
229 s = seq_inb(par, 0x01) & 0xdf;
230 seq_outb(par, 0x00, 0x01);
231 seq_outb(par, 0x01, s);
232 seq_outb(par, 0x00, 0x03);
235 static inline void vga_enable_palette(struct tdfx_par *par)
239 vga_outb(par, ATT_IW, 0x20);
242 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
244 return readl(par->regbase_virt + reg);
247 static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val)
249 writel(val, par->regbase_virt + reg);
252 static inline void banshee_make_room(struct tdfx_par *par, int size)
254 /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
255 * won't quit if you ask for more. */
256 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)
260 static int banshee_wait_idle(struct fb_info *info)
262 struct tdfx_par *par = info->par;
265 banshee_make_room(par, 1);
266 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
269 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
277 * Set the color of a palette entry in 8bpp mode
279 static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
281 banshee_make_room(par, 2);
282 tdfx_outl(par, DACADDR, regno);
283 /* read after write makes it working */
284 tdfx_inl(par, DACADDR);
285 tdfx_outl(par, DACDATA, c);
288 static u32 do_calc_pll(int freq, int *freq_out)
290 int m, n, k, best_m, best_n, best_k, best_error;
294 best_n = best_m = best_k = 0;
296 for (k = 3; k >= 0; k--) {
297 for (m = 63; m >= 0; m--) {
299 * Estimate value of n that produces target frequency
300 * with current m and k
302 int n_estimated = ((freq * (m + 2) << k) / fref) - 2;
304 /* Search neighborhood of estimated n */
305 for (n = max(0, n_estimated);
306 n <= min(255, n_estimated + 1);
309 * Calculate PLL freqency with current m, k and
312 int f = (fref * (n + 2) / (m + 2)) >> k;
313 int error = abs(f - freq);
316 * If this is the closest we've come to the
317 * target frequency then remember n, m and k
319 if (error < best_error) {
332 *freq_out = (fref * (n + 2) / (m + 2)) >> k;
334 return (n << 8) | (m << 2) | k;
337 static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
339 struct tdfx_par *par = info->par;
342 banshee_wait_idle(info);
344 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
346 crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */
348 banshee_make_room(par, 3);
349 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);
350 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);
352 tdfx_outl(par, PLLCTRL1, reg->mempll);
353 tdfx_outl(par, PLLCTRL2, reg->gfxpll);
355 tdfx_outl(par, PLLCTRL0, reg->vidpll);
357 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01);
359 for (i = 0; i < 5; i++)
360 seq_outb(par, i, reg->seq[i]);
362 for (i = 0; i < 25; i++)
363 crt_outb(par, i, reg->crt[i]);
365 for (i = 0; i < 9; i++)
366 gra_outb(par, i, reg->gra[i]);
368 for (i = 0; i < 21; i++)
369 att_outb(par, i, reg->att[i]);
371 crt_outb(par, 0x1a, reg->ext[0]);
372 crt_outb(par, 0x1b, reg->ext[1]);
374 vga_enable_palette(par);
375 vga_enable_video(par);
377 banshee_make_room(par, 9);
378 tdfx_outl(par, VGAINIT0, reg->vgainit0);
379 tdfx_outl(par, DACMODE, reg->dacmode);
380 tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
381 tdfx_outl(par, HWCURPATADDR, reg->curspataddr);
383 tdfx_outl(par, VIDSCREENSIZE, reg->screensize);
384 tdfx_outl(par, VIDDESKSTART, reg->startaddr);
385 tdfx_outl(par, VIDPROCCFG, reg->vidcfg);
386 tdfx_outl(par, VGAINIT1, reg->vgainit1);
387 tdfx_outl(par, MISCINIT0, reg->miscinit0);
389 banshee_make_room(par, 8);
390 tdfx_outl(par, SRCBASE, reg->startaddr);
391 tdfx_outl(par, DSTBASE, reg->startaddr);
392 tdfx_outl(par, COMMANDEXTRA_2D, 0);
393 tdfx_outl(par, CLIP0MIN, 0);
394 tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
395 tdfx_outl(par, CLIP1MIN, 0);
396 tdfx_outl(par, CLIP1MAX, 0x0fff0fff);
397 tdfx_outl(par, SRCXY, 0);
399 banshee_wait_idle(info);
402 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
404 u32 draminit0 = tdfx_inl(par, DRAMINIT0);
405 u32 draminit1 = tdfx_inl(par, DRAMINIT1);
407 int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
408 int chip_size; /* in MB */
409 int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
411 if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
412 /* Banshee/Voodoo3 */
414 if (has_sgram && !(draminit0 & DRAMINIT0_SGRAM_TYPE))
419 chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK;
420 chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT);
423 /* disable block writes for SDRAM */
424 miscinit1 = tdfx_inl(par, MISCINIT1);
425 miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS;
426 miscinit1 |= MISCINIT1_CLUT_INV;
428 banshee_make_room(par, 1);
429 tdfx_outl(par, MISCINIT1, miscinit1);
430 return num_chips * chip_size * 1024l * 1024;
433 /* ------------------------------------------------------------------------- */
435 static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
437 struct tdfx_par *par = info->par;
440 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
441 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) {
442 DPRINTK("depth not supported: %u\n", var->bits_per_pixel);
446 if (var->xres != var->xres_virtual)
447 var->xres_virtual = var->xres;
449 if (var->yres > var->yres_virtual)
450 var->yres_virtual = var->yres;
453 DPRINTK("xoffset not supported\n");
459 * Banshee doesn't support interlace, but Voodoo4/5 and probably
461 * no direct information about device id now?
462 * use max_pixclock for this...
464 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
465 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
466 DPRINTK("interlace not supported\n");
470 if (info->monspecs.hfmax && info->monspecs.vfmax &&
471 info->monspecs.dclkmax && fb_validate_mode(var, info) < 0) {
472 DPRINTK("mode outside monitor's specs\n");
476 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */
477 lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3);
479 if (var->xres < 320 || var->xres > 2048) {
480 DPRINTK("width not supported: %u\n", var->xres);
484 if (var->yres < 200 || var->yres > 2048) {
485 DPRINTK("height not supported: %u\n", var->yres);
489 if (lpitch * var->yres_virtual > info->fix.smem_len) {
490 var->yres_virtual = info->fix.smem_len / lpitch;
491 if (var->yres_virtual < var->yres) {
492 DPRINTK("no memory for screen (%ux%ux%u)\n",
493 var->xres, var->yres_virtual,
494 var->bits_per_pixel);
499 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) {
500 DPRINTK("pixclock too high (%ldKHz)\n",
501 PICOS2KHZ(var->pixclock));
505 var->transp.offset = 0;
506 var->transp.length = 0;
507 switch (var->bits_per_pixel) {
511 var->green = var->red;
512 var->blue = var->red;
515 var->red.offset = 11;
517 var->green.offset = 5;
518 var->green.length = 6;
519 var->blue.offset = 0;
520 var->blue.length = 5;
523 var->transp.offset = 24;
524 var->transp.length = 8;
527 var->red.offset = 16;
528 var->green.offset = 8;
529 var->blue.offset = 0;
530 var->red.length = var->green.length = var->blue.length = 8;
536 var->accel_flags = FB_ACCELF_TEXT;
538 DPRINTK("Checking graphics mode at %dx%d depth %d\n",
539 var->xres, var->yres, var->bits_per_pixel);
543 static int tdfxfb_set_par(struct fb_info *info)
545 struct tdfx_par *par = info->par;
546 u32 hdispend = info->var.xres;
547 u32 hsyncsta = hdispend + info->var.right_margin;
548 u32 hsyncend = hsyncsta + info->var.hsync_len;
549 u32 htotal = hsyncend + info->var.left_margin;
550 u32 hd, hs, he, ht, hbs, hbe;
551 u32 vd, vs, ve, vt, vbs, vbe;
552 struct banshee_reg reg;
555 u32 cpp = (info->var.bits_per_pixel + 7) >> 3;
557 memset(®, 0, sizeof(reg));
559 reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
561 ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) |
562 (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0);
565 freq = PICOS2KHZ(info->var.pixclock);
567 reg.vidcfg &= ~VIDCFG_2X;
569 if (freq > par->max_pixclock / 2) {
570 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
571 reg.dacmode |= DACMODE_2X;
572 reg.vidcfg |= VIDCFG_2X;
579 wd = (hdispend >> 3) - 1;
581 hs = (hsyncsta >> 3) - 1;
582 he = (hsyncend >> 3) - 1;
583 ht = (htotal >> 3) - 1;
587 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
588 vd = (info->var.yres << 1) - 1;
589 vs = vd + (info->var.lower_margin << 1);
590 ve = vs + (info->var.vsync_len << 1);
591 vt = ve + (info->var.upper_margin << 1) - 1;
592 reg.screensize = info->var.xres | (info->var.yres << 13);
593 reg.vidcfg |= VIDCFG_HALF_MODE;
594 reg.crt[0x09] = 0x80;
596 vd = info->var.yres - 1;
597 vs = vd + info->var.lower_margin;
598 ve = vs + info->var.vsync_len;
599 vt = ve + info->var.upper_margin - 1;
600 reg.screensize = info->var.xres | (info->var.yres << 12);
601 reg.vidcfg &= ~VIDCFG_HALF_MODE;
606 /* this is all pretty standard VGA register stuffing */
607 reg.misc[0x00] = 0x0f |
608 (info->var.xres < 400 ? 0xa0 :
609 info->var.xres < 480 ? 0x60 :
610 info->var.xres < 768 ? 0xe0 : 0x20);
612 reg.gra[0x05] = 0x40;
613 reg.gra[0x06] = 0x05;
614 reg.gra[0x07] = 0x0f;
615 reg.gra[0x08] = 0xff;
617 reg.att[0x00] = 0x00;
618 reg.att[0x01] = 0x01;
619 reg.att[0x02] = 0x02;
620 reg.att[0x03] = 0x03;
621 reg.att[0x04] = 0x04;
622 reg.att[0x05] = 0x05;
623 reg.att[0x06] = 0x06;
624 reg.att[0x07] = 0x07;
625 reg.att[0x08] = 0x08;
626 reg.att[0x09] = 0x09;
627 reg.att[0x0a] = 0x0a;
628 reg.att[0x0b] = 0x0b;
629 reg.att[0x0c] = 0x0c;
630 reg.att[0x0d] = 0x0d;
631 reg.att[0x0e] = 0x0e;
632 reg.att[0x0f] = 0x0f;
633 reg.att[0x10] = 0x41;
634 reg.att[0x12] = 0x0f;
636 reg.seq[0x00] = 0x03;
637 reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
638 reg.seq[0x02] = 0x0f;
639 reg.seq[0x03] = 0x00;
640 reg.seq[0x04] = 0x0e;
642 reg.crt[0x00] = ht - 4;
645 reg.crt[0x03] = 0x80 | (hbe & 0x1f);
647 reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
649 reg.crt[0x07] = ((vs & 0x200) >> 2) |
650 ((vd & 0x200) >> 3) |
651 ((vt & 0x200) >> 4) | 0x10 |
652 ((vbs & 0x100) >> 5) |
653 ((vs & 0x100) >> 6) |
654 ((vd & 0x100) >> 7) |
656 reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4);
658 reg.crt[0x11] = (ve & 0x0f) | 0x20;
662 reg.crt[0x16] = vbe + 1;
663 reg.crt[0x17] = 0xc3;
664 reg.crt[0x18] = 0xff;
666 /* Banshee's nonvga stuff */
667 reg.ext[0x00] = (((ht & 0x100) >> 8) |
668 ((hd & 0x100) >> 6) |
669 ((hbs & 0x100) >> 4) |
670 ((hbe & 0x40) >> 1) |
671 ((hs & 0x100) >> 2) |
673 reg.ext[0x01] = (((vt & 0x400) >> 10) |
674 ((vd & 0x400) >> 8) |
675 ((vbs & 0x400) >> 6) |
676 ((vbe & 0x400) >> 4));
678 reg.vgainit0 = VGAINIT0_8BIT_DAC |
679 VGAINIT0_EXT_ENABLE |
680 VGAINIT0_WAKEUP_3C3 |
681 VGAINIT0_ALT_READBACK |
682 VGAINIT0_EXTSHIFTOUT;
683 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
686 reg.curspataddr = info->fix.smem_len;
691 reg.cursc1 = 0xffffff;
693 reg.stride = info->var.xres * cpp;
694 reg.startaddr = info->var.yoffset * reg.stride
695 + info->var.xoffset * cpp;
697 reg.vidpll = do_calc_pll(freq, &fout);
699 reg.mempll = do_calc_pll(..., &fout);
700 reg.gfxpll = do_calc_pll(..., &fout);
703 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
704 reg.vidcfg |= VIDCFG_INTERLACE;
705 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
707 #if defined(__BIG_ENDIAN)
708 switch (info->var.bits_per_pixel) {
711 reg.miscinit0 &= ~(1 << 30);
712 reg.miscinit0 &= ~(1 << 31);
715 reg.miscinit0 |= (1 << 30);
716 reg.miscinit0 |= (1 << 31);
719 reg.miscinit0 |= (1 << 30);
720 reg.miscinit0 &= ~(1 << 31);
724 do_write_regs(info, ®);
726 /* Now change fb_fix_screeninfo according to changes in par */
727 info->fix.line_length = reg.stride;
728 info->fix.visual = (info->var.bits_per_pixel == 8)
729 ? FB_VISUAL_PSEUDOCOLOR
730 : FB_VISUAL_TRUECOLOR;
731 DPRINTK("Graphics mode is now set at %dx%d depth %d\n",
732 info->var.xres, info->var.yres, info->var.bits_per_pixel);
736 /* A handy macro shamelessly pinched from matroxfb */
737 #define CNVT_TOHW(val, width) ((((val) << (width)) + 0x7FFF - (val)) >> 16)
739 static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
740 unsigned blue, unsigned transp,
741 struct fb_info *info)
743 struct tdfx_par *par = info->par;
746 if (regno >= info->cmap.len || regno > 255)
749 /* grayscale works only partially under directcolor */
750 if (info->var.grayscale) {
751 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
752 blue = (red * 77 + green * 151 + blue * 28) >> 8;
757 switch (info->fix.visual) {
758 case FB_VISUAL_PSEUDOCOLOR:
759 rgbcol = (((u32)red & 0xff00) << 8) |
760 (((u32)green & 0xff00) << 0) |
761 (((u32)blue & 0xff00) >> 8);
762 do_setpalentry(par, regno, rgbcol);
764 /* Truecolor has no hardware color palettes. */
765 case FB_VISUAL_TRUECOLOR:
767 rgbcol = (CNVT_TOHW(red, info->var.red.length) <<
768 info->var.red.offset) |
769 (CNVT_TOHW(green, info->var.green.length) <<
770 info->var.green.offset) |
771 (CNVT_TOHW(blue, info->var.blue.length) <<
772 info->var.blue.offset) |
773 (CNVT_TOHW(transp, info->var.transp.length) <<
774 info->var.transp.offset);
775 par->palette[regno] = rgbcol;
780 DPRINTK("bad depth %u\n", info->var.bits_per_pixel);
787 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
788 static int tdfxfb_blank(int blank, struct fb_info *info)
790 struct tdfx_par *par = info->par;
792 u32 dacmode = tdfx_inl(par, DACMODE);
794 dacmode &= ~(BIT(1) | BIT(3));
797 case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
800 case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
802 case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
805 case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
808 case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
809 dacmode |= BIT(1) | BIT(3);
813 banshee_make_room(par, 1);
814 tdfx_outl(par, DACMODE, dacmode);
816 vga_disable_video(par);
818 vga_enable_video(par);
823 * Set the starting position of the visible screen to var->yoffset
825 static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
826 struct fb_info *info)
828 struct tdfx_par *par = info->par;
829 u32 addr = var->yoffset * info->fix.line_length;
831 if (nopan || var->xoffset)
834 banshee_make_room(par, 1);
835 tdfx_outl(par, VIDDESKSTART, addr);
840 #ifdef CONFIG_FB_3DFX_ACCEL
842 * FillRect 2D command (solidfill or invert (via ROP_XOR))
844 static void tdfxfb_fillrect(struct fb_info *info,
845 const struct fb_fillrect *rect)
847 struct tdfx_par *par = info->par;
848 u32 bpp = info->var.bits_per_pixel;
849 u32 stride = info->fix.line_length;
850 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
856 if (rect->rop == ROP_COPY)
857 tdfx_rop = TDFX_ROP_COPY;
859 tdfx_rop = TDFX_ROP_XOR;
861 /* assume always rect->height < 4096 */
862 if (dy + rect->height > 4095) {
863 dstbase = stride * dy;
866 /* assume always rect->width < 4096 */
867 if (dx + rect->width > 4095) {
868 dstbase += dx * bpp >> 3;
871 banshee_make_room(par, 6);
872 tdfx_outl(par, DSTFORMAT, fmt);
873 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
874 tdfx_outl(par, COLORFORE, rect->color);
875 } else { /* FB_VISUAL_TRUECOLOR */
876 tdfx_outl(par, COLORFORE, par->palette[rect->color]);
878 tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24));
879 tdfx_outl(par, DSTBASE, dstbase);
880 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16));
881 tdfx_outl(par, LAUNCH_2D, dx | (dy << 16));
885 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
887 static void tdfxfb_copyarea(struct fb_info *info,
888 const struct fb_copyarea *area)
890 struct tdfx_par *par = info->par;
891 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
892 u32 bpp = info->var.bits_per_pixel;
893 u32 stride = info->fix.line_length;
894 u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
895 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
899 /* assume always area->height < 4096 */
900 if (sy + area->height > 4095) {
901 srcbase = stride * sy;
904 /* assume always area->width < 4096 */
905 if (sx + area->width > 4095) {
906 srcbase += sx * bpp >> 3;
909 /* assume always area->height < 4096 */
910 if (dy + area->height > 4095) {
911 dstbase = stride * dy;
914 /* assume always area->width < 4096 */
915 if (dx + area->width > 4095) {
916 dstbase += dx * bpp >> 3;
920 if (area->sx <= area->dx) {
923 sx += area->width - 1;
924 dx += area->width - 1;
926 if (area->sy <= area->dy) {
929 sy += area->height - 1;
930 dy += area->height - 1;
933 banshee_make_room(par, 8);
935 tdfx_outl(par, SRCFORMAT, fmt);
936 tdfx_outl(par, DSTFORMAT, fmt);
937 tdfx_outl(par, COMMAND_2D, blitcmd);
938 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16));
939 tdfx_outl(par, DSTXY, dx | (dy << 16));
940 tdfx_outl(par, SRCBASE, srcbase);
941 tdfx_outl(par, DSTBASE, dstbase);
942 tdfx_outl(par, LAUNCH_2D, sx | (sy << 16));
945 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
947 struct tdfx_par *par = info->par;
948 int size = image->height * ((image->width * image->depth + 7) >> 3);
950 int i, stride = info->fix.line_length;
951 u32 bpp = info->var.bits_per_pixel;
952 u32 dstfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
953 u8 *chardata = (u8 *) image->data;
959 if (image->depth != 1) {
961 banshee_make_room(par, 6 + ((size + 3) >> 2));
962 srcfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13) |
965 cfb_imageblit(info, image);
969 banshee_make_room(par, 9);
970 switch (info->fix.visual) {
971 case FB_VISUAL_PSEUDOCOLOR:
972 tdfx_outl(par, COLORFORE, image->fg_color);
973 tdfx_outl(par, COLORBACK, image->bg_color);
975 case FB_VISUAL_TRUECOLOR:
977 tdfx_outl(par, COLORFORE,
978 par->palette[image->fg_color]);
979 tdfx_outl(par, COLORBACK,
980 par->palette[image->bg_color]);
983 srcfmt = 0x400000 | BIT(20);
987 /* assume always image->height < 4096 */
988 if (dy + image->height > 4095) {
989 dstbase = stride * dy;
992 /* assume always image->width < 4096 */
993 if (dx + image->width > 4095) {
994 dstbase += dx * bpp >> 3;
998 tdfx_outl(par, DSTBASE, dstbase);
999 tdfx_outl(par, SRCXY, 0);
1000 tdfx_outl(par, DSTXY, dx | (dy << 16));
1001 tdfx_outl(par, COMMAND_2D,
1002 COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
1003 tdfx_outl(par, SRCFORMAT, srcfmt);
1004 tdfx_outl(par, DSTFORMAT, dstfmt);
1005 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
1007 /* A count of how many free FIFO entries we've requested.
1008 * When this goes negative, we need to request more. */
1011 /* Send four bytes at a time of data */
1012 for (i = (size >> 2); i > 0; i--) {
1013 if (--fifo_free < 0) {
1015 banshee_make_room(par, fifo_free);
1017 tdfx_outl(par, LAUNCH_2D, *(u32 *)chardata);
1021 /* Send the leftovers now */
1022 banshee_make_room(par, 3);
1027 tdfx_outl(par, LAUNCH_2D, *chardata);
1030 tdfx_outl(par, LAUNCH_2D, *(u16 *)chardata);
1033 tdfx_outl(par, LAUNCH_2D,
1034 *(u16 *)chardata | (chardata[3] << 24));
1038 #endif /* CONFIG_FB_3DFX_ACCEL */
1040 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1042 struct tdfx_par *par = info->par;
1046 return -EINVAL; /* just to force soft_cursor() call */
1048 /* Too large of a cursor or wrong bpp :-( */
1049 if (cursor->image.width > 64 ||
1050 cursor->image.height > 64 ||
1051 cursor->image.depth > 1)
1054 vidcfg = tdfx_inl(par, VIDPROCCFG);
1056 tdfx_outl(par, VIDPROCCFG, vidcfg | VIDCFG_HWCURSOR_ENABLE);
1058 tdfx_outl(par, VIDPROCCFG, vidcfg & ~VIDCFG_HWCURSOR_ENABLE);
1061 * If the cursor is not be changed this means either we want the
1062 * current cursor state (if enable is set) or we want to query what
1063 * we can do with the cursor (if enable is not set)
1068 /* fix cursor color - XFree86 forgets to restore it properly */
1069 if (cursor->set & FB_CUR_SETCMAP) {
1070 struct fb_cmap cmap = info->cmap;
1071 u32 bg_idx = cursor->image.bg_color;
1072 u32 fg_idx = cursor->image.fg_color;
1073 unsigned long bg_color, fg_color;
1075 fg_color = (((u32)cmap.red[fg_idx] & 0xff00) << 8) |
1076 (((u32)cmap.green[fg_idx] & 0xff00) << 0) |
1077 (((u32)cmap.blue[fg_idx] & 0xff00) >> 8);
1078 bg_color = (((u32)cmap.red[bg_idx] & 0xff00) << 8) |
1079 (((u32)cmap.green[bg_idx] & 0xff00) << 0) |
1080 (((u32)cmap.blue[bg_idx] & 0xff00) >> 8);
1081 banshee_make_room(par, 2);
1082 tdfx_outl(par, HWCURC0, bg_color);
1083 tdfx_outl(par, HWCURC1, fg_color);
1086 if (cursor->set & FB_CUR_SETPOS) {
1087 int x = cursor->image.dx;
1088 int y = cursor->image.dy - info->var.yoffset;
1092 banshee_make_room(par, 1);
1093 tdfx_outl(par, HWCURLOC, (y << 16) + x);
1095 if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1097 * Voodoo 3 and above cards use 2 monochrome cursor patterns.
1098 * The reason is so the card can fetch 8 words at a time
1099 * and are stored on chip for use for the next 8 scanlines.
1100 * This reduces the number of times for access to draw the
1101 * cursor for each screen refresh.
1102 * Each pattern is a bitmap of 64 bit wide and 64 bit high
1103 * (total of 8192 bits or 1024 bytes). The two patterns are
1104 * stored in such a way that pattern 0 always resides in the
1105 * lower half (least significant 64 bits) of a 128 bit word
1106 * and pattern 1 the upper half. If you examine the data of
1107 * the cursor image the graphics card uses then from the
1108 * beginning you see line one of pattern 0, line one of
1109 * pattern 1, line two of pattern 0, line two of pattern 1,
1110 * etc etc. The linear stride for the cursor is always 16 bytes
1111 * (128 bits) which is the maximum cursor width times two for
1112 * the two monochrome patterns.
1114 u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len;
1115 u8 *bitmap = (u8 *)cursor->image.data;
1116 u8 *mask = (u8 *)cursor->mask;
1119 fb_memset(cursorbase, 0, 1024);
1121 for (i = 0; i < cursor->image.height; i++) {
1123 int j = (cursor->image.width + 7) >> 3;
1125 for (; j > 0; j--) {
1126 u8 data = *mask ^ *bitmap;
1127 if (cursor->rop == ROP_COPY)
1128 data = *mask & *bitmap;
1129 /* Pattern 0. Copy the cursor mask to it */
1130 fb_writeb(*mask, cursorbase + h);
1132 /* Pattern 1. Copy the cursor bitmap to it */
1133 fb_writeb(data, cursorbase + h + 8);
1143 static const struct fb_ops tdfxfb_ops = {
1144 .owner = THIS_MODULE,
1145 .fb_check_var = tdfxfb_check_var,
1146 .fb_set_par = tdfxfb_set_par,
1147 .fb_setcolreg = tdfxfb_setcolreg,
1148 .fb_blank = tdfxfb_blank,
1149 .fb_pan_display = tdfxfb_pan_display,
1150 .fb_sync = banshee_wait_idle,
1151 .fb_cursor = tdfxfb_cursor,
1152 #ifdef CONFIG_FB_3DFX_ACCEL
1153 .fb_fillrect = tdfxfb_fillrect,
1154 .fb_copyarea = tdfxfb_copyarea,
1155 .fb_imageblit = tdfxfb_imageblit,
1157 .fb_fillrect = cfb_fillrect,
1158 .fb_copyarea = cfb_copyarea,
1159 .fb_imageblit = cfb_imageblit,
1163 #ifdef CONFIG_FB_3DFX_I2C
1164 /* The voo GPIO registers don't have individual masks for each bit
1165 so we always have to read before writing. */
1167 static void tdfxfb_i2c_setscl(void *data, int val)
1169 struct tdfxfb_i2c_chan *chan = data;
1170 struct tdfx_par *par = chan->par;
1173 r = tdfx_inl(par, VIDSERPARPORT);
1178 tdfx_outl(par, VIDSERPARPORT, r);
1179 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1182 static void tdfxfb_i2c_setsda(void *data, int val)
1184 struct tdfxfb_i2c_chan *chan = data;
1185 struct tdfx_par *par = chan->par;
1188 r = tdfx_inl(par, VIDSERPARPORT);
1193 tdfx_outl(par, VIDSERPARPORT, r);
1194 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1197 /* The GPIO pins are open drain, so the pins always remain outputs.
1198 We rely on the i2c-algo-bit routines to set the pins high before
1199 reading the input from other chips. */
1201 static int tdfxfb_i2c_getscl(void *data)
1203 struct tdfxfb_i2c_chan *chan = data;
1204 struct tdfx_par *par = chan->par;
1206 return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SCL_IN));
1209 static int tdfxfb_i2c_getsda(void *data)
1211 struct tdfxfb_i2c_chan *chan = data;
1212 struct tdfx_par *par = chan->par;
1214 return (0 != (tdfx_inl(par, VIDSERPARPORT) & I2C_SDA_IN));
1217 static void tdfxfb_ddc_setscl(void *data, int val)
1219 struct tdfxfb_i2c_chan *chan = data;
1220 struct tdfx_par *par = chan->par;
1223 r = tdfx_inl(par, VIDSERPARPORT);
1228 tdfx_outl(par, VIDSERPARPORT, r);
1229 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1232 static void tdfxfb_ddc_setsda(void *data, int val)
1234 struct tdfxfb_i2c_chan *chan = data;
1235 struct tdfx_par *par = chan->par;
1238 r = tdfx_inl(par, VIDSERPARPORT);
1243 tdfx_outl(par, VIDSERPARPORT, r);
1244 tdfx_inl(par, VIDSERPARPORT); /* flush posted write */
1247 static int tdfxfb_ddc_getscl(void *data)
1249 struct tdfxfb_i2c_chan *chan = data;
1250 struct tdfx_par *par = chan->par;
1252 return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SCL_IN));
1255 static int tdfxfb_ddc_getsda(void *data)
1257 struct tdfxfb_i2c_chan *chan = data;
1258 struct tdfx_par *par = chan->par;
1260 return (0 != (tdfx_inl(par, VIDSERPARPORT) & DDC_SDA_IN));
1263 static int tdfxfb_setup_ddc_bus(struct tdfxfb_i2c_chan *chan, const char *name,
1268 strscpy(chan->adapter.name, name, sizeof(chan->adapter.name));
1269 chan->adapter.owner = THIS_MODULE;
1270 chan->adapter.class = I2C_CLASS_DDC;
1271 chan->adapter.algo_data = &chan->algo;
1272 chan->adapter.dev.parent = dev;
1273 chan->algo.setsda = tdfxfb_ddc_setsda;
1274 chan->algo.setscl = tdfxfb_ddc_setscl;
1275 chan->algo.getsda = tdfxfb_ddc_getsda;
1276 chan->algo.getscl = tdfxfb_ddc_getscl;
1277 chan->algo.udelay = 10;
1278 chan->algo.timeout = msecs_to_jiffies(500);
1279 chan->algo.data = chan;
1281 i2c_set_adapdata(&chan->adapter, chan);
1283 rc = i2c_bit_add_bus(&chan->adapter);
1285 DPRINTK("I2C bus %s registered.\n", name);
1292 static int tdfxfb_setup_i2c_bus(struct tdfxfb_i2c_chan *chan, const char *name,
1297 strscpy(chan->adapter.name, name, sizeof(chan->adapter.name));
1298 chan->adapter.owner = THIS_MODULE;
1299 chan->adapter.algo_data = &chan->algo;
1300 chan->adapter.dev.parent = dev;
1301 chan->algo.setsda = tdfxfb_i2c_setsda;
1302 chan->algo.setscl = tdfxfb_i2c_setscl;
1303 chan->algo.getsda = tdfxfb_i2c_getsda;
1304 chan->algo.getscl = tdfxfb_i2c_getscl;
1305 chan->algo.udelay = 10;
1306 chan->algo.timeout = msecs_to_jiffies(500);
1307 chan->algo.data = chan;
1309 i2c_set_adapdata(&chan->adapter, chan);
1311 rc = i2c_bit_add_bus(&chan->adapter);
1313 DPRINTK("I2C bus %s registered.\n", name);
1320 static void tdfxfb_create_i2c_busses(struct fb_info *info)
1322 struct tdfx_par *par = info->par;
1324 tdfx_outl(par, VIDINFORMAT, 0x8160);
1325 tdfx_outl(par, VIDSERPARPORT, 0xcffc0020);
1327 par->chan[0].par = par;
1328 par->chan[1].par = par;
1330 tdfxfb_setup_ddc_bus(&par->chan[0], "Voodoo3-DDC", info->dev);
1331 tdfxfb_setup_i2c_bus(&par->chan[1], "Voodoo3-I2C", info->dev);
1334 static void tdfxfb_delete_i2c_busses(struct tdfx_par *par)
1336 if (par->chan[0].par)
1337 i2c_del_adapter(&par->chan[0].adapter);
1338 par->chan[0].par = NULL;
1340 if (par->chan[1].par)
1341 i2c_del_adapter(&par->chan[1].adapter);
1342 par->chan[1].par = NULL;
1345 static int tdfxfb_probe_i2c_connector(struct tdfx_par *par,
1346 struct fb_monspecs *specs)
1350 DPRINTK("Probe DDC Bus\n");
1351 if (par->chan[0].par)
1352 edid = fb_ddc_read(&par->chan[0].adapter);
1355 fb_edid_to_monspecs(edid, specs);
1361 #endif /* CONFIG_FB_3DFX_I2C */
1364 * tdfxfb_probe - Device Initializiation
1366 * @pdev: PCI Device to initialize
1367 * @id: PCI Device ID
1369 * Initializes and allocates resources for PCI device @pdev.
1372 static int tdfxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1374 struct tdfx_par *default_par;
1375 struct fb_info *info;
1377 struct fb_monspecs *specs;
1380 err = aperture_remove_conflicting_pci_devices(pdev, "tdfxfb");
1384 err = pci_enable_device(pdev);
1386 printk(KERN_ERR "tdfxfb: Can't enable pdev: %d\n", err);
1390 info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev);
1395 default_par = info->par;
1396 info->fix = tdfx_fix;
1398 /* Configure the default fb_fix_screeninfo first */
1399 switch (pdev->device) {
1400 case PCI_DEVICE_ID_3DFX_BANSHEE:
1401 strcpy(info->fix.id, "3Dfx Banshee");
1402 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
1404 case PCI_DEVICE_ID_3DFX_VOODOO3:
1405 strcpy(info->fix.id, "3Dfx Voodoo3");
1406 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
1408 case PCI_DEVICE_ID_3DFX_VOODOO5:
1409 strcpy(info->fix.id, "3Dfx Voodoo5");
1410 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
1414 info->fix.mmio_start = pci_resource_start(pdev, 0);
1415 info->fix.mmio_len = pci_resource_len(pdev, 0);
1416 if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len,
1418 printk(KERN_ERR "tdfxfb: Can't reserve regbase\n");
1422 default_par->regbase_virt =
1423 ioremap(info->fix.mmio_start, info->fix.mmio_len);
1424 if (!default_par->regbase_virt) {
1425 printk(KERN_ERR "fb: Can't remap %s register area.\n",
1427 goto out_err_regbase;
1430 info->fix.smem_start = pci_resource_start(pdev, 1);
1431 info->fix.smem_len = do_lfb_size(default_par, pdev->device);
1432 if (!info->fix.smem_len) {
1433 printk(KERN_ERR "fb: Can't count %s memory.\n", info->fix.id);
1434 goto out_err_regbase;
1437 if (!request_mem_region(info->fix.smem_start,
1438 pci_resource_len(pdev, 1), "tdfx smem")) {
1439 printk(KERN_ERR "tdfxfb: Can't reserve smem\n");
1440 goto out_err_regbase;
1443 info->screen_base = ioremap_wc(info->fix.smem_start,
1444 info->fix.smem_len);
1445 if (!info->screen_base) {
1446 printk(KERN_ERR "fb: Can't remap %s framebuffer.\n",
1448 goto out_err_screenbase;
1451 default_par->iobase = pci_resource_start(pdev, 2);
1453 if (!request_region(pci_resource_start(pdev, 2),
1454 pci_resource_len(pdev, 2), "tdfx iobase")) {
1455 printk(KERN_ERR "tdfxfb: Can't reserve iobase\n");
1456 goto out_err_screenbase;
1459 printk(KERN_INFO "fb: %s memory = %dK\n", info->fix.id,
1460 info->fix.smem_len >> 10);
1463 default_par->wc_cookie= arch_phys_wc_add(info->fix.smem_start,
1464 info->fix.smem_len);
1466 info->fix.ypanstep = nopan ? 0 : 1;
1467 info->fix.ywrapstep = nowrap ? 0 : 1;
1469 info->fbops = &tdfxfb_ops;
1470 info->pseudo_palette = default_par->palette;
1471 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1472 #ifdef CONFIG_FB_3DFX_ACCEL
1473 info->flags |= FBINFO_HWACCEL_FILLRECT |
1474 FBINFO_HWACCEL_COPYAREA |
1475 FBINFO_HWACCEL_IMAGEBLIT |
1478 /* reserve 8192 bits for cursor */
1479 /* the 2.4 driver says PAGE_MASK boundary is not enough for Voodoo4 */
1481 info->fix.smem_len = (info->fix.smem_len - 1024) &
1483 specs = &info->monspecs;
1485 info->var.bits_per_pixel = 8;
1486 #ifdef CONFIG_FB_3DFX_I2C
1487 tdfxfb_create_i2c_busses(info);
1488 err = tdfxfb_probe_i2c_connector(default_par, specs);
1491 if (specs->modedb == NULL)
1492 DPRINTK("Unable to get Mode Database\n");
1494 const struct fb_videomode *m;
1496 fb_videomode_to_modelist(specs->modedb,
1499 m = fb_find_best_display(specs, &info->modelist);
1501 fb_videomode_to_var(&info->var, m);
1502 /* fill all other info->var's fields */
1503 if (tdfxfb_check_var(&info->var, info) < 0)
1504 info->var = tdfx_var;
1511 if (!mode_option && !found)
1512 mode_option = "640x480@60";
1515 err = fb_find_mode(&info->var, info, mode_option,
1516 specs->modedb, specs->modedb_len,
1517 NULL, info->var.bits_per_pixel);
1518 if (!err || err == 4)
1519 info->var = tdfx_var;
1523 fb_destroy_modedb(specs->modedb);
1524 specs->modedb = NULL;
1527 /* maximize virtual vertical length */
1528 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3);
1529 info->var.yres_virtual = info->fix.smem_len / lpitch;
1530 if (info->var.yres_virtual < info->var.yres)
1531 goto out_err_iobase;
1533 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1534 printk(KERN_ERR "tdfxfb: Can't allocate color map\n");
1535 goto out_err_iobase;
1538 if (register_framebuffer(info) < 0) {
1539 printk(KERN_ERR "tdfxfb: can't register framebuffer\n");
1540 fb_dealloc_cmap(&info->cmap);
1541 goto out_err_iobase;
1546 pci_set_drvdata(pdev, info);
1550 #ifdef CONFIG_FB_3DFX_I2C
1551 tdfxfb_delete_i2c_busses(default_par);
1553 arch_phys_wc_del(default_par->wc_cookie);
1554 release_region(pci_resource_start(pdev, 2),
1555 pci_resource_len(pdev, 2));
1557 if (info->screen_base)
1558 iounmap(info->screen_base);
1559 release_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1));
1562 * Cleanup after anything that was remapped/allocated.
1564 if (default_par->regbase_virt)
1565 iounmap(default_par->regbase_virt);
1566 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1568 framebuffer_release(info);
1573 static void __init tdfxfb_setup(char *options)
1577 if (!options || !*options)
1580 while ((this_opt = strsep(&options, ",")) != NULL) {
1583 if (!strcmp(this_opt, "nopan")) {
1585 } else if (!strcmp(this_opt, "nowrap")) {
1587 } else if (!strncmp(this_opt, "hwcursor=", 9)) {
1588 hwcursor = simple_strtoul(this_opt + 9, NULL, 0);
1589 } else if (!strncmp(this_opt, "nomtrr", 6)) {
1592 mode_option = this_opt;
1599 * tdfxfb_remove - Device removal
1601 * @pdev: PCI Device to cleanup
1603 * Releases all resources allocated during the course of the driver's
1604 * lifetime for the PCI device @pdev.
1607 static void tdfxfb_remove(struct pci_dev *pdev)
1609 struct fb_info *info = pci_get_drvdata(pdev);
1610 struct tdfx_par *par = info->par;
1612 unregister_framebuffer(info);
1613 #ifdef CONFIG_FB_3DFX_I2C
1614 tdfxfb_delete_i2c_busses(par);
1616 arch_phys_wc_del(par->wc_cookie);
1617 iounmap(par->regbase_virt);
1618 iounmap(info->screen_base);
1620 /* Clean up after reserved regions */
1621 release_region(pci_resource_start(pdev, 2),
1622 pci_resource_len(pdev, 2));
1623 release_mem_region(pci_resource_start(pdev, 1),
1624 pci_resource_len(pdev, 1));
1625 release_mem_region(pci_resource_start(pdev, 0),
1626 pci_resource_len(pdev, 0));
1627 fb_dealloc_cmap(&info->cmap);
1628 framebuffer_release(info);
1631 static int __init tdfxfb_init(void)
1634 char *option = NULL;
1636 if (fb_get_options("tdfxfb", &option))
1639 tdfxfb_setup(option);
1641 return pci_register_driver(&tdfxfb_driver);
1644 static void __exit tdfxfb_exit(void)
1646 pci_unregister_driver(&tdfxfb_driver);
1649 MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>");
1650 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
1651 MODULE_LICENSE("GPL");
1653 module_param(hwcursor, int, 0644);
1654 MODULE_PARM_DESC(hwcursor, "Enable hardware cursor "
1655 "(1=enable, 0=disable, default=1)");
1656 module_param(mode_option, charp, 0);
1657 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
1658 module_param(nomtrr, bool, 0);
1659 MODULE_PARM_DESC(nomtrr, "Disable MTRR support (default: enabled)");
1661 module_init(tdfxfb_init);
1662 module_exit(tdfxfb_exit);