drivers/video/cyber2000fb.c

   1 /*
   2  *  linux/drivers/video/cyber2000fb.c
   3  *
   4  *  Copyright (C) 1998-2002 Russell King
   5  *
   6  *  MIPS and 50xx clock support
   7  *  Copyright (C) 2001 Bradley D. LaRonde <brad@ltc.com>
   8  *
   9  *  32 bit support, text color and panning fixes for modes != 8 bit
  10  *  Copyright (C) 2002 Denis Oliver Kropp <dok@directfb.org>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  *
  16  * Integraphics CyberPro 2000, 2010 and 5000 frame buffer device
  17  *
  18  * Based on cyberfb.c.
  19  *
  20  * Note that we now use the new fbcon fix, var and cmap scheme.  We do
  21  * still have to check which console is the currently displayed one
  22  * however, especially for the colourmap stuff.
  23  *
  24  * We also use the new hotplug PCI subsystem.  I'm not sure if there
  25  * are any such cards, but I'm erring on the side of caution.  We don't
  26  * want to go pop just because someone does have one.
  27  *
  28  * Note that this doesn't work fully in the case of multiple CyberPro
  29  * cards with grabbers.  We currently can only attach to the first
  30  * CyberPro card found.
  31  *
  32  * When we're in truecolour mode, we power down the LUT RAM as a power
  33  * saving feature.  Also, when we enter any of the powersaving modes
  34  * (except soft blanking) we power down the RAMDACs.  This saves about
  35  * 1W, which is roughly 8% of the power consumption of a NetWinder
  36  * (which, incidentally, is about the same saving as a 2.5in hard disk
  37  * entering standby mode.)
  38  */
  39 #include <linux/module.h>
  40 #include <linux/kernel.h>
  41 #include <linux/errno.h>
  42 #include <linux/string.h>
  43 #include <linux/mm.h>
  44 #include <linux/slab.h>
  45 #include <linux/delay.h>
  46 #include <linux/fb.h>
  47 #include <linux/pci.h>
  48 #include <linux/init.h>
  49 #include <linux/io.h>
  50
  51 #include <asm/pgtable.h>
  52 #include <asm/system.h>
  53
  54 #ifdef __arm__
  55 #include <asm/mach-types.h>
  56 #endif
  57
  58 #include "cyber2000fb.h"
  59
  60 struct cfb_info {
  61         struct fb_info          fb;
  62         struct display_switch   *dispsw;
  63         struct display          *display;
  64         struct pci_dev          *dev;
  65         unsigned char           __iomem *region;
  66         unsigned char           __iomem *regs;
  67         u_int                   id;
  68         int                     func_use_count;
  69         u_long                  ref_ps;
  70
  71         /*
  72          * Clock divisors
  73          */
  74         u_int                   divisors[4];
  75
  76         struct {
  77                 u8 red, green, blue;
  78         } palette[NR_PALETTE];
  79
  80         u_char                  mem_ctl1;
  81         u_char                  mem_ctl2;
  82         u_char                  mclk_mult;
  83         u_char                  mclk_div;
  84         /*
  85          * RAMDAC control register is both of these or'ed together
  86          */
  87         u_char                  ramdac_ctrl;
  88         u_char                  ramdac_powerdown;
  89
  90         u32                     pseudo_palette[16];
  91 };
  92
  93 static char *default_font = "Acorn8x8";
  94 module_param(default_font, charp, 0);
  95 MODULE_PARM_DESC(default_font, "Default font name");
  96
  97 /*
  98  * Our access methods.
  99  */
 100 #define cyber2000fb_writel(val, reg, cfb)       writel(val, (cfb)->regs + (reg))
 101 #define cyber2000fb_writew(val, reg, cfb)       writew(val, (cfb)->regs + (reg))
 102 #define cyber2000fb_writeb(val, reg, cfb)       writeb(val, (cfb)->regs + (reg))
 103
 104 #define cyber2000fb_readb(reg, cfb)             readb((cfb)->regs + (reg))
 105
 106 static inline void
 107 cyber2000_crtcw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 108 {
 109         cyber2000fb_writew((reg & 255) | val << 8, 0x3d4, cfb);
 110 }
 111
 112 static inline void
 113 cyber2000_grphw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 114 {
 115         cyber2000fb_writew((reg & 255) | val << 8, 0x3ce, cfb);
 116 }
 117
 118 static inline unsigned int
 119 cyber2000_grphr(unsigned int reg, struct cfb_info *cfb)
 120 {
 121         cyber2000fb_writeb(reg, 0x3ce, cfb);
 122         return cyber2000fb_readb(0x3cf, cfb);
 123 }
 124
 125 static inline void
 126 cyber2000_attrw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 127 {
 128         cyber2000fb_readb(0x3da, cfb);
 129         cyber2000fb_writeb(reg, 0x3c0, cfb);
 130         cyber2000fb_readb(0x3c1, cfb);
 131         cyber2000fb_writeb(val, 0x3c0, cfb);
 132 }
 133
 134 static inline void
 135 cyber2000_seqw(unsigned int reg, unsigned int val, struct cfb_info *cfb)
 136 {
 137         cyber2000fb_writew((reg & 255) | val << 8, 0x3c4, cfb);
 138 }
 139
 140 /* -------------------- Hardware specific routines ------------------------- */
 141
 142 /*
 143  * Hardware Cyber2000 Acceleration
 144  */
 145 static void
 146 cyber2000fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 147 {
 148         struct cfb_info *cfb = (struct cfb_info *)info;
 149         unsigned long dst, col;
 150
 151         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 152                 cfb_fillrect(info, rect);
 153                 return;
 154         }
 155
 156         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 157         cyber2000fb_writew(rect->width - 1, CO_REG_PIXWIDTH, cfb);
 158         cyber2000fb_writew(rect->height - 1, CO_REG_PIXHEIGHT, cfb);
 159
 160         col = rect->color;
 161         if (cfb->fb.var.bits_per_pixel > 8)
 162                 col = ((u32 *)cfb->fb.pseudo_palette)[col];
 163         cyber2000fb_writel(col, CO_REG_FGCOLOUR, cfb);
 164
 165         dst = rect->dx + rect->dy * cfb->fb.var.xres_virtual;
 166         if (cfb->fb.var.bits_per_pixel == 24) {
 167                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 168                 dst *= 3;
 169         }
 170
 171         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 172         cyber2000fb_writeb(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 173         cyber2000fb_writew(CO_CMD_L_PATTERN_FGCOL, CO_REG_CMD_L, cfb);
 174         cyber2000fb_writew(CO_CMD_H_BLITTER, CO_REG_CMD_H, cfb);
 175 }
 176
 177 static void
 178 cyber2000fb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
 179 {
 180         struct cfb_info *cfb = (struct cfb_info *)info;
 181         unsigned int cmd = CO_CMD_L_PATTERN_FGCOL;
 182         unsigned long src, dst;
 183
 184         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT)) {
 185                 cfb_copyarea(info, region);
 186                 return;
 187         }
 188
 189         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 190         cyber2000fb_writew(region->width - 1, CO_REG_PIXWIDTH, cfb);
 191         cyber2000fb_writew(region->height - 1, CO_REG_PIXHEIGHT, cfb);
 192
 193         src = region->sx + region->sy * cfb->fb.var.xres_virtual;
 194         dst = region->dx + region->dy * cfb->fb.var.xres_virtual;
 195
 196         if (region->sx < region->dx) {
 197                 src += region->width - 1;
 198                 dst += region->width - 1;
 199                 cmd |= CO_CMD_L_INC_LEFT;
 200         }
 201
 202         if (region->sy < region->dy) {
 203                 src += (region->height - 1) * cfb->fb.var.xres_virtual;
 204                 dst += (region->height - 1) * cfb->fb.var.xres_virtual;
 205                 cmd |= CO_CMD_L_INC_UP;
 206         }
 207
 208         if (cfb->fb.var.bits_per_pixel == 24) {
 209                 cyber2000fb_writeb(dst, CO_REG_X_PHASE, cfb);
 210                 src *= 3;
 211                 dst *= 3;
 212         }
 213         cyber2000fb_writel(src, CO_REG_SRC1_PTR, cfb);
 214         cyber2000fb_writel(dst, CO_REG_DEST_PTR, cfb);
 215         cyber2000fb_writew(CO_FG_MIX_SRC, CO_REG_FGMIX, cfb);
 216         cyber2000fb_writew(cmd, CO_REG_CMD_L, cfb);
 217         cyber2000fb_writew(CO_CMD_H_FGSRCMAP | CO_CMD_H_BLITTER,
 218                            CO_REG_CMD_H, cfb);
 219 }
 220
 221 static void
 222 cyber2000fb_imageblit(struct fb_info *info, const struct fb_image *image)
 223 {
 224         cfb_imageblit(info, image);
 225         return;
 226 }
 227
 228 static int cyber2000fb_sync(struct fb_info *info)
 229 {
 230         struct cfb_info *cfb = (struct cfb_info *)info;
 231         int count = 100000;
 232
 233         if (!(cfb->fb.var.accel_flags & FB_ACCELF_TEXT))
 234                 return 0;
 235
 236         while (cyber2000fb_readb(CO_REG_CONTROL, cfb) & CO_CTRL_BUSY) {
 237                 if (!count--) {
 238                         debug_printf("accel_wait timed out\n");
 239                         cyber2000fb_writeb(0, CO_REG_CONTROL, cfb);
 240                         break;
 241                 }
 242                 udelay(1);
 243         }
 244         return 0;
 245 }
 246
 247 /*
 248  * ===========================================================================
 249  */
 250
 251 static inline u32 convert_bitfield(u_int val, struct fb_bitfield *bf)
 252 {
 253         u_int mask = (1 << bf->length) - 1;
 254
 255         return (val >> (16 - bf->length) & mask) << bf->offset;
 256 }
 257
 258 /*
 259  *    Set a single color register. Return != 0 for invalid regno.
 260  */
 261 static int
 262 cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 263                       u_int transp, struct fb_info *info)
 264 {
 265         struct cfb_info *cfb = (struct cfb_info *)info;
 266         struct fb_var_screeninfo *var = &cfb->fb.var;
 267         u32 pseudo_val;
 268         int ret = 1;
 269
 270         switch (cfb->fb.fix.visual) {
 271         default:
 272                 return 1;
 273
 274         /*
 275          * Pseudocolour:
 276          *         8     8
 277          * pixel --/--+--/-->  red lut  --> red dac
 278          *            |  8
 279          *            +--/--> green lut --> green dac
 280          *            |  8
 281          *            +--/-->  blue lut --> blue dac
 282          */
 283         case FB_VISUAL_PSEUDOCOLOR:
 284                 if (regno >= NR_PALETTE)
 285                         return 1;
 286
 287                 red >>= 8;
 288                 green >>= 8;
 289                 blue >>= 8;
 290
 291                 cfb->palette[regno].red = red;
 292                 cfb->palette[regno].green = green;
 293                 cfb->palette[regno].blue = blue;
 294
 295                 cyber2000fb_writeb(regno, 0x3c8, cfb);
 296                 cyber2000fb_writeb(red, 0x3c9, cfb);
 297                 cyber2000fb_writeb(green, 0x3c9, cfb);
 298                 cyber2000fb_writeb(blue, 0x3c9, cfb);
 299                 return 0;
 300
 301         /*
 302          * Direct colour:
 303          *         n     rl
 304          * pixel --/--+--/-->  red lut  --> red dac
 305          *            |  gl
 306          *            +--/--> green lut --> green dac
 307          *            |  bl
 308          *            +--/-->  blue lut --> blue dac
 309          * n = bpp, rl = red length, gl = green length, bl = blue length
 310          */
 311         case FB_VISUAL_DIRECTCOLOR:
 312                 red >>= 8;
 313                 green >>= 8;
 314                 blue >>= 8;
 315
 316                 if (var->green.length == 6 && regno < 64) {
 317                         cfb->palette[regno << 2].green = green;
 318
 319                         /*
 320                          * The 6 bits of the green component are applied
 321                          * to the high 6 bits of the LUT.
 322                          */
 323                         cyber2000fb_writeb(regno << 2, 0x3c8, cfb);
 324                         cyber2000fb_writeb(cfb->palette[regno >> 1].red,
 325                                            0x3c9, cfb);
 326                         cyber2000fb_writeb(green, 0x3c9, cfb);
 327                         cyber2000fb_writeb(cfb->palette[regno >> 1].blue,
 328                                            0x3c9, cfb);
 329
 330                         green = cfb->palette[regno << 3].green;
 331
 332                         ret = 0;
 333                 }
 334
 335                 if (var->green.length >= 5 && regno < 32) {
 336                         cfb->palette[regno << 3].red = red;
 337                         cfb->palette[regno << 3].green = green;
 338                         cfb->palette[regno << 3].blue = blue;
 339
 340                         /*
 341                          * The 5 bits of each colour component are
 342                          * applied to the high 5 bits of the LUT.
 343                          */
 344                         cyber2000fb_writeb(regno << 3, 0x3c8, cfb);
 345                         cyber2000fb_writeb(red, 0x3c9, cfb);
 346                         cyber2000fb_writeb(green, 0x3c9, cfb);
 347                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 348                         ret = 0;
 349                 }
 350
 351                 if (var->green.length == 4 && regno < 16) {
 352                         cfb->palette[regno << 4].red = red;
 353                         cfb->palette[regno << 4].green = green;
 354                         cfb->palette[regno << 4].blue = blue;
 355
 356                         /*
 357                          * The 5 bits of each colour component are
 358                          * applied to the high 5 bits of the LUT.
 359                          */
 360                         cyber2000fb_writeb(regno << 4, 0x3c8, cfb);
 361                         cyber2000fb_writeb(red, 0x3c9, cfb);
 362                         cyber2000fb_writeb(green, 0x3c9, cfb);
 363                         cyber2000fb_writeb(blue, 0x3c9, cfb);
 364                         ret = 0;
 365                 }
 366
 367                 /*
 368                  * Since this is only used for the first 16 colours, we
 369                  * don't have to care about overflowing for regno >= 32
 370                  */
 371                 pseudo_val = regno << var->red.offset |
 372                              regno << var->green.offset |
 373                              regno << var->blue.offset;
 374                 break;
 375
 376         /*
 377          * True colour:
 378          *         n     rl
 379          * pixel --/--+--/--> red dac
 380          *            |  gl
 381          *            +--/--> green dac
 382          *            |  bl
 383          *            +--/--> blue dac
 384          * n = bpp, rl = red length, gl = green length, bl = blue length
 385          */
 386         case FB_VISUAL_TRUECOLOR:
 387                 pseudo_val = convert_bitfield(transp ^ 0xffff, &var->transp);
 388                 pseudo_val |= convert_bitfield(red, &var->red);
 389                 pseudo_val |= convert_bitfield(green, &var->green);
 390                 pseudo_val |= convert_bitfield(blue, &var->blue);
 391                 ret = 0;
 392                 break;
 393         }
 394
 395         /*
 396          * Now set our pseudo palette for the CFB16/24/32 drivers.
 397          */
 398         if (regno < 16)
 399                 ((u32 *)cfb->fb.pseudo_palette)[regno] = pseudo_val;
 400
 401         return ret;
 402 }
 403
 404 struct par_info {
 405         /*
 406          * Hardware
 407          */
 408         u_char  clock_mult;
 409         u_char  clock_div;
 410         u_char  extseqmisc;
 411         u_char  co_pixfmt;
 412         u_char  crtc_ofl;
 413         u_char  crtc[19];
 414         u_int   width;
 415         u_int   pitch;
 416         u_int   fetch;
 417
 418         /*
 419          * Other
 420          */
 421         u_char  ramdac;
 422 };
 423
 424 static const u_char crtc_idx[] = {
 425         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
 426         0x08, 0x09,
 427         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
 428 };
 429
 430 static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
 431 {
 432         unsigned int i;
 433         unsigned int val = cfb->ramdac_ctrl | cfb->ramdac_powerdown;
 434
 435         cyber2000fb_writeb(0x56, 0x3ce, cfb);
 436         i = cyber2000fb_readb(0x3cf, cfb);
 437         cyber2000fb_writeb(i | 4, 0x3cf, cfb);
 438         cyber2000fb_writeb(val, 0x3c6, cfb);
 439         cyber2000fb_writeb(i, 0x3cf, cfb);
 440         /* prevent card lock-up observed on x86 with CyberPro 2000 */
 441         cyber2000fb_readb(0x3cf, cfb);
 442 }
 443
 444 static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
 445 {
 446         u_int i;
 447
 448         /*
 449          * Blank palette
 450          */
 451         for (i = 0; i < NR_PALETTE; i++) {
 452                 cyber2000fb_writeb(i, 0x3c8, cfb);
 453                 cyber2000fb_writeb(0, 0x3c9, cfb);
 454                 cyber2000fb_writeb(0, 0x3c9, cfb);
 455                 cyber2000fb_writeb(0, 0x3c9, cfb);
 456         }
 457
 458         cyber2000fb_writeb(0xef, 0x3c2, cfb);
 459         cyber2000_crtcw(0x11, 0x0b, cfb);
 460         cyber2000_attrw(0x11, 0x00, cfb);
 461
 462         cyber2000_seqw(0x00, 0x01, cfb);
 463         cyber2000_seqw(0x01, 0x01, cfb);
 464         cyber2000_seqw(0x02, 0x0f, cfb);
 465         cyber2000_seqw(0x03, 0x00, cfb);
 466         cyber2000_seqw(0x04, 0x0e, cfb);
 467         cyber2000_seqw(0x00, 0x03, cfb);
 468
 469         for (i = 0; i < sizeof(crtc_idx); i++)
 470                 cyber2000_crtcw(crtc_idx[i], hw->crtc[i], cfb);
 471
 472         for (i = 0x0a; i < 0x10; i++)
 473                 cyber2000_crtcw(i, 0, cfb);
 474
 475         cyber2000_grphw(EXT_CRT_VRTOFL, hw->crtc_ofl, cfb);
 476         cyber2000_grphw(0x00, 0x00, cfb);
 477         cyber2000_grphw(0x01, 0x00, cfb);
 478         cyber2000_grphw(0x02, 0x00, cfb);
 479         cyber2000_grphw(0x03, 0x00, cfb);
 480         cyber2000_grphw(0x04, 0x00, cfb);
 481         cyber2000_grphw(0x05, 0x60, cfb);
 482         cyber2000_grphw(0x06, 0x05, cfb);
 483         cyber2000_grphw(0x07, 0x0f, cfb);
 484         cyber2000_grphw(0x08, 0xff, cfb);
 485
 486         /* Attribute controller registers */
 487         for (i = 0; i < 16; i++)
 488                 cyber2000_attrw(i, i, cfb);
 489
 490         cyber2000_attrw(0x10, 0x01, cfb);
 491         cyber2000_attrw(0x11, 0x00, cfb);
 492         cyber2000_attrw(0x12, 0x0f, cfb);
 493         cyber2000_attrw(0x13, 0x00, cfb);
 494         cyber2000_attrw(0x14, 0x00, cfb);
 495
 496         /* PLL registers */
 497         cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb);
 498         cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb);
 499         cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb);
 500         cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb);
 501         cyber2000_grphw(0x90, 0x01, cfb);
 502         cyber2000_grphw(0xb9, 0x80, cfb);
 503         cyber2000_grphw(0xb9, 0x00, cfb);
 504
 505         cfb->ramdac_ctrl = hw->ramdac;
 506         cyber2000fb_write_ramdac_ctrl(cfb);
 507
 508         cyber2000fb_writeb(0x20, 0x3c0, cfb);
 509         cyber2000fb_writeb(0xff, 0x3c6, cfb);
 510
 511         cyber2000_grphw(0x14, hw->fetch, cfb);
 512         cyber2000_grphw(0x15, ((hw->fetch >> 8) & 0x03) |
 513                               ((hw->pitch >> 4) & 0x30), cfb);
 514         cyber2000_grphw(EXT_SEQ_MISC, hw->extseqmisc, cfb);
 515
 516         /*
 517          * Set up accelerator registers
 518          */
 519         cyber2000fb_writew(hw->width, CO_REG_SRC_WIDTH, cfb);
 520         cyber2000fb_writew(hw->width, CO_REG_DEST_WIDTH, cfb);
 521         cyber2000fb_writeb(hw->co_pixfmt, CO_REG_PIXFMT, cfb);
 522 }
 523
 524 static inline int
 525 cyber2000fb_update_start(struct cfb_info *cfb, struct fb_var_screeninfo *var)
 526 {
 527         u_int base = var->yoffset * var->xres_virtual + var->xoffset;
 528
 529         base *= var->bits_per_pixel;
 530
 531         /*
 532          * Convert to bytes and shift two extra bits because DAC
 533          * can only start on 4 byte aligned data.
 534          */
 535         base >>= 5;
 536
 537         if (base >= 1 << 20)
 538                 return -EINVAL;
 539
 540         cyber2000_grphw(0x10, base >> 16 | 0x10, cfb);
 541         cyber2000_crtcw(0x0c, base >> 8, cfb);
 542         cyber2000_crtcw(0x0d, base, cfb);
 543
 544         return 0;
 545 }
 546
 547 static int
 548 cyber2000fb_decode_crtc(struct par_info *hw, struct cfb_info *cfb,
 549                         struct fb_var_screeninfo *var)
 550 {
 551         u_int Htotal, Hblankend, Hsyncend;
 552         u_int Vtotal, Vdispend, Vblankstart, Vblankend, Vsyncstart, Vsyncend;
 553 #define ENCODE_BIT(v, b1, m, b2) ((((v) >> (b1)) & (m)) << (b2))
 554
 555         hw->crtc[13] = hw->pitch;
 556         hw->crtc[17] = 0xe3;
 557         hw->crtc[14] = 0;
 558         hw->crtc[8]  = 0;
 559
 560         Htotal     = var->xres + var->right_margin +
 561                      var->hsync_len + var->left_margin;
 562
 563         if (Htotal > 2080)
 564                 return -EINVAL;
 565
 566         hw->crtc[0] = (Htotal >> 3) - 5;
 567         hw->crtc[1] = (var->xres >> 3) - 1;
 568         hw->crtc[2] = var->xres >> 3;
 569         hw->crtc[4] = (var->xres + var->right_margin) >> 3;
 570
 571         Hblankend   = (Htotal - 4 * 8) >> 3;
 572
 573         hw->crtc[3] = ENCODE_BIT(Hblankend,  0, 0x1f,  0) |
 574                       ENCODE_BIT(1,          0, 0x01,  7);
 575
 576         Hsyncend    = (var->xres + var->right_margin + var->hsync_len) >> 3;
 577
 578         hw->crtc[5] = ENCODE_BIT(Hsyncend,   0, 0x1f,  0) |
 579                       ENCODE_BIT(Hblankend,  5, 0x01,  7);
 580
 581         Vdispend    = var->yres - 1;
 582         Vsyncstart  = var->yres + var->lower_margin;
 583         Vsyncend    = var->yres + var->lower_margin + var->vsync_len;
 584         Vtotal      = var->yres + var->lower_margin + var->vsync_len +
 585                       var->upper_margin - 2;
 586
 587         if (Vtotal > 2047)
 588                 return -EINVAL;
 589
 590         Vblankstart = var->yres + 6;
 591         Vblankend   = Vtotal - 10;
 592
 593         hw->crtc[6]  = Vtotal;
 594         hw->crtc[7]  = ENCODE_BIT(Vtotal,     8, 0x01,  0) |
 595                         ENCODE_BIT(Vdispend,   8, 0x01,  1) |
 596                         ENCODE_BIT(Vsyncstart, 8, 0x01,  2) |
 597                         ENCODE_BIT(Vblankstart, 8, 0x01,  3) |
 598                         ENCODE_BIT(1,          0, 0x01,  4) |
 599                         ENCODE_BIT(Vtotal,     9, 0x01,  5) |
 600                         ENCODE_BIT(Vdispend,   9, 0x01,  6) |
 601                         ENCODE_BIT(Vsyncstart, 9, 0x01,  7);
 602         hw->crtc[9]  = ENCODE_BIT(0,          0, 0x1f,  0) |
 603                         ENCODE_BIT(Vblankstart, 9, 0x01,  5) |
 604                         ENCODE_BIT(1,          0, 0x01,  6);
 605         hw->crtc[10] = Vsyncstart;
 606         hw->crtc[11] = ENCODE_BIT(Vsyncend,   0, 0x0f,  0) |
 607                        ENCODE_BIT(1,          0, 0x01,  7);
 608         hw->crtc[12] = Vdispend;
 609         hw->crtc[15] = Vblankstart;
 610         hw->crtc[16] = Vblankend;
 611         hw->crtc[18] = 0xff;
 612
 613         /*
 614          * overflow - graphics reg 0x11
 615          * 0=VTOTAL:10 1=VDEND:10 2=VRSTART:10 3=VBSTART:10
 616          * 4=LINECOMP:10 5-IVIDEO 6=FIXCNT
 617          */
 618         hw->crtc_ofl =
 619                 ENCODE_BIT(Vtotal, 10, 0x01, 0) |
 620                 ENCODE_BIT(Vdispend, 10, 0x01, 1) |
 621                 ENCODE_BIT(Vsyncstart, 10, 0x01, 2) |
 622                 ENCODE_BIT(Vblankstart, 10, 0x01, 3) |
 623                 EXT_CRT_VRTOFL_LINECOMP10;
 624
 625         /* woody: set the interlaced bit... */
 626         /* FIXME: what about doublescan? */
 627         if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
 628                 hw->crtc_ofl |= EXT_CRT_VRTOFL_INTERLACE;
 629
 630         return 0;
 631 }
 632
 633 /*
 634  * The following was discovered by a good monitor, bit twiddling, theorising
 635  * and but mostly luck.  Strangely, it looks like everyone elses' PLL!
 636  *
 637  * Clock registers:
 638  *   fclock = fpll / div2
 639  *   fpll   = fref * mult / div1
 640  * where:
 641  *   fref = 14.318MHz (69842ps)
 642  *   mult = reg0xb0.7:0
 643  *   div1 = (reg0xb1.5:0 + 1)
 644  *   div2 =  2^(reg0xb1.7:6)
 645  *   fpll should be between 115 and 260 MHz
 646  *  (8696ps and 3846ps)
 647  */
 648 static int
 649 cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb,
 650                          struct fb_var_screeninfo *var)
 651 {
 652         u_long pll_ps = var->pixclock;
 653         const u_long ref_ps = cfb->ref_ps;
 654         u_int div2, t_div1, best_div1, best_mult;
 655         int best_diff;
 656         int vco;
 657
 658         /*
 659          * Step 1:
 660          *   find div2 such that 115MHz < fpll < 260MHz
 661          *   and 0 <= div2 < 4
 662          */
 663         for (div2 = 0; div2 < 4; div2++) {
 664                 u_long new_pll;
 665
 666                 new_pll = pll_ps / cfb->divisors[div2];
 667                 if (8696 > new_pll && new_pll > 3846) {
 668                         pll_ps = new_pll;
 669                         break;
 670                 }
 671         }
 672
 673         if (div2 == 4)
 674                 return -EINVAL;
 675
 676         /*
 677          * Step 2:
 678          *  Given pll_ps and ref_ps, find:
 679          *    pll_ps * 0.995 < pll_ps_calc < pll_ps * 1.005
 680          *  where { 1 < best_div1 < 32, 1 < best_mult < 256 }
 681          *    pll_ps_calc = best_div1 / (ref_ps * best_mult)
 682          */
 683         best_diff = 0x7fffffff;
 684         best_mult = 32;
 685         best_div1 = 255;
 686         for (t_div1 = 32; t_div1 > 1; t_div1 -= 1) {
 687                 u_int rr, t_mult, t_pll_ps;
 688                 int diff;
 689
 690                 /*
 691                  * Find the multiplier for this divisor
 692                  */
 693                 rr = ref_ps * t_div1;
 694                 t_mult = (rr + pll_ps / 2) / pll_ps;
 695
 696                 /*
 697                  * Is the multiplier within the correct range?
 698                  */
 699                 if (t_mult > 256 || t_mult < 2)
 700                         continue;
 701
 702                 /*
 703                  * Calculate the actual clock period from this multiplier
 704                  * and divisor, and estimate the error.
 705                  */
 706                 t_pll_ps = (rr + t_mult / 2) / t_mult;
 707                 diff = pll_ps - t_pll_ps;
 708                 if (diff < 0)
 709                         diff = -diff;
 710
 711                 if (diff < best_diff) {
 712                         best_diff = diff;
 713                         best_mult = t_mult;
 714                         best_div1 = t_div1;
 715                 }
 716
 717                 /*
 718                  * If we hit an exact value, there is no point in continuing.
 719                  */
 720                 if (diff == 0)
 721                         break;
 722         }
 723
 724         /*
 725          * Step 3:
 726          *  combine values
 727          */
 728         hw->clock_mult = best_mult - 1;
 729         hw->clock_div  = div2 << 6 | (best_div1 - 1);
 730
 731         vco = ref_ps * best_div1 / best_mult;
 732         if ((ref_ps == 40690) && (vco < 5556))
 733                 /* Set VFSEL when VCO > 180MHz (5.556 ps). */
 734                 hw->clock_div |= EXT_DCLK_DIV_VFSEL;
 735
 736         return 0;
 737 }
 738
 739 /*
 740  *    Set the User Defined Part of the Display
 741  */
 742 static int
 743 cyber2000fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 744 {
 745         struct cfb_info *cfb = (struct cfb_info *)info;
 746         struct par_info hw;
 747         unsigned int mem;
 748         int err;
 749
 750         var->transp.msb_right   = 0;
 751         var->red.msb_right      = 0;
 752         var->green.msb_right    = 0;
 753         var->blue.msb_right     = 0;
 754         var->transp.offset      = 0;
 755         var->transp.length      = 0;
 756
 757         switch (var->bits_per_pixel) {
 758         case 8: /* PSEUDOCOLOUR, 256 */
 759                 var->red.offset         = 0;
 760                 var->red.length         = 8;
 761                 var->green.offset       = 0;
 762                 var->green.length       = 8;
 763                 var->blue.offset        = 0;
 764                 var->blue.length        = 8;
 765                 break;
 766
 767         case 16:/* DIRECTCOLOUR, 64k or 32k */
 768                 switch (var->green.length) {
 769                 case 6: /* RGB565, 64k */
 770                         var->red.offset         = 11;
 771                         var->red.length         = 5;
 772                         var->green.offset       = 5;
 773                         var->green.length       = 6;
 774                         var->blue.offset        = 0;
 775                         var->blue.length        = 5;
 776                         break;
 777
 778                 default:
 779                 case 5: /* RGB555, 32k */
 780                         var->red.offset         = 10;
 781                         var->red.length         = 5;
 782                         var->green.offset       = 5;
 783                         var->green.length       = 5;
 784                         var->blue.offset        = 0;
 785                         var->blue.length        = 5;
 786                         break;
 787
 788                 case 4: /* RGB444, 4k + transparency? */
 789                         var->transp.offset      = 12;
 790                         var->transp.length      = 4;
 791                         var->red.offset         = 8;
 792                         var->red.length         = 4;
 793                         var->green.offset       = 4;
 794                         var->green.length       = 4;
 795                         var->blue.offset        = 0;
 796                         var->blue.length        = 4;
 797                         break;
 798                 }
 799                 break;
 800
 801         case 24:/* TRUECOLOUR, 16m */
 802                 var->red.offset         = 16;
 803                 var->red.length         = 8;
 804                 var->green.offset       = 8;
 805                 var->green.length       = 8;
 806                 var->blue.offset        = 0;
 807                 var->blue.length        = 8;
 808                 break;
 809
 810         case 32:/* TRUECOLOUR, 16m */
 811                 var->transp.offset      = 24;
 812                 var->transp.length      = 8;
 813                 var->red.offset         = 16;
 814                 var->red.length         = 8;
 815                 var->green.offset       = 8;
 816                 var->green.length       = 8;
 817                 var->blue.offset        = 0;
 818                 var->blue.length        = 8;
 819                 break;
 820
 821         default:
 822                 return -EINVAL;
 823         }
 824
 825         mem = var->xres_virtual * var->yres_virtual * (var->bits_per_pixel / 8);
 826         if (mem > cfb->fb.fix.smem_len)
 827                 var->yres_virtual = cfb->fb.fix.smem_len * 8 /
 828                                     (var->bits_per_pixel * var->xres_virtual);
 829
 830         if (var->yres > var->yres_virtual)
 831                 var->yres = var->yres_virtual;
 832         if (var->xres > var->xres_virtual)
 833                 var->xres = var->xres_virtual;
 834
 835         err = cyber2000fb_decode_clock(&hw, cfb, var);
 836         if (err)
 837                 return err;
 838
 839         err = cyber2000fb_decode_crtc(&hw, cfb, var);
 840         if (err)
 841                 return err;
 842
 843         return 0;
 844 }
 845
 846 static int cyber2000fb_set_par(struct fb_info *info)
 847 {
 848         struct cfb_info *cfb = (struct cfb_info *)info;
 849         struct fb_var_screeninfo *var = &cfb->fb.var;
 850         struct par_info hw;
 851         unsigned int mem;
 852
 853         hw.width = var->xres_virtual;
 854         hw.ramdac = RAMDAC_VREFEN | RAMDAC_DAC8BIT;
 855
 856         switch (var->bits_per_pixel) {
 857         case 8:
 858                 hw.co_pixfmt            = CO_PIXFMT_8BPP;
 859                 hw.pitch                = hw.width >> 3;
 860                 hw.extseqmisc           = EXT_SEQ_MISC_8;
 861                 break;
 862
 863         case 16:
 864                 hw.co_pixfmt            = CO_PIXFMT_16BPP;
 865                 hw.pitch                = hw.width >> 2;
 866
 867                 switch (var->green.length) {
 868                 case 6: /* RGB565, 64k */
 869                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB565;
 870                         break;
 871                 case 5: /* RGB555, 32k */
 872                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB555;
 873                         break;
 874                 case 4: /* RGB444, 4k + transparency? */
 875                         hw.extseqmisc   = EXT_SEQ_MISC_16_RGB444;
 876                         break;
 877                 default:
 878                         BUG();
 879                 }
 880                 break;
 881
 882         case 24:/* TRUECOLOUR, 16m */
 883                 hw.co_pixfmt            = CO_PIXFMT_24BPP;
 884                 hw.width                *= 3;
 885                 hw.pitch                = hw.width >> 3;
 886                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 887                 hw.extseqmisc           = EXT_SEQ_MISC_24_RGB888;
 888                 break;
 889
 890         case 32:/* TRUECOLOUR, 16m */
 891                 hw.co_pixfmt            = CO_PIXFMT_32BPP;
 892                 hw.pitch                = hw.width >> 1;
 893                 hw.ramdac               |= (RAMDAC_BYPASS | RAMDAC_RAMPWRDN);
 894                 hw.extseqmisc           = EXT_SEQ_MISC_32;
 895                 break;
 896
 897         default:
 898                 BUG();
 899         }
 900
 901         /*
 902          * Sigh, this is absolutely disgusting, but caused by
 903          * the way the fbcon developers want to separate out
 904          * the "checking" and the "setting" of the video mode.
 905          *
 906          * If the mode is not suitable for the hardware here,
 907          * we can't prevent it being set by returning an error.
 908          *
 909          * In theory, since NetWinders contain just one VGA card,
 910          * we should never end up hitting this problem.
 911          */
 912         BUG_ON(cyber2000fb_decode_clock(&hw, cfb, var) != 0);
 913         BUG_ON(cyber2000fb_decode_crtc(&hw, cfb, var) != 0);
 914
 915         hw.width -= 1;
 916         hw.fetch = hw.pitch;
 917         if (!(cfb->mem_ctl2 & MEM_CTL2_64BIT))
 918                 hw.fetch <<= 1;
 919         hw.fetch += 1;
 920
 921         cfb->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
 922
 923         /*
 924          * Same here - if the size of the video mode exceeds the
 925          * available RAM, we can't prevent this mode being set.
 926          *
 927          * In theory, since NetWinders contain just one VGA card,
 928          * we should never end up hitting this problem.
 929          */
 930         mem = cfb->fb.fix.line_length * var->yres_virtual;
 931         BUG_ON(mem > cfb->fb.fix.smem_len);
 932
 933         /*
 934          * 8bpp displays are always pseudo colour.  16bpp and above
 935          * are direct colour or true colour, depending on whether
 936          * the RAMDAC palettes are bypassed.  (Direct colour has
 937          * palettes, true colour does not.)
 938          */
 939         if (var->bits_per_pixel == 8)
 940                 cfb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 941         else if (hw.ramdac & RAMDAC_BYPASS)
 942                 cfb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 943         else
 944                 cfb->fb.fix.visual = FB_VISUAL_DIRECTCOLOR;
 945
 946         cyber2000fb_set_timing(cfb, &hw);
 947         cyber2000fb_update_start(cfb, var);
 948
 949         return 0;
 950 }
 951
 952 /*
 953  *    Pan or Wrap the Display
 954  */
 955 static int
 956 cyber2000fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
 957 {
 958         struct cfb_info *cfb = (struct cfb_info *)info;
 959
 960         if (cyber2000fb_update_start(cfb, var))
 961                 return -EINVAL;
 962
 963         cfb->fb.var.xoffset = var->xoffset;
 964         cfb->fb.var.yoffset = var->yoffset;
 965
 966         if (var->vmode & FB_VMODE_YWRAP) {
 967                 cfb->fb.var.vmode |= FB_VMODE_YWRAP;
 968         } else {
 969                 cfb->fb.var.vmode &= ~FB_VMODE_YWRAP;
 970         }
 971
 972         return 0;
 973 }
 974
 975 /*
 976  *    (Un)Blank the display.
 977  *
 978  *  Blank the screen if blank_mode != 0, else unblank. If
 979  *  blank == NULL then the caller blanks by setting the CLUT
 980  *  (Color Look Up Table) to all black. Return 0 if blanking
 981  *  succeeded, != 0 if un-/blanking failed due to e.g. a
 982  *  video mode which doesn't support it. Implements VESA
 983  *  suspend and powerdown modes on hardware that supports
 984  *  disabling hsync/vsync:
 985  *    blank_mode == 2: suspend vsync
 986  *    blank_mode == 3: suspend hsync
 987  *    blank_mode == 4: powerdown
 988  *
 989  *  wms...Enable VESA DMPS compatible powerdown mode
 990  *  run "setterm -powersave powerdown" to take advantage
 991  */
 992 static int cyber2000fb_blank(int blank, struct fb_info *info)
 993 {
 994         struct cfb_info *cfb = (struct cfb_info *)info;
 995         unsigned int sync = 0;
 996         int i;
 997
 998         switch (blank) {
 999         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1000                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_0;
1001                 break;
1002         case FB_BLANK_HSYNC_SUSPEND:    /* hsync off */
1003                 sync = EXT_SYNC_CTL_VS_NORMAL | EXT_SYNC_CTL_HS_0;
1004                 break;
1005         case FB_BLANK_VSYNC_SUSPEND:    /* vsync off */
1006                 sync = EXT_SYNC_CTL_VS_0 | EXT_SYNC_CTL_HS_NORMAL;
1007                 break;
1008         case FB_BLANK_NORMAL:           /* soft blank */
1009         default:                        /* unblank */
1010                 break;
1011         }
1012
1013         cyber2000_grphw(EXT_SYNC_CTL, sync, cfb);
1014
1015         if (blank <= 1) {
1016                 /* turn on ramdacs */
1017                 cfb->ramdac_powerdown &= ~(RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1018                                            RAMDAC_RAMPWRDN);
1019                 cyber2000fb_write_ramdac_ctrl(cfb);
1020         }
1021
1022         /*
1023          * Soft blank/unblank the display.
1024          */
1025         if (blank) {    /* soft blank */
1026                 for (i = 0; i < NR_PALETTE; i++) {
1027                         cyber2000fb_writeb(i, 0x3c8, cfb);
1028                         cyber2000fb_writeb(0, 0x3c9, cfb);
1029                         cyber2000fb_writeb(0, 0x3c9, cfb);
1030                         cyber2000fb_writeb(0, 0x3c9, cfb);
1031                 }
1032         } else {        /* unblank */
1033                 for (i = 0; i < NR_PALETTE; i++) {
1034                         cyber2000fb_writeb(i, 0x3c8, cfb);
1035                         cyber2000fb_writeb(cfb->palette[i].red, 0x3c9, cfb);
1036                         cyber2000fb_writeb(cfb->palette[i].green, 0x3c9, cfb);
1037                         cyber2000fb_writeb(cfb->palette[i].blue, 0x3c9, cfb);
1038                 }
1039         }
1040
1041         if (blank >= 2) {
1042                 /* turn off ramdacs */
1043                 cfb->ramdac_powerdown |= RAMDAC_DACPWRDN | RAMDAC_BYPASS |
1044                                          RAMDAC_RAMPWRDN;
1045                 cyber2000fb_write_ramdac_ctrl(cfb);
1046         }
1047
1048         return 0;
1049 }
1050
1051 static struct fb_ops cyber2000fb_ops = {
1052         .owner          = THIS_MODULE,
1053         .fb_check_var   = cyber2000fb_check_var,
1054         .fb_set_par     = cyber2000fb_set_par,
1055         .fb_setcolreg   = cyber2000fb_setcolreg,
1056         .fb_blank       = cyber2000fb_blank,
1057         .fb_pan_display = cyber2000fb_pan_display,
1058         .fb_fillrect    = cyber2000fb_fillrect,
1059         .fb_copyarea    = cyber2000fb_copyarea,
1060         .fb_imageblit   = cyber2000fb_imageblit,
1061         .fb_sync        = cyber2000fb_sync,
1062 };
1063
1064 /*
1065  * This is the only "static" reference to the internal data structures
1066  * of this driver.  It is here solely at the moment to support the other
1067  * CyberPro modules external to this driver.
1068  */
1069 static struct cfb_info *int_cfb_info;
1070
1071 /*
1072  * Enable access to the extended registers
1073  */
1074 void cyber2000fb_enable_extregs(struct cfb_info *cfb)
1075 {
1076         cfb->func_use_count += 1;
1077
1078         if (cfb->func_use_count == 1) {
1079                 int old;
1080
1081                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1082                 old |= EXT_FUNC_CTL_EXTREGENBL;
1083                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1084         }
1085 }
1086 EXPORT_SYMBOL(cyber2000fb_enable_extregs);
1087
1088 /*
1089  * Disable access to the extended registers
1090  */
1091 void cyber2000fb_disable_extregs(struct cfb_info *cfb)
1092 {
1093         if (cfb->func_use_count == 1) {
1094                 int old;
1095
1096                 old = cyber2000_grphr(EXT_FUNC_CTL, cfb);
1097                 old &= ~EXT_FUNC_CTL_EXTREGENBL;
1098                 cyber2000_grphw(EXT_FUNC_CTL, old, cfb);
1099         }
1100
1101         if (cfb->func_use_count == 0)
1102                 printk(KERN_ERR "disable_extregs: count = 0\n");
1103         else
1104                 cfb->func_use_count -= 1;
1105 }
1106 EXPORT_SYMBOL(cyber2000fb_disable_extregs);
1107
1108 void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var)
1109 {
1110         memcpy(var, &cfb->fb.var, sizeof(struct fb_var_screeninfo));
1111 }
1112 EXPORT_SYMBOL(cyber2000fb_get_fb_var);
1113
1114 /*
1115  * Attach a capture/tv driver to the core CyberX0X0 driver.
1116  */
1117 int cyber2000fb_attach(struct cyberpro_info *info, int idx)
1118 {
1119         if (int_cfb_info != NULL) {
1120                 info->dev             = int_cfb_info->dev;
1121                 info->regs            = int_cfb_info->regs;
1122                 info->fb              = int_cfb_info->fb.screen_base;
1123                 info->fb_size         = int_cfb_info->fb.fix.smem_len;
1124                 info->enable_extregs  = cyber2000fb_enable_extregs;
1125                 info->disable_extregs = cyber2000fb_disable_extregs;
1126                 info->info            = int_cfb_info;
1127
1128                 strlcpy(info->dev_name, int_cfb_info->fb.fix.id,
1129                         sizeof(info->dev_name));
1130         }
1131
1132         return int_cfb_info != NULL;
1133 }
1134 EXPORT_SYMBOL(cyber2000fb_attach);
1135
1136 /*
1137  * Detach a capture/tv driver from the core CyberX0X0 driver.
1138  */
1139 void cyber2000fb_detach(int idx)
1140 {
1141 }
1142 EXPORT_SYMBOL(cyber2000fb_detach);
1143
1144 /*
1145  * These parameters give
1146  * 640x480, hsync 31.5kHz, vsync 60Hz
1147  */
1148 static struct fb_videomode __devinitdata cyber2000fb_default_mode = {
1149         .refresh        = 60,
1150         .xres           = 640,
1151         .yres           = 480,
1152         .pixclock       = 39722,
1153         .left_margin    = 56,
1154         .right_margin   = 16,
1155         .upper_margin   = 34,
1156         .lower_margin   = 9,
1157         .hsync_len      = 88,
1158         .vsync_len      = 2,
1159         .sync           = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1160         .vmode          = FB_VMODE_NONINTERLACED
1161 };
1162
1163 static char igs_regs[] = {
1164         EXT_CRT_IRQ,            0,
1165         EXT_CRT_TEST,           0,
1166         EXT_SYNC_CTL,           0,
1167         EXT_SEG_WRITE_PTR,      0,
1168         EXT_SEG_READ_PTR,       0,
1169         EXT_BIU_MISC,           EXT_BIU_MISC_LIN_ENABLE |
1170                                 EXT_BIU_MISC_COP_ENABLE |
1171                                 EXT_BIU_MISC_COP_BFC,
1172         EXT_FUNC_CTL,           0,
1173         CURS_H_START,           0,
1174         CURS_H_START + 1,       0,
1175         CURS_H_PRESET,          0,
1176         CURS_V_START,           0,
1177         CURS_V_START + 1,       0,
1178         CURS_V_PRESET,          0,
1179         CURS_CTL,               0,
1180         EXT_ATTRIB_CTL,         EXT_ATTRIB_CTL_EXT,
1181         EXT_OVERSCAN_RED,       0,
1182         EXT_OVERSCAN_GREEN,     0,
1183         EXT_OVERSCAN_BLUE,      0,
1184
1185         /* some of these are questionable when we have a BIOS */
1186         EXT_MEM_CTL0,           EXT_MEM_CTL0_7CLK |
1187                                 EXT_MEM_CTL0_RAS_1 |
1188                                 EXT_MEM_CTL0_MULTCAS,
1189         EXT_HIDDEN_CTL1,        0x30,
1190         EXT_FIFO_CTL,           0x0b,
1191         EXT_FIFO_CTL + 1,       0x17,
1192         0x76,                   0x00,
1193         EXT_HIDDEN_CTL4,        0xc8
1194 };
1195
1196 /*
1197  * Initialise the CyberPro hardware.  On the CyberPro5XXXX,
1198  * ensure that we're using the correct PLL (5XXX's may be
1199  * programmed to use an additional set of PLLs.)
1200  */
1201 static void cyberpro_init_hw(struct cfb_info *cfb)
1202 {
1203         int i;
1204
1205         for (i = 0; i < sizeof(igs_regs); i += 2)
1206                 cyber2000_grphw(igs_regs[i], igs_regs[i + 1], cfb);
1207
1208         if (cfb->id == ID_CYBERPRO_5000) {
1209                 unsigned char val;
1210                 cyber2000fb_writeb(0xba, 0x3ce, cfb);
1211                 val = cyber2000fb_readb(0x3cf, cfb) & 0x80;
1212                 cyber2000fb_writeb(val, 0x3cf, cfb);
1213         }
1214 }
1215
1216 static struct cfb_info __devinit *cyberpro_alloc_fb_info(unsigned int id,
1217                                                          char *name)
1218 {
1219         struct cfb_info *cfb;
1220
1221         cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
1222         if (!cfb)
1223                 return NULL;
1224
1225
1226         cfb->id                 = id;
1227
1228         if (id == ID_CYBERPRO_5000)
1229                 cfb->ref_ps     = 40690; /* 24.576 MHz */
1230         else
1231                 cfb->ref_ps     = 69842; /* 14.31818 MHz (69841?) */
1232
1233         cfb->divisors[0]        = 1;
1234         cfb->divisors[1]        = 2;
1235         cfb->divisors[2]        = 4;
1236
1237         if (id == ID_CYBERPRO_2000)
1238                 cfb->divisors[3] = 8;
1239         else
1240                 cfb->divisors[3] = 6;
1241
1242         strcpy(cfb->fb.fix.id, name);
1243
1244         cfb->fb.fix.type        = FB_TYPE_PACKED_PIXELS;
1245         cfb->fb.fix.type_aux    = 0;
1246         cfb->fb.fix.xpanstep    = 0;
1247         cfb->fb.fix.ypanstep    = 1;
1248         cfb->fb.fix.ywrapstep   = 0;
1249
1250         switch (id) {
1251         case ID_IGA_1682:
1252                 cfb->fb.fix.accel = 0;
1253                 break;
1254
1255         case ID_CYBERPRO_2000:
1256                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2000;
1257                 break;
1258
1259         case ID_CYBERPRO_2010:
1260                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER2010;
1261                 break;
1262
1263         case ID_CYBERPRO_5000:
1264                 cfb->fb.fix.accel = FB_ACCEL_IGS_CYBER5000;
1265                 break;
1266         }
1267
1268         cfb->fb.var.nonstd      = 0;
1269         cfb->fb.var.activate    = FB_ACTIVATE_NOW;
1270         cfb->fb.var.height      = -1;
1271         cfb->fb.var.width       = -1;
1272         cfb->fb.var.accel_flags = FB_ACCELF_TEXT;
1273
1274         cfb->fb.fbops           = &cyber2000fb_ops;
1275         cfb->fb.flags           = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1276         cfb->fb.pseudo_palette  = cfb->pseudo_palette;
1277
1278         fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0);
1279
1280         return cfb;
1281 }
1282
1283 static void cyberpro_free_fb_info(struct cfb_info *cfb)
1284 {
1285         if (cfb) {
1286                 /*
1287                  * Free the colourmap
1288                  */
1289                 fb_alloc_cmap(&cfb->fb.cmap, 0, 0);
1290
1291                 kfree(cfb);
1292         }
1293 }
1294
1295 /*
1296  * Parse Cyber2000fb options.  Usage:
1297  *  video=cyber2000:font:fontname
1298  */
1299 #ifndef MODULE
1300 static int cyber2000fb_setup(char *options)
1301 {
1302         char *opt;
1303
1304         if (!options || !*options)
1305                 return 0;
1306
1307         while ((opt = strsep(&options, ",")) != NULL) {
1308                 if (!*opt)
1309                         continue;
1310
1311                 if (strncmp(opt, "font:", 5) == 0) {
1312                         static char default_font_storage[40];
1313
1314                         strlcpy(default_font_storage, opt + 5,
1315                                 sizeof(default_font_storage));
1316                         default_font = default_font_storage;
1317                         continue;
1318                 }
1319
1320                 printk(KERN_ERR "CyberPro20x0: unknown parameter: %s\n", opt);
1321         }
1322         return 0;
1323 }
1324 #endif  /*  MODULE  */
1325
1326 /*
1327  * The CyberPro chips can be placed on many different bus types.
1328  * This probe function is common to all bus types.  The bus-specific
1329  * probe function is expected to have:
1330  *  - enabled access to the linear memory region
1331  *  - memory mapped access to the registers
1332  *  - initialised mem_ctl1 and mem_ctl2 appropriately.
1333  */
1334 static int __devinit cyberpro_common_probe(struct cfb_info *cfb)
1335 {
1336         u_long smem_size;
1337         u_int h_sync, v_sync;
1338         int err;
1339
1340         cyberpro_init_hw(cfb);
1341
1342         /*
1343          * Get the video RAM size and width from the VGA register.
1344          * This should have been already initialised by the BIOS,
1345          * but if it's garbage, claim default 1MB VRAM (woody)
1346          */
1347         cfb->mem_ctl1 = cyber2000_grphr(EXT_MEM_CTL1, cfb);
1348         cfb->mem_ctl2 = cyber2000_grphr(EXT_MEM_CTL2, cfb);
1349
1350         /*
1351          * Determine the size of the memory.
1352          */
1353         switch (cfb->mem_ctl2 & MEM_CTL2_SIZE_MASK) {
1354         case MEM_CTL2_SIZE_4MB:
1355                 smem_size = 0x00400000;
1356                 break;
1357         case MEM_CTL2_SIZE_2MB:
1358                 smem_size = 0x00200000;
1359                 break;
1360         case MEM_CTL2_SIZE_1MB:
1361                 smem_size = 0x00100000;
1362                 break;
1363         default:
1364                 smem_size = 0x00100000;
1365                 break;
1366         }
1367
1368         cfb->fb.fix.smem_len   = smem_size;
1369         cfb->fb.fix.mmio_len   = MMIO_SIZE;
1370         cfb->fb.screen_base    = cfb->region;
1371
1372         err = -EINVAL;
1373         if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0,
1374                           &cyber2000fb_default_mode, 8)) {
1375                 printk(KERN_ERR "%s: no valid mode found\n", cfb->fb.fix.id);
1376                 goto failed;
1377         }
1378
1379         cfb->fb.var.yres_virtual = cfb->fb.fix.smem_len * 8 /
1380                         (cfb->fb.var.bits_per_pixel * cfb->fb.var.xres_virtual);
1381
1382         if (cfb->fb.var.yres_virtual < cfb->fb.var.yres)
1383                 cfb->fb.var.yres_virtual = cfb->fb.var.yres;
1384
1385 /*      fb_set_var(&cfb->fb.var, -1, &cfb->fb); */
1386
1387         /*
1388          * Calculate the hsync and vsync frequencies.  Note that
1389          * we split the 1e12 constant up so that we can preserve
1390          * the precision and fit the results into 32-bit registers.
1391          *  (1953125000 * 512 = 1e12)
1392          */
1393         h_sync = 1953125000 / cfb->fb.var.pixclock;
1394         h_sync = h_sync * 512 / (cfb->fb.var.xres + cfb->fb.var.left_margin +
1395                  cfb->fb.var.right_margin + cfb->fb.var.hsync_len);
1396         v_sync = h_sync / (cfb->fb.var.yres + cfb->fb.var.upper_margin +
1397                  cfb->fb.var.lower_margin + cfb->fb.var.vsync_len);
1398
1399         printk(KERN_INFO "%s: %dKiB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
1400                 cfb->fb.fix.id, cfb->fb.fix.smem_len >> 10,
1401                 cfb->fb.var.xres, cfb->fb.var.yres,
1402                 h_sync / 1000, h_sync % 1000, v_sync);
1403
1404         if (cfb->dev)
1405                 cfb->fb.device = &cfb->dev->dev;
1406         err = register_framebuffer(&cfb->fb);
1407
1408 failed:
1409         return err;
1410 }
1411
1412 static void cyberpro_common_resume(struct cfb_info *cfb)
1413 {
1414         cyberpro_init_hw(cfb);
1415
1416         /*
1417          * Reprogram the MEM_CTL1 and MEM_CTL2 registers
1418          */
1419         cyber2000_grphw(EXT_MEM_CTL1, cfb->mem_ctl1, cfb);
1420         cyber2000_grphw(EXT_MEM_CTL2, cfb->mem_ctl2, cfb);
1421
1422         /*
1423          * Restore the old video mode and the palette.
1424          * We also need to tell fbcon to redraw the console.
1425          */
1426         cyber2000fb_set_par(&cfb->fb);
1427 }
1428
1429 #ifdef CONFIG_ARCH_SHARK
1430
1431 #include <mach/framebuffer.h>
1432
1433 static int __devinit cyberpro_vl_probe(void)
1434 {
1435         struct cfb_info *cfb;
1436         int err = -ENOMEM;
1437
1438         if (!request_mem_region(FB_START, FB_SIZE, "CyberPro2010"))
1439                 return err;
1440
1441         cfb = cyberpro_alloc_fb_info(ID_CYBERPRO_2010, "CyberPro2010");
1442         if (!cfb)
1443                 goto failed_release;
1444
1445         cfb->dev = NULL;
1446         cfb->region = ioremap(FB_START, FB_SIZE);
1447         if (!cfb->region)
1448                 goto failed_ioremap;
1449
1450         cfb->regs = cfb->region + MMIO_OFFSET;
1451         cfb->fb.fix.mmio_start = FB_START + MMIO_OFFSET;
1452         cfb->fb.fix.smem_start = FB_START;
1453
1454         /*
1455          * Bring up the hardware.  This is expected to enable access
1456          * to the linear memory region, and allow access to the memory
1457          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1458          * initialised.
1459          */
1460         cyber2000fb_writeb(0x18, 0x46e8, cfb);
1461         cyber2000fb_writeb(0x01, 0x102, cfb);
1462         cyber2000fb_writeb(0x08, 0x46e8, cfb);
1463         cyber2000fb_writeb(EXT_BIU_MISC, 0x3ce, cfb);
1464         cyber2000fb_writeb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf, cfb);
1465
1466         cfb->mclk_mult = 0xdb;
1467         cfb->mclk_div  = 0x54;
1468
1469         err = cyberpro_common_probe(cfb);
1470         if (err)
1471                 goto failed;
1472
1473         if (int_cfb_info == NULL)
1474                 int_cfb_info = cfb;
1475
1476         return 0;
1477
1478 failed:
1479         iounmap(cfb->region);
1480 failed_ioremap:
1481         cyberpro_free_fb_info(cfb);
1482 failed_release:
1483         release_mem_region(FB_START, FB_SIZE);
1484
1485         return err;
1486 }
1487 #endif /* CONFIG_ARCH_SHARK */
1488
1489 /*
1490  * PCI specific support.
1491  */
1492 #ifdef CONFIG_PCI
1493 /*
1494  * We need to wake up the CyberPro, and make sure its in linear memory
1495  * mode.  Unfortunately, this is specific to the platform and card that
1496  * we are running on.
1497  *
1498  * On x86 and ARM, should we be initialising the CyberPro first via the
1499  * IO registers, and then the MMIO registers to catch all cases?  Can we
1500  * end up in the situation where the chip is in MMIO mode, but not awake
1501  * on an x86 system?
1502  */
1503 static int cyberpro_pci_enable_mmio(struct cfb_info *cfb)
1504 {
1505         unsigned char val;
1506
1507 #if defined(__sparc_v9__)
1508 #error "You lose, consult DaveM."
1509 #elif defined(__sparc__)
1510         /*
1511          * SPARC does not have an "outb" instruction, so we generate
1512          * I/O cycles storing into a reserved memory space at
1513          * physical address 0x3000000
1514          */
1515         unsigned char __iomem *iop;
1516
1517         iop = ioremap(0x3000000, 0x5000);
1518         if (iop == NULL) {
1519                 printk(KERN_ERR "iga5000: cannot map I/O\n");
1520                 return -ENOMEM;
1521         }
1522
1523         writeb(0x18, iop + 0x46e8);
1524         writeb(0x01, iop + 0x102);
1525         writeb(0x08, iop + 0x46e8);
1526         writeb(EXT_BIU_MISC, iop + 0x3ce);
1527         writeb(EXT_BIU_MISC_LIN_ENABLE, iop + 0x3cf);
1528
1529         iounmap(iop);
1530 #else
1531         /*
1532          * Most other machine types are "normal", so
1533          * we use the standard IO-based wakeup.
1534          */
1535         outb(0x18, 0x46e8);
1536         outb(0x01, 0x102);
1537         outb(0x08, 0x46e8);
1538         outb(EXT_BIU_MISC, 0x3ce);
1539         outb(EXT_BIU_MISC_LIN_ENABLE, 0x3cf);
1540 #endif
1541
1542         /*
1543          * Allow the CyberPro to accept PCI burst accesses
1544          */
1545         if (cfb->id == ID_CYBERPRO_2010) {
1546                 printk(KERN_INFO "%s: NOT enabling PCI bursts\n",
1547                        cfb->fb.fix.id);
1548         } else {
1549                 val = cyber2000_grphr(EXT_BUS_CTL, cfb);
1550                 if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) {
1551                         printk(KERN_INFO "%s: enabling PCI bursts\n",
1552                                 cfb->fb.fix.id);
1553
1554                         val |= EXT_BUS_CTL_PCIBURST_WRITE;
1555
1556                         if (cfb->id == ID_CYBERPRO_5000)
1557                                 val |= EXT_BUS_CTL_PCIBURST_READ;
1558
1559                         cyber2000_grphw(EXT_BUS_CTL, val, cfb);
1560                 }
1561         }
1562
1563         return 0;
1564 }
1565
1566 static int __devinit
1567 cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1568 {
1569         struct cfb_info *cfb;
1570         char name[16];
1571         int err;
1572
1573         sprintf(name, "CyberPro%4X", id->device);
1574
1575         err = pci_enable_device(dev);
1576         if (err)
1577                 return err;
1578
1579         err = -ENOMEM;
1580         cfb = cyberpro_alloc_fb_info(id->driver_data, name);
1581         if (!cfb)
1582                 goto failed_release;
1583
1584         err = pci_request_regions(dev, cfb->fb.fix.id);
1585         if (err)
1586                 goto failed_regions;
1587
1588         cfb->dev = dev;
1589         cfb->region = pci_ioremap_bar(dev, 0);
1590         if (!cfb->region)
1591                 goto failed_ioremap;
1592
1593         cfb->regs = cfb->region + MMIO_OFFSET;
1594         cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET;
1595         cfb->fb.fix.smem_start = pci_resource_start(dev, 0);
1596
1597         /*
1598          * Bring up the hardware.  This is expected to enable access
1599          * to the linear memory region, and allow access to the memory
1600          * mapped registers.  Also, mem_ctl1 and mem_ctl2 must be
1601          * initialised.
1602          */
1603         err = cyberpro_pci_enable_mmio(cfb);
1604         if (err)
1605                 goto failed;
1606
1607         /*
1608          * Use MCLK from BIOS. FIXME: what about hotplug?
1609          */
1610         cfb->mclk_mult = cyber2000_grphr(EXT_MCLK_MULT, cfb);
1611         cfb->mclk_div  = cyber2000_grphr(EXT_MCLK_DIV, cfb);
1612
1613 #ifdef __arm__
1614         /*
1615          * MCLK on the NetWinder and the Shark is fixed at 75MHz
1616          */
1617         if (machine_is_netwinder()) {
1618                 cfb->mclk_mult = 0xdb;
1619                 cfb->mclk_div  = 0x54;
1620         }
1621 #endif
1622
1623         err = cyberpro_common_probe(cfb);
1624         if (err)
1625                 goto failed;
1626
1627         /*
1628          * Our driver data
1629          */
1630         pci_set_drvdata(dev, cfb);
1631         if (int_cfb_info == NULL)
1632                 int_cfb_info = cfb;
1633
1634         return 0;
1635
1636 failed:
1637         iounmap(cfb->region);
1638 failed_ioremap:
1639         pci_release_regions(dev);
1640 failed_regions:
1641         cyberpro_free_fb_info(cfb);
1642 failed_release:
1643         return err;
1644 }
1645
1646 static void __devexit cyberpro_pci_remove(struct pci_dev *dev)
1647 {
1648         struct cfb_info *cfb = pci_get_drvdata(dev);
1649
1650         if (cfb) {
1651                 /*
1652                  * If unregister_framebuffer fails, then
1653                  * we will be leaving hooks that could cause
1654                  * oopsen laying around.
1655                  */
1656                 if (unregister_framebuffer(&cfb->fb))
1657                         printk(KERN_WARNING "%s: danger Will Robinson, "
1658                                 "danger danger!  Oopsen imminent!\n",
1659                                 cfb->fb.fix.id);
1660                 iounmap(cfb->region);
1661                 cyberpro_free_fb_info(cfb);
1662
1663                 /*
1664                  * Ensure that the driver data is no longer
1665                  * valid.
1666                  */
1667                 pci_set_drvdata(dev, NULL);
1668                 if (cfb == int_cfb_info)
1669                         int_cfb_info = NULL;
1670
1671                 pci_release_regions(dev);
1672         }
1673 }
1674
1675 static int cyberpro_pci_suspend(struct pci_dev *dev, pm_message_t state)
1676 {
1677         return 0;
1678 }
1679
1680 /*
1681  * Re-initialise the CyberPro hardware
1682  */
1683 static int cyberpro_pci_resume(struct pci_dev *dev)
1684 {
1685         struct cfb_info *cfb = pci_get_drvdata(dev);
1686
1687         if (cfb) {
1688                 cyberpro_pci_enable_mmio(cfb);
1689                 cyberpro_common_resume(cfb);
1690         }
1691
1692         return 0;
1693 }
1694
1695 static struct pci_device_id cyberpro_pci_table[] = {
1696 /*      Not yet
1697  *      { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_1682,
1698  *              PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_IGA_1682 },
1699  */
1700         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2000,
1701                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2000 },
1702         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_2010,
1703                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_2010 },
1704         { PCI_VENDOR_ID_INTERG, PCI_DEVICE_ID_INTERG_5000,
1705                 PCI_ANY_ID, PCI_ANY_ID, 0, 0, ID_CYBERPRO_5000 },
1706         { 0, }
1707 };
1708
1709 MODULE_DEVICE_TABLE(pci, cyberpro_pci_table);
1710
1711 static struct pci_driver cyberpro_driver = {
1712         .name           = "CyberPro",
1713         .probe          = cyberpro_pci_probe,
1714         .remove         = __devexit_p(cyberpro_pci_remove),
1715         .suspend        = cyberpro_pci_suspend,
1716         .resume         = cyberpro_pci_resume,
1717         .id_table       = cyberpro_pci_table
1718 };
1719 #endif
1720
1721 /*
1722  * I don't think we can use the "module_init" stuff here because
1723  * the fbcon stuff may not be initialised yet.  Hence the #ifdef
1724  * around module_init.
1725  *
1726  * Tony: "module_init" is now required
1727  */
1728 static int __init cyber2000fb_init(void)
1729 {
1730         int ret = -1, err;
1731
1732 #ifndef MODULE
1733         char *option = NULL;
1734
1735         if (fb_get_options("cyber2000fb", &option))
1736                 return -ENODEV;
1737         cyber2000fb_setup(option);
1738 #endif
1739
1740 #ifdef CONFIG_ARCH_SHARK
1741         err = cyberpro_vl_probe();
1742         if (!err)
1743                 ret = 0;
1744 #endif
1745 #ifdef CONFIG_PCI
1746         err = pci_register_driver(&cyberpro_driver);
1747         if (!err)
1748                 ret = 0;
1749 #endif
1750
1751         return ret ? err : 0;
1752 }
1753 module_init(cyber2000fb_init);
1754
1755 #ifndef CONFIG_ARCH_SHARK
1756 static void __exit cyberpro_exit(void)
1757 {
1758         pci_unregister_driver(&cyberpro_driver);
1759 }
1760 module_exit(cyberpro_exit);
1761 #endif
1762
1763 MODULE_AUTHOR("Russell King");
1764 MODULE_DESCRIPTION("CyberPro 2000, 2010 and 5000 framebuffer driver");
1765 MODULE_LICENSE("GPL");