am335x-fb: cosmetic: update-copyright
[platform/kernel/u-boot.git] / drivers / video / am335x-fb.h
1 /*
2  * Copyright (C) 2013-2018 Hannes Schmelzer <oe5hpm@oevsv.at> -
3  * B&R Industrial Automation GmbH - http://www.br-automation.com
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #ifndef AM335X_FB_H
9 #define AM335X_FB_H
10
11 #define HSVS_CONTROL    (0x01 << 25)    /*
12                                          * 0 = lcd_lp and lcd_fp are driven on
13                                          * opposite edges of pixel clock than
14                                          * the lcd_pixel_o
15                                          * 1 = lcd_lp and lcd_fp are driven
16                                          * according to bit 24 Note that this
17                                          * bit MUST be set to '0' for Passive
18                                          * Matrix displays the edge timing is
19                                          * fixed
20                                          */
21 #define HSVS_RISEFALL   (0x01 << 24)    /*
22                                          * 0 = lcd_lp and lcd_fp are driven on
23                                          * the rising edge of pixel clock (bit
24                                          * 25 must be set to 1)
25                                          * 1 = lcd_lp and lcd_fp are driven on
26                                          * the falling edge of pixel clock (bit
27                                          * 25 must be set to 1)
28                                          */
29 #define DE_INVERT       (0x01 << 23)    /*
30                                          * 0 = DE is low-active
31                                          * 1 = DE is high-active
32                                          */
33 #define PXCLK_INVERT    (0x01 << 22)    /*
34                                          * 0 = pix-clk is high-active
35                                          * 1 = pic-clk is low-active
36                                          */
37 #define HSYNC_INVERT    (0x01 << 21)    /*
38                                          * 0 = HSYNC is active high
39                                          * 1 = HSYNC is avtive low
40                                          */
41 #define VSYNC_INVERT    (0x01 << 20)    /*
42                                          * 0 = VSYNC is active high
43                                          * 1 = VSYNC is active low
44                                          */
45
46 struct am335x_lcdpanel {
47         unsigned int    hactive;        /* Horizontal active area */
48         unsigned int    vactive;        /* Vertical active area */
49         unsigned int    bpp;            /* bits per pixel */
50         unsigned int    hfp;            /* Horizontal front porch */
51         unsigned int    hbp;            /* Horizontal back porch */
52         unsigned int    hsw;            /* Horizontal Sync Pulse Width */
53         unsigned int    vfp;            /* Vertical front porch */
54         unsigned int    vbp;            /* Vertical back porch */
55         unsigned int    vsw;            /* Vertical Sync Pulse Width */
56         unsigned int    pxl_clk_div;    /* Pixel clock divider*/
57         unsigned int    pol;            /* polarity of sync, clock signals */
58         unsigned int    pup_delay;      /*
59                                          * time in ms after power on to
60                                          * initialization of lcd-controller
61                                          * (VCC ramp up time)
62                                          */
63         unsigned int    pon_delay;      /*
64                                          * time in ms after initialization of
65                                          * lcd-controller (pic stabilization)
66                                          */
67         void (*panel_power_ctrl)(int);  /* fp for power on/off display */
68 };
69
70 int am335xfb_init(struct am335x_lcdpanel *panel);
71
72 #endif  /* AM335X_FB_H */