drivers/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #endif
  57
  58 #include <malloc.h>
  59 #include <usb.h>
  60 #include "usb_ohci.h"
  61
  62 #if defined(CONFIG_ARM920T) || \
  63     defined(CONFIG_S3C2400) || \
  64     defined(CONFIG_S3C2410) || \
  65     defined(CONFIG_440EP) || \
  66     defined(CONFIG_PCI_OHCI) || \
  67     defined(CONFIG_MPC5200)
  68 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  69 #endif
  70
  71 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  72 #undef DEBUG
  73 #undef SHOW_INFO
  74 #undef OHCI_FILL_TRACE
  75
  76 /* For initializing controller (mask in an HCFS mode too) */
  77 #define OHCI_CONTROL_INIT \
  78         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  79
  80 /*
  81  * e.g. PCI controllers need this
  82  */
  83 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  84 # define readl(a) __swap_32(*((vu_long *)(a)))
  85 # define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
  86 #else
  87 # define readl(a) (*((vu_long *)(a)))
  88 # define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  89 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  90
  91 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  92
  93 #ifdef CONFIG_PCI_OHCI
  94 static struct pci_device_id ohci_pci_ids[] = {
  95         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
  96         /* Please add supported PCI OHCI controller ids here */
  97         {0, 0}
  98 };
  99 #endif
 100
 101 #ifdef DEBUG
 102 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 103 #else
 104 #define dbg(format, arg...) do {} while(0)
 105 #endif /* DEBUG */
 106 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 107 #undef SHOW_INFO
 108 #ifdef SHOW_INFO
 109 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 110 #else
 111 #define info(format, arg...) do {} while(0)
 112 #endif
 113
 114 #ifdef CFG_OHCI_BE_CONTROLLER
 115 # define m16_swap(x) cpu_to_be16(x)
 116 # define m32_swap(x) cpu_to_be32(x)
 117 #else
 118 # define m16_swap(x) cpu_to_le16(x)
 119 # define m32_swap(x) cpu_to_le32(x)
 120 #endif /* CFG_OHCI_BE_CONTROLLER */
 121
 122 /* global ohci_t */
 123 static ohci_t gohci;
 124 /* this must be aligned to a 256 byte boundary */
 125 struct ohci_hcca ghcca[1];
 126 /* a pointer to the aligned storage */
 127 struct ohci_hcca *phcca;
 128 /* this allocates EDs for all possible endpoints */
 129 struct ohci_device ohci_dev;
 130 /* RHSC flag */
 131 int got_rhsc;
 132 /* device which was disconnected */
 133 struct usb_device *devgone;
 134
 135 /*-------------------------------------------------------------------------*/
 136
 137 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
 138  * The erratum (#4) description is incorrect.  AMD's workaround waits
 139  * till some bits (mostly reserved) are clear; ok for all revs.
 140  */
 141 #define OHCI_QUIRK_AMD756 0xabcd
 142 #define read_roothub(hc, register, mask) ({ \
 143         u32 temp = readl (&hc->regs->roothub.register); \
 144         if (hc->flags & OHCI_QUIRK_AMD756) \
 145                 while (temp & mask) \
 146                         temp = readl (&hc->regs->roothub.register); \
 147         temp; })
 148
 149 static u32 roothub_a (struct ohci *hc)
 150         { return read_roothub (hc, a, 0xfc0fe000); }
 151 static inline u32 roothub_b (struct ohci *hc)
 152         { return readl (&hc->regs->roothub.b); }
 153 static inline u32 roothub_status (struct ohci *hc)
 154         { return readl (&hc->regs->roothub.status); }
 155 static u32 roothub_portstatus (struct ohci *hc, int i)
 156         { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
 157
 158 /* forward declaration */
 159 static int hc_interrupt (void);
 160 static void
 161 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 162         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 163
 164 /*-------------------------------------------------------------------------*
 165  * URB support functions
 166  *-------------------------------------------------------------------------*/
 167
 168 /* free HCD-private data associated with this URB */
 169
 170 static void urb_free_priv (urb_priv_t * urb)
 171 {
 172         int             i;
 173         int             last;
 174         struct td       * td;
 175
 176         last = urb->length - 1;
 177         if (last >= 0) {
 178                 for (i = 0; i <= last; i++) {
 179                         td = urb->td[i];
 180                         if (td) {
 181                                 td->usb_dev = NULL;
 182                                 urb->td[i] = NULL;
 183                         }
 184                 }
 185         }
 186         free(urb);
 187 }
 188
 189 /*-------------------------------------------------------------------------*/
 190
 191 #ifdef DEBUG
 192 static int sohci_get_current_frame_number (struct usb_device * dev);
 193
 194 /* debug| print the main components of an URB
 195  * small: 0) header + data packets 1) just header */
 196
 197 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 198         unsigned long pipe, void * buffer,
 199         int transfer_len, struct devrequest * setup, char * str, int small)
 200 {
 201         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 202                         str,
 203                         sohci_get_current_frame_number (dev),
 204                         usb_pipedevice (pipe),
 205                         usb_pipeendpoint (pipe),
 206                         usb_pipeout (pipe)? 'O': 'I',
 207                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 208                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 209                         (purb ? purb->actual_length : 0),
 210                         transfer_len, dev->status);
 211 #ifdef  OHCI_VERBOSE_DEBUG
 212         if (!small) {
 213                 int i, len;
 214
 215                 if (usb_pipecontrol (pipe)) {
 216                         printf (__FILE__ ": cmd(8):");
 217                         for (i = 0; i < 8 ; i++)
 218                                 printf (" %02x", ((__u8 *) setup) [i]);
 219                         printf ("\n");
 220                 }
 221                 if (transfer_len > 0 && buffer) {
 222                         printf (__FILE__ ": data(%d/%d):",
 223                                 (purb ? purb->actual_length : 0),
 224                                 transfer_len);
 225                         len = usb_pipeout (pipe)?
 226                                         transfer_len:
 227                                         (purb ? purb->actual_length : 0);
 228                         for (i = 0; i < 16 && i < len; i++)
 229                                 printf (" %02x", ((__u8 *) buffer) [i]);
 230                         printf ("%s\n", i < len? "...": "");
 231                 }
 232         }
 233 #endif
 234 }
 235
 236 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 237 void ep_print_int_eds (ohci_t *ohci, char * str) {
 238         int i, j;
 239          __u32 * ed_p;
 240         for (i= 0; i < 32; i++) {
 241                 j = 5;
 242                 ed_p = &(ohci->hcca->int_table [i]);
 243                 if (*ed_p == 0)
 244                     continue;
 245                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 246                 while (*ed_p != 0 && j--) {
 247                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 248                         printf (" ed: %4x;", ed->hwINFO);
 249                         ed_p = &ed->hwNextED;
 250                 }
 251                 printf ("\n");
 252         }
 253 }
 254
 255 static void ohci_dump_intr_mask (char *label, __u32 mask)
 256 {
 257         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 258                 label,
 259                 mask,
 260                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 261                 (mask & OHCI_INTR_OC) ? " OC" : "",
 262                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 263                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 264                 (mask & OHCI_INTR_UE) ? " UE" : "",
 265                 (mask & OHCI_INTR_RD) ? " RD" : "",
 266                 (mask & OHCI_INTR_SF) ? " SF" : "",
 267                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 268                 (mask & OHCI_INTR_SO) ? " SO" : ""
 269                 );
 270 }
 271
 272 static void maybe_print_eds (char *label, __u32 value)
 273 {
 274         ed_t *edp = (ed_t *)value;
 275
 276         if (value) {
 277                 dbg ("%s %08x", label, value);
 278                 dbg ("%08x", edp->hwINFO);
 279                 dbg ("%08x", edp->hwTailP);
 280                 dbg ("%08x", edp->hwHeadP);
 281                 dbg ("%08x", edp->hwNextED);
 282         }
 283 }
 284
 285 static char * hcfs2string (int state)
 286 {
 287         switch (state) {
 288                 case OHCI_USB_RESET:    return "reset";
 289                 case OHCI_USB_RESUME:   return "resume";
 290                 case OHCI_USB_OPER:     return "operational";
 291                 case OHCI_USB_SUSPEND:  return "suspend";
 292         }
 293         return "?";
 294 }
 295
 296 /* dump control and status registers */
 297 static void ohci_dump_status (ohci_t *controller)
 298 {
 299         struct ohci_regs        *regs = controller->regs;
 300         __u32                   temp;
 301
 302         temp = readl (&regs->revision) & 0xff;
 303         if (temp != 0x10)
 304                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 305
 306         temp = readl (&regs->control);
 307         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 308                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 309                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 310                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 311                 hcfs2string (temp & OHCI_CTRL_HCFS),
 312                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 313                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 314                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 315                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 316                 temp & OHCI_CTRL_CBSR
 317                 );
 318
 319         temp = readl (&regs->cmdstatus);
 320         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 321                 (temp & OHCI_SOC) >> 16,
 322                 (temp & OHCI_OCR) ? " OCR" : "",
 323                 (temp & OHCI_BLF) ? " BLF" : "",
 324                 (temp & OHCI_CLF) ? " CLF" : "",
 325                 (temp & OHCI_HCR) ? " HCR" : ""
 326                 );
 327
 328         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 329         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 330
 331         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 332
 333         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 334         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 335
 336         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 337         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 338
 339         maybe_print_eds ("donehead", readl (&regs->donehead));
 340 }
 341
 342 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 343 {
 344         __u32                   temp, ndp, i;
 345
 346         temp = roothub_a (controller);
 347         ndp = (temp & RH_A_NDP);
 348 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 349         ndp = (ndp == 2) ? 1:0;
 350 #endif
 351         if (verbose) {
 352                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 353                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 354                         (temp & RH_A_NOCP) ? " NOCP" : "",
 355                         (temp & RH_A_OCPM) ? " OCPM" : "",
 356                         (temp & RH_A_DT) ? " DT" : "",
 357                         (temp & RH_A_NPS) ? " NPS" : "",
 358                         (temp & RH_A_PSM) ? " PSM" : "",
 359                         ndp
 360                         );
 361                 temp = roothub_b (controller);
 362                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 363                         temp,
 364                         (temp & RH_B_PPCM) >> 16,
 365                         (temp & RH_B_DR)
 366                         );
 367                 temp = roothub_status (controller);
 368                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 369                         temp,
 370                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 371                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 372                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 373                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 374                         (temp & RH_HS_OCI) ? " OCI" : "",
 375                         (temp & RH_HS_LPS) ? " LPS" : ""
 376                         );
 377         }
 378
 379         for (i = 0; i < ndp; i++) {
 380                 temp = roothub_portstatus (controller, i);
 381                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 382                         i,
 383                         temp,
 384                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 385                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 386                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 387                         (temp & RH_PS_PESC) ? " PESC" : "",
 388                         (temp & RH_PS_CSC) ? " CSC" : "",
 389
 390                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 391                         (temp & RH_PS_PPS) ? " PPS" : "",
 392                         (temp & RH_PS_PRS) ? " PRS" : "",
 393                         (temp & RH_PS_POCI) ? " POCI" : "",
 394                         (temp & RH_PS_PSS) ? " PSS" : "",
 395
 396                         (temp & RH_PS_PES) ? " PES" : "",
 397                         (temp & RH_PS_CCS) ? " CCS" : ""
 398                         );
 399         }
 400 }
 401
 402 static void ohci_dump (ohci_t *controller, int verbose)
 403 {
 404         dbg ("OHCI controller usb-%s state", controller->slot_name);
 405
 406         /* dumps some of the state we know about */
 407         ohci_dump_status (controller);
 408         if (verbose)
 409                 ep_print_int_eds (controller, "hcca");
 410         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 411         ohci_dump_roothub (controller, 1);
 412
 413 #endif /* DEBUG */
 414
 415 /*-------------------------------------------------------------------------*
 416  * Interface functions (URB)
 417  *-------------------------------------------------------------------------*/
 418
 419 /* get a transfer request */
 420
 421 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 422 {
 423         ohci_t *ohci;
 424         ed_t * ed;
 425         urb_priv_t *purb_priv = urb;
 426         int i, size = 0;
 427         struct usb_device *dev = urb->dev;
 428         unsigned long pipe = urb->pipe;
 429         void *buffer = urb->transfer_buffer;
 430         int transfer_len = urb->transfer_buffer_length;
 431         int interval = urb->interval;
 432
 433         ohci = &gohci;
 434
 435         /* when controller's hung, permit only roothub cleanup attempts
 436          * such as powering down ports */
 437         if (ohci->disabled) {
 438                 err("sohci_submit_job: EPIPE");
 439                 return -1;
 440         }
 441
 442         /* we're about to begin a new transaction here so mark the URB unfinished */
 443         urb->finished = 0;
 444
 445         /* every endpoint has a ed, locate and fill it */
 446         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 447                 err("sohci_submit_job: ENOMEM");
 448                 return -1;
 449         }
 450
 451         /* for the private part of the URB we need the number of TDs (size) */
 452         switch (usb_pipetype (pipe)) {
 453                 case PIPE_BULK: /* one TD for every 4096 Byte */
 454                         size = (transfer_len - 1) / 4096 + 1;
 455                         break;
 456                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 457                         size = (transfer_len == 0)? 2:
 458                                                 (transfer_len - 1) / 4096 + 3;
 459                         break;
 460                 case PIPE_INTERRUPT: /* 1 TD */
 461                         size = 1;
 462                         break;
 463         }
 464
 465         ed->purb = urb;
 466
 467         if (size >= (N_URB_TD - 1)) {
 468                 err("need %d TDs, only have %d", size, N_URB_TD);
 469                 return -1;
 470         }
 471         purb_priv->pipe = pipe;
 472
 473         /* fill the private part of the URB */
 474         purb_priv->length = size;
 475         purb_priv->ed = ed;
 476         purb_priv->actual_length = 0;
 477
 478         /* allocate the TDs */
 479         /* note that td[0] was allocated in ep_add_ed */
 480         for (i = 0; i < size; i++) {
 481                 purb_priv->td[i] = td_alloc (dev);
 482                 if (!purb_priv->td[i]) {
 483                         purb_priv->length = i;
 484                         urb_free_priv (purb_priv);
 485                         err("sohci_submit_job: ENOMEM");
 486                         return -1;
 487                 }
 488         }
 489
 490         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 491                 urb_free_priv (purb_priv);
 492                 err("sohci_submit_job: EINVAL");
 493                 return -1;
 494         }
 495
 496         /* link the ed into a chain if is not already */
 497         if (ed->state != ED_OPER)
 498                 ep_link (ohci, ed);
 499
 500         /* fill the TDs and link it to the ed */
 501         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 502
 503         return 0;
 504 }
 505
 506 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 507 {
 508         struct ohci_regs *regs = hc->regs;
 509
 510         switch (usb_pipetype (urb->pipe)) {
 511         case PIPE_INTERRUPT:
 512                 /* implicitly requeued */
 513                 if (urb->dev->irq_handle &&
 514                                 (urb->dev->irq_act_len = urb->actual_length)) {
 515                         writel (OHCI_INTR_WDH, &regs->intrenable);
 516                         readl (&regs->intrenable); /* PCI posting flush */
 517                         urb->dev->irq_handle(urb->dev);
 518                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 519                         readl (&regs->intrdisable); /* PCI posting flush */
 520                 }
 521                 urb->actual_length = 0;
 522                 td_submit_job (
 523                                 urb->dev,
 524                                 urb->pipe,
 525                                 urb->transfer_buffer,
 526                                 urb->transfer_buffer_length,
 527                                 NULL,
 528                                 urb,
 529                                 urb->interval);
 530                 break;
 531         case PIPE_CONTROL:
 532         case PIPE_BULK:
 533                 break;
 534         default:
 535                 return 0;
 536         }
 537         return 1;
 538 }
 539
 540 /*-------------------------------------------------------------------------*/
 541
 542 #ifdef DEBUG
 543 /* tell us the current USB frame number */
 544
 545 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 546 {
 547         ohci_t *ohci = &gohci;
 548
 549         return m16_swap (ohci->hcca->frame_no);
 550 }
 551 #endif
 552
 553 /*-------------------------------------------------------------------------*
 554  * ED handling functions
 555  *-------------------------------------------------------------------------*/
 556
 557 /* search for the right branch to insert an interrupt ed into the int tree
 558  * do some load ballancing;
 559  * returns the branch and
 560  * sets the interval to interval = 2^integer (ld (interval)) */
 561
 562 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 563 {
 564         int i, branch = 0;
 565
 566         /* search for the least loaded interrupt endpoint
 567          * branch of all 32 branches
 568          */
 569         for (i = 0; i < 32; i++)
 570                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 571                         branch = i;
 572
 573         branch = branch % interval;
 574         for (i = branch; i < 32; i += interval)
 575                 ohci->ohci_int_load [i] += load;
 576
 577         return branch;
 578 }
 579
 580 /*-------------------------------------------------------------------------*/
 581
 582 /*  2^int( ld (inter)) */
 583
 584 static int ep_2_n_interval (int inter)
 585 {
 586         int i;
 587         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 588         return 1 << i;
 589 }
 590
 591 /*-------------------------------------------------------------------------*/
 592
 593 /* the int tree is a binary tree
 594  * in order to process it sequentially the indexes of the branches have to be mapped
 595  * the mapping reverses the bits of a word of num_bits length */
 596
 597 static int ep_rev (int num_bits, int word)
 598 {
 599         int i, wout = 0;
 600
 601         for (i = 0; i < num_bits; i++)
 602                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 603         return wout;
 604 }
 605
 606 /*-------------------------------------------------------------------------*
 607  * ED handling functions
 608  *-------------------------------------------------------------------------*/
 609
 610 /* link an ed into one of the HC chains */
 611
 612 static int ep_link (ohci_t *ohci, ed_t *edi)
 613 {
 614         volatile ed_t *ed = edi;
 615         int int_branch;
 616         int i;
 617         int inter;
 618         int interval;
 619         int load;
 620         __u32 * ed_p;
 621
 622         ed->state = ED_OPER;
 623         ed->int_interval = 0;
 624
 625         switch (ed->type) {
 626         case PIPE_CONTROL:
 627                 ed->hwNextED = 0;
 628                 if (ohci->ed_controltail == NULL) {
 629                         writel (ed, &ohci->regs->ed_controlhead);
 630                 } else {
 631                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 632                 }
 633                 ed->ed_prev = ohci->ed_controltail;
 634                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 635                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 636                         ohci->hc_control |= OHCI_CTRL_CLE;
 637                         writel (ohci->hc_control, &ohci->regs->control);
 638                 }
 639                 ohci->ed_controltail = edi;
 640                 break;
 641
 642         case PIPE_BULK:
 643                 ed->hwNextED = 0;
 644                 if (ohci->ed_bulktail == NULL) {
 645                         writel (ed, &ohci->regs->ed_bulkhead);
 646                 } else {
 647                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 648                 }
 649                 ed->ed_prev = ohci->ed_bulktail;
 650                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 651                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 652                         ohci->hc_control |= OHCI_CTRL_BLE;
 653                         writel (ohci->hc_control, &ohci->regs->control);
 654                 }
 655                 ohci->ed_bulktail = edi;
 656                 break;
 657
 658         case PIPE_INTERRUPT:
 659                 load = ed->int_load;
 660                 interval = ep_2_n_interval (ed->int_period);
 661                 ed->int_interval = interval;
 662                 int_branch = ep_int_ballance (ohci, interval, load);
 663                 ed->int_branch = int_branch;
 664
 665                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 666                         inter = 1;
 667                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 668                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 669                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 670                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 671                         ed->hwNextED = *ed_p;
 672                         *ed_p = m32_swap(ed);
 673                 }
 674                 break;
 675         }
 676         return 0;
 677 }
 678
 679 /*-------------------------------------------------------------------------*/
 680
 681 /* scan the periodic table to find and unlink this ED */
 682 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 683                 unsigned index, unsigned period)
 684 {
 685         for (; index < NUM_INTS; index += period) {
 686                 __u32   *ed_p = &ohci->hcca->int_table [index];
 687
 688                 /* ED might have been unlinked through another path */
 689                 while (*ed_p != 0) {
 690                         if (((struct ed *)m32_swap (ed_p)) == ed) {
 691                                 *ed_p = ed->hwNextED;
 692                                 break;
 693                         }
 694                         ed_p = & (((struct ed *)m32_swap (ed_p))->hwNextED);
 695                 }
 696         }
 697 }
 698
 699 /* unlink an ed from one of the HC chains.
 700  * just the link to the ed is unlinked.
 701  * the link from the ed still points to another operational ed or 0
 702  * so the HC can eventually finish the processing of the unlinked ed */
 703
 704 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 705 {
 706         volatile ed_t *ed = edi;
 707         int i;
 708
 709         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 710
 711         switch (ed->type) {
 712         case PIPE_CONTROL:
 713                 if (ed->ed_prev == NULL) {
 714                         if (!ed->hwNextED) {
 715                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 716                                 writel (ohci->hc_control, &ohci->regs->control);
 717                         }
 718                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 719                 } else {
 720                         ed->ed_prev->hwNextED = ed->hwNextED;
 721                 }
 722                 if (ohci->ed_controltail == ed) {
 723                         ohci->ed_controltail = ed->ed_prev;
 724                 } else {
 725                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 726                 }
 727                 break;
 728
 729         case PIPE_BULK:
 730                 if (ed->ed_prev == NULL) {
 731                         if (!ed->hwNextED) {
 732                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 733                                 writel (ohci->hc_control, &ohci->regs->control);
 734                         }
 735                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 736                 } else {
 737                         ed->ed_prev->hwNextED = ed->hwNextED;
 738                 }
 739                 if (ohci->ed_bulktail == ed) {
 740                         ohci->ed_bulktail = ed->ed_prev;
 741                 } else {
 742                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 743                 }
 744                 break;
 745
 746         case PIPE_INTERRUPT:
 747                 periodic_unlink (ohci, ed, 0, 1);
 748                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 749                     ohci->ohci_int_load[i] -= ed->int_load;
 750                 break;
 751         }
 752         ed->state = ED_UNLINK;
 753         return 0;
 754 }
 755
 756 /*-------------------------------------------------------------------------*/
 757
 758 /* add/reinit an endpoint; this should be done once at the
 759  * usb_set_configuration command, but the USB stack is a little bit
 760  * stateless so we do it at every transaction if the state of the ed
 761  * is ED_NEW then a dummy td is added and the state is changed to
 762  * ED_UNLINK in all other cases the state is left unchanged the ed
 763  * info fields are setted anyway even though most of them should not
 764  * change
 765  */
 766 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 767                 int interval, int load)
 768 {
 769         td_t *td;
 770         ed_t *ed_ret;
 771         volatile ed_t *ed;
 772
 773         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 774                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 775
 776         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 777                 err("ep_add_ed: pending delete");
 778                 /* pending delete request */
 779                 return NULL;
 780         }
 781
 782         if (ed->state == ED_NEW) {
 783                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 784                 /* dummy td; end of td list for ed */
 785                 td = td_alloc (usb_dev);
 786                 ed->hwTailP = m32_swap ((unsigned long)td);
 787                 ed->hwHeadP = ed->hwTailP;
 788                 ed->state = ED_UNLINK;
 789                 ed->type = usb_pipetype (pipe);
 790                 ohci_dev.ed_cnt++;
 791         }
 792
 793         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 794                         | usb_pipeendpoint (pipe) << 7
 795                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 796                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 797                         | usb_pipeslow (pipe) << 13
 798                         | usb_maxpacket (usb_dev, pipe) << 16);
 799
 800         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 801                 ed->int_period = interval;
 802                 ed->int_load = load;
 803         }
 804
 805         return ed_ret;
 806 }
 807
 808 /*-------------------------------------------------------------------------*
 809  * TD handling functions
 810  *-------------------------------------------------------------------------*/
 811
 812 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 813
 814 static void td_fill (ohci_t *ohci, unsigned int info,
 815         void *data, int len,
 816         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 817 {
 818         volatile td_t  *td, *td_pt;
 819 #ifdef OHCI_FILL_TRACE
 820         int i;
 821 #endif
 822
 823         if (index > urb_priv->length) {
 824                 err("index > length");
 825                 return;
 826         }
 827         /* use this td as the next dummy */
 828         td_pt = urb_priv->td [index];
 829         td_pt->hwNextTD = 0;
 830
 831         /* fill the old dummy TD */
 832         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 833
 834         td->ed = urb_priv->ed;
 835         td->next_dl_td = NULL;
 836         td->index = index;
 837         td->data = (__u32)data;
 838 #ifdef OHCI_FILL_TRACE
 839         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 840                 for (i = 0; i < len; i++)
 841                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 842                 printf("\n");
 843         }
 844 #endif
 845         if (!len)
 846                 data = 0;
 847
 848         td->hwINFO = m32_swap (info);
 849         td->hwCBP = m32_swap ((unsigned long)data);
 850         if (data)
 851                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 852         else
 853                 td->hwBE = 0;
 854         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 855
 856         /* append to queue */
 857         td->ed->hwTailP = td->hwNextTD;
 858 }
 859
 860 /*-------------------------------------------------------------------------*/
 861
 862 /* prepare all TDs of a transfer */
 863
 864 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 865         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 866 {
 867         ohci_t *ohci = &gohci;
 868         int data_len = transfer_len;
 869         void *data;
 870         int cnt = 0;
 871         __u32 info = 0;
 872         unsigned int toggle = 0;
 873
 874         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 875         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 876                 toggle = TD_T_TOGGLE;
 877         } else {
 878                 toggle = TD_T_DATA0;
 879                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 880         }
 881         urb->td_cnt = 0;
 882         if (data_len)
 883                 data = buffer;
 884         else
 885                 data = 0;
 886
 887         switch (usb_pipetype (pipe)) {
 888         case PIPE_BULK:
 889                 info = usb_pipeout (pipe)?
 890                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 891                 while(data_len > 4096) {
 892                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 893                         data += 4096; data_len -= 4096; cnt++;
 894                 }
 895                 info = usb_pipeout (pipe)?
 896                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 897                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 898                 cnt++;
 899
 900                 if (!ohci->sleeping)
 901                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 902                 break;
 903
 904         case PIPE_CONTROL:
 905                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 906                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 907                 if (data_len > 0) {
 908                         info = usb_pipeout (pipe)?
 909                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 910                         /* NOTE:  mishandles transfers >8K, some >4K */
 911                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 912                 }
 913                 info = usb_pipeout (pipe)?
 914                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 915                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 916                 if (!ohci->sleeping)
 917                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 918                 break;
 919
 920         case PIPE_INTERRUPT:
 921                 info = usb_pipeout (urb->pipe)?
 922                         TD_CC | TD_DP_OUT | toggle:
 923                         TD_CC | TD_R | TD_DP_IN | toggle;
 924                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 925                 break;
 926         }
 927         if (urb->length != cnt)
 928                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 929 }
 930
 931 /*-------------------------------------------------------------------------*
 932  * Done List handling functions
 933  *-------------------------------------------------------------------------*/
 934
 935 /* calculate the transfer length and update the urb */
 936
 937 static void dl_transfer_length(td_t * td)
 938 {
 939         __u32 tdINFO, tdBE, tdCBP;
 940         urb_priv_t *lurb_priv = td->ed->purb;
 941
 942         tdINFO = m32_swap (td->hwINFO);
 943         tdBE   = m32_swap (td->hwBE);
 944         tdCBP  = m32_swap (td->hwCBP);
 945
 946         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 947             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 948                 if (tdBE != 0) {
 949                         if (td->hwCBP == 0)
 950                                 lurb_priv->actual_length += tdBE - td->data + 1;
 951                         else
 952                                 lurb_priv->actual_length += tdCBP - td->data;
 953                 }
 954         }
 955 }
 956
 957 /*-------------------------------------------------------------------------*/
 958
 959 /* replies to the request have to be on a FIFO basis so
 960  * we reverse the reversed done-list */
 961
 962 static td_t * dl_reverse_done_list (ohci_t *ohci)
 963 {
 964         __u32 td_list_hc;
 965         td_t *td_rev = NULL;
 966         td_t *td_list = NULL;
 967         urb_priv_t *lurb_priv = NULL;
 968
 969         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 970         ohci->hcca->done_head = 0;
 971
 972         while (td_list_hc) {
 973                 td_list = (td_t *)td_list_hc;
 974
 975                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 976                         lurb_priv = td_list->ed->purb;
 977                         dbg(" USB-error/status: %x : %p",
 978                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 979                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 980                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 981                                         td_list->ed->hwHeadP =
 982                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 983                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 984                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 985                                 } else
 986                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 987                         }
 988 #ifdef CONFIG_MPC5200
 989                         td_list->hwNextTD = 0;
 990 #endif
 991                 }
 992
 993                 td_list->next_dl_td = td_rev;
 994                 td_rev = td_list;
 995                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
 996         }
 997         return td_list;
 998 }
 999
1000 /*-------------------------------------------------------------------------*/
1001
1002 /* td done list */
1003 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1004 {
1005         td_t *td_list_next = NULL;
1006         ed_t *ed;
1007         int cc = 0;
1008         int stat = 0;
1009         /* urb_t *urb; */
1010         urb_priv_t *lurb_priv;
1011         __u32 tdINFO, edHeadP, edTailP;
1012
1013         while (td_list) {
1014                 td_list_next = td_list->next_dl_td;
1015
1016                 tdINFO = m32_swap (td_list->hwINFO);
1017
1018                 ed = td_list->ed;
1019                 lurb_priv = ed->purb;
1020
1021                 dl_transfer_length(td_list);
1022
1023                 /* error code of transfer */
1024                 cc = TD_CC_GET (tdINFO);
1025                 if (cc != 0) {
1026                         dbg("ConditionCode %#x", cc);
1027                         stat = cc_to_error[cc];
1028                 }
1029
1030                 /* see if this done list makes for all TD's of current URB,
1031                  * and mark the URB finished if so */
1032                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1033 #if 1
1034                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1035                             (lurb_priv->state != URB_DEL))
1036 #else
1037                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1038 #endif
1039                                 lurb_priv->finished = sohci_return_job(ohci,
1040                                                 lurb_priv);
1041                         else
1042                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1043                 } else
1044                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1045                                 lurb_priv->length);
1046                 if (ed->state != ED_NEW &&
1047                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1048                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1049                         edTailP = m32_swap (ed->hwTailP);
1050
1051                         /* unlink eds if they are not busy */
1052                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1053                                 ep_unlink (ohci, ed);
1054                 }
1055
1056                 td_list = td_list_next;
1057         }
1058         return stat;
1059 }
1060
1061 /*-------------------------------------------------------------------------*
1062  * Virtual Root Hub
1063  *-------------------------------------------------------------------------*/
1064
1065 /* Device descriptor */
1066 static __u8 root_hub_dev_des[] =
1067 {
1068         0x12,       /*  __u8  bLength; */
1069         0x01,       /*  __u8  bDescriptorType; Device */
1070         0x10,       /*  __u16 bcdUSB; v1.1 */
1071         0x01,
1072         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1073         0x00,       /*  __u8  bDeviceSubClass; */
1074         0x00,       /*  __u8  bDeviceProtocol; */
1075         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1076         0x00,       /*  __u16 idVendor; */
1077         0x00,
1078         0x00,       /*  __u16 idProduct; */
1079         0x00,
1080         0x00,       /*  __u16 bcdDevice; */
1081         0x00,
1082         0x00,       /*  __u8  iManufacturer; */
1083         0x01,       /*  __u8  iProduct; */
1084         0x00,       /*  __u8  iSerialNumber; */
1085         0x01        /*  __u8  bNumConfigurations; */
1086 };
1087
1088 /* Configuration descriptor */
1089 static __u8 root_hub_config_des[] =
1090 {
1091         0x09,       /*  __u8  bLength; */
1092         0x02,       /*  __u8  bDescriptorType; Configuration */
1093         0x19,       /*  __u16 wTotalLength; */
1094         0x00,
1095         0x01,       /*  __u8  bNumInterfaces; */
1096         0x01,       /*  __u8  bConfigurationValue; */
1097         0x00,       /*  __u8  iConfiguration; */
1098         0x40,       /*  __u8  bmAttributes;
1099                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1100         0x00,       /*  __u8  MaxPower; */
1101
1102         /* interface */
1103         0x09,       /*  __u8  if_bLength; */
1104         0x04,       /*  __u8  if_bDescriptorType; Interface */
1105         0x00,       /*  __u8  if_bInterfaceNumber; */
1106         0x00,       /*  __u8  if_bAlternateSetting; */
1107         0x01,       /*  __u8  if_bNumEndpoints; */
1108         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1109         0x00,       /*  __u8  if_bInterfaceSubClass; */
1110         0x00,       /*  __u8  if_bInterfaceProtocol; */
1111         0x00,       /*  __u8  if_iInterface; */
1112
1113         /* endpoint */
1114         0x07,       /*  __u8  ep_bLength; */
1115         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1116         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1117         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1118         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1119         0x00,
1120         0xff        /*  __u8  ep_bInterval; 255 ms */
1121 };
1122
1123 static unsigned char root_hub_str_index0[] =
1124 {
1125         0x04,                   /*  __u8  bLength; */
1126         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1127         0x09,                   /*  __u8  lang ID */
1128         0x04,                   /*  __u8  lang ID */
1129 };
1130
1131 static unsigned char root_hub_str_index1[] =
1132 {
1133         28,                     /*  __u8  bLength; */
1134         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1135         'O',                    /*  __u8  Unicode */
1136         0,                              /*  __u8  Unicode */
1137         'H',                    /*  __u8  Unicode */
1138         0,                              /*  __u8  Unicode */
1139         'C',                    /*  __u8  Unicode */
1140         0,                              /*  __u8  Unicode */
1141         'I',                    /*  __u8  Unicode */
1142         0,                              /*  __u8  Unicode */
1143         ' ',                    /*  __u8  Unicode */
1144         0,                              /*  __u8  Unicode */
1145         'R',                    /*  __u8  Unicode */
1146         0,                              /*  __u8  Unicode */
1147         'o',                    /*  __u8  Unicode */
1148         0,                              /*  __u8  Unicode */
1149         'o',                    /*  __u8  Unicode */
1150         0,                              /*  __u8  Unicode */
1151         't',                    /*  __u8  Unicode */
1152         0,                              /*  __u8  Unicode */
1153         ' ',                    /*  __u8  Unicode */
1154         0,                              /*  __u8  Unicode */
1155         'H',                    /*  __u8  Unicode */
1156         0,                              /*  __u8  Unicode */
1157         'u',                    /*  __u8  Unicode */
1158         0,                              /*  __u8  Unicode */
1159         'b',                    /*  __u8  Unicode */
1160         0,                              /*  __u8  Unicode */
1161 };
1162
1163 /* Hub class-specific descriptor is constructed dynamically */
1164
1165 /*-------------------------------------------------------------------------*/
1166
1167 #define OK(x)                   len = (x); break
1168 #ifdef DEBUG
1169 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1170 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1171 #else
1172 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1173 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1174 #endif
1175 #define RD_RH_STAT              roothub_status(&gohci)
1176 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1177
1178 /* request to virtual root hub */
1179
1180 int rh_check_port_status(ohci_t *controller)
1181 {
1182         __u32 temp, ndp, i;
1183         int res;
1184
1185         res = -1;
1186         temp = roothub_a (controller);
1187         ndp = (temp & RH_A_NDP);
1188 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1189         ndp = (ndp == 2) ? 1:0;
1190 #endif
1191         for (i = 0; i < ndp; i++) {
1192                 temp = roothub_portstatus (controller, i);
1193                 /* check for a device disconnect */
1194                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1195                         (RH_PS_PESC | RH_PS_CSC)) &&
1196                         ((temp & RH_PS_CCS) == 0)) {
1197                         res = i;
1198                         break;
1199                 }
1200         }
1201         return res;
1202 }
1203
1204 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1205                 void *buffer, int transfer_len, struct devrequest *cmd)
1206 {
1207         void * data = buffer;
1208         int leni = transfer_len;
1209         int len = 0;
1210         int stat = 0;
1211         __u32 datab[4];
1212         __u8 *data_buf = (__u8 *)datab;
1213         __u16 bmRType_bReq;
1214         __u16 wValue;
1215         __u16 wIndex;
1216         __u16 wLength;
1217
1218 #ifdef DEBUG
1219 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1220 #else
1221         wait_ms(1);
1222 #endif
1223         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1224                 info("Root-Hub submit IRQ: NOT implemented");
1225                 return 0;
1226         }
1227
1228         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1229         wValue        = cpu_to_le16 (cmd->value);
1230         wIndex        = cpu_to_le16 (cmd->index);
1231         wLength       = cpu_to_le16 (cmd->length);
1232
1233         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1234                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1235
1236         switch (bmRType_bReq) {
1237         /* Request Destination:
1238            without flags: Device,
1239            RH_INTERFACE: interface,
1240            RH_ENDPOINT: endpoint,
1241            RH_CLASS means HUB here,
1242            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1243         */
1244
1245         case RH_GET_STATUS:
1246                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1247         case RH_GET_STATUS | RH_INTERFACE:
1248                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1249         case RH_GET_STATUS | RH_ENDPOINT:
1250                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1251         case RH_GET_STATUS | RH_CLASS:
1252                         *(__u32 *) data_buf = cpu_to_le32 (
1253                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1254                         OK (4);
1255         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1256                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1257
1258         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1259                 switch (wValue) {
1260                         case (RH_ENDPOINT_STALL): OK (0);
1261                 }
1262                 break;
1263
1264         case RH_CLEAR_FEATURE | RH_CLASS:
1265                 switch (wValue) {
1266                         case RH_C_HUB_LOCAL_POWER:
1267                                 OK(0);
1268                         case (RH_C_HUB_OVER_CURRENT):
1269                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1270                 }
1271                 break;
1272
1273         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1274                 switch (wValue) {
1275                         case (RH_PORT_ENABLE):
1276                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1277                         case (RH_PORT_SUSPEND):
1278                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1279                         case (RH_PORT_POWER):
1280                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1281                         case (RH_C_PORT_CONNECTION):
1282                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1283                         case (RH_C_PORT_ENABLE):
1284                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1285                         case (RH_C_PORT_SUSPEND):
1286                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1287                         case (RH_C_PORT_OVER_CURRENT):
1288                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1289                         case (RH_C_PORT_RESET):
1290                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1291                 }
1292                 break;
1293
1294         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1295                 switch (wValue) {
1296                         case (RH_PORT_SUSPEND):
1297                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1298                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1299                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1300                                             WR_RH_PORTSTAT (RH_PS_PRS);
1301                                         OK (0);
1302                         case (RH_PORT_POWER):
1303                                         WR_RH_PORTSTAT (RH_PS_PPS );
1304                                         wait_ms(100);
1305                                         OK (0);
1306                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1307                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1308                                             WR_RH_PORTSTAT (RH_PS_PES );
1309                                         OK (0);
1310                 }
1311                 break;
1312
1313         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1314
1315         case RH_GET_DESCRIPTOR:
1316                 switch ((wValue & 0xff00) >> 8) {
1317                         case (0x01): /* device descriptor */
1318                                 len = min_t(unsigned int,
1319                                           leni,
1320                                           min_t(unsigned int,
1321                                               sizeof (root_hub_dev_des),
1322                                               wLength));
1323                                 data_buf = root_hub_dev_des; OK(len);
1324                         case (0x02): /* configuration descriptor */
1325                                 len = min_t(unsigned int,
1326                                           leni,
1327                                           min_t(unsigned int,
1328                                               sizeof (root_hub_config_des),
1329                                               wLength));
1330                                 data_buf = root_hub_config_des; OK(len);
1331                         case (0x03): /* string descriptors */
1332                                 if(wValue==0x0300) {
1333                                         len = min_t(unsigned int,
1334                                                   leni,
1335                                                   min_t(unsigned int,
1336                                                       sizeof (root_hub_str_index0),
1337                                                       wLength));
1338                                         data_buf = root_hub_str_index0;
1339                                         OK(len);
1340                                 }
1341                                 if(wValue==0x0301) {
1342                                         len = min_t(unsigned int,
1343                                                   leni,
1344                                                   min_t(unsigned int,
1345                                                       sizeof (root_hub_str_index1),
1346                                                       wLength));
1347                                         data_buf = root_hub_str_index1;
1348                                         OK(len);
1349                         }
1350                         default:
1351                                 stat = USB_ST_STALLED;
1352                 }
1353                 break;
1354
1355         case RH_GET_DESCRIPTOR | RH_CLASS:
1356         {
1357                 __u32 temp = roothub_a (&gohci);
1358
1359                 data_buf [0] = 9;               /* min length; */
1360                 data_buf [1] = 0x29;
1361                 data_buf [2] = temp & RH_A_NDP;
1362 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1363                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1364 #endif
1365                 data_buf [3] = 0;
1366                 if (temp & RH_A_PSM)    /* per-port power switching? */
1367                         data_buf [3] |= 0x1;
1368                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1369                         data_buf [3] |= 0x10;
1370                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1371                         data_buf [3] |= 0x8;
1372
1373                 /* corresponds to data_buf[4-7] */
1374                 datab [1] = 0;
1375                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1376                 temp = roothub_b (&gohci);
1377                 data_buf [7] = temp & RH_B_DR;
1378                 if (data_buf [2] < 7) {
1379                         data_buf [8] = 0xff;
1380                 } else {
1381                         data_buf [0] += 2;
1382                         data_buf [8] = (temp & RH_B_DR) >> 8;
1383                         data_buf [10] = data_buf [9] = 0xff;
1384                 }
1385
1386                 len = min_t(unsigned int, leni,
1387                             min_t(unsigned int, data_buf [0], wLength));
1388                 OK (len);
1389         }
1390
1391         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1392
1393         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1394
1395         default:
1396                 dbg ("unsupported root hub command");
1397                 stat = USB_ST_STALLED;
1398         }
1399
1400 #ifdef  DEBUG
1401         ohci_dump_roothub (&gohci, 1);
1402 #else
1403         wait_ms(1);
1404 #endif
1405
1406         len = min_t(int, len, leni);
1407         if (data != data_buf)
1408             memcpy (data, data_buf, len);
1409         dev->act_len = len;
1410         dev->status = stat;
1411
1412 #ifdef DEBUG
1413         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1414 #else
1415         wait_ms(1);
1416 #endif
1417
1418         return stat;
1419 }
1420
1421 /*-------------------------------------------------------------------------*/
1422
1423 /* common code for handling submit messages - used for all but root hub */
1424 /* accesses. */
1425 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1426                 int transfer_len, struct devrequest *setup, int interval)
1427 {
1428         int stat = 0;
1429         int maxsize = usb_maxpacket(dev, pipe);
1430         int timeout;
1431         urb_priv_t *urb;
1432
1433         urb = malloc(sizeof(urb_priv_t));
1434         memset(urb, 0, sizeof(urb_priv_t));
1435
1436         urb->dev = dev;
1437         urb->pipe = pipe;
1438         urb->transfer_buffer = buffer;
1439         urb->transfer_buffer_length = transfer_len;
1440         urb->interval = interval;
1441
1442         /* device pulled? Shortcut the action. */
1443         if (devgone == dev) {
1444                 dev->status = USB_ST_CRC_ERR;
1445                 return 0;
1446         }
1447
1448 #ifdef DEBUG
1449         urb->actual_length = 0;
1450         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1451 #else
1452         wait_ms(1);
1453 #endif
1454         if (!maxsize) {
1455                 err("submit_common_message: pipesize for pipe %lx is zero",
1456                         pipe);
1457                 return -1;
1458         }
1459
1460         if (sohci_submit_job(urb, setup) < 0) {
1461                 err("sohci_submit_job failed");
1462                 return -1;
1463         }
1464
1465 #if 0
1466         wait_ms(10);
1467         /* ohci_dump_status(&gohci); */
1468 #endif
1469
1470         /* allow more time for a BULK device to react - some are slow */
1471 #define BULK_TO  5000   /* timeout in milliseconds */
1472         if (usb_pipetype (pipe) == PIPE_BULK)
1473                 timeout = BULK_TO;
1474         else
1475                 timeout = 100;
1476
1477         /* wait for it to complete */
1478         for (;;) {
1479                 /* check whether the controller is done */
1480                 stat = hc_interrupt();
1481                 if (stat < 0) {
1482                         stat = USB_ST_CRC_ERR;
1483                         break;
1484                 }
1485
1486                 /* NOTE: since we are not interrupt driven in U-Boot and always
1487                  * handle only one URB at a time, we cannot assume the
1488                  * transaction finished on the first successful return from
1489                  * hc_interrupt().. unless the flag for current URB is set,
1490                  * meaning that all TD's to/from device got actually
1491                  * transferred and processed. If the current URB is not
1492                  * finished we need to re-iterate this loop so as
1493                  * hc_interrupt() gets called again as there needs to be some
1494                  * more TD's to process still */
1495                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1496                         /* 0xff is returned for an SF-interrupt */
1497                         break;
1498                 }
1499
1500                 if (--timeout) {
1501                         wait_ms(1);
1502                         if (!urb->finished)
1503                                 dbg("\%");
1504
1505                 } else {
1506                         err("CTL:TIMEOUT ");
1507                         dbg("submit_common_msg: TO status %x\n", stat);
1508                         urb->finished = 1;
1509                         stat = USB_ST_CRC_ERR;
1510                         break;
1511                 }
1512         }
1513
1514         dev->status = stat;
1515         dev->act_len = transfer_len;
1516
1517 #ifdef DEBUG
1518         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1519 #else
1520         wait_ms(1);
1521 #endif
1522
1523         /* free TDs in urb_priv */
1524         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1525                 urb_free_priv (urb);
1526         return 0;
1527 }
1528
1529 /* submit routines called from usb.c */
1530 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1531                 int transfer_len)
1532 {
1533         info("submit_bulk_msg");
1534         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1535 }
1536
1537 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1538                 int transfer_len, struct devrequest *setup)
1539 {
1540         int maxsize = usb_maxpacket(dev, pipe);
1541
1542         info("submit_control_msg");
1543 #ifdef DEBUG
1544         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1545 #else
1546         wait_ms(1);
1547 #endif
1548         if (!maxsize) {
1549                 err("submit_control_message: pipesize for pipe %lx is zero",
1550                         pipe);
1551                 return -1;
1552         }
1553         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1554                 gohci.rh.dev = dev;
1555                 /* root hub - redirect */
1556                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1557                         setup);
1558         }
1559
1560         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1561 }
1562
1563 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1564                 int transfer_len, int interval)
1565 {
1566         info("submit_int_msg");
1567         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1568                         interval);
1569 }
1570
1571 /*-------------------------------------------------------------------------*
1572  * HC functions
1573  *-------------------------------------------------------------------------*/
1574
1575 /* reset the HC and BUS */
1576
1577 static int hc_reset (ohci_t *ohci)
1578 {
1579         int timeout = 30;
1580         int smm_timeout = 50; /* 0,5 sec */
1581
1582         dbg("%s\n", __FUNCTION__);
1583
1584         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1585                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1586                 info("USB HC TakeOver from SMM");
1587                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1588                         wait_ms (10);
1589                         if (--smm_timeout == 0) {
1590                                 err("USB HC TakeOver failed!");
1591                                 return -1;
1592                         }
1593                 }
1594         }
1595
1596         /* Disable HC interrupts */
1597         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1598
1599         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1600                 ohci->slot_name,
1601                 readl(&ohci->regs->control));
1602
1603         /* Reset USB (needed by some controllers) */
1604         ohci->hc_control = 0;
1605         writel (ohci->hc_control, &ohci->regs->control);
1606
1607         /* HC Reset requires max 10 us delay */
1608         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1609         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1610                 if (--timeout == 0) {
1611                         err("USB HC reset timed out!");
1612                         return -1;
1613                 }
1614                 udelay (1);
1615         }
1616         return 0;
1617 }
1618
1619 /*-------------------------------------------------------------------------*/
1620
1621 /* Start an OHCI controller, set the BUS operational
1622  * enable interrupts
1623  * connect the virtual root hub */
1624
1625 static int hc_start (ohci_t * ohci)
1626 {
1627         __u32 mask;
1628         unsigned int fminterval;
1629
1630         ohci->disabled = 1;
1631
1632         /* Tell the controller where the control and bulk lists are
1633          * The lists are empty now. */
1634
1635         writel (0, &ohci->regs->ed_controlhead);
1636         writel (0, &ohci->regs->ed_bulkhead);
1637
1638         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1639
1640         fminterval = 0x2edf;
1641         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1642         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1643         writel (fminterval, &ohci->regs->fminterval);
1644         writel (0x628, &ohci->regs->lsthresh);
1645
1646         /* start controller operations */
1647         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1648         ohci->disabled = 0;
1649         writel (ohci->hc_control, &ohci->regs->control);
1650
1651         /* disable all interrupts */
1652         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1653                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1654                         OHCI_INTR_OC | OHCI_INTR_MIE);
1655         writel (mask, &ohci->regs->intrdisable);
1656         /* clear all interrupts */
1657         mask &= ~OHCI_INTR_MIE;
1658         writel (mask, &ohci->regs->intrstatus);
1659         /* Choose the interrupts we care about now  - but w/o MIE */
1660         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1661         writel (mask, &ohci->regs->intrenable);
1662
1663 #ifdef  OHCI_USE_NPS
1664         /* required for AMD-756 and some Mac platforms */
1665         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1666                 &ohci->regs->roothub.a);
1667         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1668 #endif  /* OHCI_USE_NPS */
1669
1670 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1671         /* POTPGT delay is bits 24-31, in 2 ms units. */
1672         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1673
1674         /* connect the virtual root hub */
1675         ohci->rh.devnum = 0;
1676
1677         return 0;
1678 }
1679
1680 /*-------------------------------------------------------------------------*/
1681
1682 /* Poll USB interrupt. */
1683 void usb_event_poll(void)
1684 {
1685         hc_interrupt();
1686 }
1687
1688 /* an interrupt happens */
1689
1690 static int hc_interrupt (void)
1691 {
1692         ohci_t *ohci = &gohci;
1693         struct ohci_regs *regs = ohci->regs;
1694         int ints;
1695         int stat = -1;
1696
1697         if ((ohci->hcca->done_head != 0) &&
1698             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1699                 ints =  OHCI_INTR_WDH;
1700         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1701                 ohci->disabled++;
1702                 err ("%s device removed!", ohci->slot_name);
1703                 return -1;
1704         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1705                 dbg("hc_interrupt: returning..\n");
1706                 return 0xff;
1707         }
1708
1709         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1710
1711         if (ints & OHCI_INTR_RHSC) {
1712                 got_rhsc = 1;
1713                 stat = 0xff;
1714         }
1715
1716         if (ints & OHCI_INTR_UE) {
1717                 ohci->disabled++;
1718                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1719                         ohci->slot_name);
1720                 /* e.g. due to PCI Master/Target Abort */
1721
1722 #ifdef  DEBUG
1723                 ohci_dump (ohci, 1);
1724 #else
1725         wait_ms(1);
1726 #endif
1727                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1728                 /* Make some non-interrupt context restart the controller. */
1729                 /* Count and limit the retries though; either hardware or */
1730                 /* software errors can go forever... */
1731                 hc_reset (ohci);
1732                 return -1;
1733         }
1734
1735         if (ints & OHCI_INTR_WDH) {
1736                 wait_ms(1);
1737                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1738                 (void)readl (&regs->intrdisable); /* flush */
1739                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1740                 writel (OHCI_INTR_WDH, &regs->intrenable);
1741                 (void)readl (&regs->intrdisable); /* flush */
1742         }
1743
1744         if (ints & OHCI_INTR_SO) {
1745                 dbg("USB Schedule overrun\n");
1746                 writel (OHCI_INTR_SO, &regs->intrenable);
1747                 stat = -1;
1748         }
1749
1750         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1751         if (ints & OHCI_INTR_SF) {
1752                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1753                 wait_ms(1);
1754                 writel (OHCI_INTR_SF, &regs->intrdisable);
1755                 if (ohci->ed_rm_list[frame] != NULL)
1756                         writel (OHCI_INTR_SF, &regs->intrenable);
1757                 stat = 0xff;
1758         }
1759
1760         writel (ints, &regs->intrstatus);
1761         return stat;
1762 }
1763
1764 /*-------------------------------------------------------------------------*/
1765
1766 /*-------------------------------------------------------------------------*/
1767
1768 /* De-allocate all resources.. */
1769
1770 static void hc_release_ohci (ohci_t *ohci)
1771 {
1772         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1773
1774         if (!ohci->disabled)
1775                 hc_reset (ohci);
1776 }
1777
1778 /*-------------------------------------------------------------------------*/
1779
1780 /*
1781  * low level initalisation routine, called from usb.c
1782  */
1783 static char ohci_inited = 0;
1784
1785 int usb_lowlevel_init(void)
1786 {
1787 #ifdef CONFIG_PCI_OHCI
1788         pci_dev_t pdev;
1789 #endif
1790
1791 #ifdef CFG_USB_OHCI_CPU_INIT
1792         /* cpu dependant init */
1793         if(usb_cpu_init())
1794                 return -1;
1795 #endif
1796
1797 #ifdef CFG_USB_OHCI_BOARD_INIT
1798         /*  board dependant init */
1799         if(usb_board_init())
1800                 return -1;
1801 #endif
1802         memset (&gohci, 0, sizeof (ohci_t));
1803
1804         /* align the storage */
1805         if ((__u32)&ghcca[0] & 0xff) {
1806                 err("HCCA not aligned!!");
1807                 return -1;
1808         }
1809         phcca = &ghcca[0];
1810         info("aligned ghcca %p", phcca);
1811         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1812         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1813                 err("EDs not aligned!!");
1814                 return -1;
1815         }
1816         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1817         if ((__u32)gtd & 0x7) {
1818                 err("TDs not aligned!!");
1819                 return -1;
1820         }
1821         ptd = gtd;
1822         gohci.hcca = phcca;
1823         memset (phcca, 0, sizeof (struct ohci_hcca));
1824
1825         gohci.disabled = 1;
1826         gohci.sleeping = 0;
1827         gohci.irq = -1;
1828 #ifdef CONFIG_PCI_OHCI
1829         pdev = pci_find_devices(ohci_pci_ids, 0);
1830
1831         if (pdev != -1) {
1832                 u16 vid, did;
1833                 u32 base;
1834                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1835                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1836                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1837                                 vid, did, (pdev >> 16) & 0xff,
1838                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1839                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1840                 printf("OHCI regs address 0x%08x\n", base);
1841                 gohci.regs = (struct ohci_regs *)base;
1842         } else
1843                 return -1;
1844 #else
1845         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1846 #endif
1847
1848         gohci.flags = 0;
1849         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1850
1851         if (hc_reset (&gohci) < 0) {
1852                 hc_release_ohci (&gohci);
1853                 err ("can't reset usb-%s", gohci.slot_name);
1854 #ifdef CFG_USB_OHCI_BOARD_INIT
1855                 /* board dependant cleanup */
1856                 usb_board_init_fail();
1857 #endif
1858
1859 #ifdef CFG_USB_OHCI_CPU_INIT
1860                 /* cpu dependant cleanup */
1861                 usb_cpu_init_fail();
1862 #endif
1863                 return -1;
1864         }
1865
1866         /* FIXME this is a second HC reset; why?? */
1867         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1868            wait_ms(10); */
1869         if (hc_start (&gohci) < 0) {
1870                 err ("can't start usb-%s", gohci.slot_name);
1871                 hc_release_ohci (&gohci);
1872                 /* Initialization failed */
1873 #ifdef CFG_USB_OHCI_BOARD_INIT
1874                 /* board dependant cleanup */
1875                 usb_board_stop();
1876 #endif
1877
1878 #ifdef CFG_USB_OHCI_CPU_INIT
1879                 /* cpu dependant cleanup */
1880                 usb_cpu_stop();
1881 #endif
1882                 return -1;
1883         }
1884
1885 #ifdef  DEBUG
1886         ohci_dump (&gohci, 1);
1887 #else
1888         wait_ms(1);
1889 #endif
1890         ohci_inited = 1;
1891         return 0;
1892 }
1893
1894 int usb_lowlevel_stop(void)
1895 {
1896         /* this gets called really early - before the controller has */
1897         /* even been initialized! */
1898         if (!ohci_inited)
1899                 return 0;
1900         /* TODO release any interrupts, etc. */
1901         /* call hc_release_ohci() here ? */
1902         hc_reset (&gohci);
1903
1904 #ifdef CFG_USB_OHCI_BOARD_INIT
1905         /* board dependant cleanup */
1906         if(usb_board_stop())
1907                 return -1;
1908 #endif
1909
1910 #ifdef CFG_USB_OHCI_CPU_INIT
1911         /* cpu dependant cleanup */
1912         if(usb_cpu_stop())
1913                 return -1;
1914 #endif
1915
1916         return 0;
1917 }
1918 #endif /* CONFIG_USB_OHCI_NEW */