Merge branch 'master' of /home/stefan/git/u-boot/u-boot
[platform/kernel/u-boot.git] / drivers / usb / usb_ohci.c
1 /*
2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
3  *
4  * Interrupt support is added. Now, it has been tested
5  * on ULI1575 chip and works well with USB keyboard.
6  *
7  * (C) Copyright 2007
8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
9  *
10  * (C) Copyright 2003
11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
12  *
13  * Note: Much of this code has been derived from Linux 2.4
14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15  * (C) Copyright 2000-2002 David Brownell
16  *
17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18  * ebenard@eukrea.com - based on s3c24x0's driver
19  *
20  * See file CREDITS for list of people who contributed to this
21  * project.
22  *
23  * This program is free software; you can redistribute it and/or
24  * modify it under the terms of the GNU General Public License as
25  * published by the Free Software Foundation; either version 2 of
26  * the License, or (at your option) any later version.
27  *
28  * This program is distributed in the hope that it will be useful,
29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31  * GNU General Public License for more details.
32  *
33  * You should have received a copy of the GNU General Public License
34  * along with this program; if not, write to the Free Software
35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
36  * MA 02111-1307 USA
37  *
38  */
39 /*
40  * IMPORTANT NOTES
41  * 1 - Read doc/README.generic_usb_ohci
42  * 2 - this driver is intended for use with USB Mass Storage Devices
43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
45  *     to activate workaround for bug #41 or this driver will NOT work!
46  */
47
48 #include <common.h>
49
50 #ifdef CONFIG_USB_OHCI_NEW
51
52 #include <asm/byteorder.h>
53
54 #if defined(CONFIG_PCI_OHCI)
55 # include <pci.h>
56 #endif
57
58 #include <malloc.h>
59 #include <usb.h>
60 #include "usb_ohci.h"
61
62 #ifdef CONFIG_AT91RM9200
63 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
64 #endif
65
66 #if defined(CONFIG_ARM920T) || \
67     defined(CONFIG_S3C2400) || \
68     defined(CONFIG_S3C2410) || \
69     defined(CONFIG_440EP) || \
70     defined(CONFIG_PCI_OHCI) || \
71     defined(CONFIG_MPC5200)
72 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
73 #endif
74
75 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
76 #undef DEBUG
77 #undef SHOW_INFO
78 #undef OHCI_FILL_TRACE
79
80 /* For initializing controller (mask in an HCFS mode too) */
81 #define OHCI_CONTROL_INIT \
82         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
83
84 /*
85  * e.g. PCI controllers need this
86  */
87 #ifdef CFG_OHCI_SWAP_REG_ACCESS
88 # define readl(a) __swap_32(*((vu_long *)(a)))
89 # define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
90 #else
91 # define readl(a) (*((vu_long *)(a)))
92 # define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
93 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
94
95 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
96
97 #ifdef CONFIG_PCI_OHCI
98 static struct pci_device_id ohci_pci_ids[] = {
99         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
100         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
101         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
102         /* Please add supported PCI OHCI controller ids here */
103         {0, 0}
104 };
105 #endif
106
107 #ifdef DEBUG
108 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
109 #else
110 #define dbg(format, arg...) do {} while(0)
111 #endif /* DEBUG */
112 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
113 #undef SHOW_INFO
114 #ifdef SHOW_INFO
115 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
116 #else
117 #define info(format, arg...) do {} while(0)
118 #endif
119
120 #ifdef CFG_OHCI_BE_CONTROLLER
121 # define m16_swap(x) cpu_to_be16(x)
122 # define m32_swap(x) cpu_to_be32(x)
123 #else
124 # define m16_swap(x) cpu_to_le16(x)
125 # define m32_swap(x) cpu_to_le32(x)
126 #endif /* CFG_OHCI_BE_CONTROLLER */
127
128 /* global ohci_t */
129 static ohci_t gohci;
130 /* this must be aligned to a 256 byte boundary */
131 struct ohci_hcca ghcca[1];
132 /* a pointer to the aligned storage */
133 struct ohci_hcca *phcca;
134 /* this allocates EDs for all possible endpoints */
135 struct ohci_device ohci_dev;
136 /* RHSC flag */
137 int got_rhsc;
138 /* device which was disconnected */
139 struct usb_device *devgone;
140
141 /*-------------------------------------------------------------------------*/
142
143 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
144  * The erratum (#4) description is incorrect.  AMD's workaround waits
145  * till some bits (mostly reserved) are clear; ok for all revs.
146  */
147 #define OHCI_QUIRK_AMD756 0xabcd
148 #define read_roothub(hc, register, mask) ({ \
149         u32 temp = readl (&hc->regs->roothub.register); \
150         if (hc->flags & OHCI_QUIRK_AMD756) \
151                 while (temp & mask) \
152                         temp = readl (&hc->regs->roothub.register); \
153         temp; })
154
155 static u32 roothub_a (struct ohci *hc)
156         { return read_roothub (hc, a, 0xfc0fe000); }
157 static inline u32 roothub_b (struct ohci *hc)
158         { return readl (&hc->regs->roothub.b); }
159 static inline u32 roothub_status (struct ohci *hc)
160         { return readl (&hc->regs->roothub.status); }
161 static u32 roothub_portstatus (struct ohci *hc, int i)
162         { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
163
164 /* forward declaration */
165 static int hc_interrupt (void);
166 static void
167 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
168         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
169
170 /*-------------------------------------------------------------------------*
171  * URB support functions
172  *-------------------------------------------------------------------------*/
173
174 /* free HCD-private data associated with this URB */
175
176 static void urb_free_priv (urb_priv_t * urb)
177 {
178         int             i;
179         int             last;
180         struct td       * td;
181
182         last = urb->length - 1;
183         if (last >= 0) {
184                 for (i = 0; i <= last; i++) {
185                         td = urb->td[i];
186                         if (td) {
187                                 td->usb_dev = NULL;
188                                 urb->td[i] = NULL;
189                         }
190                 }
191         }
192         free(urb);
193 }
194
195 /*-------------------------------------------------------------------------*/
196
197 #ifdef DEBUG
198 static int sohci_get_current_frame_number (struct usb_device * dev);
199
200 /* debug| print the main components of an URB
201  * small: 0) header + data packets 1) just header */
202
203 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
204         unsigned long pipe, void * buffer,
205         int transfer_len, struct devrequest * setup, char * str, int small)
206 {
207         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
208                         str,
209                         sohci_get_current_frame_number (dev),
210                         usb_pipedevice (pipe),
211                         usb_pipeendpoint (pipe),
212                         usb_pipeout (pipe)? 'O': 'I',
213                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
214                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
215                         (purb ? purb->actual_length : 0),
216                         transfer_len, dev->status);
217 #ifdef  OHCI_VERBOSE_DEBUG
218         if (!small) {
219                 int i, len;
220
221                 if (usb_pipecontrol (pipe)) {
222                         printf (__FILE__ ": cmd(8):");
223                         for (i = 0; i < 8 ; i++)
224                                 printf (" %02x", ((__u8 *) setup) [i]);
225                         printf ("\n");
226                 }
227                 if (transfer_len > 0 && buffer) {
228                         printf (__FILE__ ": data(%d/%d):",
229                                 (purb ? purb->actual_length : 0),
230                                 transfer_len);
231                         len = usb_pipeout (pipe)?
232                                         transfer_len:
233                                         (purb ? purb->actual_length : 0);
234                         for (i = 0; i < 16 && i < len; i++)
235                                 printf (" %02x", ((__u8 *) buffer) [i]);
236                         printf ("%s\n", i < len? "...": "");
237                 }
238         }
239 #endif
240 }
241
242 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
243 void ep_print_int_eds (ohci_t *ohci, char * str) {
244         int i, j;
245          __u32 * ed_p;
246         for (i= 0; i < 32; i++) {
247                 j = 5;
248                 ed_p = &(ohci->hcca->int_table [i]);
249                 if (*ed_p == 0)
250                     continue;
251                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
252                 while (*ed_p != 0 && j--) {
253                         ed_t *ed = (ed_t *)m32_swap(ed_p);
254                         printf (" ed: %4x;", ed->hwINFO);
255                         ed_p = &ed->hwNextED;
256                 }
257                 printf ("\n");
258         }
259 }
260
261 static void ohci_dump_intr_mask (char *label, __u32 mask)
262 {
263         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
264                 label,
265                 mask,
266                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
267                 (mask & OHCI_INTR_OC) ? " OC" : "",
268                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
269                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
270                 (mask & OHCI_INTR_UE) ? " UE" : "",
271                 (mask & OHCI_INTR_RD) ? " RD" : "",
272                 (mask & OHCI_INTR_SF) ? " SF" : "",
273                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
274                 (mask & OHCI_INTR_SO) ? " SO" : ""
275                 );
276 }
277
278 static void maybe_print_eds (char *label, __u32 value)
279 {
280         ed_t *edp = (ed_t *)value;
281
282         if (value) {
283                 dbg ("%s %08x", label, value);
284                 dbg ("%08x", edp->hwINFO);
285                 dbg ("%08x", edp->hwTailP);
286                 dbg ("%08x", edp->hwHeadP);
287                 dbg ("%08x", edp->hwNextED);
288         }
289 }
290
291 static char * hcfs2string (int state)
292 {
293         switch (state) {
294                 case OHCI_USB_RESET:    return "reset";
295                 case OHCI_USB_RESUME:   return "resume";
296                 case OHCI_USB_OPER:     return "operational";
297                 case OHCI_USB_SUSPEND:  return "suspend";
298         }
299         return "?";
300 }
301
302 /* dump control and status registers */
303 static void ohci_dump_status (ohci_t *controller)
304 {
305         struct ohci_regs        *regs = controller->regs;
306         __u32                   temp;
307
308         temp = readl (&regs->revision) & 0xff;
309         if (temp != 0x10)
310                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
311
312         temp = readl (&regs->control);
313         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
314                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
315                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
316                 (temp & OHCI_CTRL_IR) ? " IR" : "",
317                 hcfs2string (temp & OHCI_CTRL_HCFS),
318                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
319                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
320                 (temp & OHCI_CTRL_IE) ? " IE" : "",
321                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
322                 temp & OHCI_CTRL_CBSR
323                 );
324
325         temp = readl (&regs->cmdstatus);
326         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
327                 (temp & OHCI_SOC) >> 16,
328                 (temp & OHCI_OCR) ? " OCR" : "",
329                 (temp & OHCI_BLF) ? " BLF" : "",
330                 (temp & OHCI_CLF) ? " CLF" : "",
331                 (temp & OHCI_HCR) ? " HCR" : ""
332                 );
333
334         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
335         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
336
337         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
338
339         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
340         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
341
342         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
343         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
344
345         maybe_print_eds ("donehead", readl (&regs->donehead));
346 }
347
348 static void ohci_dump_roothub (ohci_t *controller, int verbose)
349 {
350         __u32                   temp, ndp, i;
351
352         temp = roothub_a (controller);
353         ndp = (temp & RH_A_NDP);
354 #ifdef CONFIG_AT91C_PQFP_UHPBUG
355         ndp = (ndp == 2) ? 1:0;
356 #endif
357         if (verbose) {
358                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
359                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
360                         (temp & RH_A_NOCP) ? " NOCP" : "",
361                         (temp & RH_A_OCPM) ? " OCPM" : "",
362                         (temp & RH_A_DT) ? " DT" : "",
363                         (temp & RH_A_NPS) ? " NPS" : "",
364                         (temp & RH_A_PSM) ? " PSM" : "",
365                         ndp
366                         );
367                 temp = roothub_b (controller);
368                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
369                         temp,
370                         (temp & RH_B_PPCM) >> 16,
371                         (temp & RH_B_DR)
372                         );
373                 temp = roothub_status (controller);
374                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
375                         temp,
376                         (temp & RH_HS_CRWE) ? " CRWE" : "",
377                         (temp & RH_HS_OCIC) ? " OCIC" : "",
378                         (temp & RH_HS_LPSC) ? " LPSC" : "",
379                         (temp & RH_HS_DRWE) ? " DRWE" : "",
380                         (temp & RH_HS_OCI) ? " OCI" : "",
381                         (temp & RH_HS_LPS) ? " LPS" : ""
382                         );
383         }
384
385         for (i = 0; i < ndp; i++) {
386                 temp = roothub_portstatus (controller, i);
387                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
388                         i,
389                         temp,
390                         (temp & RH_PS_PRSC) ? " PRSC" : "",
391                         (temp & RH_PS_OCIC) ? " OCIC" : "",
392                         (temp & RH_PS_PSSC) ? " PSSC" : "",
393                         (temp & RH_PS_PESC) ? " PESC" : "",
394                         (temp & RH_PS_CSC) ? " CSC" : "",
395
396                         (temp & RH_PS_LSDA) ? " LSDA" : "",
397                         (temp & RH_PS_PPS) ? " PPS" : "",
398                         (temp & RH_PS_PRS) ? " PRS" : "",
399                         (temp & RH_PS_POCI) ? " POCI" : "",
400                         (temp & RH_PS_PSS) ? " PSS" : "",
401
402                         (temp & RH_PS_PES) ? " PES" : "",
403                         (temp & RH_PS_CCS) ? " CCS" : ""
404                         );
405         }
406 }
407
408 static void ohci_dump (ohci_t *controller, int verbose)
409 {
410         dbg ("OHCI controller usb-%s state", controller->slot_name);
411
412         /* dumps some of the state we know about */
413         ohci_dump_status (controller);
414         if (verbose)
415                 ep_print_int_eds (controller, "hcca");
416         dbg ("hcca frame #%04x", controller->hcca->frame_no);
417         ohci_dump_roothub (controller, 1);
418
419 #endif /* DEBUG */
420
421 /*-------------------------------------------------------------------------*
422  * Interface functions (URB)
423  *-------------------------------------------------------------------------*/
424
425 /* get a transfer request */
426
427 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
428 {
429         ohci_t *ohci;
430         ed_t * ed;
431         urb_priv_t *purb_priv = urb;
432         int i, size = 0;
433         struct usb_device *dev = urb->dev;
434         unsigned long pipe = urb->pipe;
435         void *buffer = urb->transfer_buffer;
436         int transfer_len = urb->transfer_buffer_length;
437         int interval = urb->interval;
438
439         ohci = &gohci;
440
441         /* when controller's hung, permit only roothub cleanup attempts
442          * such as powering down ports */
443         if (ohci->disabled) {
444                 err("sohci_submit_job: EPIPE");
445                 return -1;
446         }
447
448         /* we're about to begin a new transaction here so mark the URB unfinished */
449         urb->finished = 0;
450
451         /* every endpoint has a ed, locate and fill it */
452         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
453                 err("sohci_submit_job: ENOMEM");
454                 return -1;
455         }
456
457         /* for the private part of the URB we need the number of TDs (size) */
458         switch (usb_pipetype (pipe)) {
459                 case PIPE_BULK: /* one TD for every 4096 Byte */
460                         size = (transfer_len - 1) / 4096 + 1;
461                         break;
462                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
463                         size = (transfer_len == 0)? 2:
464                                                 (transfer_len - 1) / 4096 + 3;
465                         break;
466                 case PIPE_INTERRUPT: /* 1 TD */
467                         size = 1;
468                         break;
469         }
470
471         ed->purb = urb;
472
473         if (size >= (N_URB_TD - 1)) {
474                 err("need %d TDs, only have %d", size, N_URB_TD);
475                 return -1;
476         }
477         purb_priv->pipe = pipe;
478
479         /* fill the private part of the URB */
480         purb_priv->length = size;
481         purb_priv->ed = ed;
482         purb_priv->actual_length = 0;
483
484         /* allocate the TDs */
485         /* note that td[0] was allocated in ep_add_ed */
486         for (i = 0; i < size; i++) {
487                 purb_priv->td[i] = td_alloc (dev);
488                 if (!purb_priv->td[i]) {
489                         purb_priv->length = i;
490                         urb_free_priv (purb_priv);
491                         err("sohci_submit_job: ENOMEM");
492                         return -1;
493                 }
494         }
495
496         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
497                 urb_free_priv (purb_priv);
498                 err("sohci_submit_job: EINVAL");
499                 return -1;
500         }
501
502         /* link the ed into a chain if is not already */
503         if (ed->state != ED_OPER)
504                 ep_link (ohci, ed);
505
506         /* fill the TDs and link it to the ed */
507         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
508
509         return 0;
510 }
511
512 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
513 {
514         struct ohci_regs *regs = hc->regs;
515
516         switch (usb_pipetype (urb->pipe)) {
517         case PIPE_INTERRUPT:
518                 /* implicitly requeued */
519                 if (urb->dev->irq_handle &&
520                                 (urb->dev->irq_act_len = urb->actual_length)) {
521                         writel (OHCI_INTR_WDH, &regs->intrenable);
522                         readl (&regs->intrenable); /* PCI posting flush */
523                         urb->dev->irq_handle(urb->dev);
524                         writel (OHCI_INTR_WDH, &regs->intrdisable);
525                         readl (&regs->intrdisable); /* PCI posting flush */
526                 }
527                 urb->actual_length = 0;
528                 td_submit_job (
529                                 urb->dev,
530                                 urb->pipe,
531                                 urb->transfer_buffer,
532                                 urb->transfer_buffer_length,
533                                 NULL,
534                                 urb,
535                                 urb->interval);
536                 break;
537         case PIPE_CONTROL:
538         case PIPE_BULK:
539                 break;
540         default:
541                 return 0;
542         }
543         return 1;
544 }
545
546 /*-------------------------------------------------------------------------*/
547
548 #ifdef DEBUG
549 /* tell us the current USB frame number */
550
551 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
552 {
553         ohci_t *ohci = &gohci;
554
555         return m16_swap (ohci->hcca->frame_no);
556 }
557 #endif
558
559 /*-------------------------------------------------------------------------*
560  * ED handling functions
561  *-------------------------------------------------------------------------*/
562
563 /* search for the right branch to insert an interrupt ed into the int tree
564  * do some load ballancing;
565  * returns the branch and
566  * sets the interval to interval = 2^integer (ld (interval)) */
567
568 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
569 {
570         int i, branch = 0;
571
572         /* search for the least loaded interrupt endpoint
573          * branch of all 32 branches
574          */
575         for (i = 0; i < 32; i++)
576                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
577                         branch = i;
578
579         branch = branch % interval;
580         for (i = branch; i < 32; i += interval)
581                 ohci->ohci_int_load [i] += load;
582
583         return branch;
584 }
585
586 /*-------------------------------------------------------------------------*/
587
588 /*  2^int( ld (inter)) */
589
590 static int ep_2_n_interval (int inter)
591 {
592         int i;
593         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
594         return 1 << i;
595 }
596
597 /*-------------------------------------------------------------------------*/
598
599 /* the int tree is a binary tree
600  * in order to process it sequentially the indexes of the branches have to be mapped
601  * the mapping reverses the bits of a word of num_bits length */
602
603 static int ep_rev (int num_bits, int word)
604 {
605         int i, wout = 0;
606
607         for (i = 0; i < num_bits; i++)
608                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
609         return wout;
610 }
611
612 /*-------------------------------------------------------------------------*
613  * ED handling functions
614  *-------------------------------------------------------------------------*/
615
616 /* link an ed into one of the HC chains */
617
618 static int ep_link (ohci_t *ohci, ed_t *edi)
619 {
620         volatile ed_t *ed = edi;
621         int int_branch;
622         int i;
623         int inter;
624         int interval;
625         int load;
626         __u32 * ed_p;
627
628         ed->state = ED_OPER;
629         ed->int_interval = 0;
630
631         switch (ed->type) {
632         case PIPE_CONTROL:
633                 ed->hwNextED = 0;
634                 if (ohci->ed_controltail == NULL) {
635                         writel (ed, &ohci->regs->ed_controlhead);
636                 } else {
637                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
638                 }
639                 ed->ed_prev = ohci->ed_controltail;
640                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
641                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
642                         ohci->hc_control |= OHCI_CTRL_CLE;
643                         writel (ohci->hc_control, &ohci->regs->control);
644                 }
645                 ohci->ed_controltail = edi;
646                 break;
647
648         case PIPE_BULK:
649                 ed->hwNextED = 0;
650                 if (ohci->ed_bulktail == NULL) {
651                         writel (ed, &ohci->regs->ed_bulkhead);
652                 } else {
653                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
654                 }
655                 ed->ed_prev = ohci->ed_bulktail;
656                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
657                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
658                         ohci->hc_control |= OHCI_CTRL_BLE;
659                         writel (ohci->hc_control, &ohci->regs->control);
660                 }
661                 ohci->ed_bulktail = edi;
662                 break;
663
664         case PIPE_INTERRUPT:
665                 load = ed->int_load;
666                 interval = ep_2_n_interval (ed->int_period);
667                 ed->int_interval = interval;
668                 int_branch = ep_int_ballance (ohci, interval, load);
669                 ed->int_branch = int_branch;
670
671                 for (i = 0; i < ep_rev (6, interval); i += inter) {
672                         inter = 1;
673                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
674                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
675                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
676                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
677                         ed->hwNextED = *ed_p;
678                         *ed_p = m32_swap((unsigned long)ed);
679                 }
680                 break;
681         }
682         return 0;
683 }
684
685 /*-------------------------------------------------------------------------*/
686
687 /* scan the periodic table to find and unlink this ED */
688 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
689                 unsigned index, unsigned period)
690 {
691         for (; index < NUM_INTS; index += period) {
692                 __u32   *ed_p = &ohci->hcca->int_table [index];
693
694                 /* ED might have been unlinked through another path */
695                 while (*ed_p != 0) {
696                         if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
697                                 *ed_p = ed->hwNextED;
698                                 break;
699                         }
700                         ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
701                 }
702         }
703 }
704
705 /* unlink an ed from one of the HC chains.
706  * just the link to the ed is unlinked.
707  * the link from the ed still points to another operational ed or 0
708  * so the HC can eventually finish the processing of the unlinked ed */
709
710 static int ep_unlink (ohci_t *ohci, ed_t *edi)
711 {
712         volatile ed_t *ed = edi;
713         int i;
714
715         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
716
717         switch (ed->type) {
718         case PIPE_CONTROL:
719                 if (ed->ed_prev == NULL) {
720                         if (!ed->hwNextED) {
721                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
722                                 writel (ohci->hc_control, &ohci->regs->control);
723                         }
724                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
725                 } else {
726                         ed->ed_prev->hwNextED = ed->hwNextED;
727                 }
728                 if (ohci->ed_controltail == ed) {
729                         ohci->ed_controltail = ed->ed_prev;
730                 } else {
731                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
732                 }
733                 break;
734
735         case PIPE_BULK:
736                 if (ed->ed_prev == NULL) {
737                         if (!ed->hwNextED) {
738                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
739                                 writel (ohci->hc_control, &ohci->regs->control);
740                         }
741                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
742                 } else {
743                         ed->ed_prev->hwNextED = ed->hwNextED;
744                 }
745                 if (ohci->ed_bulktail == ed) {
746                         ohci->ed_bulktail = ed->ed_prev;
747                 } else {
748                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
749                 }
750                 break;
751
752         case PIPE_INTERRUPT:
753                 periodic_unlink (ohci, ed, 0, 1);
754                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
755                     ohci->ohci_int_load[i] -= ed->int_load;
756                 break;
757         }
758         ed->state = ED_UNLINK;
759         return 0;
760 }
761
762 /*-------------------------------------------------------------------------*/
763
764 /* add/reinit an endpoint; this should be done once at the
765  * usb_set_configuration command, but the USB stack is a little bit
766  * stateless so we do it at every transaction if the state of the ed
767  * is ED_NEW then a dummy td is added and the state is changed to
768  * ED_UNLINK in all other cases the state is left unchanged the ed
769  * info fields are setted anyway even though most of them should not
770  * change
771  */
772 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
773                 int interval, int load)
774 {
775         td_t *td;
776         ed_t *ed_ret;
777         volatile ed_t *ed;
778
779         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
780                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
781
782         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
783                 err("ep_add_ed: pending delete");
784                 /* pending delete request */
785                 return NULL;
786         }
787
788         if (ed->state == ED_NEW) {
789                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
790                 /* dummy td; end of td list for ed */
791                 td = td_alloc (usb_dev);
792                 ed->hwTailP = m32_swap ((unsigned long)td);
793                 ed->hwHeadP = ed->hwTailP;
794                 ed->state = ED_UNLINK;
795                 ed->type = usb_pipetype (pipe);
796                 ohci_dev.ed_cnt++;
797         }
798
799         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
800                         | usb_pipeendpoint (pipe) << 7
801                         | (usb_pipeisoc (pipe)? 0x8000: 0)
802                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
803                         | usb_pipeslow (pipe) << 13
804                         | usb_maxpacket (usb_dev, pipe) << 16);
805
806         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
807                 ed->int_period = interval;
808                 ed->int_load = load;
809         }
810
811         return ed_ret;
812 }
813
814 /*-------------------------------------------------------------------------*
815  * TD handling functions
816  *-------------------------------------------------------------------------*/
817
818 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
819
820 static void td_fill (ohci_t *ohci, unsigned int info,
821         void *data, int len,
822         struct usb_device *dev, int index, urb_priv_t *urb_priv)
823 {
824         volatile td_t  *td, *td_pt;
825 #ifdef OHCI_FILL_TRACE
826         int i;
827 #endif
828
829         if (index > urb_priv->length) {
830                 err("index > length");
831                 return;
832         }
833         /* use this td as the next dummy */
834         td_pt = urb_priv->td [index];
835         td_pt->hwNextTD = 0;
836
837         /* fill the old dummy TD */
838         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
839
840         td->ed = urb_priv->ed;
841         td->next_dl_td = NULL;
842         td->index = index;
843         td->data = (__u32)data;
844 #ifdef OHCI_FILL_TRACE
845         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
846                 for (i = 0; i < len; i++)
847                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
848                 printf("\n");
849         }
850 #endif
851         if (!len)
852                 data = 0;
853
854         td->hwINFO = m32_swap (info);
855         td->hwCBP = m32_swap ((unsigned long)data);
856         if (data)
857                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
858         else
859                 td->hwBE = 0;
860         td->hwNextTD = m32_swap ((unsigned long)td_pt);
861
862         /* append to queue */
863         td->ed->hwTailP = td->hwNextTD;
864 }
865
866 /*-------------------------------------------------------------------------*/
867
868 /* prepare all TDs of a transfer */
869
870 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
871         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
872 {
873         ohci_t *ohci = &gohci;
874         int data_len = transfer_len;
875         void *data;
876         int cnt = 0;
877         __u32 info = 0;
878         unsigned int toggle = 0;
879
880         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
881         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
882                 toggle = TD_T_TOGGLE;
883         } else {
884                 toggle = TD_T_DATA0;
885                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
886         }
887         urb->td_cnt = 0;
888         if (data_len)
889                 data = buffer;
890         else
891                 data = 0;
892
893         switch (usb_pipetype (pipe)) {
894         case PIPE_BULK:
895                 info = usb_pipeout (pipe)?
896                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
897                 while(data_len > 4096) {
898                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
899                         data += 4096; data_len -= 4096; cnt++;
900                 }
901                 info = usb_pipeout (pipe)?
902                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
903                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
904                 cnt++;
905
906                 if (!ohci->sleeping)
907                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
908                 break;
909
910         case PIPE_CONTROL:
911                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
912                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
913                 if (data_len > 0) {
914                         info = usb_pipeout (pipe)?
915                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
916                         /* NOTE:  mishandles transfers >8K, some >4K */
917                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
918                 }
919                 info = usb_pipeout (pipe)?
920                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
921                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
922                 if (!ohci->sleeping)
923                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
924                 break;
925
926         case PIPE_INTERRUPT:
927                 info = usb_pipeout (urb->pipe)?
928                         TD_CC | TD_DP_OUT | toggle:
929                         TD_CC | TD_R | TD_DP_IN | toggle;
930                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
931                 break;
932         }
933         if (urb->length != cnt)
934                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
935 }
936
937 /*-------------------------------------------------------------------------*
938  * Done List handling functions
939  *-------------------------------------------------------------------------*/
940
941 /* calculate the transfer length and update the urb */
942
943 static void dl_transfer_length(td_t * td)
944 {
945         __u32 tdINFO, tdBE, tdCBP;
946         urb_priv_t *lurb_priv = td->ed->purb;
947
948         tdINFO = m32_swap (td->hwINFO);
949         tdBE   = m32_swap (td->hwBE);
950         tdCBP  = m32_swap (td->hwCBP);
951
952         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
953             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
954                 if (tdBE != 0) {
955                         if (td->hwCBP == 0)
956                                 lurb_priv->actual_length += tdBE - td->data + 1;
957                         else
958                                 lurb_priv->actual_length += tdCBP - td->data;
959                 }
960         }
961 }
962
963 /*-------------------------------------------------------------------------*/
964
965 /* replies to the request have to be on a FIFO basis so
966  * we reverse the reversed done-list */
967
968 static td_t * dl_reverse_done_list (ohci_t *ohci)
969 {
970         __u32 td_list_hc;
971         td_t *td_rev = NULL;
972         td_t *td_list = NULL;
973         urb_priv_t *lurb_priv = NULL;
974
975         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
976         ohci->hcca->done_head = 0;
977
978         while (td_list_hc) {
979                 td_list = (td_t *)td_list_hc;
980
981                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
982                         lurb_priv = td_list->ed->purb;
983                         dbg(" USB-error/status: %x : %p",
984                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
985                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
986                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
987                                         td_list->ed->hwHeadP =
988                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
989                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
990                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
991                                 } else
992                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
993                         }
994 #ifdef CONFIG_MPC5200
995                         td_list->hwNextTD = 0;
996 #endif
997                 }
998
999                 td_list->next_dl_td = td_rev;
1000                 td_rev = td_list;
1001                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
1002         }
1003         return td_list;
1004 }
1005
1006 /*-------------------------------------------------------------------------*/
1007
1008 /* td done list */
1009 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1010 {
1011         td_t *td_list_next = NULL;
1012         ed_t *ed;
1013         int cc = 0;
1014         int stat = 0;
1015         /* urb_t *urb; */
1016         urb_priv_t *lurb_priv;
1017         __u32 tdINFO, edHeadP, edTailP;
1018
1019         while (td_list) {
1020                 td_list_next = td_list->next_dl_td;
1021
1022                 tdINFO = m32_swap (td_list->hwINFO);
1023
1024                 ed = td_list->ed;
1025                 lurb_priv = ed->purb;
1026
1027                 dl_transfer_length(td_list);
1028
1029                 /* error code of transfer */
1030                 cc = TD_CC_GET (tdINFO);
1031                 if (cc != 0) {
1032                         dbg("ConditionCode %#x", cc);
1033                         stat = cc_to_error[cc];
1034                 }
1035
1036                 /* see if this done list makes for all TD's of current URB,
1037                  * and mark the URB finished if so */
1038                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1039 #if 1
1040                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1041                             (lurb_priv->state != URB_DEL))
1042 #else
1043                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1044 #endif
1045                                 lurb_priv->finished = sohci_return_job(ohci,
1046                                                 lurb_priv);
1047                         else
1048                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1049                 } else
1050                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1051                                 lurb_priv->length);
1052                 if (ed->state != ED_NEW &&
1053                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1054                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1055                         edTailP = m32_swap (ed->hwTailP);
1056
1057                         /* unlink eds if they are not busy */
1058                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1059                                 ep_unlink (ohci, ed);
1060                 }
1061
1062                 td_list = td_list_next;
1063         }
1064         return stat;
1065 }
1066
1067 /*-------------------------------------------------------------------------*
1068  * Virtual Root Hub
1069  *-------------------------------------------------------------------------*/
1070
1071 /* Device descriptor */
1072 static __u8 root_hub_dev_des[] =
1073 {
1074         0x12,       /*  __u8  bLength; */
1075         0x01,       /*  __u8  bDescriptorType; Device */
1076         0x10,       /*  __u16 bcdUSB; v1.1 */
1077         0x01,
1078         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1079         0x00,       /*  __u8  bDeviceSubClass; */
1080         0x00,       /*  __u8  bDeviceProtocol; */
1081         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1082         0x00,       /*  __u16 idVendor; */
1083         0x00,
1084         0x00,       /*  __u16 idProduct; */
1085         0x00,
1086         0x00,       /*  __u16 bcdDevice; */
1087         0x00,
1088         0x00,       /*  __u8  iManufacturer; */
1089         0x01,       /*  __u8  iProduct; */
1090         0x00,       /*  __u8  iSerialNumber; */
1091         0x01        /*  __u8  bNumConfigurations; */
1092 };
1093
1094 /* Configuration descriptor */
1095 static __u8 root_hub_config_des[] =
1096 {
1097         0x09,       /*  __u8  bLength; */
1098         0x02,       /*  __u8  bDescriptorType; Configuration */
1099         0x19,       /*  __u16 wTotalLength; */
1100         0x00,
1101         0x01,       /*  __u8  bNumInterfaces; */
1102         0x01,       /*  __u8  bConfigurationValue; */
1103         0x00,       /*  __u8  iConfiguration; */
1104         0x40,       /*  __u8  bmAttributes;
1105                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1106         0x00,       /*  __u8  MaxPower; */
1107
1108         /* interface */
1109         0x09,       /*  __u8  if_bLength; */
1110         0x04,       /*  __u8  if_bDescriptorType; Interface */
1111         0x00,       /*  __u8  if_bInterfaceNumber; */
1112         0x00,       /*  __u8  if_bAlternateSetting; */
1113         0x01,       /*  __u8  if_bNumEndpoints; */
1114         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1115         0x00,       /*  __u8  if_bInterfaceSubClass; */
1116         0x00,       /*  __u8  if_bInterfaceProtocol; */
1117         0x00,       /*  __u8  if_iInterface; */
1118
1119         /* endpoint */
1120         0x07,       /*  __u8  ep_bLength; */
1121         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1122         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1123         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1124         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1125         0x00,
1126         0xff        /*  __u8  ep_bInterval; 255 ms */
1127 };
1128
1129 static unsigned char root_hub_str_index0[] =
1130 {
1131         0x04,                   /*  __u8  bLength; */
1132         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1133         0x09,                   /*  __u8  lang ID */
1134         0x04,                   /*  __u8  lang ID */
1135 };
1136
1137 static unsigned char root_hub_str_index1[] =
1138 {
1139         28,                     /*  __u8  bLength; */
1140         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1141         'O',                    /*  __u8  Unicode */
1142         0,                              /*  __u8  Unicode */
1143         'H',                    /*  __u8  Unicode */
1144         0,                              /*  __u8  Unicode */
1145         'C',                    /*  __u8  Unicode */
1146         0,                              /*  __u8  Unicode */
1147         'I',                    /*  __u8  Unicode */
1148         0,                              /*  __u8  Unicode */
1149         ' ',                    /*  __u8  Unicode */
1150         0,                              /*  __u8  Unicode */
1151         'R',                    /*  __u8  Unicode */
1152         0,                              /*  __u8  Unicode */
1153         'o',                    /*  __u8  Unicode */
1154         0,                              /*  __u8  Unicode */
1155         'o',                    /*  __u8  Unicode */
1156         0,                              /*  __u8  Unicode */
1157         't',                    /*  __u8  Unicode */
1158         0,                              /*  __u8  Unicode */
1159         ' ',                    /*  __u8  Unicode */
1160         0,                              /*  __u8  Unicode */
1161         'H',                    /*  __u8  Unicode */
1162         0,                              /*  __u8  Unicode */
1163         'u',                    /*  __u8  Unicode */
1164         0,                              /*  __u8  Unicode */
1165         'b',                    /*  __u8  Unicode */
1166         0,                              /*  __u8  Unicode */
1167 };
1168
1169 /* Hub class-specific descriptor is constructed dynamically */
1170
1171 /*-------------------------------------------------------------------------*/
1172
1173 #define OK(x)                   len = (x); break
1174 #ifdef DEBUG
1175 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1176 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1177 #else
1178 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1179 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1180 #endif
1181 #define RD_RH_STAT              roothub_status(&gohci)
1182 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1183
1184 /* request to virtual root hub */
1185
1186 int rh_check_port_status(ohci_t *controller)
1187 {
1188         __u32 temp, ndp, i;
1189         int res;
1190
1191         res = -1;
1192         temp = roothub_a (controller);
1193         ndp = (temp & RH_A_NDP);
1194 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1195         ndp = (ndp == 2) ? 1:0;
1196 #endif
1197         for (i = 0; i < ndp; i++) {
1198                 temp = roothub_portstatus (controller, i);
1199                 /* check for a device disconnect */
1200                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1201                         (RH_PS_PESC | RH_PS_CSC)) &&
1202                         ((temp & RH_PS_CCS) == 0)) {
1203                         res = i;
1204                         break;
1205                 }
1206         }
1207         return res;
1208 }
1209
1210 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1211                 void *buffer, int transfer_len, struct devrequest *cmd)
1212 {
1213         void * data = buffer;
1214         int leni = transfer_len;
1215         int len = 0;
1216         int stat = 0;
1217         __u32 datab[4];
1218         __u8 *data_buf = (__u8 *)datab;
1219         __u16 bmRType_bReq;
1220         __u16 wValue;
1221         __u16 wIndex;
1222         __u16 wLength;
1223
1224 #ifdef DEBUG
1225 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1226 #else
1227         wait_ms(1);
1228 #endif
1229         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1230                 info("Root-Hub submit IRQ: NOT implemented");
1231                 return 0;
1232         }
1233
1234         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1235         wValue        = cpu_to_le16 (cmd->value);
1236         wIndex        = cpu_to_le16 (cmd->index);
1237         wLength       = cpu_to_le16 (cmd->length);
1238
1239         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1240                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1241
1242         switch (bmRType_bReq) {
1243         /* Request Destination:
1244            without flags: Device,
1245            RH_INTERFACE: interface,
1246            RH_ENDPOINT: endpoint,
1247            RH_CLASS means HUB here,
1248            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1249         */
1250
1251         case RH_GET_STATUS:
1252                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1253         case RH_GET_STATUS | RH_INTERFACE:
1254                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1255         case RH_GET_STATUS | RH_ENDPOINT:
1256                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1257         case RH_GET_STATUS | RH_CLASS:
1258                         *(__u32 *) data_buf = cpu_to_le32 (
1259                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1260                         OK (4);
1261         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1262                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1263
1264         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1265                 switch (wValue) {
1266                         case (RH_ENDPOINT_STALL): OK (0);
1267                 }
1268                 break;
1269
1270         case RH_CLEAR_FEATURE | RH_CLASS:
1271                 switch (wValue) {
1272                         case RH_C_HUB_LOCAL_POWER:
1273                                 OK(0);
1274                         case (RH_C_HUB_OVER_CURRENT):
1275                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1276                 }
1277                 break;
1278
1279         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1280                 switch (wValue) {
1281                         case (RH_PORT_ENABLE):
1282                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1283                         case (RH_PORT_SUSPEND):
1284                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1285                         case (RH_PORT_POWER):
1286                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1287                         case (RH_C_PORT_CONNECTION):
1288                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1289                         case (RH_C_PORT_ENABLE):
1290                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1291                         case (RH_C_PORT_SUSPEND):
1292                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1293                         case (RH_C_PORT_OVER_CURRENT):
1294                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1295                         case (RH_C_PORT_RESET):
1296                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1297                 }
1298                 break;
1299
1300         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1301                 switch (wValue) {
1302                         case (RH_PORT_SUSPEND):
1303                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1304                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1305                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1306                                             WR_RH_PORTSTAT (RH_PS_PRS);
1307                                         OK (0);
1308                         case (RH_PORT_POWER):
1309                                         WR_RH_PORTSTAT (RH_PS_PPS );
1310                                         wait_ms(100);
1311                                         OK (0);
1312                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1313                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1314                                             WR_RH_PORTSTAT (RH_PS_PES );
1315                                         OK (0);
1316                 }
1317                 break;
1318
1319         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1320
1321         case RH_GET_DESCRIPTOR:
1322                 switch ((wValue & 0xff00) >> 8) {
1323                         case (0x01): /* device descriptor */
1324                                 len = min_t(unsigned int,
1325                                           leni,
1326                                           min_t(unsigned int,
1327                                               sizeof (root_hub_dev_des),
1328                                               wLength));
1329                                 data_buf = root_hub_dev_des; OK(len);
1330                         case (0x02): /* configuration descriptor */
1331                                 len = min_t(unsigned int,
1332                                           leni,
1333                                           min_t(unsigned int,
1334                                               sizeof (root_hub_config_des),
1335                                               wLength));
1336                                 data_buf = root_hub_config_des; OK(len);
1337                         case (0x03): /* string descriptors */
1338                                 if(wValue==0x0300) {
1339                                         len = min_t(unsigned int,
1340                                                   leni,
1341                                                   min_t(unsigned int,
1342                                                       sizeof (root_hub_str_index0),
1343                                                       wLength));
1344                                         data_buf = root_hub_str_index0;
1345                                         OK(len);
1346                                 }
1347                                 if(wValue==0x0301) {
1348                                         len = min_t(unsigned int,
1349                                                   leni,
1350                                                   min_t(unsigned int,
1351                                                       sizeof (root_hub_str_index1),
1352                                                       wLength));
1353                                         data_buf = root_hub_str_index1;
1354                                         OK(len);
1355                         }
1356                         default:
1357                                 stat = USB_ST_STALLED;
1358                 }
1359                 break;
1360
1361         case RH_GET_DESCRIPTOR | RH_CLASS:
1362         {
1363                 __u32 temp = roothub_a (&gohci);
1364
1365                 data_buf [0] = 9;               /* min length; */
1366                 data_buf [1] = 0x29;
1367                 data_buf [2] = temp & RH_A_NDP;
1368 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1369                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1370 #endif
1371                 data_buf [3] = 0;
1372                 if (temp & RH_A_PSM)    /* per-port power switching? */
1373                         data_buf [3] |= 0x1;
1374                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1375                         data_buf [3] |= 0x10;
1376                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1377                         data_buf [3] |= 0x8;
1378
1379                 /* corresponds to data_buf[4-7] */
1380                 datab [1] = 0;
1381                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1382                 temp = roothub_b (&gohci);
1383                 data_buf [7] = temp & RH_B_DR;
1384                 if (data_buf [2] < 7) {
1385                         data_buf [8] = 0xff;
1386                 } else {
1387                         data_buf [0] += 2;
1388                         data_buf [8] = (temp & RH_B_DR) >> 8;
1389                         data_buf [10] = data_buf [9] = 0xff;
1390                 }
1391
1392                 len = min_t(unsigned int, leni,
1393                             min_t(unsigned int, data_buf [0], wLength));
1394                 OK (len);
1395         }
1396
1397         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1398
1399         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1400
1401         default:
1402                 dbg ("unsupported root hub command");
1403                 stat = USB_ST_STALLED;
1404         }
1405
1406 #ifdef  DEBUG
1407         ohci_dump_roothub (&gohci, 1);
1408 #else
1409         wait_ms(1);
1410 #endif
1411
1412         len = min_t(int, len, leni);
1413         if (data != data_buf)
1414             memcpy (data, data_buf, len);
1415         dev->act_len = len;
1416         dev->status = stat;
1417
1418 #ifdef DEBUG
1419         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1420 #else
1421         wait_ms(1);
1422 #endif
1423
1424         return stat;
1425 }
1426
1427 /*-------------------------------------------------------------------------*/
1428
1429 /* common code for handling submit messages - used for all but root hub */
1430 /* accesses. */
1431 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1432                 int transfer_len, struct devrequest *setup, int interval)
1433 {
1434         int stat = 0;
1435         int maxsize = usb_maxpacket(dev, pipe);
1436         int timeout;
1437         urb_priv_t *urb;
1438
1439         urb = malloc(sizeof(urb_priv_t));
1440         memset(urb, 0, sizeof(urb_priv_t));
1441
1442         urb->dev = dev;
1443         urb->pipe = pipe;
1444         urb->transfer_buffer = buffer;
1445         urb->transfer_buffer_length = transfer_len;
1446         urb->interval = interval;
1447
1448         /* device pulled? Shortcut the action. */
1449         if (devgone == dev) {
1450                 dev->status = USB_ST_CRC_ERR;
1451                 return 0;
1452         }
1453
1454 #ifdef DEBUG
1455         urb->actual_length = 0;
1456         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1457 #else
1458         wait_ms(1);
1459 #endif
1460         if (!maxsize) {
1461                 err("submit_common_message: pipesize for pipe %lx is zero",
1462                         pipe);
1463                 return -1;
1464         }
1465
1466         if (sohci_submit_job(urb, setup) < 0) {
1467                 err("sohci_submit_job failed");
1468                 return -1;
1469         }
1470
1471 #if 0
1472         wait_ms(10);
1473         /* ohci_dump_status(&gohci); */
1474 #endif
1475
1476         /* allow more time for a BULK device to react - some are slow */
1477 #define BULK_TO  5000   /* timeout in milliseconds */
1478         if (usb_pipetype (pipe) == PIPE_BULK)
1479                 timeout = BULK_TO;
1480         else
1481                 timeout = 100;
1482
1483         /* wait for it to complete */
1484         for (;;) {
1485                 /* check whether the controller is done */
1486                 stat = hc_interrupt();
1487                 if (stat < 0) {
1488                         stat = USB_ST_CRC_ERR;
1489                         break;
1490                 }
1491
1492                 /* NOTE: since we are not interrupt driven in U-Boot and always
1493                  * handle only one URB at a time, we cannot assume the
1494                  * transaction finished on the first successful return from
1495                  * hc_interrupt().. unless the flag for current URB is set,
1496                  * meaning that all TD's to/from device got actually
1497                  * transferred and processed. If the current URB is not
1498                  * finished we need to re-iterate this loop so as
1499                  * hc_interrupt() gets called again as there needs to be some
1500                  * more TD's to process still */
1501                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1502                         /* 0xff is returned for an SF-interrupt */
1503                         break;
1504                 }
1505
1506                 if (--timeout) {
1507                         wait_ms(1);
1508                         if (!urb->finished)
1509                                 dbg("\%");
1510
1511                 } else {
1512                         err("CTL:TIMEOUT ");
1513                         dbg("submit_common_msg: TO status %x\n", stat);
1514                         urb->finished = 1;
1515                         stat = USB_ST_CRC_ERR;
1516                         break;
1517                 }
1518         }
1519
1520         dev->status = stat;
1521         dev->act_len = transfer_len;
1522
1523 #ifdef DEBUG
1524         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1525 #else
1526         wait_ms(1);
1527 #endif
1528
1529         /* free TDs in urb_priv */
1530         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1531                 urb_free_priv (urb);
1532         return 0;
1533 }
1534
1535 /* submit routines called from usb.c */
1536 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1537                 int transfer_len)
1538 {
1539         info("submit_bulk_msg");
1540         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1541 }
1542
1543 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1544                 int transfer_len, struct devrequest *setup)
1545 {
1546         int maxsize = usb_maxpacket(dev, pipe);
1547
1548         info("submit_control_msg");
1549 #ifdef DEBUG
1550         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1551 #else
1552         wait_ms(1);
1553 #endif
1554         if (!maxsize) {
1555                 err("submit_control_message: pipesize for pipe %lx is zero",
1556                         pipe);
1557                 return -1;
1558         }
1559         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1560                 gohci.rh.dev = dev;
1561                 /* root hub - redirect */
1562                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1563                         setup);
1564         }
1565
1566         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1567 }
1568
1569 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1570                 int transfer_len, int interval)
1571 {
1572         info("submit_int_msg");
1573         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1574                         interval);
1575 }
1576
1577 /*-------------------------------------------------------------------------*
1578  * HC functions
1579  *-------------------------------------------------------------------------*/
1580
1581 /* reset the HC and BUS */
1582
1583 static int hc_reset (ohci_t *ohci)
1584 {
1585         int timeout = 30;
1586         int smm_timeout = 50; /* 0,5 sec */
1587
1588         dbg("%s\n", __FUNCTION__);
1589
1590         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1591                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1592                 info("USB HC TakeOver from SMM");
1593                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1594                         wait_ms (10);
1595                         if (--smm_timeout == 0) {
1596                                 err("USB HC TakeOver failed!");
1597                                 return -1;
1598                         }
1599                 }
1600         }
1601
1602         /* Disable HC interrupts */
1603         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1604
1605         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1606                 ohci->slot_name,
1607                 readl(&ohci->regs->control));
1608
1609         /* Reset USB (needed by some controllers) */
1610         ohci->hc_control = 0;
1611         writel (ohci->hc_control, &ohci->regs->control);
1612
1613         /* HC Reset requires max 10 us delay */
1614         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1615         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1616                 if (--timeout == 0) {
1617                         err("USB HC reset timed out!");
1618                         return -1;
1619                 }
1620                 udelay (1);
1621         }
1622         return 0;
1623 }
1624
1625 /*-------------------------------------------------------------------------*/
1626
1627 /* Start an OHCI controller, set the BUS operational
1628  * enable interrupts
1629  * connect the virtual root hub */
1630
1631 static int hc_start (ohci_t * ohci)
1632 {
1633         __u32 mask;
1634         unsigned int fminterval;
1635
1636         ohci->disabled = 1;
1637
1638         /* Tell the controller where the control and bulk lists are
1639          * The lists are empty now. */
1640
1641         writel (0, &ohci->regs->ed_controlhead);
1642         writel (0, &ohci->regs->ed_bulkhead);
1643
1644         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1645
1646         fminterval = 0x2edf;
1647         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1648         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1649         writel (fminterval, &ohci->regs->fminterval);
1650         writel (0x628, &ohci->regs->lsthresh);
1651
1652         /* start controller operations */
1653         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1654         ohci->disabled = 0;
1655         writel (ohci->hc_control, &ohci->regs->control);
1656
1657         /* disable all interrupts */
1658         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1659                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1660                         OHCI_INTR_OC | OHCI_INTR_MIE);
1661         writel (mask, &ohci->regs->intrdisable);
1662         /* clear all interrupts */
1663         mask &= ~OHCI_INTR_MIE;
1664         writel (mask, &ohci->regs->intrstatus);
1665         /* Choose the interrupts we care about now  - but w/o MIE */
1666         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1667         writel (mask, &ohci->regs->intrenable);
1668
1669 #ifdef  OHCI_USE_NPS
1670         /* required for AMD-756 and some Mac platforms */
1671         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1672                 &ohci->regs->roothub.a);
1673         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1674 #endif  /* OHCI_USE_NPS */
1675
1676 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1677         /* POTPGT delay is bits 24-31, in 2 ms units. */
1678         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1679
1680         /* connect the virtual root hub */
1681         ohci->rh.devnum = 0;
1682
1683         return 0;
1684 }
1685
1686 /*-------------------------------------------------------------------------*/
1687
1688 /* Poll USB interrupt. */
1689 void usb_event_poll(void)
1690 {
1691         hc_interrupt();
1692 }
1693
1694 /* an interrupt happens */
1695
1696 static int hc_interrupt (void)
1697 {
1698         ohci_t *ohci = &gohci;
1699         struct ohci_regs *regs = ohci->regs;
1700         int ints;
1701         int stat = -1;
1702
1703         if ((ohci->hcca->done_head != 0) &&
1704             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1705                 ints =  OHCI_INTR_WDH;
1706         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1707                 ohci->disabled++;
1708                 err ("%s device removed!", ohci->slot_name);
1709                 return -1;
1710         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1711                 dbg("hc_interrupt: returning..\n");
1712                 return 0xff;
1713         }
1714
1715         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1716
1717         if (ints & OHCI_INTR_RHSC) {
1718                 got_rhsc = 1;
1719                 stat = 0xff;
1720         }
1721
1722         if (ints & OHCI_INTR_UE) {
1723                 ohci->disabled++;
1724                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1725                         ohci->slot_name);
1726                 /* e.g. due to PCI Master/Target Abort */
1727
1728 #ifdef  DEBUG
1729                 ohci_dump (ohci, 1);
1730 #else
1731         wait_ms(1);
1732 #endif
1733                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1734                 /* Make some non-interrupt context restart the controller. */
1735                 /* Count and limit the retries though; either hardware or */
1736                 /* software errors can go forever... */
1737                 hc_reset (ohci);
1738                 return -1;
1739         }
1740
1741         if (ints & OHCI_INTR_WDH) {
1742                 wait_ms(1);
1743                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1744                 (void)readl (&regs->intrdisable); /* flush */
1745                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1746                 writel (OHCI_INTR_WDH, &regs->intrenable);
1747                 (void)readl (&regs->intrdisable); /* flush */
1748         }
1749
1750         if (ints & OHCI_INTR_SO) {
1751                 dbg("USB Schedule overrun\n");
1752                 writel (OHCI_INTR_SO, &regs->intrenable);
1753                 stat = -1;
1754         }
1755
1756         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1757         if (ints & OHCI_INTR_SF) {
1758                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1759                 wait_ms(1);
1760                 writel (OHCI_INTR_SF, &regs->intrdisable);
1761                 if (ohci->ed_rm_list[frame] != NULL)
1762                         writel (OHCI_INTR_SF, &regs->intrenable);
1763                 stat = 0xff;
1764         }
1765
1766         writel (ints, &regs->intrstatus);
1767         return stat;
1768 }
1769
1770 /*-------------------------------------------------------------------------*/
1771
1772 /*-------------------------------------------------------------------------*/
1773
1774 /* De-allocate all resources.. */
1775
1776 static void hc_release_ohci (ohci_t *ohci)
1777 {
1778         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1779
1780         if (!ohci->disabled)
1781                 hc_reset (ohci);
1782 }
1783
1784 /*-------------------------------------------------------------------------*/
1785
1786 /*
1787  * low level initalisation routine, called from usb.c
1788  */
1789 static char ohci_inited = 0;
1790
1791 int usb_lowlevel_init(void)
1792 {
1793 #ifdef CONFIG_PCI_OHCI
1794         pci_dev_t pdev;
1795 #endif
1796
1797 #ifdef CFG_USB_OHCI_CPU_INIT
1798         /* cpu dependant init */
1799         if(usb_cpu_init())
1800                 return -1;
1801 #endif
1802
1803 #ifdef CFG_USB_OHCI_BOARD_INIT
1804         /*  board dependant init */
1805         if(usb_board_init())
1806                 return -1;
1807 #endif
1808         memset (&gohci, 0, sizeof (ohci_t));
1809
1810         /* align the storage */
1811         if ((__u32)&ghcca[0] & 0xff) {
1812                 err("HCCA not aligned!!");
1813                 return -1;
1814         }
1815         phcca = &ghcca[0];
1816         info("aligned ghcca %p", phcca);
1817         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1818         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1819                 err("EDs not aligned!!");
1820                 return -1;
1821         }
1822         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1823         if ((__u32)gtd & 0x7) {
1824                 err("TDs not aligned!!");
1825                 return -1;
1826         }
1827         ptd = gtd;
1828         gohci.hcca = phcca;
1829         memset (phcca, 0, sizeof (struct ohci_hcca));
1830
1831         gohci.disabled = 1;
1832         gohci.sleeping = 0;
1833         gohci.irq = -1;
1834 #ifdef CONFIG_PCI_OHCI
1835         pdev = pci_find_devices(ohci_pci_ids, 0);
1836
1837         if (pdev != -1) {
1838                 u16 vid, did;
1839                 u32 base;
1840                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1841                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1842                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1843                                 vid, did, (pdev >> 16) & 0xff,
1844                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1845                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1846                 printf("OHCI regs address 0x%08x\n", base);
1847                 gohci.regs = (struct ohci_regs *)base;
1848         } else
1849                 return -1;
1850 #else
1851         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1852 #endif
1853
1854         gohci.flags = 0;
1855         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1856
1857         if (hc_reset (&gohci) < 0) {
1858                 hc_release_ohci (&gohci);
1859                 err ("can't reset usb-%s", gohci.slot_name);
1860 #ifdef CFG_USB_OHCI_BOARD_INIT
1861                 /* board dependant cleanup */
1862                 usb_board_init_fail();
1863 #endif
1864
1865 #ifdef CFG_USB_OHCI_CPU_INIT
1866                 /* cpu dependant cleanup */
1867                 usb_cpu_init_fail();
1868 #endif
1869                 return -1;
1870         }
1871
1872         /* FIXME this is a second HC reset; why?? */
1873         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1874            wait_ms(10); */
1875         if (hc_start (&gohci) < 0) {
1876                 err ("can't start usb-%s", gohci.slot_name);
1877                 hc_release_ohci (&gohci);
1878                 /* Initialization failed */
1879 #ifdef CFG_USB_OHCI_BOARD_INIT
1880                 /* board dependant cleanup */
1881                 usb_board_stop();
1882 #endif
1883
1884 #ifdef CFG_USB_OHCI_CPU_INIT
1885                 /* cpu dependant cleanup */
1886                 usb_cpu_stop();
1887 #endif
1888                 return -1;
1889         }
1890
1891 #ifdef  DEBUG
1892         ohci_dump (&gohci, 1);
1893 #else
1894         wait_ms(1);
1895 #endif
1896         ohci_inited = 1;
1897         return 0;
1898 }
1899
1900 int usb_lowlevel_stop(void)
1901 {
1902         /* this gets called really early - before the controller has */
1903         /* even been initialized! */
1904         if (!ohci_inited)
1905                 return 0;
1906         /* TODO release any interrupts, etc. */
1907         /* call hc_release_ohci() here ? */
1908         hc_reset (&gohci);
1909
1910 #ifdef CFG_USB_OHCI_BOARD_INIT
1911         /* board dependant cleanup */
1912         if(usb_board_stop())
1913                 return -1;
1914 #endif
1915
1916 #ifdef CFG_USB_OHCI_CPU_INIT
1917         /* cpu dependant cleanup */
1918         if(usb_cpu_stop())
1919                 return -1;
1920 #endif
1921
1922         return 0;
1923 }
1924 #endif /* CONFIG_USB_OHCI_NEW */