drivers/usb/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  57 #define CONFIG_PCI_OHCI_DEVNO   0
  58 #endif
  59 #endif
  60
  61 #include <malloc.h>
  62 #include <usb.h>
  63 #include "usb_ohci.h"
  64
  65 #ifdef CONFIG_AT91RM9200
  66 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  67 #endif
  68
  69 #if defined(CONFIG_ARM920T) || \
  70     defined(CONFIG_S3C2400) || \
  71     defined(CONFIG_S3C2410) || \
  72     defined(CONFIG_S3C6400) || \
  73     defined(CONFIG_440EP) || \
  74     defined(CONFIG_PCI_OHCI) || \
  75     defined(CONFIG_MPC5200) || \
  76     defined(CFG_OHCI_USE_NPS)
  77 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  78 #endif
  79
  80 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  81 #undef DEBUG
  82 #undef SHOW_INFO
  83 #undef OHCI_FILL_TRACE
  84
  85 /* For initializing controller (mask in an HCFS mode too) */
  86 #define OHCI_CONTROL_INIT \
  87         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  88
  89 /*
  90  * e.g. PCI controllers need this
  91  */
  92 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  93 # define readl(a) __swap_32(*((volatile u32 *)(a)))
  94 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
  95 #else
  96 # define readl(a) (*((volatile u32 *)(a)))
  97 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  98 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  99
 100 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
 101
 102 #ifdef CONFIG_PCI_OHCI
 103 static struct pci_device_id ohci_pci_ids[] = {
 104         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
 105         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
 106         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
 107         /* Please add supported PCI OHCI controller ids here */
 108         {0, 0}
 109 };
 110 #endif
 111
 112 #ifdef DEBUG
 113 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 114 #else
 115 #define dbg(format, arg...) do {} while(0)
 116 #endif /* DEBUG */
 117 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 118 #ifdef SHOW_INFO
 119 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 120 #else
 121 #define info(format, arg...) do {} while(0)
 122 #endif
 123
 124 #ifdef CFG_OHCI_BE_CONTROLLER
 125 # define m16_swap(x) cpu_to_be16(x)
 126 # define m32_swap(x) cpu_to_be32(x)
 127 #else
 128 # define m16_swap(x) cpu_to_le16(x)
 129 # define m32_swap(x) cpu_to_le32(x)
 130 #endif /* CFG_OHCI_BE_CONTROLLER */
 131
 132 /* global ohci_t */
 133 static ohci_t gohci;
 134 /* this must be aligned to a 256 byte boundary */
 135 struct ohci_hcca ghcca[1];
 136 /* a pointer to the aligned storage */
 137 struct ohci_hcca *phcca;
 138 /* this allocates EDs for all possible endpoints */
 139 struct ohci_device ohci_dev;
 140 /* RHSC flag */
 141 int got_rhsc;
 142 /* device which was disconnected */
 143 struct usb_device *devgone;
 144
 145 static inline u32 roothub_a (struct ohci *hc)
 146         { return readl (&hc->regs->roothub.a); }
 147 static inline u32 roothub_b (struct ohci *hc)
 148         { return readl (&hc->regs->roothub.b); }
 149 static inline u32 roothub_status (struct ohci *hc)
 150         { return readl (&hc->regs->roothub.status); }
 151 static inline u32 roothub_portstatus (struct ohci *hc, int i)
 152         { return readl (&hc->regs->roothub.portstatus[i]); }
 153
 154 /* forward declaration */
 155 static int hc_interrupt (void);
 156 static void
 157 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 158         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 159
 160 /*-------------------------------------------------------------------------*
 161  * URB support functions
 162  *-------------------------------------------------------------------------*/
 163
 164 /* free HCD-private data associated with this URB */
 165
 166 static void urb_free_priv (urb_priv_t * urb)
 167 {
 168         int             i;
 169         int             last;
 170         struct td       * td;
 171
 172         last = urb->length - 1;
 173         if (last >= 0) {
 174                 for (i = 0; i <= last; i++) {
 175                         td = urb->td[i];
 176                         if (td) {
 177                                 td->usb_dev = NULL;
 178                                 urb->td[i] = NULL;
 179                         }
 180                 }
 181         }
 182         free(urb);
 183 }
 184
 185 /*-------------------------------------------------------------------------*/
 186
 187 #ifdef DEBUG
 188 static int sohci_get_current_frame_number (struct usb_device * dev);
 189
 190 /* debug| print the main components of an URB
 191  * small: 0) header + data packets 1) just header */
 192
 193 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 194         unsigned long pipe, void * buffer,
 195         int transfer_len, struct devrequest * setup, char * str, int small)
 196 {
 197         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 198                         str,
 199                         sohci_get_current_frame_number (dev),
 200                         usb_pipedevice (pipe),
 201                         usb_pipeendpoint (pipe),
 202                         usb_pipeout (pipe)? 'O': 'I',
 203                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 204                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 205                         (purb ? purb->actual_length : 0),
 206                         transfer_len, dev->status);
 207 #ifdef  OHCI_VERBOSE_DEBUG
 208         if (!small) {
 209                 int i, len;
 210
 211                 if (usb_pipecontrol (pipe)) {
 212                         printf (__FILE__ ": cmd(8):");
 213                         for (i = 0; i < 8 ; i++)
 214                                 printf (" %02x", ((__u8 *) setup) [i]);
 215                         printf ("\n");
 216                 }
 217                 if (transfer_len > 0 && buffer) {
 218                         printf (__FILE__ ": data(%d/%d):",
 219                                 (purb ? purb->actual_length : 0),
 220                                 transfer_len);
 221                         len = usb_pipeout (pipe)?
 222                                         transfer_len:
 223                                         (purb ? purb->actual_length : 0);
 224                         for (i = 0; i < 16 && i < len; i++)
 225                                 printf (" %02x", ((__u8 *) buffer) [i]);
 226                         printf ("%s\n", i < len? "...": "");
 227                 }
 228         }
 229 #endif
 230 }
 231
 232 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 233 void ep_print_int_eds (ohci_t *ohci, char * str) {
 234         int i, j;
 235          __u32 * ed_p;
 236         for (i= 0; i < 32; i++) {
 237                 j = 5;
 238                 ed_p = &(ohci->hcca->int_table [i]);
 239                 if (*ed_p == 0)
 240                     continue;
 241                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 242                 while (*ed_p != 0 && j--) {
 243                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 244                         printf (" ed: %4x;", ed->hwINFO);
 245                         ed_p = &ed->hwNextED;
 246                 }
 247                 printf ("\n");
 248         }
 249 }
 250
 251 static void ohci_dump_intr_mask (char *label, __u32 mask)
 252 {
 253         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 254                 label,
 255                 mask,
 256                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 257                 (mask & OHCI_INTR_OC) ? " OC" : "",
 258                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 259                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 260                 (mask & OHCI_INTR_UE) ? " UE" : "",
 261                 (mask & OHCI_INTR_RD) ? " RD" : "",
 262                 (mask & OHCI_INTR_SF) ? " SF" : "",
 263                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 264                 (mask & OHCI_INTR_SO) ? " SO" : ""
 265                 );
 266 }
 267
 268 static void maybe_print_eds (char *label, __u32 value)
 269 {
 270         ed_t *edp = (ed_t *)value;
 271
 272         if (value) {
 273                 dbg ("%s %08x", label, value);
 274                 dbg ("%08x", edp->hwINFO);
 275                 dbg ("%08x", edp->hwTailP);
 276                 dbg ("%08x", edp->hwHeadP);
 277                 dbg ("%08x", edp->hwNextED);
 278         }
 279 }
 280
 281 static char * hcfs2string (int state)
 282 {
 283         switch (state) {
 284                 case OHCI_USB_RESET:    return "reset";
 285                 case OHCI_USB_RESUME:   return "resume";
 286                 case OHCI_USB_OPER:     return "operational";
 287                 case OHCI_USB_SUSPEND:  return "suspend";
 288         }
 289         return "?";
 290 }
 291
 292 /* dump control and status registers */
 293 static void ohci_dump_status (ohci_t *controller)
 294 {
 295         struct ohci_regs        *regs = controller->regs;
 296         __u32                   temp;
 297
 298         temp = readl (&regs->revision) & 0xff;
 299         if (temp != 0x10)
 300                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 301
 302         temp = readl (&regs->control);
 303         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 304                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 305                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 306                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 307                 hcfs2string (temp & OHCI_CTRL_HCFS),
 308                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 309                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 310                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 311                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 312                 temp & OHCI_CTRL_CBSR
 313                 );
 314
 315         temp = readl (&regs->cmdstatus);
 316         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 317                 (temp & OHCI_SOC) >> 16,
 318                 (temp & OHCI_OCR) ? " OCR" : "",
 319                 (temp & OHCI_BLF) ? " BLF" : "",
 320                 (temp & OHCI_CLF) ? " CLF" : "",
 321                 (temp & OHCI_HCR) ? " HCR" : ""
 322                 );
 323
 324         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 325         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 326
 327         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 328
 329         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 330         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 331
 332         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 333         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 334
 335         maybe_print_eds ("donehead", readl (&regs->donehead));
 336 }
 337
 338 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 339 {
 340         __u32                   temp, ndp, i;
 341
 342         temp = roothub_a (controller);
 343         ndp = (temp & RH_A_NDP);
 344 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 345         ndp = (ndp == 2) ? 1:0;
 346 #endif
 347         if (verbose) {
 348                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 349                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 350                         (temp & RH_A_NOCP) ? " NOCP" : "",
 351                         (temp & RH_A_OCPM) ? " OCPM" : "",
 352                         (temp & RH_A_DT) ? " DT" : "",
 353                         (temp & RH_A_NPS) ? " NPS" : "",
 354                         (temp & RH_A_PSM) ? " PSM" : "",
 355                         ndp
 356                         );
 357                 temp = roothub_b (controller);
 358                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 359                         temp,
 360                         (temp & RH_B_PPCM) >> 16,
 361                         (temp & RH_B_DR)
 362                         );
 363                 temp = roothub_status (controller);
 364                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 365                         temp,
 366                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 367                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 368                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 369                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 370                         (temp & RH_HS_OCI) ? " OCI" : "",
 371                         (temp & RH_HS_LPS) ? " LPS" : ""
 372                         );
 373         }
 374
 375         for (i = 0; i < ndp; i++) {
 376                 temp = roothub_portstatus (controller, i);
 377                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 378                         i,
 379                         temp,
 380                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 381                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 382                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 383                         (temp & RH_PS_PESC) ? " PESC" : "",
 384                         (temp & RH_PS_CSC) ? " CSC" : "",
 385
 386                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 387                         (temp & RH_PS_PPS) ? " PPS" : "",
 388                         (temp & RH_PS_PRS) ? " PRS" : "",
 389                         (temp & RH_PS_POCI) ? " POCI" : "",
 390                         (temp & RH_PS_PSS) ? " PSS" : "",
 391
 392                         (temp & RH_PS_PES) ? " PES" : "",
 393                         (temp & RH_PS_CCS) ? " CCS" : ""
 394                         );
 395         }
 396 }
 397
 398 static void ohci_dump (ohci_t *controller, int verbose)
 399 {
 400         dbg ("OHCI controller usb-%s state", controller->slot_name);
 401
 402         /* dumps some of the state we know about */
 403         ohci_dump_status (controller);
 404         if (verbose)
 405                 ep_print_int_eds (controller, "hcca");
 406         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 407         ohci_dump_roothub (controller, 1);
 408 }
 409 #endif /* DEBUG */
 410
 411 /*-------------------------------------------------------------------------*
 412  * Interface functions (URB)
 413  *-------------------------------------------------------------------------*/
 414
 415 /* get a transfer request */
 416
 417 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 418 {
 419         ohci_t *ohci;
 420         ed_t * ed;
 421         urb_priv_t *purb_priv = urb;
 422         int i, size = 0;
 423         struct usb_device *dev = urb->dev;
 424         unsigned long pipe = urb->pipe;
 425         void *buffer = urb->transfer_buffer;
 426         int transfer_len = urb->transfer_buffer_length;
 427         int interval = urb->interval;
 428
 429         ohci = &gohci;
 430
 431         /* when controller's hung, permit only roothub cleanup attempts
 432          * such as powering down ports */
 433         if (ohci->disabled) {
 434                 err("sohci_submit_job: EPIPE");
 435                 return -1;
 436         }
 437
 438         /* we're about to begin a new transaction here so mark the URB unfinished */
 439         urb->finished = 0;
 440
 441         /* every endpoint has a ed, locate and fill it */
 442         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 443                 err("sohci_submit_job: ENOMEM");
 444                 return -1;
 445         }
 446
 447         /* for the private part of the URB we need the number of TDs (size) */
 448         switch (usb_pipetype (pipe)) {
 449                 case PIPE_BULK: /* one TD for every 4096 Byte */
 450                         size = (transfer_len - 1) / 4096 + 1;
 451                         break;
 452                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 453                         size = (transfer_len == 0)? 2:
 454                                                 (transfer_len - 1) / 4096 + 3;
 455                         break;
 456                 case PIPE_INTERRUPT: /* 1 TD */
 457                         size = 1;
 458                         break;
 459         }
 460
 461         ed->purb = urb;
 462
 463         if (size >= (N_URB_TD - 1)) {
 464                 err("need %d TDs, only have %d", size, N_URB_TD);
 465                 return -1;
 466         }
 467         purb_priv->pipe = pipe;
 468
 469         /* fill the private part of the URB */
 470         purb_priv->length = size;
 471         purb_priv->ed = ed;
 472         purb_priv->actual_length = 0;
 473
 474         /* allocate the TDs */
 475         /* note that td[0] was allocated in ep_add_ed */
 476         for (i = 0; i < size; i++) {
 477                 purb_priv->td[i] = td_alloc (dev);
 478                 if (!purb_priv->td[i]) {
 479                         purb_priv->length = i;
 480                         urb_free_priv (purb_priv);
 481                         err("sohci_submit_job: ENOMEM");
 482                         return -1;
 483                 }
 484         }
 485
 486         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 487                 urb_free_priv (purb_priv);
 488                 err("sohci_submit_job: EINVAL");
 489                 return -1;
 490         }
 491
 492         /* link the ed into a chain if is not already */
 493         if (ed->state != ED_OPER)
 494                 ep_link (ohci, ed);
 495
 496         /* fill the TDs and link it to the ed */
 497         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 498
 499         return 0;
 500 }
 501
 502 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 503 {
 504         struct ohci_regs *regs = hc->regs;
 505
 506         switch (usb_pipetype (urb->pipe)) {
 507         case PIPE_INTERRUPT:
 508                 /* implicitly requeued */
 509                 if (urb->dev->irq_handle &&
 510                                 (urb->dev->irq_act_len = urb->actual_length)) {
 511                         writel (OHCI_INTR_WDH, &regs->intrenable);
 512                         readl (&regs->intrenable); /* PCI posting flush */
 513                         urb->dev->irq_handle(urb->dev);
 514                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 515                         readl (&regs->intrdisable); /* PCI posting flush */
 516                 }
 517                 urb->actual_length = 0;
 518                 td_submit_job (
 519                                 urb->dev,
 520                                 urb->pipe,
 521                                 urb->transfer_buffer,
 522                                 urb->transfer_buffer_length,
 523                                 NULL,
 524                                 urb,
 525                                 urb->interval);
 526                 break;
 527         case PIPE_CONTROL:
 528         case PIPE_BULK:
 529                 break;
 530         default:
 531                 return 0;
 532         }
 533         return 1;
 534 }
 535
 536 /*-------------------------------------------------------------------------*/
 537
 538 #ifdef DEBUG
 539 /* tell us the current USB frame number */
 540
 541 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 542 {
 543         ohci_t *ohci = &gohci;
 544
 545         return m16_swap (ohci->hcca->frame_no);
 546 }
 547 #endif
 548
 549 /*-------------------------------------------------------------------------*
 550  * ED handling functions
 551  *-------------------------------------------------------------------------*/
 552
 553 /* search for the right branch to insert an interrupt ed into the int tree
 554  * do some load ballancing;
 555  * returns the branch and
 556  * sets the interval to interval = 2^integer (ld (interval)) */
 557
 558 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 559 {
 560         int i, branch = 0;
 561
 562         /* search for the least loaded interrupt endpoint
 563          * branch of all 32 branches
 564          */
 565         for (i = 0; i < 32; i++)
 566                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 567                         branch = i;
 568
 569         branch = branch % interval;
 570         for (i = branch; i < 32; i += interval)
 571                 ohci->ohci_int_load [i] += load;
 572
 573         return branch;
 574 }
 575
 576 /*-------------------------------------------------------------------------*/
 577
 578 /*  2^int( ld (inter)) */
 579
 580 static int ep_2_n_interval (int inter)
 581 {
 582         int i;
 583         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 584         return 1 << i;
 585 }
 586
 587 /*-------------------------------------------------------------------------*/
 588
 589 /* the int tree is a binary tree
 590  * in order to process it sequentially the indexes of the branches have to be mapped
 591  * the mapping reverses the bits of a word of num_bits length */
 592
 593 static int ep_rev (int num_bits, int word)
 594 {
 595         int i, wout = 0;
 596
 597         for (i = 0; i < num_bits; i++)
 598                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 599         return wout;
 600 }
 601
 602 /*-------------------------------------------------------------------------*
 603  * ED handling functions
 604  *-------------------------------------------------------------------------*/
 605
 606 /* link an ed into one of the HC chains */
 607
 608 static int ep_link (ohci_t *ohci, ed_t *edi)
 609 {
 610         volatile ed_t *ed = edi;
 611         int int_branch;
 612         int i;
 613         int inter;
 614         int interval;
 615         int load;
 616         __u32 * ed_p;
 617
 618         ed->state = ED_OPER;
 619         ed->int_interval = 0;
 620
 621         switch (ed->type) {
 622         case PIPE_CONTROL:
 623                 ed->hwNextED = 0;
 624                 if (ohci->ed_controltail == NULL) {
 625                         writel (ed, &ohci->regs->ed_controlhead);
 626                 } else {
 627                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 628                 }
 629                 ed->ed_prev = ohci->ed_controltail;
 630                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 631                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 632                         ohci->hc_control |= OHCI_CTRL_CLE;
 633                         writel (ohci->hc_control, &ohci->regs->control);
 634                 }
 635                 ohci->ed_controltail = edi;
 636                 break;
 637
 638         case PIPE_BULK:
 639                 ed->hwNextED = 0;
 640                 if (ohci->ed_bulktail == NULL) {
 641                         writel (ed, &ohci->regs->ed_bulkhead);
 642                 } else {
 643                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 644                 }
 645                 ed->ed_prev = ohci->ed_bulktail;
 646                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 647                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 648                         ohci->hc_control |= OHCI_CTRL_BLE;
 649                         writel (ohci->hc_control, &ohci->regs->control);
 650                 }
 651                 ohci->ed_bulktail = edi;
 652                 break;
 653
 654         case PIPE_INTERRUPT:
 655                 load = ed->int_load;
 656                 interval = ep_2_n_interval (ed->int_period);
 657                 ed->int_interval = interval;
 658                 int_branch = ep_int_ballance (ohci, interval, load);
 659                 ed->int_branch = int_branch;
 660
 661                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 662                         inter = 1;
 663                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 664                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 665                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 666                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 667                         ed->hwNextED = *ed_p;
 668                         *ed_p = m32_swap((unsigned long)ed);
 669                 }
 670                 break;
 671         }
 672         return 0;
 673 }
 674
 675 /*-------------------------------------------------------------------------*/
 676
 677 /* scan the periodic table to find and unlink this ED */
 678 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 679                 unsigned index, unsigned period)
 680 {
 681         for (; index < NUM_INTS; index += period) {
 682                 __u32   *ed_p = &ohci->hcca->int_table [index];
 683
 684                 /* ED might have been unlinked through another path */
 685                 while (*ed_p != 0) {
 686                         if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
 687                                 *ed_p = ed->hwNextED;
 688                                 break;
 689                         }
 690                         ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
 691                 }
 692         }
 693 }
 694
 695 /* unlink an ed from one of the HC chains.
 696  * just the link to the ed is unlinked.
 697  * the link from the ed still points to another operational ed or 0
 698  * so the HC can eventually finish the processing of the unlinked ed */
 699
 700 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 701 {
 702         volatile ed_t *ed = edi;
 703         int i;
 704
 705         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 706
 707         switch (ed->type) {
 708         case PIPE_CONTROL:
 709                 if (ed->ed_prev == NULL) {
 710                         if (!ed->hwNextED) {
 711                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 712                                 writel (ohci->hc_control, &ohci->regs->control);
 713                         }
 714                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 715                 } else {
 716                         ed->ed_prev->hwNextED = ed->hwNextED;
 717                 }
 718                 if (ohci->ed_controltail == ed) {
 719                         ohci->ed_controltail = ed->ed_prev;
 720                 } else {
 721                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 722                 }
 723                 break;
 724
 725         case PIPE_BULK:
 726                 if (ed->ed_prev == NULL) {
 727                         if (!ed->hwNextED) {
 728                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 729                                 writel (ohci->hc_control, &ohci->regs->control);
 730                         }
 731                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 732                 } else {
 733                         ed->ed_prev->hwNextED = ed->hwNextED;
 734                 }
 735                 if (ohci->ed_bulktail == ed) {
 736                         ohci->ed_bulktail = ed->ed_prev;
 737                 } else {
 738                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 739                 }
 740                 break;
 741
 742         case PIPE_INTERRUPT:
 743                 periodic_unlink (ohci, ed, 0, 1);
 744                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 745                     ohci->ohci_int_load[i] -= ed->int_load;
 746                 break;
 747         }
 748         ed->state = ED_UNLINK;
 749         return 0;
 750 }
 751
 752 /*-------------------------------------------------------------------------*/
 753
 754 /* add/reinit an endpoint; this should be done once at the
 755  * usb_set_configuration command, but the USB stack is a little bit
 756  * stateless so we do it at every transaction if the state of the ed
 757  * is ED_NEW then a dummy td is added and the state is changed to
 758  * ED_UNLINK in all other cases the state is left unchanged the ed
 759  * info fields are setted anyway even though most of them should not
 760  * change
 761  */
 762 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 763                 int interval, int load)
 764 {
 765         td_t *td;
 766         ed_t *ed_ret;
 767         volatile ed_t *ed;
 768
 769         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 770                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 771
 772         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 773                 err("ep_add_ed: pending delete");
 774                 /* pending delete request */
 775                 return NULL;
 776         }
 777
 778         if (ed->state == ED_NEW) {
 779                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 780                 /* dummy td; end of td list for ed */
 781                 td = td_alloc (usb_dev);
 782                 ed->hwTailP = m32_swap ((unsigned long)td);
 783                 ed->hwHeadP = ed->hwTailP;
 784                 ed->state = ED_UNLINK;
 785                 ed->type = usb_pipetype (pipe);
 786                 ohci_dev.ed_cnt++;
 787         }
 788
 789         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 790                         | usb_pipeendpoint (pipe) << 7
 791                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 792                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 793                         | usb_pipeslow (pipe) << 13
 794                         | usb_maxpacket (usb_dev, pipe) << 16);
 795
 796         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 797                 ed->int_period = interval;
 798                 ed->int_load = load;
 799         }
 800
 801         return ed_ret;
 802 }
 803
 804 /*-------------------------------------------------------------------------*
 805  * TD handling functions
 806  *-------------------------------------------------------------------------*/
 807
 808 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 809
 810 static void td_fill (ohci_t *ohci, unsigned int info,
 811         void *data, int len,
 812         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 813 {
 814         volatile td_t  *td, *td_pt;
 815 #ifdef OHCI_FILL_TRACE
 816         int i;
 817 #endif
 818
 819         if (index > urb_priv->length) {
 820                 err("index > length");
 821                 return;
 822         }
 823         /* use this td as the next dummy */
 824         td_pt = urb_priv->td [index];
 825         td_pt->hwNextTD = 0;
 826
 827         /* fill the old dummy TD */
 828         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 829
 830         td->ed = urb_priv->ed;
 831         td->next_dl_td = NULL;
 832         td->index = index;
 833         td->data = (__u32)data;
 834 #ifdef OHCI_FILL_TRACE
 835         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 836                 for (i = 0; i < len; i++)
 837                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 838                 printf("\n");
 839         }
 840 #endif
 841         if (!len)
 842                 data = 0;
 843
 844         td->hwINFO = m32_swap (info);
 845         td->hwCBP = m32_swap ((unsigned long)data);
 846         if (data)
 847                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 848         else
 849                 td->hwBE = 0;
 850         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 851
 852         /* append to queue */
 853         td->ed->hwTailP = td->hwNextTD;
 854 }
 855
 856 /*-------------------------------------------------------------------------*/
 857
 858 /* prepare all TDs of a transfer */
 859
 860 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 861         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 862 {
 863         ohci_t *ohci = &gohci;
 864         int data_len = transfer_len;
 865         void *data;
 866         int cnt = 0;
 867         __u32 info = 0;
 868         unsigned int toggle = 0;
 869
 870         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 871         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 872                 toggle = TD_T_TOGGLE;
 873         } else {
 874                 toggle = TD_T_DATA0;
 875                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 876         }
 877         urb->td_cnt = 0;
 878         if (data_len)
 879                 data = buffer;
 880         else
 881                 data = 0;
 882
 883         switch (usb_pipetype (pipe)) {
 884         case PIPE_BULK:
 885                 info = usb_pipeout (pipe)?
 886                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 887                 while(data_len > 4096) {
 888                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 889                         data += 4096; data_len -= 4096; cnt++;
 890                 }
 891                 info = usb_pipeout (pipe)?
 892                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 893                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 894                 cnt++;
 895
 896                 if (!ohci->sleeping)
 897                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 898                 break;
 899
 900         case PIPE_CONTROL:
 901                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 902                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 903                 if (data_len > 0) {
 904                         info = usb_pipeout (pipe)?
 905                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 906                         /* NOTE:  mishandles transfers >8K, some >4K */
 907                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 908                 }
 909                 info = usb_pipeout (pipe)?
 910                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 911                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 912                 if (!ohci->sleeping)
 913                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 914                 break;
 915
 916         case PIPE_INTERRUPT:
 917                 info = usb_pipeout (urb->pipe)?
 918                         TD_CC | TD_DP_OUT | toggle:
 919                         TD_CC | TD_R | TD_DP_IN | toggle;
 920                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 921                 break;
 922         }
 923         if (urb->length != cnt)
 924                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 925 }
 926
 927 /*-------------------------------------------------------------------------*
 928  * Done List handling functions
 929  *-------------------------------------------------------------------------*/
 930
 931 /* calculate the transfer length and update the urb */
 932
 933 static void dl_transfer_length(td_t * td)
 934 {
 935         __u32 tdINFO, tdBE, tdCBP;
 936         urb_priv_t *lurb_priv = td->ed->purb;
 937
 938         tdINFO = m32_swap (td->hwINFO);
 939         tdBE   = m32_swap (td->hwBE);
 940         tdCBP  = m32_swap (td->hwCBP);
 941
 942         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 943             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 944                 if (tdBE != 0) {
 945                         if (td->hwCBP == 0)
 946                                 lurb_priv->actual_length += tdBE - td->data + 1;
 947                         else
 948                                 lurb_priv->actual_length += tdCBP - td->data;
 949                 }
 950         }
 951 }
 952
 953 /*-------------------------------------------------------------------------*/
 954
 955 /* replies to the request have to be on a FIFO basis so
 956  * we reverse the reversed done-list */
 957
 958 static td_t * dl_reverse_done_list (ohci_t *ohci)
 959 {
 960         __u32 td_list_hc;
 961         td_t *td_rev = NULL;
 962         td_t *td_list = NULL;
 963         urb_priv_t *lurb_priv = NULL;
 964
 965         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 966         ohci->hcca->done_head = 0;
 967
 968         while (td_list_hc) {
 969                 td_list = (td_t *)td_list_hc;
 970
 971                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 972                         lurb_priv = td_list->ed->purb;
 973                         dbg(" USB-error/status: %x : %p",
 974                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 975                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 976                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 977                                         td_list->ed->hwHeadP =
 978                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 979                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 980                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 981                                 } else
 982                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 983                         }
 984 #ifdef CONFIG_MPC5200
 985                         td_list->hwNextTD = 0;
 986 #endif
 987                 }
 988
 989                 td_list->next_dl_td = td_rev;
 990                 td_rev = td_list;
 991                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
 992         }
 993         return td_list;
 994 }
 995
 996 /*-------------------------------------------------------------------------*/
 997
 998 /* td done list */
 999 static int dl_done_list (ohci_t *ohci, td_t *td_list)
1000 {
1001         td_t *td_list_next = NULL;
1002         ed_t *ed;
1003         int cc = 0;
1004         int stat = 0;
1005         /* urb_t *urb; */
1006         urb_priv_t *lurb_priv;
1007         __u32 tdINFO, edHeadP, edTailP;
1008
1009         while (td_list) {
1010                 td_list_next = td_list->next_dl_td;
1011
1012                 tdINFO = m32_swap (td_list->hwINFO);
1013
1014                 ed = td_list->ed;
1015                 lurb_priv = ed->purb;
1016
1017                 dl_transfer_length(td_list);
1018
1019                 /* error code of transfer */
1020                 cc = TD_CC_GET (tdINFO);
1021                 if (cc != 0) {
1022                         dbg("ConditionCode %#x", cc);
1023                         stat = cc_to_error[cc];
1024                 }
1025
1026                 /* see if this done list makes for all TD's of current URB,
1027                  * and mark the URB finished if so */
1028                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1029 #if 1
1030                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1031                             (lurb_priv->state != URB_DEL))
1032 #else
1033                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1034 #endif
1035                                 lurb_priv->finished = sohci_return_job(ohci,
1036                                                 lurb_priv);
1037                         else
1038                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1039                 } else
1040                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1041                                 lurb_priv->length);
1042                 if (ed->state != ED_NEW &&
1043                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1044                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1045                         edTailP = m32_swap (ed->hwTailP);
1046
1047                         /* unlink eds if they are not busy */
1048                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1049                                 ep_unlink (ohci, ed);
1050                 }
1051
1052                 td_list = td_list_next;
1053         }
1054         return stat;
1055 }
1056
1057 /*-------------------------------------------------------------------------*
1058  * Virtual Root Hub
1059  *-------------------------------------------------------------------------*/
1060
1061 /* Device descriptor */
1062 static __u8 root_hub_dev_des[] =
1063 {
1064         0x12,       /*  __u8  bLength; */
1065         0x01,       /*  __u8  bDescriptorType; Device */
1066         0x10,       /*  __u16 bcdUSB; v1.1 */
1067         0x01,
1068         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1069         0x00,       /*  __u8  bDeviceSubClass; */
1070         0x00,       /*  __u8  bDeviceProtocol; */
1071         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1072         0x00,       /*  __u16 idVendor; */
1073         0x00,
1074         0x00,       /*  __u16 idProduct; */
1075         0x00,
1076         0x00,       /*  __u16 bcdDevice; */
1077         0x00,
1078         0x00,       /*  __u8  iManufacturer; */
1079         0x01,       /*  __u8  iProduct; */
1080         0x00,       /*  __u8  iSerialNumber; */
1081         0x01        /*  __u8  bNumConfigurations; */
1082 };
1083
1084 /* Configuration descriptor */
1085 static __u8 root_hub_config_des[] =
1086 {
1087         0x09,       /*  __u8  bLength; */
1088         0x02,       /*  __u8  bDescriptorType; Configuration */
1089         0x19,       /*  __u16 wTotalLength; */
1090         0x00,
1091         0x01,       /*  __u8  bNumInterfaces; */
1092         0x01,       /*  __u8  bConfigurationValue; */
1093         0x00,       /*  __u8  iConfiguration; */
1094         0x40,       /*  __u8  bmAttributes;
1095                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1096         0x00,       /*  __u8  MaxPower; */
1097
1098         /* interface */
1099         0x09,       /*  __u8  if_bLength; */
1100         0x04,       /*  __u8  if_bDescriptorType; Interface */
1101         0x00,       /*  __u8  if_bInterfaceNumber; */
1102         0x00,       /*  __u8  if_bAlternateSetting; */
1103         0x01,       /*  __u8  if_bNumEndpoints; */
1104         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1105         0x00,       /*  __u8  if_bInterfaceSubClass; */
1106         0x00,       /*  __u8  if_bInterfaceProtocol; */
1107         0x00,       /*  __u8  if_iInterface; */
1108
1109         /* endpoint */
1110         0x07,       /*  __u8  ep_bLength; */
1111         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1112         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1113         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1114         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1115         0x00,
1116         0xff        /*  __u8  ep_bInterval; 255 ms */
1117 };
1118
1119 static unsigned char root_hub_str_index0[] =
1120 {
1121         0x04,                   /*  __u8  bLength; */
1122         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1123         0x09,                   /*  __u8  lang ID */
1124         0x04,                   /*  __u8  lang ID */
1125 };
1126
1127 static unsigned char root_hub_str_index1[] =
1128 {
1129         28,                     /*  __u8  bLength; */
1130         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1131         'O',                    /*  __u8  Unicode */
1132         0,                              /*  __u8  Unicode */
1133         'H',                    /*  __u8  Unicode */
1134         0,                              /*  __u8  Unicode */
1135         'C',                    /*  __u8  Unicode */
1136         0,                              /*  __u8  Unicode */
1137         'I',                    /*  __u8  Unicode */
1138         0,                              /*  __u8  Unicode */
1139         ' ',                    /*  __u8  Unicode */
1140         0,                              /*  __u8  Unicode */
1141         'R',                    /*  __u8  Unicode */
1142         0,                              /*  __u8  Unicode */
1143         'o',                    /*  __u8  Unicode */
1144         0,                              /*  __u8  Unicode */
1145         'o',                    /*  __u8  Unicode */
1146         0,                              /*  __u8  Unicode */
1147         't',                    /*  __u8  Unicode */
1148         0,                              /*  __u8  Unicode */
1149         ' ',                    /*  __u8  Unicode */
1150         0,                              /*  __u8  Unicode */
1151         'H',                    /*  __u8  Unicode */
1152         0,                              /*  __u8  Unicode */
1153         'u',                    /*  __u8  Unicode */
1154         0,                              /*  __u8  Unicode */
1155         'b',                    /*  __u8  Unicode */
1156         0,                              /*  __u8  Unicode */
1157 };
1158
1159 /* Hub class-specific descriptor is constructed dynamically */
1160
1161 /*-------------------------------------------------------------------------*/
1162
1163 #define OK(x)                   len = (x); break
1164 #ifdef DEBUG
1165 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1166 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1167 #else
1168 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1169 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1170 #endif
1171 #define RD_RH_STAT              roothub_status(&gohci)
1172 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1173
1174 /* request to virtual root hub */
1175
1176 int rh_check_port_status(ohci_t *controller)
1177 {
1178         __u32 temp, ndp, i;
1179         int res;
1180
1181         res = -1;
1182         temp = roothub_a (controller);
1183         ndp = (temp & RH_A_NDP);
1184 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1185         ndp = (ndp == 2) ? 1:0;
1186 #endif
1187         for (i = 0; i < ndp; i++) {
1188                 temp = roothub_portstatus (controller, i);
1189                 /* check for a device disconnect */
1190                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1191                         (RH_PS_PESC | RH_PS_CSC)) &&
1192                         ((temp & RH_PS_CCS) == 0)) {
1193                         res = i;
1194                         break;
1195                 }
1196         }
1197         return res;
1198 }
1199
1200 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1201                 void *buffer, int transfer_len, struct devrequest *cmd)
1202 {
1203         void * data = buffer;
1204         int leni = transfer_len;
1205         int len = 0;
1206         int stat = 0;
1207         __u32 datab[4];
1208         __u8 *data_buf = (__u8 *)datab;
1209         __u16 bmRType_bReq;
1210         __u16 wValue;
1211         __u16 wIndex;
1212         __u16 wLength;
1213
1214 #ifdef DEBUG
1215 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1216 #else
1217         wait_ms(1);
1218 #endif
1219         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1220                 info("Root-Hub submit IRQ: NOT implemented");
1221                 return 0;
1222         }
1223
1224         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1225         wValue        = le16_to_cpu (cmd->value);
1226         wIndex        = le16_to_cpu (cmd->index);
1227         wLength       = le16_to_cpu (cmd->length);
1228
1229         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1230                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1231
1232         switch (bmRType_bReq) {
1233         /* Request Destination:
1234            without flags: Device,
1235            RH_INTERFACE: interface,
1236            RH_ENDPOINT: endpoint,
1237            RH_CLASS means HUB here,
1238            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1239         */
1240
1241         case RH_GET_STATUS:
1242                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1243         case RH_GET_STATUS | RH_INTERFACE:
1244                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1245         case RH_GET_STATUS | RH_ENDPOINT:
1246                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1247         case RH_GET_STATUS | RH_CLASS:
1248                         *(__u32 *) data_buf = cpu_to_le32 (
1249                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1250                         OK (4);
1251         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1252                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1253
1254         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1255                 switch (wValue) {
1256                         case (RH_ENDPOINT_STALL): OK (0);
1257                 }
1258                 break;
1259
1260         case RH_CLEAR_FEATURE | RH_CLASS:
1261                 switch (wValue) {
1262                         case RH_C_HUB_LOCAL_POWER:
1263                                 OK(0);
1264                         case (RH_C_HUB_OVER_CURRENT):
1265                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1266                 }
1267                 break;
1268
1269         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1270                 switch (wValue) {
1271                         case (RH_PORT_ENABLE):
1272                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1273                         case (RH_PORT_SUSPEND):
1274                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1275                         case (RH_PORT_POWER):
1276                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1277                         case (RH_C_PORT_CONNECTION):
1278                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1279                         case (RH_C_PORT_ENABLE):
1280                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1281                         case (RH_C_PORT_SUSPEND):
1282                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1283                         case (RH_C_PORT_OVER_CURRENT):
1284                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1285                         case (RH_C_PORT_RESET):
1286                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1287                 }
1288                 break;
1289
1290         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1291                 switch (wValue) {
1292                         case (RH_PORT_SUSPEND):
1293                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1294                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1295                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1296                                             WR_RH_PORTSTAT (RH_PS_PRS);
1297                                         OK (0);
1298                         case (RH_PORT_POWER):
1299                                         WR_RH_PORTSTAT (RH_PS_PPS );
1300                                         wait_ms(100);
1301                                         OK (0);
1302                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1303                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1304                                             WR_RH_PORTSTAT (RH_PS_PES );
1305                                         OK (0);
1306                 }
1307                 break;
1308
1309         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1310
1311         case RH_GET_DESCRIPTOR:
1312                 switch ((wValue & 0xff00) >> 8) {
1313                         case (0x01): /* device descriptor */
1314                                 len = min_t(unsigned int,
1315                                           leni,
1316                                           min_t(unsigned int,
1317                                               sizeof (root_hub_dev_des),
1318                                               wLength));
1319                                 data_buf = root_hub_dev_des; OK(len);
1320                         case (0x02): /* configuration descriptor */
1321                                 len = min_t(unsigned int,
1322                                           leni,
1323                                           min_t(unsigned int,
1324                                               sizeof (root_hub_config_des),
1325                                               wLength));
1326                                 data_buf = root_hub_config_des; OK(len);
1327                         case (0x03): /* string descriptors */
1328                                 if(wValue==0x0300) {
1329                                         len = min_t(unsigned int,
1330                                                   leni,
1331                                                   min_t(unsigned int,
1332                                                       sizeof (root_hub_str_index0),
1333                                                       wLength));
1334                                         data_buf = root_hub_str_index0;
1335                                         OK(len);
1336                                 }
1337                                 if(wValue==0x0301) {
1338                                         len = min_t(unsigned int,
1339                                                   leni,
1340                                                   min_t(unsigned int,
1341                                                       sizeof (root_hub_str_index1),
1342                                                       wLength));
1343                                         data_buf = root_hub_str_index1;
1344                                         OK(len);
1345                         }
1346                         default:
1347                                 stat = USB_ST_STALLED;
1348                 }
1349                 break;
1350
1351         case RH_GET_DESCRIPTOR | RH_CLASS:
1352         {
1353                 __u32 temp = roothub_a (&gohci);
1354
1355                 data_buf [0] = 9;               /* min length; */
1356                 data_buf [1] = 0x29;
1357                 data_buf [2] = temp & RH_A_NDP;
1358 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1359                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1360 #endif
1361                 data_buf [3] = 0;
1362                 if (temp & RH_A_PSM)    /* per-port power switching? */
1363                         data_buf [3] |= 0x1;
1364                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1365                         data_buf [3] |= 0x10;
1366                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1367                         data_buf [3] |= 0x8;
1368
1369                 /* corresponds to data_buf[4-7] */
1370                 datab [1] = 0;
1371                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1372                 temp = roothub_b (&gohci);
1373                 data_buf [7] = temp & RH_B_DR;
1374                 if (data_buf [2] < 7) {
1375                         data_buf [8] = 0xff;
1376                 } else {
1377                         data_buf [0] += 2;
1378                         data_buf [8] = (temp & RH_B_DR) >> 8;
1379                         data_buf [10] = data_buf [9] = 0xff;
1380                 }
1381
1382                 len = min_t(unsigned int, leni,
1383                             min_t(unsigned int, data_buf [0], wLength));
1384                 OK (len);
1385         }
1386
1387         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1388
1389         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1390
1391         default:
1392                 dbg ("unsupported root hub command");
1393                 stat = USB_ST_STALLED;
1394         }
1395
1396 #ifdef  DEBUG
1397         ohci_dump_roothub (&gohci, 1);
1398 #else
1399         wait_ms(1);
1400 #endif
1401
1402         len = min_t(int, len, leni);
1403         if (data != data_buf)
1404             memcpy (data, data_buf, len);
1405         dev->act_len = len;
1406         dev->status = stat;
1407
1408 #ifdef DEBUG
1409         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1410 #else
1411         wait_ms(1);
1412 #endif
1413
1414         return stat;
1415 }
1416
1417 /*-------------------------------------------------------------------------*/
1418
1419 /* common code for handling submit messages - used for all but root hub */
1420 /* accesses. */
1421 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1422                 int transfer_len, struct devrequest *setup, int interval)
1423 {
1424         int stat = 0;
1425         int maxsize = usb_maxpacket(dev, pipe);
1426         int timeout;
1427         urb_priv_t *urb;
1428
1429         urb = malloc(sizeof(urb_priv_t));
1430         memset(urb, 0, sizeof(urb_priv_t));
1431
1432         urb->dev = dev;
1433         urb->pipe = pipe;
1434         urb->transfer_buffer = buffer;
1435         urb->transfer_buffer_length = transfer_len;
1436         urb->interval = interval;
1437
1438         /* device pulled? Shortcut the action. */
1439         if (devgone == dev) {
1440                 dev->status = USB_ST_CRC_ERR;
1441                 return 0;
1442         }
1443
1444 #ifdef DEBUG
1445         urb->actual_length = 0;
1446         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1447 #else
1448         wait_ms(1);
1449 #endif
1450         if (!maxsize) {
1451                 err("submit_common_message: pipesize for pipe %lx is zero",
1452                         pipe);
1453                 return -1;
1454         }
1455
1456         if (sohci_submit_job(urb, setup) < 0) {
1457                 err("sohci_submit_job failed");
1458                 return -1;
1459         }
1460
1461 #if 0
1462         wait_ms(10);
1463         /* ohci_dump_status(&gohci); */
1464 #endif
1465
1466         /* allow more time for a BULK device to react - some are slow */
1467 #define BULK_TO  5000   /* timeout in milliseconds */
1468         if (usb_pipetype (pipe) == PIPE_BULK)
1469                 timeout = BULK_TO;
1470         else
1471                 timeout = 100;
1472
1473         /* wait for it to complete */
1474         for (;;) {
1475                 /* check whether the controller is done */
1476                 stat = hc_interrupt();
1477                 if (stat < 0) {
1478                         stat = USB_ST_CRC_ERR;
1479                         break;
1480                 }
1481
1482                 /* NOTE: since we are not interrupt driven in U-Boot and always
1483                  * handle only one URB at a time, we cannot assume the
1484                  * transaction finished on the first successful return from
1485                  * hc_interrupt().. unless the flag for current URB is set,
1486                  * meaning that all TD's to/from device got actually
1487                  * transferred and processed. If the current URB is not
1488                  * finished we need to re-iterate this loop so as
1489                  * hc_interrupt() gets called again as there needs to be some
1490                  * more TD's to process still */
1491                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1492                         /* 0xff is returned for an SF-interrupt */
1493                         break;
1494                 }
1495
1496                 if (--timeout) {
1497                         wait_ms(1);
1498                         if (!urb->finished)
1499                                 dbg("\%");
1500
1501                 } else {
1502                         err("CTL:TIMEOUT ");
1503                         dbg("submit_common_msg: TO status %x\n", stat);
1504                         urb->finished = 1;
1505                         stat = USB_ST_CRC_ERR;
1506                         break;
1507                 }
1508         }
1509
1510         dev->status = stat;
1511         dev->act_len = transfer_len;
1512
1513 #ifdef DEBUG
1514         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1515 #else
1516         wait_ms(1);
1517 #endif
1518
1519         /* free TDs in urb_priv */
1520         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1521                 urb_free_priv (urb);
1522         return 0;
1523 }
1524
1525 /* submit routines called from usb.c */
1526 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1527                 int transfer_len)
1528 {
1529         info("submit_bulk_msg");
1530         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1531 }
1532
1533 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1534                 int transfer_len, struct devrequest *setup)
1535 {
1536         int maxsize = usb_maxpacket(dev, pipe);
1537
1538         info("submit_control_msg");
1539 #ifdef DEBUG
1540         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1541 #else
1542         wait_ms(1);
1543 #endif
1544         if (!maxsize) {
1545                 err("submit_control_message: pipesize for pipe %lx is zero",
1546                         pipe);
1547                 return -1;
1548         }
1549         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1550                 gohci.rh.dev = dev;
1551                 /* root hub - redirect */
1552                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1553                         setup);
1554         }
1555
1556         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1557 }
1558
1559 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1560                 int transfer_len, int interval)
1561 {
1562         info("submit_int_msg");
1563         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1564                         interval);
1565 }
1566
1567 /*-------------------------------------------------------------------------*
1568  * HC functions
1569  *-------------------------------------------------------------------------*/
1570
1571 /* reset the HC and BUS */
1572
1573 static int hc_reset (ohci_t *ohci)
1574 {
1575         int timeout = 30;
1576         int smm_timeout = 50; /* 0,5 sec */
1577
1578         dbg("%s\n", __FUNCTION__);
1579
1580         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1581                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1582                 info("USB HC TakeOver from SMM");
1583                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1584                         wait_ms (10);
1585                         if (--smm_timeout == 0) {
1586                                 err("USB HC TakeOver failed!");
1587                                 return -1;
1588                         }
1589                 }
1590         }
1591
1592         /* Disable HC interrupts */
1593         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1594
1595         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1596                 ohci->slot_name,
1597                 readl(&ohci->regs->control));
1598
1599         /* Reset USB (needed by some controllers) */
1600         ohci->hc_control = 0;
1601         writel (ohci->hc_control, &ohci->regs->control);
1602
1603         /* HC Reset requires max 10 us delay */
1604         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1605         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1606                 if (--timeout == 0) {
1607                         err("USB HC reset timed out!");
1608                         return -1;
1609                 }
1610                 udelay (1);
1611         }
1612         return 0;
1613 }
1614
1615 /*-------------------------------------------------------------------------*/
1616
1617 /* Start an OHCI controller, set the BUS operational
1618  * enable interrupts
1619  * connect the virtual root hub */
1620
1621 static int hc_start (ohci_t * ohci)
1622 {
1623         __u32 mask;
1624         unsigned int fminterval;
1625
1626         ohci->disabled = 1;
1627
1628         /* Tell the controller where the control and bulk lists are
1629          * The lists are empty now. */
1630
1631         writel (0, &ohci->regs->ed_controlhead);
1632         writel (0, &ohci->regs->ed_bulkhead);
1633
1634         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1635
1636         fminterval = 0x2edf;
1637         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1638         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1639         writel (fminterval, &ohci->regs->fminterval);
1640         writel (0x628, &ohci->regs->lsthresh);
1641
1642         /* start controller operations */
1643         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1644         ohci->disabled = 0;
1645         writel (ohci->hc_control, &ohci->regs->control);
1646
1647         /* disable all interrupts */
1648         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1649                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1650                         OHCI_INTR_OC | OHCI_INTR_MIE);
1651         writel (mask, &ohci->regs->intrdisable);
1652         /* clear all interrupts */
1653         mask &= ~OHCI_INTR_MIE;
1654         writel (mask, &ohci->regs->intrstatus);
1655         /* Choose the interrupts we care about now  - but w/o MIE */
1656         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1657         writel (mask, &ohci->regs->intrenable);
1658
1659 #ifdef  OHCI_USE_NPS
1660         /* required for AMD-756 and some Mac platforms */
1661         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1662                 &ohci->regs->roothub.a);
1663         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1664 #endif  /* OHCI_USE_NPS */
1665
1666 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1667         /* POTPGT delay is bits 24-31, in 2 ms units. */
1668         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1669
1670         /* connect the virtual root hub */
1671         ohci->rh.devnum = 0;
1672
1673         return 0;
1674 }
1675
1676 /*-------------------------------------------------------------------------*/
1677
1678 /* Poll USB interrupt. */
1679 void usb_event_poll(void)
1680 {
1681         hc_interrupt();
1682 }
1683
1684 /* an interrupt happens */
1685
1686 static int hc_interrupt (void)
1687 {
1688         ohci_t *ohci = &gohci;
1689         struct ohci_regs *regs = ohci->regs;
1690         int ints;
1691         int stat = -1;
1692
1693         if ((ohci->hcca->done_head != 0) &&
1694             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1695                 ints =  OHCI_INTR_WDH;
1696         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1697                 ohci->disabled++;
1698                 err ("%s device removed!", ohci->slot_name);
1699                 return -1;
1700         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1701                 dbg("hc_interrupt: returning..\n");
1702                 return 0xff;
1703         }
1704
1705         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1706
1707         if (ints & OHCI_INTR_RHSC) {
1708                 got_rhsc = 1;
1709                 stat = 0xff;
1710         }
1711
1712         if (ints & OHCI_INTR_UE) {
1713                 ohci->disabled++;
1714                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1715                         ohci->slot_name);
1716                 /* e.g. due to PCI Master/Target Abort */
1717
1718 #ifdef  DEBUG
1719                 ohci_dump (ohci, 1);
1720 #else
1721         wait_ms(1);
1722 #endif
1723                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1724                 /* Make some non-interrupt context restart the controller. */
1725                 /* Count and limit the retries though; either hardware or */
1726                 /* software errors can go forever... */
1727                 hc_reset (ohci);
1728                 return -1;
1729         }
1730
1731         if (ints & OHCI_INTR_WDH) {
1732                 wait_ms(1);
1733                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1734                 (void)readl (&regs->intrdisable); /* flush */
1735                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1736                 writel (OHCI_INTR_WDH, &regs->intrenable);
1737                 (void)readl (&regs->intrdisable); /* flush */
1738         }
1739
1740         if (ints & OHCI_INTR_SO) {
1741                 dbg("USB Schedule overrun\n");
1742                 writel (OHCI_INTR_SO, &regs->intrenable);
1743                 stat = -1;
1744         }
1745
1746         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1747         if (ints & OHCI_INTR_SF) {
1748                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1749                 wait_ms(1);
1750                 writel (OHCI_INTR_SF, &regs->intrdisable);
1751                 if (ohci->ed_rm_list[frame] != NULL)
1752                         writel (OHCI_INTR_SF, &regs->intrenable);
1753                 stat = 0xff;
1754         }
1755
1756         writel (ints, &regs->intrstatus);
1757         return stat;
1758 }
1759
1760 /*-------------------------------------------------------------------------*/
1761
1762 /*-------------------------------------------------------------------------*/
1763
1764 /* De-allocate all resources.. */
1765
1766 static void hc_release_ohci (ohci_t *ohci)
1767 {
1768         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1769
1770         if (!ohci->disabled)
1771                 hc_reset (ohci);
1772 }
1773
1774 /*-------------------------------------------------------------------------*/
1775
1776 /*
1777  * low level initalisation routine, called from usb.c
1778  */
1779 static char ohci_inited = 0;
1780
1781 int usb_lowlevel_init(void)
1782 {
1783 #ifdef CONFIG_PCI_OHCI
1784         pci_dev_t pdev;
1785 #endif
1786
1787 #ifdef CFG_USB_OHCI_CPU_INIT
1788         /* cpu dependant init */
1789         if(usb_cpu_init())
1790                 return -1;
1791 #endif
1792
1793 #ifdef CFG_USB_OHCI_BOARD_INIT
1794         /*  board dependant init */
1795         if(usb_board_init())
1796                 return -1;
1797 #endif
1798         memset (&gohci, 0, sizeof (ohci_t));
1799
1800         /* align the storage */
1801         if ((__u32)&ghcca[0] & 0xff) {
1802                 err("HCCA not aligned!!");
1803                 return -1;
1804         }
1805         phcca = &ghcca[0];
1806         info("aligned ghcca %p", phcca);
1807         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1808         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1809                 err("EDs not aligned!!");
1810                 return -1;
1811         }
1812         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1813         if ((__u32)gtd & 0x7) {
1814                 err("TDs not aligned!!");
1815                 return -1;
1816         }
1817         ptd = gtd;
1818         gohci.hcca = phcca;
1819         memset (phcca, 0, sizeof (struct ohci_hcca));
1820
1821         gohci.disabled = 1;
1822         gohci.sleeping = 0;
1823         gohci.irq = -1;
1824 #ifdef CONFIG_PCI_OHCI
1825         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1826
1827         if (pdev != -1) {
1828                 u16 vid, did;
1829                 u32 base;
1830                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1831                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1832                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1833                                 vid, did, (pdev >> 16) & 0xff,
1834                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1835                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1836                 printf("OHCI regs address 0x%08x\n", base);
1837                 gohci.regs = (struct ohci_regs *)base;
1838         } else
1839                 return -1;
1840 #else
1841         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1842 #endif
1843
1844         gohci.flags = 0;
1845         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1846
1847         if (hc_reset (&gohci) < 0) {
1848                 hc_release_ohci (&gohci);
1849                 err ("can't reset usb-%s", gohci.slot_name);
1850 #ifdef CFG_USB_OHCI_BOARD_INIT
1851                 /* board dependant cleanup */
1852                 usb_board_init_fail();
1853 #endif
1854
1855 #ifdef CFG_USB_OHCI_CPU_INIT
1856                 /* cpu dependant cleanup */
1857                 usb_cpu_init_fail();
1858 #endif
1859                 return -1;
1860         }
1861
1862         /* FIXME this is a second HC reset; why?? */
1863         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1864            wait_ms(10); */
1865         if (hc_start (&gohci) < 0) {
1866                 err ("can't start usb-%s", gohci.slot_name);
1867                 hc_release_ohci (&gohci);
1868                 /* Initialization failed */
1869 #ifdef CFG_USB_OHCI_BOARD_INIT
1870                 /* board dependant cleanup */
1871                 usb_board_stop();
1872 #endif
1873
1874 #ifdef CFG_USB_OHCI_CPU_INIT
1875                 /* cpu dependant cleanup */
1876                 usb_cpu_stop();
1877 #endif
1878                 return -1;
1879         }
1880
1881 #ifdef  DEBUG
1882         ohci_dump (&gohci, 1);
1883 #else
1884         wait_ms(1);
1885 #endif
1886         ohci_inited = 1;
1887         return 0;
1888 }
1889
1890 int usb_lowlevel_stop(void)
1891 {
1892         /* this gets called really early - before the controller has */
1893         /* even been initialized! */
1894         if (!ohci_inited)
1895                 return 0;
1896         /* TODO release any interrupts, etc. */
1897         /* call hc_release_ohci() here ? */
1898         hc_reset (&gohci);
1899
1900 #ifdef CFG_USB_OHCI_BOARD_INIT
1901         /* board dependant cleanup */
1902         if(usb_board_stop())
1903                 return -1;
1904 #endif
1905
1906 #ifdef CFG_USB_OHCI_CPU_INIT
1907         /* cpu dependant cleanup */
1908         if(usb_cpu_stop())
1909                 return -1;
1910 #endif
1911
1912         return 0;
1913 }
1914 #endif /* CONFIG_USB_OHCI_NEW */