drivers/usb/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #if !defined(CONFIG_PCI_OHCI_DEVNO)
  57 #define CONFIG_PCI_OHCI_DEVNO   0
  58 #endif
  59 #endif
  60
  61 #include <malloc.h>
  62 #include <usb.h>
  63 #include "usb_ohci.h"
  64
  65 #ifdef CONFIG_AT91RM9200
  66 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  67 #endif
  68
  69 #if defined(CONFIG_ARM920T) || \
  70     defined(CONFIG_S3C2400) || \
  71     defined(CONFIG_S3C2410) || \
  72     defined(CONFIG_S3C6400) || \
  73     defined(CONFIG_440EP) || \
  74     defined(CONFIG_PCI_OHCI) || \
  75     defined(CONFIG_MPC5200) || \
  76     defined(CFG_OHCI_USE_NPS)
  77 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  78 #endif
  79
  80 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  81 #undef DEBUG
  82 #undef SHOW_INFO
  83 #undef OHCI_FILL_TRACE
  84
  85 /* For initializing controller (mask in an HCFS mode too) */
  86 #define OHCI_CONTROL_INIT \
  87         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  88
  89 /*
  90  * e.g. PCI controllers need this
  91  */
  92 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  93 # define readl(a) __swap_32(*((volatile u32 *)(a)))
  94 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
  95 #else
  96 # define readl(a) (*((volatile u32 *)(a)))
  97 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  98 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  99
 100 #define min_t(type, x, y) \
 101                     ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
 102
 103 #ifdef CONFIG_PCI_OHCI
 104 static struct pci_device_id ohci_pci_ids[] = {
 105         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
 106         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
 107         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
 108         /* Please add supported PCI OHCI controller ids here */
 109         {0, 0}
 110 };
 111 #endif
 112
 113 #ifdef CONFIG_PCI_EHCI_DEVNO
 114 static struct pci_device_id ehci_pci_ids[] = {
 115         {0x1131, 0x1562},       /* Philips 1562 PCI EHCI module ids */
 116         /* Please add supported PCI EHCI controller ids here */
 117         {0, 0}
 118 };
 119 #endif
 120
 121 #ifdef DEBUG
 122 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 123 #else
 124 #define dbg(format, arg...) do {} while (0)
 125 #endif /* DEBUG */
 126 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 127 #ifdef SHOW_INFO
 128 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 129 #else
 130 #define info(format, arg...) do {} while (0)
 131 #endif
 132
 133 #ifdef CFG_OHCI_BE_CONTROLLER
 134 # define m16_swap(x) cpu_to_be16(x)
 135 # define m32_swap(x) cpu_to_be32(x)
 136 #else
 137 # define m16_swap(x) cpu_to_le16(x)
 138 # define m32_swap(x) cpu_to_le32(x)
 139 #endif /* CFG_OHCI_BE_CONTROLLER */
 140
 141 /* global ohci_t */
 142 static ohci_t gohci;
 143 /* this must be aligned to a 256 byte boundary */
 144 struct ohci_hcca ghcca[1];
 145 /* a pointer to the aligned storage */
 146 struct ohci_hcca *phcca;
 147 /* this allocates EDs for all possible endpoints */
 148 struct ohci_device ohci_dev;
 149 /* device which was disconnected */
 150 struct usb_device *devgone;
 151
 152 static inline u32 roothub_a(struct ohci *hc)
 153         { return readl(&hc->regs->roothub.a); }
 154 static inline u32 roothub_b(struct ohci *hc)
 155         { return readl(&hc->regs->roothub.b); }
 156 static inline u32 roothub_status(struct ohci *hc)
 157         { return readl(&hc->regs->roothub.status); }
 158 static inline u32 roothub_portstatus(struct ohci *hc, int i)
 159         { return readl(&hc->regs->roothub.portstatus[i]); }
 160
 161 /* forward declaration */
 162 static int hc_interrupt(void);
 163 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
 164                           void *buffer, int transfer_len,
 165                           struct devrequest *setup, urb_priv_t *urb,
 166                           int interval);
 167
 168 /*-------------------------------------------------------------------------*
 169  * URB support functions
 170  *-------------------------------------------------------------------------*/
 171
 172 /* free HCD-private data associated with this URB */
 173
 174 static void urb_free_priv(urb_priv_t *urb)
 175 {
 176         int             i;
 177         int             last;
 178         struct td       *td;
 179
 180         last = urb->length - 1;
 181         if (last >= 0) {
 182                 for (i = 0; i <= last; i++) {
 183                         td = urb->td[i];
 184                         if (td) {
 185                                 td->usb_dev = NULL;
 186                                 urb->td[i] = NULL;
 187                         }
 188                 }
 189         }
 190         free(urb);
 191 }
 192
 193 /*-------------------------------------------------------------------------*/
 194
 195 #ifdef DEBUG
 196 static int sohci_get_current_frame_number(struct usb_device *dev);
 197
 198 /* debug| print the main components of an URB
 199  * small: 0) header + data packets 1) just header */
 200
 201 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
 202                       unsigned long pipe, void *buffer, int transfer_len,
 203                       struct devrequest *setup, char *str, int small)
 204 {
 205         dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
 206                         str,
 207                         sohci_get_current_frame_number(dev),
 208                         usb_pipedevice(pipe),
 209                         usb_pipeendpoint(pipe),
 210                         usb_pipeout(pipe)? 'O': 'I',
 211                         usb_pipetype(pipe) < 2 ? \
 212                                 (usb_pipeint(pipe)? "INTR": "ISOC"): \
 213                                 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
 214                         (purb ? purb->actual_length : 0),
 215                         transfer_len, dev->status);
 216 #ifdef  OHCI_VERBOSE_DEBUG
 217         if (!small) {
 218                 int i, len;
 219
 220                 if (usb_pipecontrol(pipe)) {
 221                         printf(__FILE__ ": cmd(8):");
 222                         for (i = 0; i < 8 ; i++)
 223                                 printf(" %02x", ((__u8 *) setup) [i]);
 224                         printf("\n");
 225                 }
 226                 if (transfer_len > 0 && buffer) {
 227                         printf(__FILE__ ": data(%d/%d):",
 228                                 (purb ? purb->actual_length : 0),
 229                                 transfer_len);
 230                         len = usb_pipeout(pipe)? transfer_len:
 231                                         (purb ? purb->actual_length : 0);
 232                         for (i = 0; i < 16 && i < len; i++)
 233                                 printf(" %02x", ((__u8 *) buffer) [i]);
 234                         printf("%s\n", i < len? "...": "");
 235                 }
 236         }
 237 #endif
 238 }
 239
 240 /* just for debugging; prints non-empty branches of the int ed tree
 241  * inclusive iso eds */
 242 void ep_print_int_eds(ohci_t *ohci, char *str)
 243 {
 244         int i, j;
 245          __u32 *ed_p;
 246         for (i = 0; i < 32; i++) {
 247                 j = 5;
 248                 ed_p = &(ohci->hcca->int_table [i]);
 249                 if (*ed_p == 0)
 250                     continue;
 251                 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 252                 while (*ed_p != 0 && j--) {
 253                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 254                         printf(" ed: %4x;", ed->hwINFO);
 255                         ed_p = &ed->hwNextED;
 256                 }
 257                 printf("\n");
 258         }
 259 }
 260
 261 static void ohci_dump_intr_mask(char *label, __u32 mask)
 262 {
 263         dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 264                 label,
 265                 mask,
 266                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 267                 (mask & OHCI_INTR_OC) ? " OC" : "",
 268                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 269                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 270                 (mask & OHCI_INTR_UE) ? " UE" : "",
 271                 (mask & OHCI_INTR_RD) ? " RD" : "",
 272                 (mask & OHCI_INTR_SF) ? " SF" : "",
 273                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 274                 (mask & OHCI_INTR_SO) ? " SO" : ""
 275                 );
 276 }
 277
 278 static void maybe_print_eds(char *label, __u32 value)
 279 {
 280         ed_t *edp = (ed_t *)value;
 281
 282         if (value) {
 283                 dbg("%s %08x", label, value);
 284                 dbg("%08x", edp->hwINFO);
 285                 dbg("%08x", edp->hwTailP);
 286                 dbg("%08x", edp->hwHeadP);
 287                 dbg("%08x", edp->hwNextED);
 288         }
 289 }
 290
 291 static char *hcfs2string(int state)
 292 {
 293         switch (state) {
 294         case OHCI_USB_RESET:    return "reset";
 295         case OHCI_USB_RESUME:   return "resume";
 296         case OHCI_USB_OPER:     return "operational";
 297         case OHCI_USB_SUSPEND:  return "suspend";
 298         }
 299         return "?";
 300 }
 301
 302 /* dump control and status registers */
 303 static void ohci_dump_status(ohci_t *controller)
 304 {
 305         struct ohci_regs        *regs = controller->regs;
 306         __u32                   temp;
 307
 308         temp = readl(&regs->revision) & 0xff;
 309         if (temp != 0x10)
 310                 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
 311
 312         temp = readl(&regs->control);
 313         dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 314                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 315                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 316                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 317                 hcfs2string(temp & OHCI_CTRL_HCFS),
 318                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 319                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 320                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 321                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 322                 temp & OHCI_CTRL_CBSR
 323                 );
 324
 325         temp = readl(&regs->cmdstatus);
 326         dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 327                 (temp & OHCI_SOC) >> 16,
 328                 (temp & OHCI_OCR) ? " OCR" : "",
 329                 (temp & OHCI_BLF) ? " BLF" : "",
 330                 (temp & OHCI_CLF) ? " CLF" : "",
 331                 (temp & OHCI_HCR) ? " HCR" : ""
 332                 );
 333
 334         ohci_dump_intr_mask("intrstatus", readl(&regs->intrstatus));
 335         ohci_dump_intr_mask("intrenable", readl(&regs->intrenable));
 336
 337         maybe_print_eds("ed_periodcurrent", readl(&regs->ed_periodcurrent));
 338
 339         maybe_print_eds("ed_controlhead", readl(&regs->ed_controlhead));
 340         maybe_print_eds("ed_controlcurrent", readl(&regs->ed_controlcurrent));
 341
 342         maybe_print_eds("ed_bulkhead", readl(&regs->ed_bulkhead));
 343         maybe_print_eds("ed_bulkcurrent", readl(&regs->ed_bulkcurrent));
 344
 345         maybe_print_eds("donehead", readl(&regs->donehead));
 346 }
 347
 348 static void ohci_dump_roothub(ohci_t *controller, int verbose)
 349 {
 350         __u32                   temp, ndp, i;
 351
 352         temp = roothub_a(controller);
 353         ndp = (temp & RH_A_NDP);
 354 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 355         ndp = (ndp == 2) ? 1:0;
 356 #endif
 357         if (verbose) {
 358                 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 359                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 360                         (temp & RH_A_NOCP) ? " NOCP" : "",
 361                         (temp & RH_A_OCPM) ? " OCPM" : "",
 362                         (temp & RH_A_DT) ? " DT" : "",
 363                         (temp & RH_A_NPS) ? " NPS" : "",
 364                         (temp & RH_A_PSM) ? " PSM" : "",
 365                         ndp
 366                         );
 367                 temp = roothub_b(controller);
 368                 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
 369                         temp,
 370                         (temp & RH_B_PPCM) >> 16,
 371                         (temp & RH_B_DR)
 372                         );
 373                 temp = roothub_status(controller);
 374                 dbg("roothub.status: %08x%s%s%s%s%s%s",
 375                         temp,
 376                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 377                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 378                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 379                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 380                         (temp & RH_HS_OCI) ? " OCI" : "",
 381                         (temp & RH_HS_LPS) ? " LPS" : ""
 382                         );
 383         }
 384
 385         for (i = 0; i < ndp; i++) {
 386                 temp = roothub_portstatus(controller, i);
 387                 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 388                         i,
 389                         temp,
 390                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 391                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 392                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 393                         (temp & RH_PS_PESC) ? " PESC" : "",
 394                         (temp & RH_PS_CSC) ? " CSC" : "",
 395
 396                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 397                         (temp & RH_PS_PPS) ? " PPS" : "",
 398                         (temp & RH_PS_PRS) ? " PRS" : "",
 399                         (temp & RH_PS_POCI) ? " POCI" : "",
 400                         (temp & RH_PS_PSS) ? " PSS" : "",
 401
 402                         (temp & RH_PS_PES) ? " PES" : "",
 403                         (temp & RH_PS_CCS) ? " CCS" : ""
 404                         );
 405         }
 406 }
 407
 408 static void ohci_dump(ohci_t *controller, int verbose)
 409 {
 410         dbg("OHCI controller usb-%s state", controller->slot_name);
 411
 412         /* dumps some of the state we know about */
 413         ohci_dump_status(controller);
 414         if (verbose)
 415                 ep_print_int_eds(controller, "hcca");
 416         dbg("hcca frame #%04x", controller->hcca->frame_no);
 417         ohci_dump_roothub(controller, 1);
 418 }
 419 #endif /* DEBUG */
 420
 421 /*-------------------------------------------------------------------------*
 422  * Interface functions (URB)
 423  *-------------------------------------------------------------------------*/
 424
 425 /* get a transfer request */
 426
 427 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 428 {
 429         ohci_t *ohci;
 430         ed_t *ed;
 431         urb_priv_t *purb_priv = urb;
 432         int i, size = 0;
 433         struct usb_device *dev = urb->dev;
 434         unsigned long pipe = urb->pipe;
 435         void *buffer = urb->transfer_buffer;
 436         int transfer_len = urb->transfer_buffer_length;
 437         int interval = urb->interval;
 438
 439         ohci = &gohci;
 440
 441         /* when controller's hung, permit only roothub cleanup attempts
 442          * such as powering down ports */
 443         if (ohci->disabled) {
 444                 err("sohci_submit_job: EPIPE");
 445                 return -1;
 446         }
 447
 448         /* we're about to begin a new transaction here so mark the
 449          * URB unfinished */
 450         urb->finished = 0;
 451
 452         /* every endpoint has a ed, locate and fill it */
 453         ed = ep_add_ed(dev, pipe, interval, 1);
 454         if (!ed) {
 455                 err("sohci_submit_job: ENOMEM");
 456                 return -1;
 457         }
 458
 459         /* for the private part of the URB we need the number of TDs (size) */
 460         switch (usb_pipetype(pipe)) {
 461         case PIPE_BULK: /* one TD for every 4096 Byte */
 462                 size = (transfer_len - 1) / 4096 + 1;
 463                 break;
 464         case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 465                 size = (transfer_len == 0)? 2:
 466                                         (transfer_len - 1) / 4096 + 3;
 467                 break;
 468         case PIPE_INTERRUPT: /* 1 TD */
 469                 size = 1;
 470                 break;
 471         }
 472
 473         ed->purb = urb;
 474
 475         if (size >= (N_URB_TD - 1)) {
 476                 err("need %d TDs, only have %d", size, N_URB_TD);
 477                 return -1;
 478         }
 479         purb_priv->pipe = pipe;
 480
 481         /* fill the private part of the URB */
 482         purb_priv->length = size;
 483         purb_priv->ed = ed;
 484         purb_priv->actual_length = 0;
 485
 486         /* allocate the TDs */
 487         /* note that td[0] was allocated in ep_add_ed */
 488         for (i = 0; i < size; i++) {
 489                 purb_priv->td[i] = td_alloc(dev);
 490                 if (!purb_priv->td[i]) {
 491                         purb_priv->length = i;
 492                         urb_free_priv(purb_priv);
 493                         err("sohci_submit_job: ENOMEM");
 494                         return -1;
 495                 }
 496         }
 497
 498         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 499                 urb_free_priv(purb_priv);
 500                 err("sohci_submit_job: EINVAL");
 501                 return -1;
 502         }
 503
 504         /* link the ed into a chain if is not already */
 505         if (ed->state != ED_OPER)
 506                 ep_link(ohci, ed);
 507
 508         /* fill the TDs and link it to the ed */
 509         td_submit_job(dev, pipe, buffer, transfer_len,
 510                       setup, purb_priv, interval);
 511
 512         return 0;
 513 }
 514
 515 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 516 {
 517         struct ohci_regs *regs = hc->regs;
 518
 519         switch (usb_pipetype(urb->pipe)) {
 520         case PIPE_INTERRUPT:
 521                 /* implicitly requeued */
 522                 if (urb->dev->irq_handle &&
 523                                 (urb->dev->irq_act_len = urb->actual_length)) {
 524                         writel(OHCI_INTR_WDH, &regs->intrenable);
 525                         readl(&regs->intrenable); /* PCI posting flush */
 526                         urb->dev->irq_handle(urb->dev);
 527                         writel(OHCI_INTR_WDH, &regs->intrdisable);
 528                         readl(&regs->intrdisable); /* PCI posting flush */
 529                 }
 530                 urb->actual_length = 0;
 531                 td_submit_job(
 532                                 urb->dev,
 533                                 urb->pipe,
 534                                 urb->transfer_buffer,
 535                                 urb->transfer_buffer_length,
 536                                 NULL,
 537                                 urb,
 538                                 urb->interval);
 539                 break;
 540         case PIPE_CONTROL:
 541         case PIPE_BULK:
 542                 break;
 543         default:
 544                 return 0;
 545         }
 546         return 1;
 547 }
 548
 549 /*-------------------------------------------------------------------------*/
 550
 551 #ifdef DEBUG
 552 /* tell us the current USB frame number */
 553
 554 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
 555 {
 556         ohci_t *ohci = &gohci;
 557
 558         return m16_swap(ohci->hcca->frame_no);
 559 }
 560 #endif
 561
 562 /*-------------------------------------------------------------------------*
 563  * ED handling functions
 564  *-------------------------------------------------------------------------*/
 565
 566 /* search for the right branch to insert an interrupt ed into the int tree
 567  * do some load ballancing;
 568  * returns the branch and
 569  * sets the interval to interval = 2^integer (ld (interval)) */
 570
 571 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
 572 {
 573         int i, branch = 0;
 574
 575         /* search for the least loaded interrupt endpoint
 576          * branch of all 32 branches
 577          */
 578         for (i = 0; i < 32; i++)
 579                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 580                         branch = i;
 581
 582         branch = branch % interval;
 583         for (i = branch; i < 32; i += interval)
 584                 ohci->ohci_int_load [i] += load;
 585
 586         return branch;
 587 }
 588
 589 /*-------------------------------------------------------------------------*/
 590
 591 /*  2^int( ld (inter)) */
 592
 593 static int ep_2_n_interval(int inter)
 594 {
 595         int i;
 596         for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
 597         return 1 << i;
 598 }
 599
 600 /*-------------------------------------------------------------------------*/
 601
 602 /* the int tree is a binary tree
 603  * in order to process it sequentially the indexes of the branches have to
 604  * be mapped the mapping reverses the bits of a word of num_bits length */
 605 static int ep_rev(int num_bits, int word)
 606 {
 607         int i, wout = 0;
 608
 609         for (i = 0; i < num_bits; i++)
 610                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 611         return wout;
 612 }
 613
 614 /*-------------------------------------------------------------------------*
 615  * ED handling functions
 616  *-------------------------------------------------------------------------*/
 617
 618 /* link an ed into one of the HC chains */
 619
 620 static int ep_link(ohci_t *ohci, ed_t *edi)
 621 {
 622         volatile ed_t *ed = edi;
 623         int int_branch;
 624         int i;
 625         int inter;
 626         int interval;
 627         int load;
 628         __u32 *ed_p;
 629
 630         ed->state = ED_OPER;
 631         ed->int_interval = 0;
 632
 633         switch (ed->type) {
 634         case PIPE_CONTROL:
 635                 ed->hwNextED = 0;
 636                 if (ohci->ed_controltail == NULL)
 637                         writel(ed, &ohci->regs->ed_controlhead);
 638                 else
 639                         ohci->ed_controltail->hwNextED =
 640                                                    m32_swap((unsigned long)ed);
 641
 642                 ed->ed_prev = ohci->ed_controltail;
 643                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 644                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 645                         ohci->hc_control |= OHCI_CTRL_CLE;
 646                         writel(ohci->hc_control, &ohci->regs->control);
 647                 }
 648                 ohci->ed_controltail = edi;
 649                 break;
 650
 651         case PIPE_BULK:
 652                 ed->hwNextED = 0;
 653                 if (ohci->ed_bulktail == NULL)
 654                         writel(ed, &ohci->regs->ed_bulkhead);
 655                 else
 656                         ohci->ed_bulktail->hwNextED =
 657                                                    m32_swap((unsigned long)ed);
 658
 659                 ed->ed_prev = ohci->ed_bulktail;
 660                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 661                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 662                         ohci->hc_control |= OHCI_CTRL_BLE;
 663                         writel(ohci->hc_control, &ohci->regs->control);
 664                 }
 665                 ohci->ed_bulktail = edi;
 666                 break;
 667
 668         case PIPE_INTERRUPT:
 669                 load = ed->int_load;
 670                 interval = ep_2_n_interval(ed->int_period);
 671                 ed->int_interval = interval;
 672                 int_branch = ep_int_ballance(ohci, interval, load);
 673                 ed->int_branch = int_branch;
 674
 675                 for (i = 0; i < ep_rev(6, interval); i += inter) {
 676                         inter = 1;
 677                         for (ed_p = &(ohci->hcca->int_table[\
 678                                                 ep_rev(5, i) + int_branch]);
 679                                 (*ed_p != 0) &&
 680                                 (((ed_t *)ed_p)->int_interval >= interval);
 681                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 682                                         inter = ep_rev(6,
 683                                                  ((ed_t *)ed_p)->int_interval);
 684                         ed->hwNextED = *ed_p;
 685                         *ed_p = m32_swap((unsigned long)ed);
 686                 }
 687                 break;
 688         }
 689         return 0;
 690 }
 691
 692 /*-------------------------------------------------------------------------*/
 693
 694 /* scan the periodic table to find and unlink this ED */
 695 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
 696                             unsigned index, unsigned period)
 697 {
 698         for (; index < NUM_INTS; index += period) {
 699                 __u32   *ed_p = &ohci->hcca->int_table [index];
 700
 701                 /* ED might have been unlinked through another path */
 702                 while (*ed_p != 0) {
 703                         if (((struct ed *)
 704                                         m32_swap((unsigned long)ed_p)) == ed) {
 705                                 *ed_p = ed->hwNextED;
 706                                 break;
 707                         }
 708                         ed_p = &(((struct ed *)
 709                                      m32_swap((unsigned long)ed_p))->hwNextED);
 710                 }
 711         }
 712 }
 713
 714 /* unlink an ed from one of the HC chains.
 715  * just the link to the ed is unlinked.
 716  * the link from the ed still points to another operational ed or 0
 717  * so the HC can eventually finish the processing of the unlinked ed */
 718
 719 static int ep_unlink(ohci_t *ohci, ed_t *edi)
 720 {
 721         volatile ed_t *ed = edi;
 722         int i;
 723
 724         ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
 725
 726         switch (ed->type) {
 727         case PIPE_CONTROL:
 728                 if (ed->ed_prev == NULL) {
 729                         if (!ed->hwNextED) {
 730                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 731                                 writel(ohci->hc_control, &ohci->regs->control);
 732                         }
 733                         writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 734                                 &ohci->regs->ed_controlhead);
 735                 } else {
 736                         ed->ed_prev->hwNextED = ed->hwNextED;
 737                 }
 738                 if (ohci->ed_controltail == ed) {
 739                         ohci->ed_controltail = ed->ed_prev;
 740                 } else {
 741                         ((ed_t *)m32_swap(
 742                             *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 743                 }
 744                 break;
 745
 746         case PIPE_BULK:
 747                 if (ed->ed_prev == NULL) {
 748                         if (!ed->hwNextED) {
 749                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 750                                 writel(ohci->hc_control, &ohci->regs->control);
 751                         }
 752                         writel(m32_swap(*((__u32 *)&ed->hwNextED)),
 753                                &ohci->regs->ed_bulkhead);
 754                 } else {
 755                         ed->ed_prev->hwNextED = ed->hwNextED;
 756                 }
 757                 if (ohci->ed_bulktail == ed) {
 758                         ohci->ed_bulktail = ed->ed_prev;
 759                 } else {
 760                         ((ed_t *)m32_swap(
 761                              *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 762                 }
 763                 break;
 764
 765         case PIPE_INTERRUPT:
 766                 periodic_unlink(ohci, ed, 0, 1);
 767                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 768                     ohci->ohci_int_load[i] -= ed->int_load;
 769                 break;
 770         }
 771         ed->state = ED_UNLINK;
 772         return 0;
 773 }
 774
 775 /*-------------------------------------------------------------------------*/
 776
 777 /* add/reinit an endpoint; this should be done once at the
 778  * usb_set_configuration command, but the USB stack is a little bit
 779  * stateless so we do it at every transaction if the state of the ed
 780  * is ED_NEW then a dummy td is added and the state is changed to
 781  * ED_UNLINK in all other cases the state is left unchanged the ed
 782  * info fields are setted anyway even though most of them should not
 783  * change
 784  */
 785 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
 786                         int interval, int load)
 787 {
 788         td_t *td;
 789         ed_t *ed_ret;
 790         volatile ed_t *ed;
 791
 792         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
 793                         (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
 794
 795         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 796                 err("ep_add_ed: pending delete");
 797                 /* pending delete request */
 798                 return NULL;
 799         }
 800
 801         if (ed->state == ED_NEW) {
 802                 /* dummy td; end of td list for ed */
 803                 td = td_alloc(usb_dev);
 804                 ed->hwTailP = m32_swap((unsigned long)td);
 805                 ed->hwHeadP = ed->hwTailP;
 806                 ed->state = ED_UNLINK;
 807                 ed->type = usb_pipetype(pipe);
 808                 ohci_dev.ed_cnt++;
 809         }
 810
 811         ed->hwINFO = m32_swap(usb_pipedevice(pipe)
 812                         | usb_pipeendpoint(pipe) << 7
 813                         | (usb_pipeisoc(pipe)? 0x8000: 0)
 814                         | (usb_pipecontrol(pipe)? 0: \
 815                                            (usb_pipeout(pipe)? 0x800: 0x1000))
 816                         | usb_pipeslow(pipe) << 13
 817                         | usb_maxpacket(usb_dev, pipe) << 16);
 818
 819         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 820                 ed->int_period = interval;
 821                 ed->int_load = load;
 822         }
 823
 824         return ed_ret;
 825 }
 826
 827 /*-------------------------------------------------------------------------*
 828  * TD handling functions
 829  *-------------------------------------------------------------------------*/
 830
 831 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 832
 833 static void td_fill(ohci_t *ohci, unsigned int info,
 834         void *data, int len,
 835         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 836 {
 837         volatile td_t  *td, *td_pt;
 838 #ifdef OHCI_FILL_TRACE
 839         int i;
 840 #endif
 841
 842         if (index > urb_priv->length) {
 843                 err("index > length");
 844                 return;
 845         }
 846         /* use this td as the next dummy */
 847         td_pt = urb_priv->td [index];
 848         td_pt->hwNextTD = 0;
 849
 850         /* fill the old dummy TD */
 851         td = urb_priv->td [index] =
 852                              (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
 853
 854         td->ed = urb_priv->ed;
 855         td->next_dl_td = NULL;
 856         td->index = index;
 857         td->data = (__u32)data;
 858 #ifdef OHCI_FILL_TRACE
 859         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) &&
 860                                                 usb_pipeout(urb_priv->pipe)) {
 861                 for (i = 0; i < len; i++)
 862                 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
 863                 printf("\n");
 864         }
 865 #endif
 866         if (!len)
 867                 data = 0;
 868
 869         td->hwINFO = m32_swap(info);
 870         td->hwCBP = m32_swap((unsigned long)data);
 871         if (data)
 872                 td->hwBE = m32_swap((unsigned long)(data + len - 1));
 873         else
 874                 td->hwBE = 0;
 875
 876         td->hwNextTD = m32_swap((unsigned long)td_pt);
 877
 878         /* append to queue */
 879         td->ed->hwTailP = td->hwNextTD;
 880 }
 881
 882 /*-------------------------------------------------------------------------*/
 883
 884 /* prepare all TDs of a transfer */
 885
 886 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
 887                           void *buffer, int transfer_len,
 888                           struct devrequest *setup, urb_priv_t *urb,
 889                           int interval)
 890 {
 891         ohci_t *ohci = &gohci;
 892         int data_len = transfer_len;
 893         void *data;
 894         int cnt = 0;
 895         __u32 info = 0;
 896         unsigned int toggle = 0;
 897
 898         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
 899          * bits for reseting */
 900         if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 901                 toggle = TD_T_TOGGLE;
 902         } else {
 903                 toggle = TD_T_DATA0;
 904                 usb_settoggle(dev, usb_pipeendpoint(pipe),
 905                                 usb_pipeout(pipe), 1);
 906         }
 907         urb->td_cnt = 0;
 908         if (data_len)
 909                 data = buffer;
 910         else
 911                 data = 0;
 912
 913         switch (usb_pipetype(pipe)) {
 914         case PIPE_BULK:
 915                 info = usb_pipeout(pipe)?
 916                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 917                 while (data_len > 4096) {
 918                         td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
 919                                 data, 4096, dev, cnt, urb);
 920                         data += 4096; data_len -= 4096; cnt++;
 921                 }
 922                 info = usb_pipeout(pipe)?
 923                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 924                 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
 925                         data_len, dev, cnt, urb);
 926                 cnt++;
 927
 928                 if (!ohci->sleeping) {
 929                         /* start bulk list */
 930                         writel(OHCI_BLF, &ohci->regs->cmdstatus);
 931                 }
 932                 break;
 933
 934         case PIPE_CONTROL:
 935                 /* Setup phase */
 936                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 937                 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
 938
 939                 /* Optional Data phase */
 940                 if (data_len > 0) {
 941                         info = usb_pipeout(pipe)?
 942                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
 943                                 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 944                         /* NOTE:  mishandles transfers >8K, some >4K */
 945                         td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 946                 }
 947
 948                 /* Status phase */
 949                 info = usb_pipeout(pipe)?
 950                         TD_CC | TD_DP_IN | TD_T_DATA1:
 951                         TD_CC | TD_DP_OUT | TD_T_DATA1;
 952                 td_fill(ohci, info, data, 0, dev, cnt++, urb);
 953
 954                 if (!ohci->sleeping) {
 955                         /* start Control list */
 956                         writel(OHCI_CLF, &ohci->regs->cmdstatus);
 957                 }
 958                 break;
 959
 960         case PIPE_INTERRUPT:
 961                 info = usb_pipeout(urb->pipe)?
 962                         TD_CC | TD_DP_OUT | toggle:
 963                         TD_CC | TD_R | TD_DP_IN | toggle;
 964                 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
 965                 break;
 966         }
 967         if (urb->length != cnt)
 968                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 969 }
 970
 971 /*-------------------------------------------------------------------------*
 972  * Done List handling functions
 973  *-------------------------------------------------------------------------*/
 974
 975 /* calculate the transfer length and update the urb */
 976
 977 static void dl_transfer_length(td_t *td)
 978 {
 979         __u32 tdINFO, tdBE, tdCBP;
 980         urb_priv_t *lurb_priv = td->ed->purb;
 981
 982         tdINFO = m32_swap(td->hwINFO);
 983         tdBE   = m32_swap(td->hwBE);
 984         tdCBP  = m32_swap(td->hwCBP);
 985
 986         if (!(usb_pipetype(lurb_priv->pipe) == PIPE_CONTROL &&
 987             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 988                 if (tdBE != 0) {
 989                         if (td->hwCBP == 0)
 990                                 lurb_priv->actual_length += tdBE - td->data + 1;
 991                         else
 992                                 lurb_priv->actual_length += tdCBP - td->data;
 993                 }
 994         }
 995 }
 996
 997 /*-------------------------------------------------------------------------*/
 998 static void check_status(td_t *td_list)
 999 {
1000         urb_priv_t *lurb_priv = td_list->ed->purb;
1001         int        urb_len    = lurb_priv->length;
1002         __u32      *phwHeadP  = &td_list->ed->hwHeadP;
1003         int        cc;
1004
1005         cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1006         if (cc) {
1007                 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1008
1009                 if (*phwHeadP & m32_swap(0x1)) {
1010                         if (lurb_priv &&
1011                             ((td_list->index + 1) < urb_len)) {
1012                                 *phwHeadP =
1013                                         (lurb_priv->td[urb_len - 1]->hwNextTD &\
1014                                                         m32_swap(0xfffffff0)) |
1015                                                    (*phwHeadP & m32_swap(0x2));
1016
1017                                 lurb_priv->td_cnt += urb_len -
1018                                                      td_list->index - 1;
1019                         } else
1020                                 *phwHeadP &= m32_swap(0xfffffff2);
1021                 }
1022 #ifdef CONFIG_MPC5200
1023                 td_list->hwNextTD = 0;
1024 #endif
1025         }
1026 }
1027
1028 /* replies to the request have to be on a FIFO basis so
1029  * we reverse the reversed done-list */
1030 static td_t *dl_reverse_done_list(ohci_t *ohci)
1031 {
1032         __u32 td_list_hc;
1033         td_t *td_rev = NULL;
1034         td_t *td_list = NULL;
1035
1036         td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1037         ohci->hcca->done_head = 0;
1038
1039         while (td_list_hc) {
1040                 td_list = (td_t *)td_list_hc;
1041                 check_status(td_list);
1042                 td_list->next_dl_td = td_rev;
1043                 td_rev = td_list;
1044                 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1045         }
1046         return td_list;
1047 }
1048
1049 /*-------------------------------------------------------------------------*/
1050 /*-------------------------------------------------------------------------*/
1051
1052 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1053 {
1054         if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1055                 urb->finished = sohci_return_job(ohci, urb);
1056         else
1057                 dbg("finish_urb: strange.., ED state %x, \n", status);
1058 }
1059
1060 /*
1061  * Used to take back a TD from the host controller. This would normally be
1062  * called from within dl_done_list, however it may be called directly if the
1063  * HC no longer sees the TD and it has not appeared on the donelist (after
1064  * two frames).  This bug has been observed on ZF Micro systems.
1065  */
1066 static int takeback_td(ohci_t *ohci, td_t *td_list)
1067 {
1068         ed_t *ed;
1069         int cc;
1070         int stat = 0;
1071         /* urb_t *urb; */
1072         urb_priv_t *lurb_priv;
1073         __u32 tdINFO, edHeadP, edTailP;
1074
1075         tdINFO = m32_swap(td_list->hwINFO);
1076
1077         ed = td_list->ed;
1078         lurb_priv = ed->purb;
1079
1080         dl_transfer_length(td_list);
1081
1082         lurb_priv->td_cnt++;
1083
1084         /* error code of transfer */
1085         cc = TD_CC_GET(tdINFO);
1086         if (cc) {
1087                 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1088                 stat = cc_to_error[cc];
1089         }
1090
1091         /* see if this done list makes for all TD's of current URB,
1092         * and mark the URB finished if so */
1093         if (lurb_priv->td_cnt == lurb_priv->length)
1094                 finish_urb(ohci, lurb_priv, ed->state);
1095
1096         dbg("dl_done_list: processing TD %x, len %x\n",
1097                 lurb_priv->td_cnt, lurb_priv->length);
1098
1099         if (ed->state != ED_NEW &&
1100                 (usb_pipetype(lurb_priv->pipe) != PIPE_INTERRUPT)) {
1101                 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1102                 edTailP = m32_swap(ed->hwTailP);
1103
1104                 /* unlink eds if they are not busy */
1105                 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1106                         ep_unlink(ohci, ed);
1107         }
1108         return stat;
1109 }
1110
1111 static int dl_done_list(ohci_t *ohci)
1112 {
1113         int stat = 0;
1114         td_t    *td_list = dl_reverse_done_list(ohci);
1115
1116         while (td_list) {
1117                 td_t    *td_next = td_list->next_dl_td;
1118                 stat = takeback_td(ohci, td_list);
1119                 td_list = td_next;
1120         }
1121         return stat;
1122 }
1123
1124 /*-------------------------------------------------------------------------*
1125  * Virtual Root Hub
1126  *-------------------------------------------------------------------------*/
1127
1128 /* Device descriptor */
1129 static __u8 root_hub_dev_des[] =
1130 {
1131         0x12,       /*  __u8  bLength; */
1132         0x01,       /*  __u8  bDescriptorType; Device */
1133         0x10,       /*  __u16 bcdUSB; v1.1 */
1134         0x01,
1135         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1136         0x00,       /*  __u8  bDeviceSubClass; */
1137         0x00,       /*  __u8  bDeviceProtocol; */
1138         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1139         0x00,       /*  __u16 idVendor; */
1140         0x00,
1141         0x00,       /*  __u16 idProduct; */
1142         0x00,
1143         0x00,       /*  __u16 bcdDevice; */
1144         0x00,
1145         0x00,       /*  __u8  iManufacturer; */
1146         0x01,       /*  __u8  iProduct; */
1147         0x00,       /*  __u8  iSerialNumber; */
1148         0x01        /*  __u8  bNumConfigurations; */
1149 };
1150
1151 /* Configuration descriptor */
1152 static __u8 root_hub_config_des[] =
1153 {
1154         0x09,       /*  __u8  bLength; */
1155         0x02,       /*  __u8  bDescriptorType; Configuration */
1156         0x19,       /*  __u16 wTotalLength; */
1157         0x00,
1158         0x01,       /*  __u8  bNumInterfaces; */
1159         0x01,       /*  __u8  bConfigurationValue; */
1160         0x00,       /*  __u8  iConfiguration; */
1161         0x40,       /*  __u8  bmAttributes;
1162          Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1163         0x00,       /*  __u8  MaxPower; */
1164
1165         /* interface */
1166         0x09,       /*  __u8  if_bLength; */
1167         0x04,       /*  __u8  if_bDescriptorType; Interface */
1168         0x00,       /*  __u8  if_bInterfaceNumber; */
1169         0x00,       /*  __u8  if_bAlternateSetting; */
1170         0x01,       /*  __u8  if_bNumEndpoints; */
1171         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1172         0x00,       /*  __u8  if_bInterfaceSubClass; */
1173         0x00,       /*  __u8  if_bInterfaceProtocol; */
1174         0x00,       /*  __u8  if_iInterface; */
1175
1176         /* endpoint */
1177         0x07,       /*  __u8  ep_bLength; */
1178         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1179         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1180         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1181         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1182         0x00,
1183         0xff        /*  __u8  ep_bInterval; 255 ms */
1184 };
1185
1186 static unsigned char root_hub_str_index0[] =
1187 {
1188         0x04,                   /*  __u8  bLength; */
1189         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1190         0x09,                   /*  __u8  lang ID */
1191         0x04,                   /*  __u8  lang ID */
1192 };
1193
1194 static unsigned char root_hub_str_index1[] =
1195 {
1196         28,                     /*  __u8  bLength; */
1197         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1198         'O',                    /*  __u8  Unicode */
1199         0,                              /*  __u8  Unicode */
1200         'H',                    /*  __u8  Unicode */
1201         0,                              /*  __u8  Unicode */
1202         'C',                    /*  __u8  Unicode */
1203         0,                              /*  __u8  Unicode */
1204         'I',                    /*  __u8  Unicode */
1205         0,                              /*  __u8  Unicode */
1206         ' ',                    /*  __u8  Unicode */
1207         0,                              /*  __u8  Unicode */
1208         'R',                    /*  __u8  Unicode */
1209         0,                              /*  __u8  Unicode */
1210         'o',                    /*  __u8  Unicode */
1211         0,                              /*  __u8  Unicode */
1212         'o',                    /*  __u8  Unicode */
1213         0,                              /*  __u8  Unicode */
1214         't',                    /*  __u8  Unicode */
1215         0,                              /*  __u8  Unicode */
1216         ' ',                    /*  __u8  Unicode */
1217         0,                              /*  __u8  Unicode */
1218         'H',                    /*  __u8  Unicode */
1219         0,                              /*  __u8  Unicode */
1220         'u',                    /*  __u8  Unicode */
1221         0,                              /*  __u8  Unicode */
1222         'b',                    /*  __u8  Unicode */
1223         0,                              /*  __u8  Unicode */
1224 };
1225
1226 /* Hub class-specific descriptor is constructed dynamically */
1227
1228 /*-------------------------------------------------------------------------*/
1229
1230 #define OK(x)                   len = (x); break
1231 #ifdef DEBUG
1232 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x)); writel((x), \
1233                                                 &gohci.regs->roothub.status); }
1234 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, \
1235                 (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1236 #else
1237 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1238 #define WR_RH_PORTSTAT(x)       writel((x), \
1239                                     &gohci.regs->roothub.portstatus[wIndex-1])
1240 #endif
1241 #define RD_RH_STAT              roothub_status(&gohci)
1242 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci, wIndex-1)
1243
1244 /* request to virtual root hub */
1245
1246 int rh_check_port_status(ohci_t *controller)
1247 {
1248         __u32 temp, ndp, i;
1249         int res;
1250
1251         res = -1;
1252         temp = roothub_a(controller);
1253         ndp = (temp & RH_A_NDP);
1254 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1255         ndp = (ndp == 2) ? 1:0;
1256 #endif
1257         for (i = 0; i < ndp; i++) {
1258                 temp = roothub_portstatus(controller, i);
1259                 /* check for a device disconnect */
1260                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1261                         (RH_PS_PESC | RH_PS_CSC)) &&
1262                         ((temp & RH_PS_CCS) == 0)) {
1263                         res = i;
1264                         break;
1265                 }
1266         }
1267         return res;
1268 }
1269
1270 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1271                 void *buffer, int transfer_len, struct devrequest *cmd)
1272 {
1273         void *data = buffer;
1274         int leni = transfer_len;
1275         int len = 0;
1276         int stat = 0;
1277         __u32 datab[4];
1278         __u8 *data_buf = (__u8 *)datab;
1279         __u16 bmRType_bReq;
1280         __u16 wValue;
1281         __u16 wIndex;
1282         __u16 wLength;
1283
1284 #ifdef DEBUG
1285 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1286           cmd, "SUB(rh)", usb_pipein(pipe));
1287 #else
1288         wait_ms(1);
1289 #endif
1290         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1291                 info("Root-Hub submit IRQ: NOT implemented");
1292                 return 0;
1293         }
1294
1295         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1296         wValue        = le16_to_cpu(cmd->value);
1297         wIndex        = le16_to_cpu(cmd->index);
1298         wLength       = le16_to_cpu(cmd->length);
1299
1300         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1301                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1302
1303         switch (bmRType_bReq) {
1304         /* Request Destination:
1305            without flags: Device,
1306            RH_INTERFACE: interface,
1307            RH_ENDPOINT: endpoint,
1308            RH_CLASS means HUB here,
1309            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1310         */
1311
1312         case RH_GET_STATUS:
1313                 *(__u16 *) data_buf = cpu_to_le16(1);
1314                 OK(2);
1315         case RH_GET_STATUS | RH_INTERFACE:
1316                 *(__u16 *) data_buf = cpu_to_le16(0);
1317                 OK(2);
1318         case RH_GET_STATUS | RH_ENDPOINT:
1319                 *(__u16 *) data_buf = cpu_to_le16(0);
1320                 OK(2);
1321         case RH_GET_STATUS | RH_CLASS:
1322                 *(__u32 *) data_buf = cpu_to_le32(
1323                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1324                 OK(4);
1325         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1326                 *(__u32 *) data_buf = cpu_to_le32(RD_RH_PORTSTAT);
1327                 OK(4);
1328
1329         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1330                 switch (wValue) {
1331                 case (RH_ENDPOINT_STALL):
1332                         OK(0);
1333                 }
1334                 break;
1335
1336         case RH_CLEAR_FEATURE | RH_CLASS:
1337                 switch (wValue) {
1338                 case RH_C_HUB_LOCAL_POWER:
1339                         OK(0);
1340                 case (RH_C_HUB_OVER_CURRENT):
1341                         WR_RH_STAT(RH_HS_OCIC);
1342                         OK(0);
1343                 }
1344                 break;
1345
1346         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1347                 switch (wValue) {
1348                 case (RH_PORT_ENABLE):        WR_RH_PORTSTAT(RH_PS_CCS);  OK(0);
1349                 case (RH_PORT_SUSPEND):       WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1350                 case (RH_PORT_POWER):         WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1351                 case (RH_C_PORT_CONNECTION):  WR_RH_PORTSTAT(RH_PS_CSC);  OK(0);
1352                 case (RH_C_PORT_ENABLE):      WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1353                 case (RH_C_PORT_SUSPEND):     WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1354                 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1355                 case (RH_C_PORT_RESET):       WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1356                 }
1357                 break;
1358
1359         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1360                 switch (wValue) {
1361                 case (RH_PORT_SUSPEND):
1362                         WR_RH_PORTSTAT(RH_PS_PSS);  OK(0);
1363                 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1364                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1365                                 WR_RH_PORTSTAT(RH_PS_PRS);
1366                         OK(0);
1367                 case (RH_PORT_POWER):
1368                         WR_RH_PORTSTAT(RH_PS_PPS);
1369                         wait_ms(100);
1370                         OK(0);
1371                 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1372                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1373                                 WR_RH_PORTSTAT(RH_PS_PES);
1374                         OK(0);
1375                 }
1376                 break;
1377
1378         case RH_SET_ADDRESS:
1379                 gohci.rh.devnum = wValue;
1380                 OK(0);
1381
1382         case RH_GET_DESCRIPTOR:
1383                 switch ((wValue & 0xff00) >> 8) {
1384                 case (0x01): /* device descriptor */
1385                         len = min_t(unsigned int,
1386                                         leni,
1387                                         min_t(unsigned int,
1388                                         sizeof(root_hub_dev_des),
1389                                         wLength));
1390                         data_buf = root_hub_dev_des; OK(len);
1391                 case (0x02): /* configuration descriptor */
1392                         len = min_t(unsigned int,
1393                                         leni,
1394                                         min_t(unsigned int,
1395                                         sizeof(root_hub_config_des),
1396                                         wLength));
1397                         data_buf = root_hub_config_des; OK(len);
1398                 case (0x03): /* string descriptors */
1399                         if (wValue == 0x0300) {
1400                                 len = min_t(unsigned int,
1401                                                 leni,
1402                                                 min_t(unsigned int,
1403                                                 sizeof(root_hub_str_index0),
1404                                                 wLength));
1405                                 data_buf = root_hub_str_index0;
1406                                 OK(len);
1407                         }
1408                         if (wValue == 0x0301) {
1409                                 len = min_t(unsigned int,
1410                                                 leni,
1411                                                 min_t(unsigned int,
1412                                                 sizeof(root_hub_str_index1),
1413                                                 wLength));
1414                                 data_buf = root_hub_str_index1;
1415                                 OK(len);
1416                 }
1417                 default:
1418                         stat = USB_ST_STALLED;
1419                 }
1420                 break;
1421
1422         case RH_GET_DESCRIPTOR | RH_CLASS:
1423         {
1424                 __u32 temp = roothub_a(&gohci);
1425
1426                 data_buf [0] = 9;               /* min length; */
1427                 data_buf [1] = 0x29;
1428                 data_buf [2] = temp & RH_A_NDP;
1429 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1430                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1431 #endif
1432                 data_buf [3] = 0;
1433                 if (temp & RH_A_PSM)    /* per-port power switching? */
1434                         data_buf [3] |= 0x1;
1435                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1436                         data_buf [3] |= 0x10;
1437                 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1438                         data_buf [3] |= 0x8;
1439
1440                 /* corresponds to data_buf[4-7] */
1441                 datab [1] = 0;
1442                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1443                 temp = roothub_b(&gohci);
1444                 data_buf [7] = temp & RH_B_DR;
1445                 if (data_buf [2] < 7) {
1446                         data_buf [8] = 0xff;
1447                 } else {
1448                         data_buf [0] += 2;
1449                         data_buf [8] = (temp & RH_B_DR) >> 8;
1450                         data_buf [10] = data_buf [9] = 0xff;
1451                 }
1452
1453                 len = min_t(unsigned int, leni,
1454                             min_t(unsigned int, data_buf [0], wLength));
1455                 OK(len);
1456         }
1457
1458         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK(1);
1459
1460         case RH_SET_CONFIGURATION:      WR_RH_STAT(0x10000); OK(0);
1461
1462         default:
1463                 dbg("unsupported root hub command");
1464                 stat = USB_ST_STALLED;
1465         }
1466
1467 #ifdef  DEBUG
1468         ohci_dump_roothub(&gohci, 1);
1469 #else
1470         wait_ms(1);
1471 #endif
1472
1473         len = min_t(int, len, leni);
1474         if (data != data_buf)
1475             memcpy(data, data_buf, len);
1476         dev->act_len = len;
1477         dev->status = stat;
1478
1479 #ifdef DEBUG
1480         pkt_print(NULL, dev, pipe, buffer,
1481                   transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1482 #else
1483         wait_ms(1);
1484 #endif
1485
1486         return stat;
1487 }
1488
1489 /*-------------------------------------------------------------------------*/
1490
1491 /* common code for handling submit messages - used for all but root hub */
1492 /* accesses. */
1493 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1494                 int transfer_len, struct devrequest *setup, int interval)
1495 {
1496         int stat = 0;
1497         int maxsize = usb_maxpacket(dev, pipe);
1498         int timeout;
1499         urb_priv_t *urb;
1500
1501         urb = malloc(sizeof(urb_priv_t));
1502         memset(urb, 0, sizeof(urb_priv_t));
1503
1504         urb->dev = dev;
1505         urb->pipe = pipe;
1506         urb->transfer_buffer = buffer;
1507         urb->transfer_buffer_length = transfer_len;
1508         urb->interval = interval;
1509
1510         /* device pulled? Shortcut the action. */
1511         if (devgone == dev) {
1512                 dev->status = USB_ST_CRC_ERR;
1513                 return 0;
1514         }
1515
1516 #ifdef DEBUG
1517         urb->actual_length = 0;
1518         pkt_print(urb, dev, pipe, buffer, transfer_len,
1519                   setup, "SUB", usb_pipein(pipe));
1520 #else
1521         wait_ms(1);
1522 #endif
1523         if (!maxsize) {
1524                 err("submit_common_message: pipesize for pipe %lx is zero",
1525                         pipe);
1526                 return -1;
1527         }
1528
1529         if (sohci_submit_job(urb, setup) < 0) {
1530                 err("sohci_submit_job failed");
1531                 return -1;
1532         }
1533
1534 #if 0
1535         wait_ms(10);
1536         /* ohci_dump_status(&gohci); */
1537 #endif
1538
1539         /* allow more time for a BULK device to react - some are slow */
1540 #define BULK_TO  5000   /* timeout in milliseconds */
1541         if (usb_pipetype(pipe) == PIPE_BULK)
1542                 timeout = BULK_TO;
1543         else
1544                 timeout = 100;
1545
1546         /* wait for it to complete */
1547         for (;;) {
1548                 /* check whether the controller is done */
1549                 stat = hc_interrupt();
1550                 if (stat < 0) {
1551                         stat = USB_ST_CRC_ERR;
1552                         break;
1553                 }
1554
1555                 /* NOTE: since we are not interrupt driven in U-Boot and always
1556                  * handle only one URB at a time, we cannot assume the
1557                  * transaction finished on the first successful return from
1558                  * hc_interrupt().. unless the flag for current URB is set,
1559                  * meaning that all TD's to/from device got actually
1560                  * transferred and processed. If the current URB is not
1561                  * finished we need to re-iterate this loop so as
1562                  * hc_interrupt() gets called again as there needs to be some
1563                  * more TD's to process still */
1564                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1565                         /* 0xff is returned for an SF-interrupt */
1566                         break;
1567                 }
1568
1569                 if (--timeout) {
1570                         wait_ms(1);
1571                         if (!urb->finished)
1572                                 dbg("*");
1573
1574                 } else {
1575                         err("CTL:TIMEOUT ");
1576                         dbg("submit_common_msg: TO status %x\n", stat);
1577                         urb->finished = 1;
1578                         stat = USB_ST_CRC_ERR;
1579                         break;
1580                 }
1581         }
1582
1583         dev->status = stat;
1584         dev->act_len = transfer_len;
1585
1586 #ifdef DEBUG
1587         pkt_print(urb, dev, pipe, buffer, transfer_len,
1588                   setup, "RET(ctlr)", usb_pipein(pipe));
1589 #else
1590         wait_ms(1);
1591 #endif
1592
1593         /* free TDs in urb_priv */
1594         if (usb_pipetype(pipe) != PIPE_INTERRUPT)
1595                 urb_free_priv(urb);
1596         return 0;
1597 }
1598
1599 /* submit routines called from usb.c */
1600 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1601                 int transfer_len)
1602 {
1603         info("submit_bulk_msg");
1604         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1605 }
1606
1607 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1608                 int transfer_len, struct devrequest *setup)
1609 {
1610         int maxsize = usb_maxpacket(dev, pipe);
1611
1612         info("submit_control_msg");
1613 #ifdef DEBUG
1614         pkt_print(NULL, dev, pipe, buffer, transfer_len,
1615                   setup, "SUB", usb_pipein(pipe));
1616 #else
1617         wait_ms(1);
1618 #endif
1619         if (!maxsize) {
1620                 err("submit_control_message: pipesize for pipe %lx is zero",
1621                         pipe);
1622                 return -1;
1623         }
1624         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1625                 gohci.rh.dev = dev;
1626                 /* root hub - redirect */
1627                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1628                         setup);
1629         }
1630
1631         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1632 }
1633
1634 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1635                 int transfer_len, int interval)
1636 {
1637         info("submit_int_msg");
1638         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1639                         interval);
1640 }
1641
1642 /*-------------------------------------------------------------------------*
1643  * HC functions
1644  *-------------------------------------------------------------------------*/
1645
1646 /* reset the HC and BUS */
1647
1648 static int hc_reset(ohci_t *ohci)
1649 {
1650 #ifdef CONFIG_PCI_EHCI_DEVNO
1651         pci_dev_t pdev;
1652 #endif
1653         int timeout = 30;
1654         int smm_timeout = 50; /* 0,5 sec */
1655
1656         dbg("%s\n", __FUNCTION__);
1657
1658 #ifdef CONFIG_PCI_EHCI_DEVNO
1659         /*
1660          *  Some multi-function controllers (e.g. ISP1562) allow root hub
1661          * resetting via EHCI registers only.
1662          */
1663         pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1664         if (pdev != -1) {
1665                 u32 base;
1666                 int timeout = 1000;
1667
1668                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1669                 writel(readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
1670                         base + EHCI_USBCMD_OFF);
1671
1672                 while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
1673                         if (timeout-- <= 0) {
1674                                 printf("USB RootHub reset timed out!");
1675                                 break;
1676                         }
1677                         udelay(1);
1678                 }
1679         } else
1680                 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1681 #endif
1682         if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1683                 /* SMM owns the HC */
1684                 writel(OHCI_OCR, &ohci->regs->cmdstatus);/* request ownership */
1685                 info("USB HC TakeOver from SMM");
1686                 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1687                         wait_ms(10);
1688                         if (--smm_timeout == 0) {
1689                                 err("USB HC TakeOver failed!");
1690                                 return -1;
1691                         }
1692                 }
1693         }
1694
1695         /* Disable HC interrupts */
1696         writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1697
1698         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1699                 ohci->slot_name,
1700                 readl(&ohci->regs->control));
1701
1702         /* Reset USB (needed by some controllers) */
1703         ohci->hc_control = 0;
1704         writel(ohci->hc_control, &ohci->regs->control);
1705
1706         /* HC Reset requires max 10 us delay */
1707         writel(OHCI_HCR,  &ohci->regs->cmdstatus);
1708         while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1709                 if (--timeout == 0) {
1710                         err("USB HC reset timed out!");
1711                         return -1;
1712                 }
1713                 udelay(1);
1714         }
1715         return 0;
1716 }
1717
1718 /*-------------------------------------------------------------------------*/
1719
1720 /* Start an OHCI controller, set the BUS operational
1721  * enable interrupts
1722  * connect the virtual root hub */
1723
1724 static int hc_start(ohci_t *ohci)
1725 {
1726         __u32 mask;
1727         unsigned int fminterval;
1728
1729         ohci->disabled = 1;
1730
1731         /* Tell the controller where the control and bulk lists are
1732          * The lists are empty now. */
1733
1734         writel(0, &ohci->regs->ed_controlhead);
1735         writel(0, &ohci->regs->ed_bulkhead);
1736
1737         writel((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1738
1739         fminterval = 0x2edf;
1740         writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1741         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1742         writel(fminterval, &ohci->regs->fminterval);
1743         writel(0x628, &ohci->regs->lsthresh);
1744
1745         /* start controller operations */
1746         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1747         ohci->disabled = 0;
1748         writel(ohci->hc_control, &ohci->regs->control);
1749
1750         /* disable all interrupts */
1751         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1752                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1753                         OHCI_INTR_OC | OHCI_INTR_MIE);
1754         writel(mask, &ohci->regs->intrdisable);
1755         /* clear all interrupts */
1756         mask &= ~OHCI_INTR_MIE;
1757         writel(mask, &ohci->regs->intrstatus);
1758         /* Choose the interrupts we care about now  - but w/o MIE */
1759         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1760         writel(mask, &ohci->regs->intrenable);
1761
1762 #ifdef  OHCI_USE_NPS
1763         /* required for AMD-756 and some Mac platforms */
1764         writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1765                 &ohci->regs->roothub.a);
1766         writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1767 #endif  /* OHCI_USE_NPS */
1768
1769 #define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
1770         /* POTPGT delay is bits 24-31, in 2 ms units. */
1771         mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1772
1773         /* connect the virtual root hub */
1774         ohci->rh.devnum = 0;
1775
1776         return 0;
1777 }
1778
1779 /*-------------------------------------------------------------------------*/
1780
1781 /* Poll USB interrupt. */
1782 void usb_event_poll(void)
1783 {
1784         hc_interrupt();
1785 }
1786
1787 /* an interrupt happens */
1788
1789 static int hc_interrupt(void)
1790 {
1791         ohci_t *ohci = &gohci;
1792         struct ohci_regs *regs = ohci->regs;
1793         int ints;
1794         int stat = -1;
1795
1796         if ((ohci->hcca->done_head != 0) &&
1797                                 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1798                 ints =  OHCI_INTR_WDH;
1799         } else {
1800                 ints = readl(&regs->intrstatus);
1801                 if (ints == ~(u32)0) {
1802                         ohci->disabled++;
1803                         err("%s device removed!", ohci->slot_name);
1804                         return -1;
1805                 } else {
1806                         ints &= readl(&regs->intrenable);
1807                         if (ints == 0) {
1808                                 dbg("hc_interrupt: returning..\n");
1809                                 return 0xff;
1810                         }
1811                 }
1812         }
1813
1814         /* dbg("Interrupt: %x frame: %x", ints,
1815                                         le16_to_cpu(ohci->hcca->frame_no)); */
1816
1817         if (ints & OHCI_INTR_RHSC)
1818                 stat = 0xff;
1819
1820         if (ints & OHCI_INTR_UE) {
1821                 ohci->disabled++;
1822                 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1823                         ohci->slot_name);
1824                 /* e.g. due to PCI Master/Target Abort */
1825
1826 #ifdef  DEBUG
1827                 ohci_dump(ohci, 1);
1828 #else
1829                 wait_ms(1);
1830 #endif
1831                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1832                 /* Make some non-interrupt context restart the controller. */
1833                 /* Count and limit the retries though; either hardware or */
1834                 /* software errors can go forever... */
1835                 hc_reset(ohci);
1836                 return -1;
1837         }
1838
1839         if (ints & OHCI_INTR_WDH) {
1840                 wait_ms(1);
1841                 writel(OHCI_INTR_WDH, &regs->intrdisable);
1842                 (void)readl(&regs->intrdisable); /* flush */
1843                 stat = dl_done_list(&gohci);
1844                 writel(OHCI_INTR_WDH, &regs->intrenable);
1845                 (void)readl(&regs->intrdisable); /* flush */
1846         }
1847
1848         if (ints & OHCI_INTR_SO) {
1849                 dbg("USB Schedule overrun\n");
1850                 writel(OHCI_INTR_SO, &regs->intrenable);
1851                 stat = -1;
1852         }
1853
1854         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1855         if (ints & OHCI_INTR_SF) {
1856                 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1857                 wait_ms(1);
1858                 writel(OHCI_INTR_SF, &regs->intrdisable);
1859                 if (ohci->ed_rm_list[frame] != NULL)
1860                         writel(OHCI_INTR_SF, &regs->intrenable);
1861                 stat = 0xff;
1862         }
1863
1864         writel(ints, &regs->intrstatus);
1865         return stat;
1866 }
1867
1868 /*-------------------------------------------------------------------------*/
1869
1870 /*-------------------------------------------------------------------------*/
1871
1872 /* De-allocate all resources.. */
1873
1874 static void hc_release_ohci(ohci_t *ohci)
1875 {
1876         dbg("USB HC release ohci usb-%s", ohci->slot_name);
1877
1878         if (!ohci->disabled)
1879                 hc_reset(ohci);
1880 }
1881
1882 /*-------------------------------------------------------------------------*/
1883
1884 /*
1885  * low level initalisation routine, called from usb.c
1886  */
1887 static char ohci_inited = 0;
1888
1889 int usb_lowlevel_init(void)
1890 {
1891 #ifdef CONFIG_PCI_OHCI
1892         pci_dev_t pdev;
1893 #endif
1894
1895 #ifdef CFG_USB_OHCI_CPU_INIT
1896         /* cpu dependant init */
1897         if (usb_cpu_init())
1898                 return -1;
1899 #endif
1900
1901 #ifdef CFG_USB_OHCI_BOARD_INIT
1902         /*  board dependant init */
1903         if (usb_board_init())
1904                 return -1;
1905 #endif
1906         memset(&gohci, 0, sizeof(ohci_t));
1907
1908         /* align the storage */
1909         if ((__u32)&ghcca[0] & 0xff) {
1910                 err("HCCA not aligned!!");
1911                 return -1;
1912         }
1913         phcca = &ghcca[0];
1914         info("aligned ghcca %p", phcca);
1915         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1916         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1917                 err("EDs not aligned!!");
1918                 return -1;
1919         }
1920         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1921         if ((__u32)gtd & 0x7) {
1922                 err("TDs not aligned!!");
1923                 return -1;
1924         }
1925         ptd = gtd;
1926         gohci.hcca = phcca;
1927         memset(phcca, 0, sizeof(struct ohci_hcca));
1928
1929         gohci.disabled = 1;
1930         gohci.sleeping = 0;
1931         gohci.irq = -1;
1932 #ifdef CONFIG_PCI_OHCI
1933         pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1934
1935         if (pdev != -1) {
1936                 u16 vid, did;
1937                 u32 base;
1938                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1939                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1940                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1941                                 vid, did, (pdev >> 16) & 0xff,
1942                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1943                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1944                 printf("OHCI regs address 0x%08x\n", base);
1945                 gohci.regs = (struct ohci_regs *)base;
1946         } else
1947                 return -1;
1948 #else
1949         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1950 #endif
1951
1952         gohci.flags = 0;
1953         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1954
1955         if (hc_reset(&gohci) < 0) {
1956                 hc_release_ohci(&gohci);
1957                 err("can't reset usb-%s", gohci.slot_name);
1958 #ifdef CFG_USB_OHCI_BOARD_INIT
1959                 /* board dependant cleanup */
1960                 usb_board_init_fail();
1961 #endif
1962
1963 #ifdef CFG_USB_OHCI_CPU_INIT
1964                 /* cpu dependant cleanup */
1965                 usb_cpu_init_fail();
1966 #endif
1967                 return -1;
1968         }
1969
1970         if (hc_start(&gohci) < 0) {
1971                 err("can't start usb-%s", gohci.slot_name);
1972                 hc_release_ohci(&gohci);
1973                 /* Initialization failed */
1974 #ifdef CFG_USB_OHCI_BOARD_INIT
1975                 /* board dependant cleanup */
1976                 usb_board_stop();
1977 #endif
1978
1979 #ifdef CFG_USB_OHCI_CPU_INIT
1980                 /* cpu dependant cleanup */
1981                 usb_cpu_stop();
1982 #endif
1983                 return -1;
1984         }
1985
1986 #ifdef  DEBUG
1987         ohci_dump(&gohci, 1);
1988 #else
1989         wait_ms(1);
1990 #endif
1991         ohci_inited = 1;
1992         return 0;
1993 }
1994
1995 int usb_lowlevel_stop(void)
1996 {
1997         /* this gets called really early - before the controller has */
1998         /* even been initialized! */
1999         if (!ohci_inited)
2000                 return 0;
2001         /* TODO release any interrupts, etc. */
2002         /* call hc_release_ohci() here ? */
2003         hc_reset(&gohci);
2004
2005 #ifdef CFG_USB_OHCI_BOARD_INIT
2006         /* board dependant cleanup */
2007         if (usb_board_stop())
2008                 return -1;
2009 #endif
2010
2011 #ifdef CFG_USB_OHCI_CPU_INIT
2012         /* cpu dependant cleanup */
2013         if (usb_cpu_stop())
2014                 return -1;
2015 #endif
2016         /* This driver is no longer initialised. It needs a new low-level
2017          * init (board/cpu) before it can be used again. */
2018         ohci_inited = 0;
2019         return 0;
2020 }
2021 #endif /* CONFIG_USB_OHCI_NEW */