drivers/usb/usb_ohci.c

   1 /*
   2  * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
   3  *
   4  * Interrupt support is added. Now, it has been tested
   5  * on ULI1575 chip and works well with USB keyboard.
   6  *
   7  * (C) Copyright 2007
   8  * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
   9  *
  10  * (C) Copyright 2003
  11  * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  12  *
  13  * Note: Much of this code has been derived from Linux 2.4
  14  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  15  * (C) Copyright 2000-2002 David Brownell
  16  *
  17  * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
  18  * ebenard@eukrea.com - based on s3c24x0's driver
  19  *
  20  * See file CREDITS for list of people who contributed to this
  21  * project.
  22  *
  23  * This program is free software; you can redistribute it and/or
  24  * modify it under the terms of the GNU General Public License as
  25  * published by the Free Software Foundation; either version 2 of
  26  * the License, or (at your option) any later version.
  27  *
  28  * This program is distributed in the hope that it will be useful,
  29  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  30  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  31  * GNU General Public License for more details.
  32  *
  33  * You should have received a copy of the GNU General Public License
  34  * along with this program; if not, write to the Free Software
  35  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  36  * MA 02111-1307 USA
  37  *
  38  */
  39 /*
  40  * IMPORTANT NOTES
  41  * 1 - Read doc/README.generic_usb_ohci
  42  * 2 - this driver is intended for use with USB Mass Storage Devices
  43  *     (BBB) and USB keyboard. There is NO support for Isochronous pipes!
  44  * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
  45  *     to activate workaround for bug #41 or this driver will NOT work!
  46  */
  47
  48 #include <common.h>
  49
  50 #ifdef CONFIG_USB_OHCI_NEW
  51
  52 #include <asm/byteorder.h>
  53
  54 #if defined(CONFIG_PCI_OHCI)
  55 # include <pci.h>
  56 #endif
  57
  58 #include <malloc.h>
  59 #include <usb.h>
  60 #include "usb_ohci.h"
  61
  62 #ifdef CONFIG_AT91RM9200
  63 #include <asm/arch/hardware.h>  /* needed for AT91_USB_HOST_BASE */
  64 #endif
  65
  66 #if defined(CONFIG_ARM920T) || \
  67     defined(CONFIG_S3C2400) || \
  68     defined(CONFIG_S3C2410) || \
  69     defined(CONFIG_440EP) || \
  70     defined(CONFIG_PCI_OHCI) || \
  71     defined(CONFIG_MPC5200) || \
  72     defined(CFG_OHCI_USE_NPS)
  73 # define OHCI_USE_NPS           /* force NoPowerSwitching mode */
  74 #endif
  75
  76 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
  77 #undef DEBUG
  78 #undef SHOW_INFO
  79 #undef OHCI_FILL_TRACE
  80
  81 /* For initializing controller (mask in an HCFS mode too) */
  82 #define OHCI_CONTROL_INIT \
  83         (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  84
  85 /*
  86  * e.g. PCI controllers need this
  87  */
  88 #ifdef CFG_OHCI_SWAP_REG_ACCESS
  89 # define readl(a) __swap_32(*((volatile u32 *)(a)))
  90 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
  91 #else
  92 # define readl(a) (*((volatile u32 *)(a)))
  93 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
  94 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
  95
  96 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  97
  98 #ifdef CONFIG_PCI_OHCI
  99 static struct pci_device_id ohci_pci_ids[] = {
 100         {0x10b9, 0x5237},       /* ULI1575 PCI OHCI module ids */
 101         {0x1033, 0x0035},       /* NEC PCI OHCI module ids */
 102         {0x1131, 0x1561},       /* Philips 1561 PCI OHCI module ids */
 103         /* Please add supported PCI OHCI controller ids here */
 104         {0, 0}
 105 };
 106 #endif
 107
 108 #ifdef DEBUG
 109 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
 110 #else
 111 #define dbg(format, arg...) do {} while(0)
 112 #endif /* DEBUG */
 113 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
 114 #ifdef SHOW_INFO
 115 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
 116 #else
 117 #define info(format, arg...) do {} while(0)
 118 #endif
 119
 120 #ifdef CFG_OHCI_BE_CONTROLLER
 121 # define m16_swap(x) cpu_to_be16(x)
 122 # define m32_swap(x) cpu_to_be32(x)
 123 #else
 124 # define m16_swap(x) cpu_to_le16(x)
 125 # define m32_swap(x) cpu_to_le32(x)
 126 #endif /* CFG_OHCI_BE_CONTROLLER */
 127
 128 /* global ohci_t */
 129 static ohci_t gohci;
 130 /* this must be aligned to a 256 byte boundary */
 131 struct ohci_hcca ghcca[1];
 132 /* a pointer to the aligned storage */
 133 struct ohci_hcca *phcca;
 134 /* this allocates EDs for all possible endpoints */
 135 struct ohci_device ohci_dev;
 136 /* RHSC flag */
 137 int got_rhsc;
 138 /* device which was disconnected */
 139 struct usb_device *devgone;
 140
 141 static inline u32 roothub_a (struct ohci *hc)
 142         { return readl (&hc->regs->roothub.a); }
 143 static inline u32 roothub_b (struct ohci *hc)
 144         { return readl (&hc->regs->roothub.b); }
 145 static inline u32 roothub_status (struct ohci *hc)
 146         { return readl (&hc->regs->roothub.status); }
 147 static inline u32 roothub_portstatus (struct ohci *hc, int i)
 148         { return readl (&hc->regs->roothub.portstatus[i]); }
 149
 150 /* forward declaration */
 151 static int hc_interrupt (void);
 152 static void
 153 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
 154         int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
 155
 156 /*-------------------------------------------------------------------------*
 157  * URB support functions
 158  *-------------------------------------------------------------------------*/
 159
 160 /* free HCD-private data associated with this URB */
 161
 162 static void urb_free_priv (urb_priv_t * urb)
 163 {
 164         int             i;
 165         int             last;
 166         struct td       * td;
 167
 168         last = urb->length - 1;
 169         if (last >= 0) {
 170                 for (i = 0; i <= last; i++) {
 171                         td = urb->td[i];
 172                         if (td) {
 173                                 td->usb_dev = NULL;
 174                                 urb->td[i] = NULL;
 175                         }
 176                 }
 177         }
 178         free(urb);
 179 }
 180
 181 /*-------------------------------------------------------------------------*/
 182
 183 #ifdef DEBUG
 184 static int sohci_get_current_frame_number (struct usb_device * dev);
 185
 186 /* debug| print the main components of an URB
 187  * small: 0) header + data packets 1) just header */
 188
 189 static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
 190         unsigned long pipe, void * buffer,
 191         int transfer_len, struct devrequest * setup, char * str, int small)
 192 {
 193         dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
 194                         str,
 195                         sohci_get_current_frame_number (dev),
 196                         usb_pipedevice (pipe),
 197                         usb_pipeendpoint (pipe),
 198                         usb_pipeout (pipe)? 'O': 'I',
 199                         usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 200                                 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 201                         (purb ? purb->actual_length : 0),
 202                         transfer_len, dev->status);
 203 #ifdef  OHCI_VERBOSE_DEBUG
 204         if (!small) {
 205                 int i, len;
 206
 207                 if (usb_pipecontrol (pipe)) {
 208                         printf (__FILE__ ": cmd(8):");
 209                         for (i = 0; i < 8 ; i++)
 210                                 printf (" %02x", ((__u8 *) setup) [i]);
 211                         printf ("\n");
 212                 }
 213                 if (transfer_len > 0 && buffer) {
 214                         printf (__FILE__ ": data(%d/%d):",
 215                                 (purb ? purb->actual_length : 0),
 216                                 transfer_len);
 217                         len = usb_pipeout (pipe)?
 218                                         transfer_len:
 219                                         (purb ? purb->actual_length : 0);
 220                         for (i = 0; i < 16 && i < len; i++)
 221                                 printf (" %02x", ((__u8 *) buffer) [i]);
 222                         printf ("%s\n", i < len? "...": "");
 223                 }
 224         }
 225 #endif
 226 }
 227
 228 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 229 void ep_print_int_eds (ohci_t *ohci, char * str) {
 230         int i, j;
 231          __u32 * ed_p;
 232         for (i= 0; i < 32; i++) {
 233                 j = 5;
 234                 ed_p = &(ohci->hcca->int_table [i]);
 235                 if (*ed_p == 0)
 236                     continue;
 237                 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
 238                 while (*ed_p != 0 && j--) {
 239                         ed_t *ed = (ed_t *)m32_swap(ed_p);
 240                         printf (" ed: %4x;", ed->hwINFO);
 241                         ed_p = &ed->hwNextED;
 242                 }
 243                 printf ("\n");
 244         }
 245 }
 246
 247 static void ohci_dump_intr_mask (char *label, __u32 mask)
 248 {
 249         dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 250                 label,
 251                 mask,
 252                 (mask & OHCI_INTR_MIE) ? " MIE" : "",
 253                 (mask & OHCI_INTR_OC) ? " OC" : "",
 254                 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 255                 (mask & OHCI_INTR_FNO) ? " FNO" : "",
 256                 (mask & OHCI_INTR_UE) ? " UE" : "",
 257                 (mask & OHCI_INTR_RD) ? " RD" : "",
 258                 (mask & OHCI_INTR_SF) ? " SF" : "",
 259                 (mask & OHCI_INTR_WDH) ? " WDH" : "",
 260                 (mask & OHCI_INTR_SO) ? " SO" : ""
 261                 );
 262 }
 263
 264 static void maybe_print_eds (char *label, __u32 value)
 265 {
 266         ed_t *edp = (ed_t *)value;
 267
 268         if (value) {
 269                 dbg ("%s %08x", label, value);
 270                 dbg ("%08x", edp->hwINFO);
 271                 dbg ("%08x", edp->hwTailP);
 272                 dbg ("%08x", edp->hwHeadP);
 273                 dbg ("%08x", edp->hwNextED);
 274         }
 275 }
 276
 277 static char * hcfs2string (int state)
 278 {
 279         switch (state) {
 280                 case OHCI_USB_RESET:    return "reset";
 281                 case OHCI_USB_RESUME:   return "resume";
 282                 case OHCI_USB_OPER:     return "operational";
 283                 case OHCI_USB_SUSPEND:  return "suspend";
 284         }
 285         return "?";
 286 }
 287
 288 /* dump control and status registers */
 289 static void ohci_dump_status (ohci_t *controller)
 290 {
 291         struct ohci_regs        *regs = controller->regs;
 292         __u32                   temp;
 293
 294         temp = readl (&regs->revision) & 0xff;
 295         if (temp != 0x10)
 296                 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 297
 298         temp = readl (&regs->control);
 299         dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 300                 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 301                 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 302                 (temp & OHCI_CTRL_IR) ? " IR" : "",
 303                 hcfs2string (temp & OHCI_CTRL_HCFS),
 304                 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 305                 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 306                 (temp & OHCI_CTRL_IE) ? " IE" : "",
 307                 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 308                 temp & OHCI_CTRL_CBSR
 309                 );
 310
 311         temp = readl (&regs->cmdstatus);
 312         dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 313                 (temp & OHCI_SOC) >> 16,
 314                 (temp & OHCI_OCR) ? " OCR" : "",
 315                 (temp & OHCI_BLF) ? " BLF" : "",
 316                 (temp & OHCI_CLF) ? " CLF" : "",
 317                 (temp & OHCI_HCR) ? " HCR" : ""
 318                 );
 319
 320         ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 321         ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 322
 323         maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 324
 325         maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 326         maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 327
 328         maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 329         maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 330
 331         maybe_print_eds ("donehead", readl (&regs->donehead));
 332 }
 333
 334 static void ohci_dump_roothub (ohci_t *controller, int verbose)
 335 {
 336         __u32                   temp, ndp, i;
 337
 338         temp = roothub_a (controller);
 339         ndp = (temp & RH_A_NDP);
 340 #ifdef CONFIG_AT91C_PQFP_UHPBUG
 341         ndp = (ndp == 2) ? 1:0;
 342 #endif
 343         if (verbose) {
 344                 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 345                         ((temp & RH_A_POTPGT) >> 24) & 0xff,
 346                         (temp & RH_A_NOCP) ? " NOCP" : "",
 347                         (temp & RH_A_OCPM) ? " OCPM" : "",
 348                         (temp & RH_A_DT) ? " DT" : "",
 349                         (temp & RH_A_NPS) ? " NPS" : "",
 350                         (temp & RH_A_PSM) ? " PSM" : "",
 351                         ndp
 352                         );
 353                 temp = roothub_b (controller);
 354                 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 355                         temp,
 356                         (temp & RH_B_PPCM) >> 16,
 357                         (temp & RH_B_DR)
 358                         );
 359                 temp = roothub_status (controller);
 360                 dbg ("roothub.status: %08x%s%s%s%s%s%s",
 361                         temp,
 362                         (temp & RH_HS_CRWE) ? " CRWE" : "",
 363                         (temp & RH_HS_OCIC) ? " OCIC" : "",
 364                         (temp & RH_HS_LPSC) ? " LPSC" : "",
 365                         (temp & RH_HS_DRWE) ? " DRWE" : "",
 366                         (temp & RH_HS_OCI) ? " OCI" : "",
 367                         (temp & RH_HS_LPS) ? " LPS" : ""
 368                         );
 369         }
 370
 371         for (i = 0; i < ndp; i++) {
 372                 temp = roothub_portstatus (controller, i);
 373                 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 374                         i,
 375                         temp,
 376                         (temp & RH_PS_PRSC) ? " PRSC" : "",
 377                         (temp & RH_PS_OCIC) ? " OCIC" : "",
 378                         (temp & RH_PS_PSSC) ? " PSSC" : "",
 379                         (temp & RH_PS_PESC) ? " PESC" : "",
 380                         (temp & RH_PS_CSC) ? " CSC" : "",
 381
 382                         (temp & RH_PS_LSDA) ? " LSDA" : "",
 383                         (temp & RH_PS_PPS) ? " PPS" : "",
 384                         (temp & RH_PS_PRS) ? " PRS" : "",
 385                         (temp & RH_PS_POCI) ? " POCI" : "",
 386                         (temp & RH_PS_PSS) ? " PSS" : "",
 387
 388                         (temp & RH_PS_PES) ? " PES" : "",
 389                         (temp & RH_PS_CCS) ? " CCS" : ""
 390                         );
 391         }
 392 }
 393
 394 static void ohci_dump (ohci_t *controller, int verbose)
 395 {
 396         dbg ("OHCI controller usb-%s state", controller->slot_name);
 397
 398         /* dumps some of the state we know about */
 399         ohci_dump_status (controller);
 400         if (verbose)
 401                 ep_print_int_eds (controller, "hcca");
 402         dbg ("hcca frame #%04x", controller->hcca->frame_no);
 403         ohci_dump_roothub (controller, 1);
 404 }
 405 #endif /* DEBUG */
 406
 407 /*-------------------------------------------------------------------------*
 408  * Interface functions (URB)
 409  *-------------------------------------------------------------------------*/
 410
 411 /* get a transfer request */
 412
 413 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
 414 {
 415         ohci_t *ohci;
 416         ed_t * ed;
 417         urb_priv_t *purb_priv = urb;
 418         int i, size = 0;
 419         struct usb_device *dev = urb->dev;
 420         unsigned long pipe = urb->pipe;
 421         void *buffer = urb->transfer_buffer;
 422         int transfer_len = urb->transfer_buffer_length;
 423         int interval = urb->interval;
 424
 425         ohci = &gohci;
 426
 427         /* when controller's hung, permit only roothub cleanup attempts
 428          * such as powering down ports */
 429         if (ohci->disabled) {
 430                 err("sohci_submit_job: EPIPE");
 431                 return -1;
 432         }
 433
 434         /* we're about to begin a new transaction here so mark the URB unfinished */
 435         urb->finished = 0;
 436
 437         /* every endpoint has a ed, locate and fill it */
 438         if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
 439                 err("sohci_submit_job: ENOMEM");
 440                 return -1;
 441         }
 442
 443         /* for the private part of the URB we need the number of TDs (size) */
 444         switch (usb_pipetype (pipe)) {
 445                 case PIPE_BULK: /* one TD for every 4096 Byte */
 446                         size = (transfer_len - 1) / 4096 + 1;
 447                         break;
 448                 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 449                         size = (transfer_len == 0)? 2:
 450                                                 (transfer_len - 1) / 4096 + 3;
 451                         break;
 452                 case PIPE_INTERRUPT: /* 1 TD */
 453                         size = 1;
 454                         break;
 455         }
 456
 457         ed->purb = urb;
 458
 459         if (size >= (N_URB_TD - 1)) {
 460                 err("need %d TDs, only have %d", size, N_URB_TD);
 461                 return -1;
 462         }
 463         purb_priv->pipe = pipe;
 464
 465         /* fill the private part of the URB */
 466         purb_priv->length = size;
 467         purb_priv->ed = ed;
 468         purb_priv->actual_length = 0;
 469
 470         /* allocate the TDs */
 471         /* note that td[0] was allocated in ep_add_ed */
 472         for (i = 0; i < size; i++) {
 473                 purb_priv->td[i] = td_alloc (dev);
 474                 if (!purb_priv->td[i]) {
 475                         purb_priv->length = i;
 476                         urb_free_priv (purb_priv);
 477                         err("sohci_submit_job: ENOMEM");
 478                         return -1;
 479                 }
 480         }
 481
 482         if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 483                 urb_free_priv (purb_priv);
 484                 err("sohci_submit_job: EINVAL");
 485                 return -1;
 486         }
 487
 488         /* link the ed into a chain if is not already */
 489         if (ed->state != ED_OPER)
 490                 ep_link (ohci, ed);
 491
 492         /* fill the TDs and link it to the ed */
 493         td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
 494
 495         return 0;
 496 }
 497
 498 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
 499 {
 500         struct ohci_regs *regs = hc->regs;
 501
 502         switch (usb_pipetype (urb->pipe)) {
 503         case PIPE_INTERRUPT:
 504                 /* implicitly requeued */
 505                 if (urb->dev->irq_handle &&
 506                                 (urb->dev->irq_act_len = urb->actual_length)) {
 507                         writel (OHCI_INTR_WDH, &regs->intrenable);
 508                         readl (&regs->intrenable); /* PCI posting flush */
 509                         urb->dev->irq_handle(urb->dev);
 510                         writel (OHCI_INTR_WDH, &regs->intrdisable);
 511                         readl (&regs->intrdisable); /* PCI posting flush */
 512                 }
 513                 urb->actual_length = 0;
 514                 td_submit_job (
 515                                 urb->dev,
 516                                 urb->pipe,
 517                                 urb->transfer_buffer,
 518                                 urb->transfer_buffer_length,
 519                                 NULL,
 520                                 urb,
 521                                 urb->interval);
 522                 break;
 523         case PIPE_CONTROL:
 524         case PIPE_BULK:
 525                 break;
 526         default:
 527                 return 0;
 528         }
 529         return 1;
 530 }
 531
 532 /*-------------------------------------------------------------------------*/
 533
 534 #ifdef DEBUG
 535 /* tell us the current USB frame number */
 536
 537 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
 538 {
 539         ohci_t *ohci = &gohci;
 540
 541         return m16_swap (ohci->hcca->frame_no);
 542 }
 543 #endif
 544
 545 /*-------------------------------------------------------------------------*
 546  * ED handling functions
 547  *-------------------------------------------------------------------------*/
 548
 549 /* search for the right branch to insert an interrupt ed into the int tree
 550  * do some load ballancing;
 551  * returns the branch and
 552  * sets the interval to interval = 2^integer (ld (interval)) */
 553
 554 static int ep_int_ballance (ohci_t * ohci, int interval, int load)
 555 {
 556         int i, branch = 0;
 557
 558         /* search for the least loaded interrupt endpoint
 559          * branch of all 32 branches
 560          */
 561         for (i = 0; i < 32; i++)
 562                 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
 563                         branch = i;
 564
 565         branch = branch % interval;
 566         for (i = branch; i < 32; i += interval)
 567                 ohci->ohci_int_load [i] += load;
 568
 569         return branch;
 570 }
 571
 572 /*-------------------------------------------------------------------------*/
 573
 574 /*  2^int( ld (inter)) */
 575
 576 static int ep_2_n_interval (int inter)
 577 {
 578         int i;
 579         for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
 580         return 1 << i;
 581 }
 582
 583 /*-------------------------------------------------------------------------*/
 584
 585 /* the int tree is a binary tree
 586  * in order to process it sequentially the indexes of the branches have to be mapped
 587  * the mapping reverses the bits of a word of num_bits length */
 588
 589 static int ep_rev (int num_bits, int word)
 590 {
 591         int i, wout = 0;
 592
 593         for (i = 0; i < num_bits; i++)
 594                 wout |= (((word >> i) & 1) << (num_bits - i - 1));
 595         return wout;
 596 }
 597
 598 /*-------------------------------------------------------------------------*
 599  * ED handling functions
 600  *-------------------------------------------------------------------------*/
 601
 602 /* link an ed into one of the HC chains */
 603
 604 static int ep_link (ohci_t *ohci, ed_t *edi)
 605 {
 606         volatile ed_t *ed = edi;
 607         int int_branch;
 608         int i;
 609         int inter;
 610         int interval;
 611         int load;
 612         __u32 * ed_p;
 613
 614         ed->state = ED_OPER;
 615         ed->int_interval = 0;
 616
 617         switch (ed->type) {
 618         case PIPE_CONTROL:
 619                 ed->hwNextED = 0;
 620                 if (ohci->ed_controltail == NULL) {
 621                         writel (ed, &ohci->regs->ed_controlhead);
 622                 } else {
 623                         ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
 624                 }
 625                 ed->ed_prev = ohci->ed_controltail;
 626                 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
 627                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 628                         ohci->hc_control |= OHCI_CTRL_CLE;
 629                         writel (ohci->hc_control, &ohci->regs->control);
 630                 }
 631                 ohci->ed_controltail = edi;
 632                 break;
 633
 634         case PIPE_BULK:
 635                 ed->hwNextED = 0;
 636                 if (ohci->ed_bulktail == NULL) {
 637                         writel (ed, &ohci->regs->ed_bulkhead);
 638                 } else {
 639                         ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
 640                 }
 641                 ed->ed_prev = ohci->ed_bulktail;
 642                 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
 643                         !ohci->ed_rm_list[1] && !ohci->sleeping) {
 644                         ohci->hc_control |= OHCI_CTRL_BLE;
 645                         writel (ohci->hc_control, &ohci->regs->control);
 646                 }
 647                 ohci->ed_bulktail = edi;
 648                 break;
 649
 650         case PIPE_INTERRUPT:
 651                 load = ed->int_load;
 652                 interval = ep_2_n_interval (ed->int_period);
 653                 ed->int_interval = interval;
 654                 int_branch = ep_int_ballance (ohci, interval, load);
 655                 ed->int_branch = int_branch;
 656
 657                 for (i = 0; i < ep_rev (6, interval); i += inter) {
 658                         inter = 1;
 659                         for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
 660                                 (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
 661                                 ed_p = &(((ed_t *)ed_p)->hwNextED))
 662                                         inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
 663                         ed->hwNextED = *ed_p;
 664                         *ed_p = m32_swap((unsigned long)ed);
 665                 }
 666                 break;
 667         }
 668         return 0;
 669 }
 670
 671 /*-------------------------------------------------------------------------*/
 672
 673 /* scan the periodic table to find and unlink this ED */
 674 static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
 675                 unsigned index, unsigned period)
 676 {
 677         for (; index < NUM_INTS; index += period) {
 678                 __u32   *ed_p = &ohci->hcca->int_table [index];
 679
 680                 /* ED might have been unlinked through another path */
 681                 while (*ed_p != 0) {
 682                         if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
 683                                 *ed_p = ed->hwNextED;
 684                                 break;
 685                         }
 686                         ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
 687                 }
 688         }
 689 }
 690
 691 /* unlink an ed from one of the HC chains.
 692  * just the link to the ed is unlinked.
 693  * the link from the ed still points to another operational ed or 0
 694  * so the HC can eventually finish the processing of the unlinked ed */
 695
 696 static int ep_unlink (ohci_t *ohci, ed_t *edi)
 697 {
 698         volatile ed_t *ed = edi;
 699         int i;
 700
 701         ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
 702
 703         switch (ed->type) {
 704         case PIPE_CONTROL:
 705                 if (ed->ed_prev == NULL) {
 706                         if (!ed->hwNextED) {
 707                                 ohci->hc_control &= ~OHCI_CTRL_CLE;
 708                                 writel (ohci->hc_control, &ohci->regs->control);
 709                         }
 710                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
 711                 } else {
 712                         ed->ed_prev->hwNextED = ed->hwNextED;
 713                 }
 714                 if (ohci->ed_controltail == ed) {
 715                         ohci->ed_controltail = ed->ed_prev;
 716                 } else {
 717                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 718                 }
 719                 break;
 720
 721         case PIPE_BULK:
 722                 if (ed->ed_prev == NULL) {
 723                         if (!ed->hwNextED) {
 724                                 ohci->hc_control &= ~OHCI_CTRL_BLE;
 725                                 writel (ohci->hc_control, &ohci->regs->control);
 726                         }
 727                         writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
 728                 } else {
 729                         ed->ed_prev->hwNextED = ed->hwNextED;
 730                 }
 731                 if (ohci->ed_bulktail == ed) {
 732                         ohci->ed_bulktail = ed->ed_prev;
 733                 } else {
 734                         ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
 735                 }
 736                 break;
 737
 738         case PIPE_INTERRUPT:
 739                 periodic_unlink (ohci, ed, 0, 1);
 740                 for (i = ed->int_branch; i < 32; i += ed->int_interval)
 741                     ohci->ohci_int_load[i] -= ed->int_load;
 742                 break;
 743         }
 744         ed->state = ED_UNLINK;
 745         return 0;
 746 }
 747
 748 /*-------------------------------------------------------------------------*/
 749
 750 /* add/reinit an endpoint; this should be done once at the
 751  * usb_set_configuration command, but the USB stack is a little bit
 752  * stateless so we do it at every transaction if the state of the ed
 753  * is ED_NEW then a dummy td is added and the state is changed to
 754  * ED_UNLINK in all other cases the state is left unchanged the ed
 755  * info fields are setted anyway even though most of them should not
 756  * change
 757  */
 758 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
 759                 int interval, int load)
 760 {
 761         td_t *td;
 762         ed_t *ed_ret;
 763         volatile ed_t *ed;
 764
 765         ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
 766                         (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
 767
 768         if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
 769                 err("ep_add_ed: pending delete");
 770                 /* pending delete request */
 771                 return NULL;
 772         }
 773
 774         if (ed->state == ED_NEW) {
 775                 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 776                 /* dummy td; end of td list for ed */
 777                 td = td_alloc (usb_dev);
 778                 ed->hwTailP = m32_swap ((unsigned long)td);
 779                 ed->hwHeadP = ed->hwTailP;
 780                 ed->state = ED_UNLINK;
 781                 ed->type = usb_pipetype (pipe);
 782                 ohci_dev.ed_cnt++;
 783         }
 784
 785         ed->hwINFO = m32_swap (usb_pipedevice (pipe)
 786                         | usb_pipeendpoint (pipe) << 7
 787                         | (usb_pipeisoc (pipe)? 0x8000: 0)
 788                         | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
 789                         | usb_pipeslow (pipe) << 13
 790                         | usb_maxpacket (usb_dev, pipe) << 16);
 791
 792         if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
 793                 ed->int_period = interval;
 794                 ed->int_load = load;
 795         }
 796
 797         return ed_ret;
 798 }
 799
 800 /*-------------------------------------------------------------------------*
 801  * TD handling functions
 802  *-------------------------------------------------------------------------*/
 803
 804 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
 805
 806 static void td_fill (ohci_t *ohci, unsigned int info,
 807         void *data, int len,
 808         struct usb_device *dev, int index, urb_priv_t *urb_priv)
 809 {
 810         volatile td_t  *td, *td_pt;
 811 #ifdef OHCI_FILL_TRACE
 812         int i;
 813 #endif
 814
 815         if (index > urb_priv->length) {
 816                 err("index > length");
 817                 return;
 818         }
 819         /* use this td as the next dummy */
 820         td_pt = urb_priv->td [index];
 821         td_pt->hwNextTD = 0;
 822
 823         /* fill the old dummy TD */
 824         td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
 825
 826         td->ed = urb_priv->ed;
 827         td->next_dl_td = NULL;
 828         td->index = index;
 829         td->data = (__u32)data;
 830 #ifdef OHCI_FILL_TRACE
 831         if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
 832                 for (i = 0; i < len; i++)
 833                 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
 834                 printf("\n");
 835         }
 836 #endif
 837         if (!len)
 838                 data = 0;
 839
 840         td->hwINFO = m32_swap (info);
 841         td->hwCBP = m32_swap ((unsigned long)data);
 842         if (data)
 843                 td->hwBE = m32_swap ((unsigned long)(data + len - 1));
 844         else
 845                 td->hwBE = 0;
 846         td->hwNextTD = m32_swap ((unsigned long)td_pt);
 847
 848         /* append to queue */
 849         td->ed->hwTailP = td->hwNextTD;
 850 }
 851
 852 /*-------------------------------------------------------------------------*/
 853
 854 /* prepare all TDs of a transfer */
 855
 856 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
 857         int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
 858 {
 859         ohci_t *ohci = &gohci;
 860         int data_len = transfer_len;
 861         void *data;
 862         int cnt = 0;
 863         __u32 info = 0;
 864         unsigned int toggle = 0;
 865
 866         /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
 867         if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
 868                 toggle = TD_T_TOGGLE;
 869         } else {
 870                 toggle = TD_T_DATA0;
 871                 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
 872         }
 873         urb->td_cnt = 0;
 874         if (data_len)
 875                 data = buffer;
 876         else
 877                 data = 0;
 878
 879         switch (usb_pipetype (pipe)) {
 880         case PIPE_BULK:
 881                 info = usb_pipeout (pipe)?
 882                         TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
 883                 while(data_len > 4096) {
 884                         td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
 885                         data += 4096; data_len -= 4096; cnt++;
 886                 }
 887                 info = usb_pipeout (pipe)?
 888                         TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
 889                 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
 890                 cnt++;
 891
 892                 if (!ohci->sleeping)
 893                         writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
 894                 break;
 895
 896         case PIPE_CONTROL:
 897                 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
 898                 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
 899                 if (data_len > 0) {
 900                         info = usb_pipeout (pipe)?
 901                                 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
 902                         /* NOTE:  mishandles transfers >8K, some >4K */
 903                         td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 904                 }
 905                 info = usb_pipeout (pipe)?
 906                         TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
 907                 td_fill (ohci, info, data, 0, dev, cnt++, urb);
 908                 if (!ohci->sleeping)
 909                         writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
 910                 break;
 911
 912         case PIPE_INTERRUPT:
 913                 info = usb_pipeout (urb->pipe)?
 914                         TD_CC | TD_DP_OUT | toggle:
 915                         TD_CC | TD_R | TD_DP_IN | toggle;
 916                 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
 917                 break;
 918         }
 919         if (urb->length != cnt)
 920                 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
 921 }
 922
 923 /*-------------------------------------------------------------------------*
 924  * Done List handling functions
 925  *-------------------------------------------------------------------------*/
 926
 927 /* calculate the transfer length and update the urb */
 928
 929 static void dl_transfer_length(td_t * td)
 930 {
 931         __u32 tdINFO, tdBE, tdCBP;
 932         urb_priv_t *lurb_priv = td->ed->purb;
 933
 934         tdINFO = m32_swap (td->hwINFO);
 935         tdBE   = m32_swap (td->hwBE);
 936         tdCBP  = m32_swap (td->hwCBP);
 937
 938         if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
 939             ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
 940                 if (tdBE != 0) {
 941                         if (td->hwCBP == 0)
 942                                 lurb_priv->actual_length += tdBE - td->data + 1;
 943                         else
 944                                 lurb_priv->actual_length += tdCBP - td->data;
 945                 }
 946         }
 947 }
 948
 949 /*-------------------------------------------------------------------------*/
 950
 951 /* replies to the request have to be on a FIFO basis so
 952  * we reverse the reversed done-list */
 953
 954 static td_t * dl_reverse_done_list (ohci_t *ohci)
 955 {
 956         __u32 td_list_hc;
 957         td_t *td_rev = NULL;
 958         td_t *td_list = NULL;
 959         urb_priv_t *lurb_priv = NULL;
 960
 961         td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
 962         ohci->hcca->done_head = 0;
 963
 964         while (td_list_hc) {
 965                 td_list = (td_t *)td_list_hc;
 966
 967                 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
 968                         lurb_priv = td_list->ed->purb;
 969                         dbg(" USB-error/status: %x : %p",
 970                                         TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
 971                         if (td_list->ed->hwHeadP & m32_swap (0x1)) {
 972                                 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
 973                                         td_list->ed->hwHeadP =
 974                                                 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
 975                                                                         (td_list->ed->hwHeadP & m32_swap (0x2));
 976                                         lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
 977                                 } else
 978                                         td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
 979                         }
 980 #ifdef CONFIG_MPC5200
 981                         td_list->hwNextTD = 0;
 982 #endif
 983                 }
 984
 985                 td_list->next_dl_td = td_rev;
 986                 td_rev = td_list;
 987                 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
 988         }
 989         return td_list;
 990 }
 991
 992 /*-------------------------------------------------------------------------*/
 993
 994 /* td done list */
 995 static int dl_done_list (ohci_t *ohci, td_t *td_list)
 996 {
 997         td_t *td_list_next = NULL;
 998         ed_t *ed;
 999         int cc = 0;
1000         int stat = 0;
1001         /* urb_t *urb; */
1002         urb_priv_t *lurb_priv;
1003         __u32 tdINFO, edHeadP, edTailP;
1004
1005         while (td_list) {
1006                 td_list_next = td_list->next_dl_td;
1007
1008                 tdINFO = m32_swap (td_list->hwINFO);
1009
1010                 ed = td_list->ed;
1011                 lurb_priv = ed->purb;
1012
1013                 dl_transfer_length(td_list);
1014
1015                 /* error code of transfer */
1016                 cc = TD_CC_GET (tdINFO);
1017                 if (cc != 0) {
1018                         dbg("ConditionCode %#x", cc);
1019                         stat = cc_to_error[cc];
1020                 }
1021
1022                 /* see if this done list makes for all TD's of current URB,
1023                  * and mark the URB finished if so */
1024                 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
1025 #if 1
1026                         if ((ed->state & (ED_OPER | ED_UNLINK)) &&
1027                             (lurb_priv->state != URB_DEL))
1028 #else
1029                         if ((ed->state & (ED_OPER | ED_UNLINK)))
1030 #endif
1031                                 lurb_priv->finished = sohci_return_job(ohci,
1032                                                 lurb_priv);
1033                         else
1034                                 dbg("dl_done_list: strange.., ED state %x, ed->state\n");
1035                 } else
1036                         dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
1037                                 lurb_priv->length);
1038                 if (ed->state != ED_NEW &&
1039                           (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
1040                         edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
1041                         edTailP = m32_swap (ed->hwTailP);
1042
1043                         /* unlink eds if they are not busy */
1044                         if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1045                                 ep_unlink (ohci, ed);
1046                 }
1047
1048                 td_list = td_list_next;
1049         }
1050         return stat;
1051 }
1052
1053 /*-------------------------------------------------------------------------*
1054  * Virtual Root Hub
1055  *-------------------------------------------------------------------------*/
1056
1057 /* Device descriptor */
1058 static __u8 root_hub_dev_des[] =
1059 {
1060         0x12,       /*  __u8  bLength; */
1061         0x01,       /*  __u8  bDescriptorType; Device */
1062         0x10,       /*  __u16 bcdUSB; v1.1 */
1063         0x01,
1064         0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1065         0x00,       /*  __u8  bDeviceSubClass; */
1066         0x00,       /*  __u8  bDeviceProtocol; */
1067         0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1068         0x00,       /*  __u16 idVendor; */
1069         0x00,
1070         0x00,       /*  __u16 idProduct; */
1071         0x00,
1072         0x00,       /*  __u16 bcdDevice; */
1073         0x00,
1074         0x00,       /*  __u8  iManufacturer; */
1075         0x01,       /*  __u8  iProduct; */
1076         0x00,       /*  __u8  iSerialNumber; */
1077         0x01        /*  __u8  bNumConfigurations; */
1078 };
1079
1080 /* Configuration descriptor */
1081 static __u8 root_hub_config_des[] =
1082 {
1083         0x09,       /*  __u8  bLength; */
1084         0x02,       /*  __u8  bDescriptorType; Configuration */
1085         0x19,       /*  __u16 wTotalLength; */
1086         0x00,
1087         0x01,       /*  __u8  bNumInterfaces; */
1088         0x01,       /*  __u8  bConfigurationValue; */
1089         0x00,       /*  __u8  iConfiguration; */
1090         0x40,       /*  __u8  bmAttributes;
1091                  Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1092         0x00,       /*  __u8  MaxPower; */
1093
1094         /* interface */
1095         0x09,       /*  __u8  if_bLength; */
1096         0x04,       /*  __u8  if_bDescriptorType; Interface */
1097         0x00,       /*  __u8  if_bInterfaceNumber; */
1098         0x00,       /*  __u8  if_bAlternateSetting; */
1099         0x01,       /*  __u8  if_bNumEndpoints; */
1100         0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
1101         0x00,       /*  __u8  if_bInterfaceSubClass; */
1102         0x00,       /*  __u8  if_bInterfaceProtocol; */
1103         0x00,       /*  __u8  if_iInterface; */
1104
1105         /* endpoint */
1106         0x07,       /*  __u8  ep_bLength; */
1107         0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
1108         0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
1109         0x03,       /*  __u8  ep_bmAttributes; Interrupt */
1110         0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1111         0x00,
1112         0xff        /*  __u8  ep_bInterval; 255 ms */
1113 };
1114
1115 static unsigned char root_hub_str_index0[] =
1116 {
1117         0x04,                   /*  __u8  bLength; */
1118         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1119         0x09,                   /*  __u8  lang ID */
1120         0x04,                   /*  __u8  lang ID */
1121 };
1122
1123 static unsigned char root_hub_str_index1[] =
1124 {
1125         28,                     /*  __u8  bLength; */
1126         0x03,                   /*  __u8  bDescriptorType; String-descriptor */
1127         'O',                    /*  __u8  Unicode */
1128         0,                              /*  __u8  Unicode */
1129         'H',                    /*  __u8  Unicode */
1130         0,                              /*  __u8  Unicode */
1131         'C',                    /*  __u8  Unicode */
1132         0,                              /*  __u8  Unicode */
1133         'I',                    /*  __u8  Unicode */
1134         0,                              /*  __u8  Unicode */
1135         ' ',                    /*  __u8  Unicode */
1136         0,                              /*  __u8  Unicode */
1137         'R',                    /*  __u8  Unicode */
1138         0,                              /*  __u8  Unicode */
1139         'o',                    /*  __u8  Unicode */
1140         0,                              /*  __u8  Unicode */
1141         'o',                    /*  __u8  Unicode */
1142         0,                              /*  __u8  Unicode */
1143         't',                    /*  __u8  Unicode */
1144         0,                              /*  __u8  Unicode */
1145         ' ',                    /*  __u8  Unicode */
1146         0,                              /*  __u8  Unicode */
1147         'H',                    /*  __u8  Unicode */
1148         0,                              /*  __u8  Unicode */
1149         'u',                    /*  __u8  Unicode */
1150         0,                              /*  __u8  Unicode */
1151         'b',                    /*  __u8  Unicode */
1152         0,                              /*  __u8  Unicode */
1153 };
1154
1155 /* Hub class-specific descriptor is constructed dynamically */
1156
1157 /*-------------------------------------------------------------------------*/
1158
1159 #define OK(x)                   len = (x); break
1160 #ifdef DEBUG
1161 #define WR_RH_STAT(x)           {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
1162 #define WR_RH_PORTSTAT(x)       {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
1163 #else
1164 #define WR_RH_STAT(x)           writel((x), &gohci.regs->roothub.status)
1165 #define WR_RH_PORTSTAT(x)       writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1166 #endif
1167 #define RD_RH_STAT              roothub_status(&gohci)
1168 #define RD_RH_PORTSTAT          roothub_portstatus(&gohci,wIndex-1)
1169
1170 /* request to virtual root hub */
1171
1172 int rh_check_port_status(ohci_t *controller)
1173 {
1174         __u32 temp, ndp, i;
1175         int res;
1176
1177         res = -1;
1178         temp = roothub_a (controller);
1179         ndp = (temp & RH_A_NDP);
1180 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1181         ndp = (ndp == 2) ? 1:0;
1182 #endif
1183         for (i = 0; i < ndp; i++) {
1184                 temp = roothub_portstatus (controller, i);
1185                 /* check for a device disconnect */
1186                 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1187                         (RH_PS_PESC | RH_PS_CSC)) &&
1188                         ((temp & RH_PS_CCS) == 0)) {
1189                         res = i;
1190                         break;
1191                 }
1192         }
1193         return res;
1194 }
1195
1196 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1197                 void *buffer, int transfer_len, struct devrequest *cmd)
1198 {
1199         void * data = buffer;
1200         int leni = transfer_len;
1201         int len = 0;
1202         int stat = 0;
1203         __u32 datab[4];
1204         __u8 *data_buf = (__u8 *)datab;
1205         __u16 bmRType_bReq;
1206         __u16 wValue;
1207         __u16 wIndex;
1208         __u16 wLength;
1209
1210 #ifdef DEBUG
1211 pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1212 #else
1213         wait_ms(1);
1214 #endif
1215         if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1216                 info("Root-Hub submit IRQ: NOT implemented");
1217                 return 0;
1218         }
1219
1220         bmRType_bReq  = cmd->requesttype | (cmd->request << 8);
1221         wValue        = cpu_to_le16 (cmd->value);
1222         wIndex        = cpu_to_le16 (cmd->index);
1223         wLength       = cpu_to_le16 (cmd->length);
1224
1225         info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1226                 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1227
1228         switch (bmRType_bReq) {
1229         /* Request Destination:
1230            without flags: Device,
1231            RH_INTERFACE: interface,
1232            RH_ENDPOINT: endpoint,
1233            RH_CLASS means HUB here,
1234            RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
1235         */
1236
1237         case RH_GET_STATUS:
1238                         *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
1239         case RH_GET_STATUS | RH_INTERFACE:
1240                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1241         case RH_GET_STATUS | RH_ENDPOINT:
1242                         *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
1243         case RH_GET_STATUS | RH_CLASS:
1244                         *(__u32 *) data_buf = cpu_to_le32 (
1245                                 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1246                         OK (4);
1247         case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1248                         *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
1249
1250         case RH_CLEAR_FEATURE | RH_ENDPOINT:
1251                 switch (wValue) {
1252                         case (RH_ENDPOINT_STALL): OK (0);
1253                 }
1254                 break;
1255
1256         case RH_CLEAR_FEATURE | RH_CLASS:
1257                 switch (wValue) {
1258                         case RH_C_HUB_LOCAL_POWER:
1259                                 OK(0);
1260                         case (RH_C_HUB_OVER_CURRENT):
1261                                         WR_RH_STAT(RH_HS_OCIC); OK (0);
1262                 }
1263                 break;
1264
1265         case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1266                 switch (wValue) {
1267                         case (RH_PORT_ENABLE):
1268                                         WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1269                         case (RH_PORT_SUSPEND):
1270                                         WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1271                         case (RH_PORT_POWER):
1272                                         WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1273                         case (RH_C_PORT_CONNECTION):
1274                                         WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1275                         case (RH_C_PORT_ENABLE):
1276                                         WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1277                         case (RH_C_PORT_SUSPEND):
1278                                         WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1279                         case (RH_C_PORT_OVER_CURRENT):
1280                                         WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1281                         case (RH_C_PORT_RESET):
1282                                         WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1283                 }
1284                 break;
1285
1286         case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1287                 switch (wValue) {
1288                         case (RH_PORT_SUSPEND):
1289                                         WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1290                         case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1291                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1292                                             WR_RH_PORTSTAT (RH_PS_PRS);
1293                                         OK (0);
1294                         case (RH_PORT_POWER):
1295                                         WR_RH_PORTSTAT (RH_PS_PPS );
1296                                         wait_ms(100);
1297                                         OK (0);
1298                         case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1299                                         if (RD_RH_PORTSTAT & RH_PS_CCS)
1300                                             WR_RH_PORTSTAT (RH_PS_PES );
1301                                         OK (0);
1302                 }
1303                 break;
1304
1305         case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1306
1307         case RH_GET_DESCRIPTOR:
1308                 switch ((wValue & 0xff00) >> 8) {
1309                         case (0x01): /* device descriptor */
1310                                 len = min_t(unsigned int,
1311                                           leni,
1312                                           min_t(unsigned int,
1313                                               sizeof (root_hub_dev_des),
1314                                               wLength));
1315                                 data_buf = root_hub_dev_des; OK(len);
1316                         case (0x02): /* configuration descriptor */
1317                                 len = min_t(unsigned int,
1318                                           leni,
1319                                           min_t(unsigned int,
1320                                               sizeof (root_hub_config_des),
1321                                               wLength));
1322                                 data_buf = root_hub_config_des; OK(len);
1323                         case (0x03): /* string descriptors */
1324                                 if(wValue==0x0300) {
1325                                         len = min_t(unsigned int,
1326                                                   leni,
1327                                                   min_t(unsigned int,
1328                                                       sizeof (root_hub_str_index0),
1329                                                       wLength));
1330                                         data_buf = root_hub_str_index0;
1331                                         OK(len);
1332                                 }
1333                                 if(wValue==0x0301) {
1334                                         len = min_t(unsigned int,
1335                                                   leni,
1336                                                   min_t(unsigned int,
1337                                                       sizeof (root_hub_str_index1),
1338                                                       wLength));
1339                                         data_buf = root_hub_str_index1;
1340                                         OK(len);
1341                         }
1342                         default:
1343                                 stat = USB_ST_STALLED;
1344                 }
1345                 break;
1346
1347         case RH_GET_DESCRIPTOR | RH_CLASS:
1348         {
1349                 __u32 temp = roothub_a (&gohci);
1350
1351                 data_buf [0] = 9;               /* min length; */
1352                 data_buf [1] = 0x29;
1353                 data_buf [2] = temp & RH_A_NDP;
1354 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1355                 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1356 #endif
1357                 data_buf [3] = 0;
1358                 if (temp & RH_A_PSM)    /* per-port power switching? */
1359                         data_buf [3] |= 0x1;
1360                 if (temp & RH_A_NOCP)   /* no overcurrent reporting? */
1361                         data_buf [3] |= 0x10;
1362                 else if (temp & RH_A_OCPM)      /* per-port overcurrent reporting? */
1363                         data_buf [3] |= 0x8;
1364
1365                 /* corresponds to data_buf[4-7] */
1366                 datab [1] = 0;
1367                 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1368                 temp = roothub_b (&gohci);
1369                 data_buf [7] = temp & RH_B_DR;
1370                 if (data_buf [2] < 7) {
1371                         data_buf [8] = 0xff;
1372                 } else {
1373                         data_buf [0] += 2;
1374                         data_buf [8] = (temp & RH_B_DR) >> 8;
1375                         data_buf [10] = data_buf [9] = 0xff;
1376                 }
1377
1378                 len = min_t(unsigned int, leni,
1379                             min_t(unsigned int, data_buf [0], wLength));
1380                 OK (len);
1381         }
1382
1383         case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
1384
1385         case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
1386
1387         default:
1388                 dbg ("unsupported root hub command");
1389                 stat = USB_ST_STALLED;
1390         }
1391
1392 #ifdef  DEBUG
1393         ohci_dump_roothub (&gohci, 1);
1394 #else
1395         wait_ms(1);
1396 #endif
1397
1398         len = min_t(int, len, leni);
1399         if (data != data_buf)
1400             memcpy (data, data_buf, len);
1401         dev->act_len = len;
1402         dev->status = stat;
1403
1404 #ifdef DEBUG
1405         pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1406 #else
1407         wait_ms(1);
1408 #endif
1409
1410         return stat;
1411 }
1412
1413 /*-------------------------------------------------------------------------*/
1414
1415 /* common code for handling submit messages - used for all but root hub */
1416 /* accesses. */
1417 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1418                 int transfer_len, struct devrequest *setup, int interval)
1419 {
1420         int stat = 0;
1421         int maxsize = usb_maxpacket(dev, pipe);
1422         int timeout;
1423         urb_priv_t *urb;
1424
1425         urb = malloc(sizeof(urb_priv_t));
1426         memset(urb, 0, sizeof(urb_priv_t));
1427
1428         urb->dev = dev;
1429         urb->pipe = pipe;
1430         urb->transfer_buffer = buffer;
1431         urb->transfer_buffer_length = transfer_len;
1432         urb->interval = interval;
1433
1434         /* device pulled? Shortcut the action. */
1435         if (devgone == dev) {
1436                 dev->status = USB_ST_CRC_ERR;
1437                 return 0;
1438         }
1439
1440 #ifdef DEBUG
1441         urb->actual_length = 0;
1442         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1443 #else
1444         wait_ms(1);
1445 #endif
1446         if (!maxsize) {
1447                 err("submit_common_message: pipesize for pipe %lx is zero",
1448                         pipe);
1449                 return -1;
1450         }
1451
1452         if (sohci_submit_job(urb, setup) < 0) {
1453                 err("sohci_submit_job failed");
1454                 return -1;
1455         }
1456
1457 #if 0
1458         wait_ms(10);
1459         /* ohci_dump_status(&gohci); */
1460 #endif
1461
1462         /* allow more time for a BULK device to react - some are slow */
1463 #define BULK_TO  5000   /* timeout in milliseconds */
1464         if (usb_pipetype (pipe) == PIPE_BULK)
1465                 timeout = BULK_TO;
1466         else
1467                 timeout = 100;
1468
1469         /* wait for it to complete */
1470         for (;;) {
1471                 /* check whether the controller is done */
1472                 stat = hc_interrupt();
1473                 if (stat < 0) {
1474                         stat = USB_ST_CRC_ERR;
1475                         break;
1476                 }
1477
1478                 /* NOTE: since we are not interrupt driven in U-Boot and always
1479                  * handle only one URB at a time, we cannot assume the
1480                  * transaction finished on the first successful return from
1481                  * hc_interrupt().. unless the flag for current URB is set,
1482                  * meaning that all TD's to/from device got actually
1483                  * transferred and processed. If the current URB is not
1484                  * finished we need to re-iterate this loop so as
1485                  * hc_interrupt() gets called again as there needs to be some
1486                  * more TD's to process still */
1487                 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1488                         /* 0xff is returned for an SF-interrupt */
1489                         break;
1490                 }
1491
1492                 if (--timeout) {
1493                         wait_ms(1);
1494                         if (!urb->finished)
1495                                 dbg("\%");
1496
1497                 } else {
1498                         err("CTL:TIMEOUT ");
1499                         dbg("submit_common_msg: TO status %x\n", stat);
1500                         urb->finished = 1;
1501                         stat = USB_ST_CRC_ERR;
1502                         break;
1503                 }
1504         }
1505
1506         dev->status = stat;
1507         dev->act_len = transfer_len;
1508
1509 #ifdef DEBUG
1510         pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1511 #else
1512         wait_ms(1);
1513 #endif
1514
1515         /* free TDs in urb_priv */
1516         if (usb_pipetype (pipe) != PIPE_INTERRUPT)
1517                 urb_free_priv (urb);
1518         return 0;
1519 }
1520
1521 /* submit routines called from usb.c */
1522 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1523                 int transfer_len)
1524 {
1525         info("submit_bulk_msg");
1526         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1527 }
1528
1529 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1530                 int transfer_len, struct devrequest *setup)
1531 {
1532         int maxsize = usb_maxpacket(dev, pipe);
1533
1534         info("submit_control_msg");
1535 #ifdef DEBUG
1536         pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1537 #else
1538         wait_ms(1);
1539 #endif
1540         if (!maxsize) {
1541                 err("submit_control_message: pipesize for pipe %lx is zero",
1542                         pipe);
1543                 return -1;
1544         }
1545         if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1546                 gohci.rh.dev = dev;
1547                 /* root hub - redirect */
1548                 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1549                         setup);
1550         }
1551
1552         return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1553 }
1554
1555 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1556                 int transfer_len, int interval)
1557 {
1558         info("submit_int_msg");
1559         return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1560                         interval);
1561 }
1562
1563 /*-------------------------------------------------------------------------*
1564  * HC functions
1565  *-------------------------------------------------------------------------*/
1566
1567 /* reset the HC and BUS */
1568
1569 static int hc_reset (ohci_t *ohci)
1570 {
1571         int timeout = 30;
1572         int smm_timeout = 50; /* 0,5 sec */
1573
1574         dbg("%s\n", __FUNCTION__);
1575
1576         if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1577                 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1578                 info("USB HC TakeOver from SMM");
1579                 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1580                         wait_ms (10);
1581                         if (--smm_timeout == 0) {
1582                                 err("USB HC TakeOver failed!");
1583                                 return -1;
1584                         }
1585                 }
1586         }
1587
1588         /* Disable HC interrupts */
1589         writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1590
1591         dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1592                 ohci->slot_name,
1593                 readl(&ohci->regs->control));
1594
1595         /* Reset USB (needed by some controllers) */
1596         ohci->hc_control = 0;
1597         writel (ohci->hc_control, &ohci->regs->control);
1598
1599         /* HC Reset requires max 10 us delay */
1600         writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1601         while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1602                 if (--timeout == 0) {
1603                         err("USB HC reset timed out!");
1604                         return -1;
1605                 }
1606                 udelay (1);
1607         }
1608         return 0;
1609 }
1610
1611 /*-------------------------------------------------------------------------*/
1612
1613 /* Start an OHCI controller, set the BUS operational
1614  * enable interrupts
1615  * connect the virtual root hub */
1616
1617 static int hc_start (ohci_t * ohci)
1618 {
1619         __u32 mask;
1620         unsigned int fminterval;
1621
1622         ohci->disabled = 1;
1623
1624         /* Tell the controller where the control and bulk lists are
1625          * The lists are empty now. */
1626
1627         writel (0, &ohci->regs->ed_controlhead);
1628         writel (0, &ohci->regs->ed_bulkhead);
1629
1630         writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1631
1632         fminterval = 0x2edf;
1633         writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1634         fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1635         writel (fminterval, &ohci->regs->fminterval);
1636         writel (0x628, &ohci->regs->lsthresh);
1637
1638         /* start controller operations */
1639         ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1640         ohci->disabled = 0;
1641         writel (ohci->hc_control, &ohci->regs->control);
1642
1643         /* disable all interrupts */
1644         mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1645                         OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1646                         OHCI_INTR_OC | OHCI_INTR_MIE);
1647         writel (mask, &ohci->regs->intrdisable);
1648         /* clear all interrupts */
1649         mask &= ~OHCI_INTR_MIE;
1650         writel (mask, &ohci->regs->intrstatus);
1651         /* Choose the interrupts we care about now  - but w/o MIE */
1652         mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1653         writel (mask, &ohci->regs->intrenable);
1654
1655 #ifdef  OHCI_USE_NPS
1656         /* required for AMD-756 and some Mac platforms */
1657         writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1658                 &ohci->regs->roothub.a);
1659         writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1660 #endif  /* OHCI_USE_NPS */
1661
1662 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1663         /* POTPGT delay is bits 24-31, in 2 ms units. */
1664         mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1665
1666         /* connect the virtual root hub */
1667         ohci->rh.devnum = 0;
1668
1669         return 0;
1670 }
1671
1672 /*-------------------------------------------------------------------------*/
1673
1674 /* Poll USB interrupt. */
1675 void usb_event_poll(void)
1676 {
1677         hc_interrupt();
1678 }
1679
1680 /* an interrupt happens */
1681
1682 static int hc_interrupt (void)
1683 {
1684         ohci_t *ohci = &gohci;
1685         struct ohci_regs *regs = ohci->regs;
1686         int ints;
1687         int stat = -1;
1688
1689         if ((ohci->hcca->done_head != 0) &&
1690             !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1691                 ints =  OHCI_INTR_WDH;
1692         } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
1693                 ohci->disabled++;
1694                 err ("%s device removed!", ohci->slot_name);
1695                 return -1;
1696         } else if ((ints &= readl (&regs->intrenable)) == 0) {
1697                 dbg("hc_interrupt: returning..\n");
1698                 return 0xff;
1699         }
1700
1701         /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1702
1703         if (ints & OHCI_INTR_RHSC) {
1704                 got_rhsc = 1;
1705                 stat = 0xff;
1706         }
1707
1708         if (ints & OHCI_INTR_UE) {
1709                 ohci->disabled++;
1710                 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1711                         ohci->slot_name);
1712                 /* e.g. due to PCI Master/Target Abort */
1713
1714 #ifdef  DEBUG
1715                 ohci_dump (ohci, 1);
1716 #else
1717         wait_ms(1);
1718 #endif
1719                 /* FIXME: be optimistic, hope that bug won't repeat often. */
1720                 /* Make some non-interrupt context restart the controller. */
1721                 /* Count and limit the retries though; either hardware or */
1722                 /* software errors can go forever... */
1723                 hc_reset (ohci);
1724                 return -1;
1725         }
1726
1727         if (ints & OHCI_INTR_WDH) {
1728                 wait_ms(1);
1729                 writel (OHCI_INTR_WDH, &regs->intrdisable);
1730                 (void)readl (&regs->intrdisable); /* flush */
1731                 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1732                 writel (OHCI_INTR_WDH, &regs->intrenable);
1733                 (void)readl (&regs->intrdisable); /* flush */
1734         }
1735
1736         if (ints & OHCI_INTR_SO) {
1737                 dbg("USB Schedule overrun\n");
1738                 writel (OHCI_INTR_SO, &regs->intrenable);
1739                 stat = -1;
1740         }
1741
1742         /* FIXME:  this assumes SOF (1/ms) interrupts don't get lost... */
1743         if (ints & OHCI_INTR_SF) {
1744                 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1745                 wait_ms(1);
1746                 writel (OHCI_INTR_SF, &regs->intrdisable);
1747                 if (ohci->ed_rm_list[frame] != NULL)
1748                         writel (OHCI_INTR_SF, &regs->intrenable);
1749                 stat = 0xff;
1750         }
1751
1752         writel (ints, &regs->intrstatus);
1753         return stat;
1754 }
1755
1756 /*-------------------------------------------------------------------------*/
1757
1758 /*-------------------------------------------------------------------------*/
1759
1760 /* De-allocate all resources.. */
1761
1762 static void hc_release_ohci (ohci_t *ohci)
1763 {
1764         dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1765
1766         if (!ohci->disabled)
1767                 hc_reset (ohci);
1768 }
1769
1770 /*-------------------------------------------------------------------------*/
1771
1772 /*
1773  * low level initalisation routine, called from usb.c
1774  */
1775 static char ohci_inited = 0;
1776
1777 int usb_lowlevel_init(void)
1778 {
1779 #ifdef CONFIG_PCI_OHCI
1780         pci_dev_t pdev;
1781 #endif
1782
1783 #ifdef CFG_USB_OHCI_CPU_INIT
1784         /* cpu dependant init */
1785         if(usb_cpu_init())
1786                 return -1;
1787 #endif
1788
1789 #ifdef CFG_USB_OHCI_BOARD_INIT
1790         /*  board dependant init */
1791         if(usb_board_init())
1792                 return -1;
1793 #endif
1794         memset (&gohci, 0, sizeof (ohci_t));
1795
1796         /* align the storage */
1797         if ((__u32)&ghcca[0] & 0xff) {
1798                 err("HCCA not aligned!!");
1799                 return -1;
1800         }
1801         phcca = &ghcca[0];
1802         info("aligned ghcca %p", phcca);
1803         memset(&ohci_dev, 0, sizeof(struct ohci_device));
1804         if ((__u32)&ohci_dev.ed[0] & 0x7) {
1805                 err("EDs not aligned!!");
1806                 return -1;
1807         }
1808         memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1809         if ((__u32)gtd & 0x7) {
1810                 err("TDs not aligned!!");
1811                 return -1;
1812         }
1813         ptd = gtd;
1814         gohci.hcca = phcca;
1815         memset (phcca, 0, sizeof (struct ohci_hcca));
1816
1817         gohci.disabled = 1;
1818         gohci.sleeping = 0;
1819         gohci.irq = -1;
1820 #ifdef CONFIG_PCI_OHCI
1821         pdev = pci_find_devices(ohci_pci_ids, 0);
1822
1823         if (pdev != -1) {
1824                 u16 vid, did;
1825                 u32 base;
1826                 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1827                 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1828                 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1829                                 vid, did, (pdev >> 16) & 0xff,
1830                                 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1831                 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1832                 printf("OHCI regs address 0x%08x\n", base);
1833                 gohci.regs = (struct ohci_regs *)base;
1834         } else
1835                 return -1;
1836 #else
1837         gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1838 #endif
1839
1840         gohci.flags = 0;
1841         gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1842
1843         if (hc_reset (&gohci) < 0) {
1844                 hc_release_ohci (&gohci);
1845                 err ("can't reset usb-%s", gohci.slot_name);
1846 #ifdef CFG_USB_OHCI_BOARD_INIT
1847                 /* board dependant cleanup */
1848                 usb_board_init_fail();
1849 #endif
1850
1851 #ifdef CFG_USB_OHCI_CPU_INIT
1852                 /* cpu dependant cleanup */
1853                 usb_cpu_init_fail();
1854 #endif
1855                 return -1;
1856         }
1857
1858         /* FIXME this is a second HC reset; why?? */
1859         /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1860            wait_ms(10); */
1861         if (hc_start (&gohci) < 0) {
1862                 err ("can't start usb-%s", gohci.slot_name);
1863                 hc_release_ohci (&gohci);
1864                 /* Initialization failed */
1865 #ifdef CFG_USB_OHCI_BOARD_INIT
1866                 /* board dependant cleanup */
1867                 usb_board_stop();
1868 #endif
1869
1870 #ifdef CFG_USB_OHCI_CPU_INIT
1871                 /* cpu dependant cleanup */
1872                 usb_cpu_stop();
1873 #endif
1874                 return -1;
1875         }
1876
1877 #ifdef  DEBUG
1878         ohci_dump (&gohci, 1);
1879 #else
1880         wait_ms(1);
1881 #endif
1882         ohci_inited = 1;
1883         return 0;
1884 }
1885
1886 int usb_lowlevel_stop(void)
1887 {
1888         /* this gets called really early - before the controller has */
1889         /* even been initialized! */
1890         if (!ohci_inited)
1891                 return 0;
1892         /* TODO release any interrupts, etc. */
1893         /* call hc_release_ohci() here ? */
1894         hc_reset (&gohci);
1895
1896 #ifdef CFG_USB_OHCI_BOARD_INIT
1897         /* board dependant cleanup */
1898         if(usb_board_stop())
1899                 return -1;
1900 #endif
1901
1902 #ifdef CFG_USB_OHCI_CPU_INIT
1903         /* cpu dependant cleanup */
1904         if(usb_cpu_stop())
1905                 return -1;
1906 #endif
1907
1908         return 0;
1909 }
1910 #endif /* CONFIG_USB_OHCI_NEW */