2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
31 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
32 volatile struct ehci_hcor *hcor;
34 static uint16_t portreset;
35 static struct QH qh_list __attribute__((aligned(32)));
37 static struct descriptor {
38 struct usb_hub_descriptor hub;
39 struct usb_device_descriptor device;
40 struct usb_linux_config_descriptor config;
41 struct usb_linux_interface_descriptor interface;
42 struct usb_endpoint_descriptor endpoint;
43 } __attribute__ ((packed)) descriptor = {
45 0x8, /* bDescLength */
46 0x29, /* bDescriptorType: hub descriptor */
47 2, /* bNrPorts -- runtime modified */
48 0, /* wHubCharacteristics */
49 0xff, /* bPwrOn2PwrGood */
50 0, /* bHubCntrCurrent */
51 {}, /* Device removable */
52 {} /* at most 7 ports! XXX */
56 1, /* bDescriptorType: UDESC_DEVICE */
57 0x0002, /* bcdUSB: v2.0 */
58 9, /* bDeviceClass: UDCLASS_HUB */
59 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
60 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
61 64, /* bMaxPacketSize: 64 bytes */
62 0x0000, /* idVendor */
63 0x0000, /* idProduct */
64 0x0001, /* bcdDevice */
65 1, /* iManufacturer */
67 0, /* iSerialNumber */
68 1 /* bNumConfigurations: 1 */
72 2, /* bDescriptorType: UDESC_CONFIG */
74 1, /* bNumInterface */
75 1, /* bConfigurationValue */
76 0, /* iConfiguration */
77 0x40, /* bmAttributes: UC_SELF_POWER */
82 4, /* bDescriptorType: UDESC_INTERFACE */
83 0, /* bInterfaceNumber */
84 0, /* bAlternateSetting */
85 1, /* bNumEndpoints */
86 9, /* bInterfaceClass: UICLASS_HUB */
87 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
88 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
93 5, /* bDescriptorType: UDESC_ENDPOINT */
94 0x81, /* bEndpointAddress:
95 * UE_DIR_IN | EHCI_INTR_ENDPT
97 3, /* bmAttributes: UE_INTERRUPT */
98 8, 0, /* wMaxPacketSize */
103 #if defined(CONFIG_EHCI_IS_TDI)
104 #define ehci_is_TDI() (1)
106 #define ehci_is_TDI() (0)
109 #if defined(CONFIG_EHCI_DCACHE)
111 * Routines to handle (flush/invalidate) the dcache for the QH and qTD
112 * structures and data buffers. This is needed on platforms using this
113 * EHCI support with dcache enabled.
115 static void flush_invalidate(u32 addr, int size, int flush)
118 flush_dcache_range(addr, addr + size);
120 invalidate_dcache_range(addr, addr + size);
123 static void cache_qtd(struct qTD *qtd, int flush)
125 u32 *ptr = (u32 *)qtd->qt_buffer[0];
126 int len = (qtd->qt_token & 0x7fff0000) >> 16;
128 flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
130 flush_invalidate((u32)ptr, len, flush);
134 static inline struct QH *qh_addr(struct QH *qh)
136 return (struct QH *)((u32)qh & 0xffffffe0);
139 static void cache_qh(struct QH *qh, int flush)
143 static struct qTD *first_qtd;
146 * Walk the QH list and flush/invalidate all entries
149 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
150 if ((u32)qh & QH_LINK_TYPE_QH)
153 qh = (struct QH *)qh->qh_link;
158 * Save first qTD pointer, needed for invalidating pass on this QH
161 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
167 * Walk the qTD list and flush/invalidate all entries
172 cache_qtd(qtd, flush);
173 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
180 static inline void ehci_flush_dcache(struct QH *qh)
185 static inline void ehci_invalidate_dcache(struct QH *qh)
189 #else /* CONFIG_EHCI_DCACHE */
193 static inline void ehci_flush_dcache(struct QH *qh)
197 static inline void ehci_invalidate_dcache(struct QH *qh)
200 #endif /* CONFIG_EHCI_DCACHE */
202 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
206 result = ehci_readl(ptr);
207 if (result == ~(uint32_t)0)
218 static void ehci_free(void *p, size_t sz)
223 static int ehci_reset(void)
230 cmd = ehci_readl(&hcor->or_usbcmd);
232 ehci_writel(&hcor->or_usbcmd, cmd);
233 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
235 printf("EHCI fail to reset\n");
240 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
241 tmp = ehci_readl(reg_ptr);
242 tmp |= USBMODE_CM_HC;
243 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
246 ehci_writel(reg_ptr, tmp);
252 static void *ehci_alloc(size_t sz, size_t align)
254 static struct QH qh __attribute__((aligned(32)));
255 static struct qTD td[3] __attribute__((aligned (32)));
260 case sizeof(struct QH):
264 case sizeof(struct qTD):
266 debug("out of TDs\n");
273 debug("unknown allocation size\n");
281 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
283 uint32_t addr, delta, next;
286 addr = (uint32_t) buf;
289 td->qt_buffer[idx] = cpu_to_hc32(addr);
290 next = (addr + 4096) & ~4095;
300 debug("out of buffer pointers (%u bytes left)\n", sz);
308 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
309 int length, struct devrequest *req)
313 volatile struct qTD *vtd;
316 uint32_t endpt, token, usbsts;
321 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
322 buffer, length, req);
324 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
325 req->request, req->request,
326 req->requesttype, req->requesttype,
327 le16_to_cpu(req->value), le16_to_cpu(req->value),
328 le16_to_cpu(req->index));
330 qh = ehci_alloc(sizeof(struct QH), 32);
332 debug("unable to allocate QH\n");
335 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
336 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
337 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
340 (usb_maxpacket(dev, pipe) << 16) |
343 (usb_pipespeed(pipe) << 12) |
344 (usb_pipeendpoint(pipe) << 8) |
345 (0 << 7) | (usb_pipedevice(pipe) << 0);
346 qh->qh_endpt1 = cpu_to_hc32(endpt);
348 (dev->portnr << 23) |
349 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
350 qh->qh_endpt2 = cpu_to_hc32(endpt);
351 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
352 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
355 tdp = &qh->qh_overlay.qt_next;
358 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
361 td = ehci_alloc(sizeof(struct qTD), 32);
363 debug("unable to allocate SETUP td\n");
366 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
367 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
369 (sizeof(*req) << 16) |
370 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
371 td->qt_token = cpu_to_hc32(token);
372 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
373 debug("unable construct SETUP td\n");
374 ehci_free(td, sizeof(*td));
377 *tdp = cpu_to_hc32((uint32_t) td);
382 if (length > 0 || req == NULL) {
383 td = ehci_alloc(sizeof(struct qTD), 32);
385 debug("unable to allocate DATA td\n");
388 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
389 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
390 token = (toggle << 31) |
392 ((req == NULL ? 1 : 0) << 15) |
395 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
396 td->qt_token = cpu_to_hc32(token);
397 if (ehci_td_buffer(td, buffer, length) != 0) {
398 debug("unable construct DATA td\n");
399 ehci_free(td, sizeof(*td));
402 *tdp = cpu_to_hc32((uint32_t) td);
407 td = ehci_alloc(sizeof(struct qTD), 32);
409 debug("unable to allocate ACK td\n");
412 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
413 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
414 token = (toggle << 31) |
419 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
420 td->qt_token = cpu_to_hc32(token);
421 *tdp = cpu_to_hc32((uint32_t) td);
425 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
428 ehci_flush_dcache(&qh_list);
430 usbsts = ehci_readl(&hcor->or_usbsts);
431 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
433 /* Enable async. schedule. */
434 cmd = ehci_readl(&hcor->or_usbcmd);
436 ehci_writel(&hcor->or_usbcmd, cmd);
438 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
441 printf("EHCI fail timeout STD_ASS set\n");
445 /* Wait for TDs to be processed. */
449 /* Invalidate dcache */
450 ehci_invalidate_dcache(&qh_list);
451 token = hc32_to_cpu(vtd->qt_token);
454 } while (get_timer(ts) < CONFIG_SYS_HZ);
456 /* Disable async schedule. */
457 cmd = ehci_readl(&hcor->or_usbcmd);
459 ehci_writel(&hcor->or_usbcmd, cmd);
461 ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
464 printf("EHCI fail timeout STD_ASS reset\n");
468 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
470 token = hc32_to_cpu(qh->qh_overlay.qt_token);
471 if (!(token & 0x80)) {
472 debug("TOKEN=%#x\n", token);
473 switch (token & 0xfc) {
475 toggle = token >> 31;
476 usb_settoggle(dev, usb_pipeendpoint(pipe),
477 usb_pipeout(pipe), toggle);
481 dev->status = USB_ST_STALLED;
485 dev->status = USB_ST_BUF_ERR;
489 dev->status = USB_ST_BABBLE_DET;
492 dev->status = USB_ST_CRC_ERR;
495 dev->act_len = length - ((token >> 16) & 0x7fff);
498 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
499 dev->devnum, ehci_readl(&hcor->or_usbsts),
500 ehci_readl(&hcor->or_portsc[0]),
501 ehci_readl(&hcor->or_portsc[1]));
504 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
507 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
508 while (td != (void *)QT_NEXT_TERMINATE) {
509 qh->qh_overlay.qt_next = td->qt_next;
510 ehci_free(td, sizeof(*td));
511 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
513 ehci_free(qh, sizeof(*qh));
517 static inline int min3(int a, int b, int c)
528 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
529 int length, struct devrequest *req)
536 uint32_t *status_reg;
538 if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
539 printf("The request port(%d) is not configured\n",
540 le16_to_cpu(req->index) - 1);
543 status_reg = (uint32_t *)&hcor->or_portsc[
544 le16_to_cpu(req->index) - 1];
547 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
548 req->request, req->request,
549 req->requesttype, req->requesttype,
550 le16_to_cpu(req->value), le16_to_cpu(req->index));
552 typeReq = req->request << 8 | req->requesttype;
554 switch (le16_to_cpu(typeReq)) {
555 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
556 switch (le16_to_cpu(req->value) >> 8) {
558 debug("USB_DT_DEVICE request\n");
559 srcptr = &descriptor.device;
563 debug("USB_DT_CONFIG config\n");
564 srcptr = &descriptor.config;
568 debug("USB_DT_STRING config\n");
569 switch (le16_to_cpu(req->value) & 0xff) {
570 case 0: /* Language */
575 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
578 case 2: /* Product */
579 srcptr = "\52\3E\0H\0C\0I\0 "
581 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
585 debug("unknown value DT_STRING %x\n",
586 le16_to_cpu(req->value));
591 debug("unknown value %x\n", le16_to_cpu(req->value));
595 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
596 switch (le16_to_cpu(req->value) >> 8) {
598 debug("USB_DT_HUB config\n");
599 srcptr = &descriptor.hub;
603 debug("unknown value %x\n", le16_to_cpu(req->value));
607 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
608 debug("USB_REQ_SET_ADDRESS\n");
609 rootdev = le16_to_cpu(req->value);
611 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
612 debug("USB_REQ_SET_CONFIGURATION\n");
615 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
616 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
621 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
622 memset(tmpbuf, 0, 4);
623 reg = ehci_readl(status_reg);
624 if (reg & EHCI_PS_CS)
625 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
626 if (reg & EHCI_PS_PE)
627 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
628 if (reg & EHCI_PS_SUSP)
629 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
630 if (reg & EHCI_PS_OCA)
631 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
632 if (reg & EHCI_PS_PR &&
633 (portreset & (1 << le16_to_cpu(req->index)))) {
635 /* force reset to complete */
636 reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
637 ehci_writel(status_reg, reg);
638 ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000);
640 tmpbuf[0] |= USB_PORT_STAT_RESET;
642 printf("port(%d) reset error\n",
643 le16_to_cpu(req->index) - 1);
645 if (reg & EHCI_PS_PP)
646 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
649 switch ((reg >> 26) & 3) {
653 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
657 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
661 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
664 if (reg & EHCI_PS_CSC)
665 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
666 if (reg & EHCI_PS_PEC)
667 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
668 if (reg & EHCI_PS_OCC)
669 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
670 if (portreset & (1 << le16_to_cpu(req->index)))
671 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
676 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
677 reg = ehci_readl(status_reg);
678 reg &= ~EHCI_PS_CLEAR;
679 switch (le16_to_cpu(req->value)) {
680 case USB_PORT_FEAT_ENABLE:
682 ehci_writel(status_reg, reg);
684 case USB_PORT_FEAT_POWER:
685 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
687 ehci_writel(status_reg, reg);
690 case USB_PORT_FEAT_RESET:
691 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
693 EHCI_PS_IS_LOWSPEED(reg)) {
694 /* Low speed device, give up ownership. */
695 debug("port %d low speed --> companion\n",
698 ehci_writel(status_reg, reg);
703 ehci_writel(status_reg, reg);
705 * caller must wait, then call GetPortStatus
706 * usb 2.0 specification say 50 ms resets on
710 portreset |= 1 << le16_to_cpu(req->index);
714 debug("unknown feature %x\n", le16_to_cpu(req->value));
717 /* unblock posted writes */
718 ehci_readl(&hcor->or_usbcmd);
720 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
721 reg = ehci_readl(status_reg);
722 switch (le16_to_cpu(req->value)) {
723 case USB_PORT_FEAT_ENABLE:
726 case USB_PORT_FEAT_C_ENABLE:
727 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
729 case USB_PORT_FEAT_POWER:
730 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
731 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
732 case USB_PORT_FEAT_C_CONNECTION:
733 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
735 case USB_PORT_FEAT_OVER_CURRENT:
736 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
738 case USB_PORT_FEAT_C_RESET:
739 portreset &= ~(1 << le16_to_cpu(req->index));
742 debug("unknown feature %x\n", le16_to_cpu(req->value));
745 ehci_writel(status_reg, reg);
746 /* unblock posted write */
747 ehci_readl(&hcor->or_usbcmd);
750 debug("Unknown request\n");
755 len = min3(srclen, le16_to_cpu(req->length), length);
756 if (srcptr != NULL && len > 0)
757 memcpy(buffer, srcptr, len);
766 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
767 req->requesttype, req->request, le16_to_cpu(req->value),
768 le16_to_cpu(req->index), le16_to_cpu(req->length));
771 dev->status = USB_ST_STALLED;
775 int usb_lowlevel_stop(void)
777 return ehci_hcd_stop();
780 int usb_lowlevel_init(void)
785 if (ehci_hcd_init() != 0)
788 /* EHCI spec section 4.1 */
789 if (ehci_reset() != 0)
792 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
793 if (ehci_hcd_init() != 0)
797 /* Set head of reclaim list */
798 memset(&qh_list, 0, sizeof(qh_list));
799 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
800 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
801 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
802 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
803 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
804 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
806 /* Set async. queue head pointer. */
807 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
809 reg = ehci_readl(&hccr->cr_hcsparams);
810 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
811 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
812 /* Port Indicators */
813 if (HCS_INDICATOR(reg))
814 descriptor.hub.wHubCharacteristics |= 0x80;
815 /* Port Power Control */
817 descriptor.hub.wHubCharacteristics |= 0x01;
819 /* Start the host controller. */
820 cmd = ehci_readl(&hcor->or_usbcmd);
822 * Philips, Intel, and maybe others need CMD_RUN before the
823 * root hub will detect new devices (why?); NEC doesn't
825 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
827 ehci_writel(&hcor->or_usbcmd, cmd);
829 /* take control over the ports */
830 cmd = ehci_readl(&hcor->or_configflag);
832 ehci_writel(&hcor->or_configflag, cmd);
833 /* unblock posted write */
834 cmd = ehci_readl(&hcor->or_usbcmd);
836 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
837 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
845 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
849 if (usb_pipetype(pipe) != PIPE_BULK) {
850 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
853 return ehci_submit_async(dev, pipe, buffer, length, NULL);
857 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
858 int length, struct devrequest *setup)
861 if (usb_pipetype(pipe) != PIPE_CONTROL) {
862 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
866 if (usb_pipedevice(pipe) == rootdev) {
868 dev->speed = USB_SPEED_HIGH;
869 return ehci_submit_root(dev, pipe, buffer, length, setup);
871 return ehci_submit_async(dev, pipe, buffer, length, setup);
875 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
876 int length, int interval)
879 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
880 dev, pipe, buffer, length, interval);