1 // SPDX-License-Identifier: GPL-2.0+
3 * F81532/F81534 USB to Serial Ports Bridge
5 * F81532 => 2 Serial Ports
6 * F81534 => 4 Serial Ports
8 * Copyright (C) 2016 Feature Integration Technology Inc., (Fintek)
9 * Copyright (C) 2016 Tom Tsai (Tom_Tsai@fintek.com.tw)
10 * Copyright (C) 2016 Peter Hong (Peter_Hong@fintek.com.tw)
12 * The F81532/F81534 had 1 control endpoint for setting, 1 endpoint bulk-out
13 * for all serial port TX and 1 endpoint bulk-in for all serial port read in
14 * (Read Data/MSR/LSR).
16 * Write URB is fixed with 512bytes, per serial port used 128Bytes.
17 * It can be described by f81534_prepare_write_buffer()
19 * Read URB is 512Bytes max, per serial port used 128Bytes.
20 * It can be described by f81534_process_read_urb() and maybe received with
24 #include <linux/slab.h>
25 #include <linux/tty.h>
26 #include <linux/tty_flip.h>
27 #include <linux/usb.h>
28 #include <linux/usb/serial.h>
29 #include <linux/serial_reg.h>
30 #include <linux/module.h>
31 #include <linux/uaccess.h>
33 /* Serial Port register Address */
34 #define F81534_UART_BASE_ADDRESS 0x1200
35 #define F81534_UART_OFFSET 0x10
36 #define F81534_DIVISOR_LSB_REG (0x00 + F81534_UART_BASE_ADDRESS)
37 #define F81534_DIVISOR_MSB_REG (0x01 + F81534_UART_BASE_ADDRESS)
38 #define F81534_INTERRUPT_ENABLE_REG (0x01 + F81534_UART_BASE_ADDRESS)
39 #define F81534_FIFO_CONTROL_REG (0x02 + F81534_UART_BASE_ADDRESS)
40 #define F81534_LINE_CONTROL_REG (0x03 + F81534_UART_BASE_ADDRESS)
41 #define F81534_MODEM_CONTROL_REG (0x04 + F81534_UART_BASE_ADDRESS)
42 #define F81534_LINE_STATUS_REG (0x05 + F81534_UART_BASE_ADDRESS)
43 #define F81534_MODEM_STATUS_REG (0x06 + F81534_UART_BASE_ADDRESS)
44 #define F81534_CLOCK_REG (0x08 + F81534_UART_BASE_ADDRESS)
45 #define F81534_CONFIG1_REG (0x09 + F81534_UART_BASE_ADDRESS)
47 #define F81534_DEF_CONF_ADDRESS_START 0x3000
48 #define F81534_DEF_CONF_SIZE 12
50 #define F81534_CUSTOM_ADDRESS_START 0x2f00
51 #define F81534_CUSTOM_DATA_SIZE 0x10
52 #define F81534_CUSTOM_NO_CUSTOM_DATA 0xff
53 #define F81534_CUSTOM_VALID_TOKEN 0xf0
54 #define F81534_CONF_OFFSET 1
55 #define F81534_CONF_INIT_GPIO_OFFSET 4
56 #define F81534_CONF_WORK_GPIO_OFFSET 8
57 #define F81534_CONF_GPIO_SHUTDOWN 7
58 #define F81534_CONF_GPIO_RS232 1
60 #define F81534_MAX_DATA_BLOCK 64
61 #define F81534_MAX_BUS_RETRY 20
63 /* Default URB timeout for USB operations */
64 #define F81534_USB_MAX_RETRY 10
65 #define F81534_USB_TIMEOUT 2000
66 #define F81534_SET_GET_REGISTER 0xA0
68 #define F81534_NUM_PORT 4
69 #define F81534_UNUSED_PORT 0xff
70 #define F81534_WRITE_BUFFER_SIZE 512
72 #define DRIVER_DESC "Fintek F81532/F81534"
73 #define FINTEK_VENDOR_ID_1 0x1934
74 #define FINTEK_VENDOR_ID_2 0x2C42
75 #define FINTEK_DEVICE_ID 0x1202
76 #define F81534_MAX_TX_SIZE 124
77 #define F81534_MAX_RX_SIZE 124
78 #define F81534_RECEIVE_BLOCK_SIZE 128
79 #define F81534_MAX_RECEIVE_BLOCK_SIZE 512
81 #define F81534_TOKEN_RECEIVE 0x01
82 #define F81534_TOKEN_WRITE 0x02
83 #define F81534_TOKEN_TX_EMPTY 0x03
84 #define F81534_TOKEN_MSR_CHANGE 0x04
87 * We used interal SPI bus to access FLASH section. We must wait the SPI bus to
88 * idle if we performed any command.
90 * SPI Bus status register: F81534_BUS_REG_STATUS
94 #define F81534_BUS_BUSY (BIT(0) | BIT(1))
95 #define F81534_BUS_IDLE BIT(2)
96 #define F81534_BUS_READ_DATA 0x1004
97 #define F81534_BUS_REG_STATUS 0x1003
98 #define F81534_BUS_REG_START 0x1002
99 #define F81534_BUS_REG_END 0x1001
101 #define F81534_CMD_READ 0x03
103 #define F81534_DEFAULT_BAUD_RATE 9600
105 #define F81534_PORT_CONF_RS232 0
106 #define F81534_PORT_CONF_RS485 BIT(0)
107 #define F81534_PORT_CONF_RS485_INVERT (BIT(0) | BIT(1))
108 #define F81534_PORT_CONF_MODE_MASK GENMASK(1, 0)
109 #define F81534_PORT_CONF_DISABLE_PORT BIT(3)
110 #define F81534_PORT_CONF_NOT_EXIST_PORT BIT(7)
111 #define F81534_PORT_UNAVAILABLE \
112 (F81534_PORT_CONF_DISABLE_PORT | F81534_PORT_CONF_NOT_EXIST_PORT)
115 #define F81534_1X_RXTRIGGER 0xc3
116 #define F81534_8X_RXTRIGGER 0xcf
119 * F81532/534 Clock registers (offset +08h)
121 * Bit0: UART Enable (always on)
122 * Bit2-1: Clock source selector
127 * Bit4: Auto direction(RTS) control (RTS pin Low when TX)
128 * Bit5: Invert direction(RTS) when Bit4 enabled (RTS pin high when TX)
131 #define F81534_UART_EN BIT(0)
132 #define F81534_CLK_1_846_MHZ 0
133 #define F81534_CLK_18_46_MHZ BIT(1)
134 #define F81534_CLK_24_MHZ BIT(2)
135 #define F81534_CLK_14_77_MHZ (BIT(1) | BIT(2))
136 #define F81534_CLK_MASK GENMASK(2, 1)
137 #define F81534_CLK_TX_DELAY_1BIT BIT(3)
138 #define F81534_CLK_RS485_MODE BIT(4)
139 #define F81534_CLK_RS485_INVERT BIT(5)
141 static const struct usb_device_id f81534_id_table[] = {
142 { USB_DEVICE(FINTEK_VENDOR_ID_1, FINTEK_DEVICE_ID) },
143 { USB_DEVICE(FINTEK_VENDOR_ID_2, FINTEK_DEVICE_ID) },
144 {} /* Terminating entry */
147 #define F81534_TX_EMPTY_BIT 0
149 struct f81534_serial_private {
150 u8 conf_data[F81534_DEF_CONF_SIZE];
151 int tty_idx[F81534_NUM_PORT];
154 struct mutex urb_mutex;
157 struct f81534_port_private {
158 struct mutex mcr_mutex;
159 struct mutex lcr_mutex;
160 struct work_struct lsr_work;
161 struct usb_serial_port *port;
162 unsigned long tx_empty;
172 struct f81534_pin_data {
177 struct f81534_port_out_pin {
178 struct f81534_pin_data pin[3];
181 /* Pin output value for M2/M1/M0(SD) */
182 static const struct f81534_port_out_pin f81534_port_out_pins[] = {
183 { { { 0x2ae8, BIT(7) }, { 0x2a90, BIT(5) }, { 0x2a90, BIT(4) } } },
184 { { { 0x2ae8, BIT(6) }, { 0x2ae8, BIT(0) }, { 0x2ae8, BIT(3) } } },
185 { { { 0x2a90, BIT(0) }, { 0x2ae8, BIT(2) }, { 0x2a80, BIT(6) } } },
186 { { { 0x2a90, BIT(3) }, { 0x2a90, BIT(2) }, { 0x2a90, BIT(1) } } },
189 static u32 const baudrate_table[] = { 115200, 921600, 1152000, 1500000 };
190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ,
191 F81534_CLK_18_46_MHZ, F81534_CLK_24_MHZ };
193 static int f81534_logic_to_phy_port(struct usb_serial *serial,
194 struct usb_serial_port *port)
196 struct f81534_serial_private *serial_priv =
197 usb_get_serial_data(port->serial);
201 for (i = 0; i < F81534_NUM_PORT; ++i) {
202 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
205 if (port->port_number == count)
214 static int f81534_set_register(struct usb_serial *serial, u16 reg, u8 data)
216 struct usb_interface *interface = serial->interface;
217 struct usb_device *dev = serial->dev;
218 size_t count = F81534_USB_MAX_RETRY;
222 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
229 * Our device maybe not reply when heavily loading, We'll retry for
230 * F81534_USB_MAX_RETRY times.
233 status = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
234 F81534_SET_GET_REGISTER,
235 USB_TYPE_VENDOR | USB_DIR_OUT,
236 reg, 0, tmp, sizeof(u8),
238 if (status == sizeof(u8)) {
245 dev_err(&interface->dev, "%s: reg: %x data: %x failed: %d\n",
246 __func__, reg, data, status);
253 static int f81534_get_register(struct usb_serial *serial, u16 reg, u8 *data)
255 struct usb_interface *interface = serial->interface;
256 struct usb_device *dev = serial->dev;
257 size_t count = F81534_USB_MAX_RETRY;
261 tmp = kmalloc(sizeof(u8), GFP_KERNEL);
266 * Our device maybe not reply when heavily loading, We'll retry for
267 * F81534_USB_MAX_RETRY times.
270 status = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
271 F81534_SET_GET_REGISTER,
272 USB_TYPE_VENDOR | USB_DIR_IN,
273 reg, 0, tmp, sizeof(u8),
278 } else if (status == 0) {
284 dev_err(&interface->dev, "%s: reg: %x failed: %d\n", __func__,
296 static int f81534_set_mask_register(struct usb_serial *serial, u16 reg,
302 status = f81534_get_register(serial, reg, &tmp);
307 tmp |= (mask & data);
309 return f81534_set_register(serial, reg, tmp);
312 static int f81534_set_phy_port_register(struct usb_serial *serial, int phy,
315 return f81534_set_register(serial, reg + F81534_UART_OFFSET * phy,
319 static int f81534_get_phy_port_register(struct usb_serial *serial, int phy,
322 return f81534_get_register(serial, reg + F81534_UART_OFFSET * phy,
326 static int f81534_set_port_register(struct usb_serial_port *port, u16 reg,
329 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
331 return f81534_set_register(port->serial,
332 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
335 static int f81534_get_port_register(struct usb_serial_port *port, u16 reg,
338 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
340 return f81534_get_register(port->serial,
341 reg + port_priv->phy_num * F81534_UART_OFFSET, data);
345 * If we try to access the internal flash via SPI bus, we should check the bus
346 * status for every command. e.g., F81534_BUS_REG_START/F81534_BUS_REG_END
348 static int f81534_wait_for_spi_idle(struct usb_serial *serial)
350 size_t count = F81534_MAX_BUS_RETRY;
355 status = f81534_get_register(serial, F81534_BUS_REG_STATUS,
360 if (tmp & F81534_BUS_BUSY)
363 if (tmp & F81534_BUS_IDLE)
369 dev_err(&serial->interface->dev,
370 "%s: timed out waiting for idle SPI bus\n",
375 return f81534_set_register(serial, F81534_BUS_REG_STATUS,
376 tmp & ~F81534_BUS_IDLE);
379 static int f81534_get_spi_register(struct usb_serial *serial, u16 reg,
384 status = f81534_get_register(serial, reg, data);
388 return f81534_wait_for_spi_idle(serial);
391 static int f81534_set_spi_register(struct usb_serial *serial, u16 reg, u8 data)
395 status = f81534_set_register(serial, reg, data);
399 return f81534_wait_for_spi_idle(serial);
402 static int f81534_read_flash(struct usb_serial *serial, u32 address,
403 size_t size, u8 *buf)
405 u8 tmp_buf[F81534_MAX_DATA_BLOCK];
413 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
418 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
419 (address >> 16) & 0xff);
423 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
424 (address >> 8) & 0xff);
428 status = f81534_set_spi_register(serial, F81534_BUS_REG_START,
429 (address >> 0) & 0xff);
433 /* Continuous read mode */
435 read_size = min_t(size_t, F81534_MAX_DATA_BLOCK, size);
437 for (count = 0; count < read_size; ++count) {
438 /* To write F81534_BUS_REG_END when final byte */
439 if (size <= F81534_MAX_DATA_BLOCK &&
440 read_size == count + 1)
441 reg_tmp = F81534_BUS_REG_END;
443 reg_tmp = F81534_BUS_REG_START;
446 * Dummy code, force IC to generate a read pulse, the
447 * set of value 0xf1 is dont care (any value is ok)
449 status = f81534_set_spi_register(serial, reg_tmp,
454 status = f81534_get_spi_register(serial,
455 F81534_BUS_READ_DATA,
460 offset = count + block * F81534_MAX_DATA_BLOCK;
461 buf[offset] = tmp_buf[count];
471 static void f81534_prepare_write_buffer(struct usb_serial_port *port, u8 *buf)
473 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
474 int phy_num = port_priv->phy_num;
479 * The block layout is fixed with 4x128 Bytes, per 128 Bytes a port.
480 * index 0: port phy idx (e.g., 0,1,2,3)
481 * index 1: only F81534_TOKEN_WRITE
482 * index 2: serial TX out length
484 * index 4~127: serial out data block
486 for (i = 0; i < F81534_NUM_PORT; ++i) {
487 buf[i * F81534_RECEIVE_BLOCK_SIZE] = i;
488 buf[i * F81534_RECEIVE_BLOCK_SIZE + 1] = F81534_TOKEN_WRITE;
489 buf[i * F81534_RECEIVE_BLOCK_SIZE + 2] = 0;
490 buf[i * F81534_RECEIVE_BLOCK_SIZE + 3] = 0;
493 tx_len = kfifo_out_locked(&port->write_fifo,
494 &buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 4],
495 F81534_MAX_TX_SIZE, &port->lock);
497 buf[phy_num * F81534_RECEIVE_BLOCK_SIZE + 2] = tx_len;
500 static int f81534_submit_writer(struct usb_serial_port *port, gfp_t mem_flags)
502 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
507 /* Check is any data in write_fifo */
508 spin_lock_irqsave(&port->lock, flags);
510 if (kfifo_is_empty(&port->write_fifo)) {
511 spin_unlock_irqrestore(&port->lock, flags);
515 spin_unlock_irqrestore(&port->lock, flags);
517 /* Check H/W is TXEMPTY */
518 if (!test_and_clear_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty))
521 urb = port->write_urbs[0];
522 f81534_prepare_write_buffer(port, port->bulk_out_buffers[0]);
523 urb->transfer_buffer_length = F81534_WRITE_BUFFER_SIZE;
525 result = usb_submit_urb(urb, mem_flags);
527 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
528 dev_err(&port->dev, "%s: submit failed: %d\n", __func__,
533 usb_serial_port_softint(port);
537 static u32 f81534_calc_baud_divisor(u32 baudrate, u32 clockrate)
539 /* Round to nearest divisor */
540 return DIV_ROUND_CLOSEST(clockrate, baudrate);
543 static int f81534_find_clk(u32 baudrate)
547 for (idx = 0; idx < ARRAY_SIZE(baudrate_table); ++idx) {
548 if (baudrate <= baudrate_table[idx] &&
549 baudrate_table[idx] % baudrate == 0)
556 static int f81534_set_port_config(struct usb_serial_port *port,
557 struct tty_struct *tty, u32 baudrate, u32 old_baudrate, u8 lcr)
559 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
565 u32 baud_list[] = {baudrate, old_baudrate, F81534_DEFAULT_BAUD_RATE};
567 for (i = 0; i < ARRAY_SIZE(baud_list); ++i) {
568 baudrate = baud_list[i];
570 tty_encode_baud_rate(tty, 0, 0);
574 idx = f81534_find_clk(baudrate);
576 tty_encode_baud_rate(tty, baudrate, baudrate);
584 port_priv->baud_base = baudrate_table[idx];
585 port_priv->shadow_clk &= ~F81534_CLK_MASK;
586 port_priv->shadow_clk |= clock_table[idx];
588 status = f81534_set_port_register(port, F81534_CLOCK_REG,
589 port_priv->shadow_clk);
591 dev_err(&port->dev, "CLOCK_REG setting failed\n");
595 if (baudrate <= 1200)
596 value = F81534_1X_RXTRIGGER; /* 128 FIFO & TL: 1x */
598 value = F81534_8X_RXTRIGGER; /* 128 FIFO & TL: 8x */
600 status = f81534_set_port_register(port, F81534_CONFIG1_REG, value);
602 dev_err(&port->dev, "%s: CONFIG1 setting failed\n", __func__);
606 if (baudrate <= 1200)
607 value = UART_FCR_TRIGGER_1 | UART_FCR_ENABLE_FIFO; /* TL: 1 */
609 value = UART_FCR_TRIGGER_8 | UART_FCR_ENABLE_FIFO; /* TL: 8 */
611 status = f81534_set_port_register(port, F81534_FIFO_CONTROL_REG,
614 dev_err(&port->dev, "%s: FCR setting failed\n", __func__);
618 divisor = f81534_calc_baud_divisor(baudrate, port_priv->baud_base);
620 mutex_lock(&port_priv->lcr_mutex);
622 value = UART_LCR_DLAB;
623 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
626 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
630 value = divisor & 0xff;
631 status = f81534_set_port_register(port, F81534_DIVISOR_LSB_REG, value);
633 dev_err(&port->dev, "%s: set DLAB LSB failed\n", __func__);
637 value = (divisor >> 8) & 0xff;
638 status = f81534_set_port_register(port, F81534_DIVISOR_MSB_REG, value);
640 dev_err(&port->dev, "%s: set DLAB MSB failed\n", __func__);
644 value = lcr | (port_priv->shadow_lcr & UART_LCR_SBC);
645 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
648 dev_err(&port->dev, "%s: set LCR failed\n", __func__);
652 port_priv->shadow_lcr = value;
654 mutex_unlock(&port_priv->lcr_mutex);
659 static void f81534_break_ctl(struct tty_struct *tty, int break_state)
661 struct usb_serial_port *port = tty->driver_data;
662 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
665 mutex_lock(&port_priv->lcr_mutex);
668 port_priv->shadow_lcr |= UART_LCR_SBC;
670 port_priv->shadow_lcr &= ~UART_LCR_SBC;
672 status = f81534_set_port_register(port, F81534_LINE_CONTROL_REG,
673 port_priv->shadow_lcr);
675 dev_err(&port->dev, "set break failed: %d\n", status);
677 mutex_unlock(&port_priv->lcr_mutex);
680 static int f81534_update_mctrl(struct usb_serial_port *port, unsigned int set,
683 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
687 if (((set | clear) & (TIOCM_DTR | TIOCM_RTS)) == 0)
688 return 0; /* no change */
690 mutex_lock(&port_priv->mcr_mutex);
692 /* 'Set' takes precedence over 'Clear' */
695 /* Always enable UART_MCR_OUT2 */
696 tmp = UART_MCR_OUT2 | port_priv->shadow_mcr;
698 if (clear & TIOCM_DTR)
699 tmp &= ~UART_MCR_DTR;
701 if (clear & TIOCM_RTS)
702 tmp &= ~UART_MCR_RTS;
710 status = f81534_set_port_register(port, F81534_MODEM_CONTROL_REG, tmp);
712 dev_err(&port->dev, "%s: MCR write failed\n", __func__);
713 mutex_unlock(&port_priv->mcr_mutex);
717 port_priv->shadow_mcr = tmp;
718 mutex_unlock(&port_priv->mcr_mutex);
723 * This function will search the data area with token F81534_CUSTOM_VALID_TOKEN
724 * for latest configuration index. If nothing found
725 * (*index = F81534_CUSTOM_NO_CUSTOM_DATA), We'll load default configure in
726 * F81534_DEF_CONF_ADDRESS_START section.
728 * Due to we only use block0 to save data, so *index should be 0 or
729 * F81534_CUSTOM_NO_CUSTOM_DATA.
731 static int f81534_find_config_idx(struct usb_serial *serial, u8 *index)
736 status = f81534_read_flash(serial, F81534_CUSTOM_ADDRESS_START, 1,
739 dev_err(&serial->interface->dev, "%s: read failed: %d\n",
744 /* We'll use the custom data when the data is valid. */
745 if (tmp == F81534_CUSTOM_VALID_TOKEN)
748 *index = F81534_CUSTOM_NO_CUSTOM_DATA;
754 * The F81532/534 will not report serial port to USB serial subsystem when
755 * H/W DCD/DSR/CTS/RI/RX pin connected to ground.
757 * To detect RX pin status, we'll enable MCR interal loopback, disable it and
758 * delayed for 60ms. It connected to ground If LSR register report UART_LSR_BI.
760 static bool f81534_check_port_hw_disabled(struct usb_serial *serial, int phy)
768 msr_mask = UART_MSR_DCD | UART_MSR_RI | UART_MSR_DSR | UART_MSR_CTS;
770 status = f81534_get_phy_port_register(serial, phy,
771 F81534_MODEM_STATUS_REG, &msr);
775 if ((msr & msr_mask) != msr_mask)
778 status = f81534_set_phy_port_register(serial, phy,
779 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
780 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
784 status = f81534_get_phy_port_register(serial, phy,
785 F81534_MODEM_CONTROL_REG, &old_mcr);
789 status = f81534_set_phy_port_register(serial, phy,
790 F81534_MODEM_CONTROL_REG, UART_MCR_LOOP);
794 status = f81534_set_phy_port_register(serial, phy,
795 F81534_MODEM_CONTROL_REG, 0x0);
801 status = f81534_get_phy_port_register(serial, phy,
802 F81534_LINE_STATUS_REG, &lsr);
806 status = f81534_set_phy_port_register(serial, phy,
807 F81534_MODEM_CONTROL_REG, old_mcr);
811 if ((lsr & UART_LSR_BI) == UART_LSR_BI)
818 * We had 2 generation of F81532/534 IC. All has an internal storage.
820 * 1st is pure USB-to-TTL RS232 IC and designed for 4 ports only, no any
821 * internal data will used. All mode and gpio control should manually set
822 * by AP or Driver and all storage space value are 0xff. The
823 * f81534_calc_num_ports() will run to final we marked as "oldest version"
826 * 2rd is designed to more generic to use any transceiver and this is our
827 * mass production type. We'll save data in F81534_CUSTOM_ADDRESS_START
828 * (0x2f00) with 9bytes. The 1st byte is a indicater. If the token is
829 * F81534_CUSTOM_VALID_TOKEN(0xf0), the IC is 2nd gen type, the following
830 * 4bytes save port mode (0:RS232/1:RS485 Invert/2:RS485), and the last
831 * 4bytes save GPIO state(value from 0~7 to represent 3 GPIO output pin).
832 * The f81534_calc_num_ports() will run to "new style" with checking
833 * F81534_PORT_UNAVAILABLE section.
835 static int f81534_calc_num_ports(struct usb_serial *serial,
836 struct usb_serial_endpoints *epds)
838 struct f81534_serial_private *serial_priv;
839 struct device *dev = &serial->interface->dev;
840 int size_bulk_in = usb_endpoint_maxp(epds->bulk_in[0]);
841 int size_bulk_out = usb_endpoint_maxp(epds->bulk_out[0]);
847 if (size_bulk_out != F81534_WRITE_BUFFER_SIZE ||
848 size_bulk_in != F81534_MAX_RECEIVE_BLOCK_SIZE) {
849 dev_err(dev, "unsupported endpoint max packet size\n");
853 serial_priv = devm_kzalloc(&serial->interface->dev,
854 sizeof(*serial_priv), GFP_KERNEL);
858 usb_set_serial_data(serial, serial_priv);
859 mutex_init(&serial_priv->urb_mutex);
861 /* Check had custom setting */
862 status = f81534_find_config_idx(serial, &serial_priv->setting_idx);
864 dev_err(&serial->interface->dev, "%s: find idx failed: %d\n",
870 * We'll read custom data only when data available, otherwise we'll
871 * read default value instead.
873 if (serial_priv->setting_idx != F81534_CUSTOM_NO_CUSTOM_DATA) {
874 status = f81534_read_flash(serial,
875 F81534_CUSTOM_ADDRESS_START +
877 sizeof(serial_priv->conf_data),
878 serial_priv->conf_data);
880 dev_err(&serial->interface->dev,
881 "%s: get custom data failed: %d\n",
886 dev_dbg(&serial->interface->dev,
887 "%s: read config from block: %d\n", __func__,
888 serial_priv->setting_idx);
890 /* Read default board setting */
891 status = f81534_read_flash(serial,
892 F81534_DEF_CONF_ADDRESS_START,
893 sizeof(serial_priv->conf_data),
894 serial_priv->conf_data);
896 dev_err(&serial->interface->dev,
897 "%s: read failed: %d\n", __func__,
902 dev_dbg(&serial->interface->dev, "%s: read default config\n",
906 /* New style, find all possible ports */
907 for (i = 0; i < F81534_NUM_PORT; ++i) {
908 if (f81534_check_port_hw_disabled(serial, i))
909 serial_priv->conf_data[i] |= F81534_PORT_UNAVAILABLE;
911 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
918 dev_warn(&serial->interface->dev,
919 "no config found, assuming 4 ports\n");
920 num_port = 4; /* Nothing found, oldest version IC */
923 /* Assign phy-to-logic mapping */
924 for (i = 0; i < F81534_NUM_PORT; ++i) {
925 if (serial_priv->conf_data[i] & F81534_PORT_UNAVAILABLE)
928 serial_priv->tty_idx[i] = index++;
929 dev_dbg(&serial->interface->dev,
930 "%s: phy_num: %d, tty_idx: %d\n", __func__, i,
931 serial_priv->tty_idx[i]);
935 * Setup bulk-out endpoint multiplexing. All ports share the same
938 BUILD_BUG_ON(ARRAY_SIZE(epds->bulk_out) < F81534_NUM_PORT);
940 for (i = 1; i < num_port; ++i)
941 epds->bulk_out[i] = epds->bulk_out[0];
943 epds->num_bulk_out = num_port;
948 static void f81534_set_termios(struct tty_struct *tty,
949 struct usb_serial_port *port,
950 struct ktermios *old_termios)
957 if (C_BAUD(tty) == B0)
958 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
959 else if (old_termios && (old_termios->c_cflag & CBAUD) == B0)
960 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
963 new_lcr |= UART_LCR_PARITY;
966 new_lcr |= UART_LCR_EPAR;
969 new_lcr |= UART_LCR_SPAR;
973 new_lcr |= UART_LCR_STOP;
975 switch (C_CSIZE(tty)) {
977 new_lcr |= UART_LCR_WLEN5;
980 new_lcr |= UART_LCR_WLEN6;
983 new_lcr |= UART_LCR_WLEN7;
987 new_lcr |= UART_LCR_WLEN8;
991 baud = tty_get_baud_rate(tty);
996 old_baud = tty_termios_baud_rate(old_termios);
998 old_baud = F81534_DEFAULT_BAUD_RATE;
1000 dev_dbg(&port->dev, "%s: baud: %d\n", __func__, baud);
1002 status = f81534_set_port_config(port, tty, baud, old_baud, new_lcr);
1004 dev_err(&port->dev, "%s: set port config failed: %d\n",
1009 static int f81534_submit_read_urb(struct usb_serial *serial, gfp_t flags)
1011 return usb_serial_generic_submit_read_urbs(serial->port[0], flags);
1014 static void f81534_msr_changed(struct usb_serial_port *port, u8 msr)
1016 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1017 struct tty_struct *tty;
1018 unsigned long flags;
1021 if (!(msr & UART_MSR_ANY_DELTA))
1024 spin_lock_irqsave(&port_priv->msr_lock, flags);
1025 old_msr = port_priv->shadow_msr;
1026 port_priv->shadow_msr = msr;
1027 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1029 dev_dbg(&port->dev, "%s: MSR from %02x to %02x\n", __func__, old_msr,
1032 /* Update input line counters */
1033 if (msr & UART_MSR_DCTS)
1035 if (msr & UART_MSR_DDSR)
1037 if (msr & UART_MSR_DDCD)
1039 if (msr & UART_MSR_TERI)
1042 wake_up_interruptible(&port->port.delta_msr_wait);
1044 if (!(msr & UART_MSR_DDCD))
1047 dev_dbg(&port->dev, "%s: DCD Changed: phy_num: %d from %x to %x\n",
1048 __func__, port_priv->phy_num, old_msr, msr);
1050 tty = tty_port_tty_get(&port->port);
1054 usb_serial_handle_dcd_change(port, tty, msr & UART_MSR_DCD);
1058 static int f81534_read_msr(struct usb_serial_port *port)
1060 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1061 unsigned long flags;
1065 /* Get MSR initial value */
1066 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1070 /* Force update current state */
1071 spin_lock_irqsave(&port_priv->msr_lock, flags);
1072 port_priv->shadow_msr = msr;
1073 spin_unlock_irqrestore(&port_priv->msr_lock, flags);
1078 static int f81534_open(struct tty_struct *tty, struct usb_serial_port *port)
1080 struct f81534_serial_private *serial_priv =
1081 usb_get_serial_data(port->serial);
1082 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1085 status = f81534_set_port_register(port,
1086 F81534_FIFO_CONTROL_REG, UART_FCR_ENABLE_FIFO |
1087 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
1089 dev_err(&port->dev, "%s: Clear FIFO failed: %d\n", __func__,
1095 f81534_set_termios(tty, port, NULL);
1097 status = f81534_read_msr(port);
1101 mutex_lock(&serial_priv->urb_mutex);
1103 /* Submit Read URBs for first port opened */
1104 if (!serial_priv->opened_port) {
1105 status = f81534_submit_read_urb(port->serial, GFP_KERNEL);
1110 serial_priv->opened_port++;
1113 mutex_unlock(&serial_priv->urb_mutex);
1115 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1119 static void f81534_close(struct usb_serial_port *port)
1121 struct f81534_serial_private *serial_priv =
1122 usb_get_serial_data(port->serial);
1123 struct usb_serial_port *port0 = port->serial->port[0];
1124 unsigned long flags;
1127 usb_kill_urb(port->write_urbs[0]);
1129 spin_lock_irqsave(&port->lock, flags);
1130 kfifo_reset_out(&port->write_fifo);
1131 spin_unlock_irqrestore(&port->lock, flags);
1133 /* Kill Read URBs when final port closed */
1134 mutex_lock(&serial_priv->urb_mutex);
1135 serial_priv->opened_port--;
1137 if (!serial_priv->opened_port) {
1138 for (i = 0; i < ARRAY_SIZE(port0->read_urbs); ++i)
1139 usb_kill_urb(port0->read_urbs[i]);
1142 mutex_unlock(&serial_priv->urb_mutex);
1145 static void f81534_get_serial_info(struct tty_struct *tty, struct serial_struct *ss)
1147 struct usb_serial_port *port = tty->driver_data;
1148 struct f81534_port_private *port_priv;
1150 port_priv = usb_get_serial_port_data(port);
1152 ss->baud_base = port_priv->baud_base;
1155 static void f81534_process_per_serial_block(struct usb_serial_port *port,
1158 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1159 int phy_num = data[0];
1160 size_t read_size = 0;
1167 * The block layout is 128 Bytes
1168 * index 0: port phy idx (e.g., 0,1,2,3),
1169 * index 1: It's could be
1170 * F81534_TOKEN_RECEIVE
1171 * F81534_TOKEN_TX_EMPTY
1172 * F81534_TOKEN_MSR_CHANGE
1173 * index 2: serial in size (data+lsr, must be even)
1174 * meaningful for F81534_TOKEN_RECEIVE only
1175 * index 3: current MSR with this device
1176 * index 4~127: serial in data block (data+lsr, must be even)
1179 case F81534_TOKEN_TX_EMPTY:
1180 set_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1182 /* Try to submit writer */
1183 status = f81534_submit_writer(port, GFP_ATOMIC);
1185 dev_err(&port->dev, "%s: submit failed\n", __func__);
1188 case F81534_TOKEN_MSR_CHANGE:
1189 f81534_msr_changed(port, data[3]);
1192 case F81534_TOKEN_RECEIVE:
1193 read_size = data[2];
1194 if (read_size > F81534_MAX_RX_SIZE) {
1196 "%s: phy: %d read_size: %zu larger than: %d\n",
1197 __func__, phy_num, read_size,
1198 F81534_MAX_RX_SIZE);
1205 dev_warn(&port->dev, "%s: unknown token: %02x\n", __func__,
1210 for (i = 4; i < 4 + read_size; i += 2) {
1211 tty_flag = TTY_NORMAL;
1214 if (lsr & UART_LSR_BRK_ERROR_BITS) {
1215 if (lsr & UART_LSR_BI) {
1216 tty_flag = TTY_BREAK;
1218 usb_serial_handle_break(port);
1219 } else if (lsr & UART_LSR_PE) {
1220 tty_flag = TTY_PARITY;
1221 port->icount.parity++;
1222 } else if (lsr & UART_LSR_FE) {
1223 tty_flag = TTY_FRAME;
1224 port->icount.frame++;
1227 if (lsr & UART_LSR_OE) {
1228 port->icount.overrun++;
1229 tty_insert_flip_char(&port->port, 0,
1233 schedule_work(&port_priv->lsr_work);
1237 if (usb_serial_handle_sysrq_char(port, data[i]))
1241 tty_insert_flip_char(&port->port, data[i], tty_flag);
1244 tty_flip_buffer_push(&port->port);
1247 static void f81534_process_read_urb(struct urb *urb)
1249 struct f81534_serial_private *serial_priv;
1250 struct usb_serial_port *port;
1251 struct usb_serial *serial;
1257 if (!urb->actual_length ||
1258 urb->actual_length % F81534_RECEIVE_BLOCK_SIZE) {
1262 port = urb->context;
1263 serial = port->serial;
1264 buf = urb->transfer_buffer;
1265 serial_priv = usb_get_serial_data(serial);
1267 for (i = 0; i < urb->actual_length; i += F81534_RECEIVE_BLOCK_SIZE) {
1268 phy_port_num = buf[i];
1269 if (phy_port_num >= F81534_NUM_PORT) {
1271 "%s: phy_port_num: %d larger than: %d\n",
1272 __func__, phy_port_num, F81534_NUM_PORT);
1276 tty_port_num = serial_priv->tty_idx[phy_port_num];
1277 port = serial->port[tty_port_num];
1279 if (tty_port_initialized(&port->port))
1280 f81534_process_per_serial_block(port, &buf[i]);
1284 static void f81534_write_usb_callback(struct urb *urb)
1286 struct usb_serial_port *port = urb->context;
1288 switch (urb->status) {
1294 dev_dbg(&port->dev, "%s - urb stopped: %d\n",
1295 __func__, urb->status);
1298 dev_err(&port->dev, "%s - urb stopped: %d\n",
1299 __func__, urb->status);
1302 dev_dbg(&port->dev, "%s - nonzero urb status: %d\n",
1303 __func__, urb->status);
1308 static void f81534_lsr_worker(struct work_struct *work)
1310 struct f81534_port_private *port_priv;
1311 struct usb_serial_port *port;
1315 port_priv = container_of(work, struct f81534_port_private, lsr_work);
1316 port = port_priv->port;
1318 status = f81534_get_port_register(port, F81534_LINE_STATUS_REG, &tmp);
1320 dev_warn(&port->dev, "read LSR failed: %d\n", status);
1323 static int f81534_set_port_output_pin(struct usb_serial_port *port)
1325 struct f81534_serial_private *serial_priv;
1326 struct f81534_port_private *port_priv;
1327 struct usb_serial *serial;
1328 const struct f81534_port_out_pin *pins;
1334 serial = port->serial;
1335 serial_priv = usb_get_serial_data(serial);
1336 port_priv = usb_get_serial_port_data(port);
1338 idx = F81534_CONF_INIT_GPIO_OFFSET + port_priv->phy_num;
1339 value = serial_priv->conf_data[idx];
1340 if (value >= F81534_CONF_GPIO_SHUTDOWN) {
1342 * Newer IC configure will make transceiver in shutdown mode on
1343 * initial power on. We need enable it before using UARTs.
1345 idx = F81534_CONF_WORK_GPIO_OFFSET + port_priv->phy_num;
1346 value = serial_priv->conf_data[idx];
1347 if (value >= F81534_CONF_GPIO_SHUTDOWN)
1348 value = F81534_CONF_GPIO_RS232;
1351 pins = &f81534_port_out_pins[port_priv->phy_num];
1353 for (i = 0; i < ARRAY_SIZE(pins->pin); ++i) {
1354 status = f81534_set_mask_register(serial,
1355 pins->pin[i].reg_addr, pins->pin[i].reg_mask,
1356 value & BIT(i) ? pins->pin[i].reg_mask : 0);
1361 dev_dbg(&port->dev, "Output pin (M0/M1/M2): %d\n", value);
1365 static int f81534_port_probe(struct usb_serial_port *port)
1367 struct f81534_serial_private *serial_priv;
1368 struct f81534_port_private *port_priv;
1372 serial_priv = usb_get_serial_data(port->serial);
1373 port_priv = devm_kzalloc(&port->dev, sizeof(*port_priv), GFP_KERNEL);
1378 * We'll make tx frame error when baud rate from 384~500kps. So we'll
1379 * delay all tx data frame with 1bit.
1381 port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT;
1382 spin_lock_init(&port_priv->msr_lock);
1383 mutex_init(&port_priv->mcr_mutex);
1384 mutex_init(&port_priv->lcr_mutex);
1385 INIT_WORK(&port_priv->lsr_work, f81534_lsr_worker);
1387 /* Assign logic-to-phy mapping */
1388 ret = f81534_logic_to_phy_port(port->serial, port);
1392 port_priv->phy_num = ret;
1393 port_priv->port = port;
1394 usb_set_serial_port_data(port, port_priv);
1395 dev_dbg(&port->dev, "%s: port_number: %d, phy_num: %d\n", __func__,
1396 port->port_number, port_priv->phy_num);
1399 * The F81532/534 will hang-up when enable LSR interrupt in IER and
1400 * occur data overrun. So we'll disable the LSR interrupt in probe()
1401 * and submit the LSR worker to clear LSR state when reported LSR error
1402 * bit with bulk-in data in f81534_process_per_serial_block().
1404 ret = f81534_set_port_register(port, F81534_INTERRUPT_ENABLE_REG,
1405 UART_IER_RDI | UART_IER_THRI | UART_IER_MSI);
1409 value = serial_priv->conf_data[port_priv->phy_num];
1410 switch (value & F81534_PORT_CONF_MODE_MASK) {
1411 case F81534_PORT_CONF_RS485_INVERT:
1412 port_priv->shadow_clk |= F81534_CLK_RS485_MODE |
1413 F81534_CLK_RS485_INVERT;
1414 dev_dbg(&port->dev, "RS485 invert mode\n");
1416 case F81534_PORT_CONF_RS485:
1417 port_priv->shadow_clk |= F81534_CLK_RS485_MODE;
1418 dev_dbg(&port->dev, "RS485 mode\n");
1422 case F81534_PORT_CONF_RS232:
1423 dev_dbg(&port->dev, "RS232 mode\n");
1427 return f81534_set_port_output_pin(port);
1430 static void f81534_port_remove(struct usb_serial_port *port)
1432 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1434 flush_work(&port_priv->lsr_work);
1437 static int f81534_tiocmget(struct tty_struct *tty)
1439 struct usb_serial_port *port = tty->driver_data;
1440 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1446 /* Read current MSR from device */
1447 status = f81534_get_port_register(port, F81534_MODEM_STATUS_REG, &msr);
1451 mutex_lock(&port_priv->mcr_mutex);
1452 mcr = port_priv->shadow_mcr;
1453 mutex_unlock(&port_priv->mcr_mutex);
1455 r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
1456 (mcr & UART_MCR_RTS ? TIOCM_RTS : 0) |
1457 (msr & UART_MSR_CTS ? TIOCM_CTS : 0) |
1458 (msr & UART_MSR_DCD ? TIOCM_CAR : 0) |
1459 (msr & UART_MSR_RI ? TIOCM_RI : 0) |
1460 (msr & UART_MSR_DSR ? TIOCM_DSR : 0);
1465 static int f81534_tiocmset(struct tty_struct *tty, unsigned int set,
1468 struct usb_serial_port *port = tty->driver_data;
1470 return f81534_update_mctrl(port, set, clear);
1473 static void f81534_dtr_rts(struct usb_serial_port *port, int on)
1476 f81534_update_mctrl(port, TIOCM_DTR | TIOCM_RTS, 0);
1478 f81534_update_mctrl(port, 0, TIOCM_DTR | TIOCM_RTS);
1481 static int f81534_write(struct tty_struct *tty, struct usb_serial_port *port,
1482 const u8 *buf, int count)
1484 int bytes_out, status;
1489 bytes_out = kfifo_in_locked(&port->write_fifo, buf, count,
1492 status = f81534_submit_writer(port, GFP_ATOMIC);
1494 dev_err(&port->dev, "%s: submit failed\n", __func__);
1501 static bool f81534_tx_empty(struct usb_serial_port *port)
1503 struct f81534_port_private *port_priv = usb_get_serial_port_data(port);
1505 return test_bit(F81534_TX_EMPTY_BIT, &port_priv->tx_empty);
1508 static int f81534_resume(struct usb_serial *serial)
1510 struct f81534_serial_private *serial_priv =
1511 usb_get_serial_data(serial);
1512 struct usb_serial_port *port;
1518 * We'll register port 0 bulkin when port had opened, It'll take all
1519 * port received data, MSR register change and TX_EMPTY information.
1521 mutex_lock(&serial_priv->urb_mutex);
1523 if (serial_priv->opened_port) {
1524 status = f81534_submit_read_urb(serial, GFP_NOIO);
1526 mutex_unlock(&serial_priv->urb_mutex);
1531 mutex_unlock(&serial_priv->urb_mutex);
1533 for (i = 0; i < serial->num_ports; i++) {
1534 port = serial->port[i];
1535 if (!tty_port_initialized(&port->port))
1538 status = f81534_submit_writer(port, GFP_NOIO);
1540 dev_err(&port->dev, "%s: submit failed\n", __func__);
1551 static struct usb_serial_driver f81534_device = {
1553 .owner = THIS_MODULE,
1556 .description = DRIVER_DESC,
1557 .id_table = f81534_id_table,
1560 .open = f81534_open,
1561 .close = f81534_close,
1562 .write = f81534_write,
1563 .tx_empty = f81534_tx_empty,
1564 .calc_num_ports = f81534_calc_num_ports,
1565 .port_probe = f81534_port_probe,
1566 .port_remove = f81534_port_remove,
1567 .break_ctl = f81534_break_ctl,
1568 .dtr_rts = f81534_dtr_rts,
1569 .process_read_urb = f81534_process_read_urb,
1570 .get_serial = f81534_get_serial_info,
1571 .tiocmget = f81534_tiocmget,
1572 .tiocmset = f81534_tiocmset,
1573 .write_bulk_callback = f81534_write_usb_callback,
1574 .set_termios = f81534_set_termios,
1575 .resume = f81534_resume,
1578 static struct usb_serial_driver *const serial_drivers[] = {
1579 &f81534_device, NULL
1582 module_usb_serial_driver(serial_drivers, f81534_id_table);
1584 MODULE_DEVICE_TABLE(usb, f81534_id_table);
1585 MODULE_DESCRIPTION(DRIVER_DESC);
1586 MODULE_AUTHOR("Peter Hong <Peter_Hong@fintek.com.tw>");
1587 MODULE_AUTHOR("Tom Tsai <Tom_Tsai@fintek.com.tw>");
1588 MODULE_LICENSE("GPL");