1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner SUNXI "glue layer"
5 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
6 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
8 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
9 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
10 * javen <javen@allwinnertech.com>
12 * Based on the DA8xx "glue layer" code.
13 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
14 * Copyright (C) 2005-2006 by Texas Instruments
16 * This file is part of the Inventra Controller Driver for Linux.
21 #include <generic-phy.h>
24 #include <phy-sun4i-usb.h>
26 #include <asm/arch/cpu.h>
27 #include <asm/arch/clock.h>
28 #include <dm/device_compat.h>
31 #include <linux/bitops.h>
32 #include <linux/delay.h>
33 #include <linux/usb/musb.h>
34 #include "linux-compat.h"
35 #include "musb_core.h"
36 #include "musb_uboot.h"
38 /******************************************************************************
39 ******************************************************************************
40 * From the Allwinner driver
41 ******************************************************************************
42 ******************************************************************************/
44 /******************************************************************************
45 * From include/sunxi_usb_bsp.h
46 ******************************************************************************/
49 #define USBC_REG_o_ISCR 0x0400
50 #define USBC_REG_o_PHYCTL 0x0404
51 #define USBC_REG_o_PHYBIST 0x0408
52 #define USBC_REG_o_PHYTUNE 0x040c
54 #define USBC_REG_o_VEND0 0x0043
56 /* Interface Status and Control */
57 #define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
58 #define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
59 #define USBC_BP_ISCR_EXT_ID_STATUS 28
60 #define USBC_BP_ISCR_EXT_DM_STATUS 27
61 #define USBC_BP_ISCR_EXT_DP_STATUS 26
62 #define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
63 #define USBC_BP_ISCR_MERGED_ID_STATUS 24
65 #define USBC_BP_ISCR_ID_PULLUP_EN 17
66 #define USBC_BP_ISCR_DPDM_PULLUP_EN 16
67 #define USBC_BP_ISCR_FORCE_ID 14
68 #define USBC_BP_ISCR_FORCE_VBUS_VALID 12
69 #define USBC_BP_ISCR_VBUS_VALID_SRC 10
71 #define USBC_BP_ISCR_HOSC_EN 7
72 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
73 #define USBC_BP_ISCR_ID_CHANGE_DETECT 5
74 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
75 #define USBC_BP_ISCR_IRQ_ENABLE 3
76 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
77 #define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
78 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
80 /******************************************************************************
82 ******************************************************************************/
84 #define OFF_SUN6I_AHB_RESET0 0x2c0
86 struct sunxi_musb_config {
87 struct musb_hdrc_config *config;
91 struct musb_host_data mdata;
94 struct sunxi_musb_config *cfg;
98 #define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev)
100 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
104 temp &= ~BIT(USBC_BP_ISCR_VBUS_CHANGE_DETECT);
105 temp &= ~BIT(USBC_BP_ISCR_ID_CHANGE_DETECT);
106 temp &= ~BIT(USBC_BP_ISCR_DPDM_CHANGE_DETECT);
111 static void USBC_EnableIdPullUp(__iomem void *base)
115 reg_val = musb_readl(base, USBC_REG_o_ISCR);
116 reg_val |= BIT(USBC_BP_ISCR_ID_PULLUP_EN);
117 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
118 musb_writel(base, USBC_REG_o_ISCR, reg_val);
121 static void USBC_EnableDpDmPullUp(__iomem void *base)
125 reg_val = musb_readl(base, USBC_REG_o_ISCR);
126 reg_val |= BIT(USBC_BP_ISCR_DPDM_PULLUP_EN);
127 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
128 musb_writel(base, USBC_REG_o_ISCR, reg_val);
131 static void USBC_ForceIdToLow(__iomem void *base)
135 reg_val = musb_readl(base, USBC_REG_o_ISCR);
136 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
137 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
138 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
139 musb_writel(base, USBC_REG_o_ISCR, reg_val);
142 static void USBC_ForceIdToHigh(__iomem void *base)
146 reg_val = musb_readl(base, USBC_REG_o_ISCR);
147 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
148 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
149 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
150 musb_writel(base, USBC_REG_o_ISCR, reg_val);
153 static void USBC_ForceVbusValidToLow(__iomem void *base)
157 reg_val = musb_readl(base, USBC_REG_o_ISCR);
158 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
159 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
160 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
161 musb_writel(base, USBC_REG_o_ISCR, reg_val);
164 static void USBC_ForceVbusValidToHigh(__iomem void *base)
168 reg_val = musb_readl(base, USBC_REG_o_ISCR);
169 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
170 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
171 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
172 musb_writel(base, USBC_REG_o_ISCR, reg_val);
175 static void USBC_ConfigFIFO_Base(void)
179 /* config usb fifo, 8kb mode */
180 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
181 reg_value &= ~(0x03 << 0);
183 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
186 /******************************************************************************
187 * Needed for the DFU polling magic
188 ******************************************************************************/
190 static u8 last_int_usb;
192 bool dfu_usb_get_reset(void)
194 return !!(last_int_usb & MUSB_INTR_RESET);
197 /******************************************************************************
199 ******************************************************************************/
201 static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
203 struct musb *musb = __hci;
204 irqreturn_t retval = IRQ_NONE;
206 /* read and flush interrupts */
207 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
208 last_int_usb = musb->int_usb;
210 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
211 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
213 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
214 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
216 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
218 if (musb->int_usb || musb->int_tx || musb->int_rx)
219 retval |= musb_interrupt(musb);
224 /* musb_core does not call enable / disable in a balanced manner <sigh> */
225 static bool enabled = false;
227 static int sunxi_musb_enable(struct musb *musb)
229 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
232 pr_debug("%s():\n", __func__);
234 musb_ep_select(musb->mregs, 0);
235 musb_writeb(musb->mregs, MUSB_FADDR, 0);
240 /* select PIO mode */
241 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
243 if (is_host_enabled(musb)) {
244 ret = sun4i_usb_phy_id_detect(&glue->phy);
246 printf("No host cable detected: ");
250 ret = generic_phy_power_on(&glue->phy);
252 pr_debug("failed to power on USB PHY\n");
257 USBC_ForceVbusValidToHigh(musb->mregs);
263 static void sunxi_musb_disable(struct musb *musb)
265 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
268 pr_debug("%s():\n", __func__);
273 if (is_host_enabled(musb)) {
274 ret = generic_phy_power_off(&glue->phy);
276 pr_debug("failed to power off USB PHY\n");
281 USBC_ForceVbusValidToLow(musb->mregs);
282 mdelay(200); /* Wait for the current session to timeout */
287 static int sunxi_musb_init(struct musb *musb)
289 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
292 pr_debug("%s():\n", __func__);
294 ret = clk_enable(&glue->clk);
296 dev_err(musb->controller, "failed to enable clock\n");
300 if (reset_valid(&glue->rst)) {
301 ret = reset_deassert(&glue->rst);
303 dev_err(musb->controller, "failed to deassert reset\n");
308 ret = generic_phy_init(&glue->phy);
310 dev_dbg(musb->controller, "failed to init USB PHY\n");
314 musb->isr = sunxi_musb_interrupt;
316 USBC_ConfigFIFO_Base();
317 USBC_EnableDpDmPullUp(musb->mregs);
318 USBC_EnableIdPullUp(musb->mregs);
320 if (is_host_enabled(musb)) {
322 USBC_ForceIdToLow(musb->mregs);
324 /* Peripheral mode */
325 USBC_ForceIdToHigh(musb->mregs);
327 USBC_ForceVbusValidToHigh(musb->mregs);
332 if (reset_valid(&glue->rst))
333 reset_assert(&glue->rst);
335 clk_disable(&glue->clk);
339 static int sunxi_musb_exit(struct musb *musb)
341 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
344 if (generic_phy_valid(&glue->phy)) {
345 ret = generic_phy_exit(&glue->phy);
347 dev_dbg(musb->controller,
348 "failed to power off usb phy\n");
353 if (reset_valid(&glue->rst))
354 reset_assert(&glue->rst);
355 clk_disable(&glue->clk);
360 static void sunxi_musb_pre_root_reset_end(struct musb *musb)
362 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
364 sun4i_usb_phy_set_squelch_detect(&glue->phy, false);
367 static void sunxi_musb_post_root_reset_end(struct musb *musb)
369 struct sunxi_glue *glue = to_sunxi_glue(musb->controller);
371 sun4i_usb_phy_set_squelch_detect(&glue->phy, true);
374 static const struct musb_platform_ops sunxi_musb_ops = {
375 .init = sunxi_musb_init,
376 .exit = sunxi_musb_exit,
377 .enable = sunxi_musb_enable,
378 .disable = sunxi_musb_disable,
379 .pre_root_reset_end = sunxi_musb_pre_root_reset_end,
380 .post_root_reset_end = sunxi_musb_post_root_reset_end,
383 /* Allwinner OTG supports up to 5 endpoints */
384 #define SUNXI_MUSB_MAX_EP_NUM 6
385 #define SUNXI_MUSB_RAM_BITS 11
387 static struct musb_fifo_cfg sunxi_musb_mode_cfg[] = {
388 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
389 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
390 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
391 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
392 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
393 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
394 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
395 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
396 MUSB_EP_FIFO_SINGLE(5, FIFO_TX, 512),
397 MUSB_EP_FIFO_SINGLE(5, FIFO_RX, 512),
400 /* H3/V3s OTG supports only 4 endpoints */
401 #define SUNXI_MUSB_MAX_EP_NUM_H3 5
403 static struct musb_fifo_cfg sunxi_musb_mode_cfg_h3[] = {
404 MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
405 MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
406 MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
407 MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
408 MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
409 MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
410 MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
411 MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
414 static struct musb_hdrc_config musb_config = {
415 .fifo_cfg = sunxi_musb_mode_cfg,
416 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg),
419 .num_eps = SUNXI_MUSB_MAX_EP_NUM,
420 .ram_bits = SUNXI_MUSB_RAM_BITS,
423 static struct musb_hdrc_config musb_config_h3 = {
424 .fifo_cfg = sunxi_musb_mode_cfg_h3,
425 .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_h3),
429 .num_eps = SUNXI_MUSB_MAX_EP_NUM_H3,
430 .ram_bits = SUNXI_MUSB_RAM_BITS,
433 static int musb_usb_probe(struct udevice *dev)
435 struct sunxi_glue *glue = dev_get_priv(dev);
436 struct musb_host_data *host = &glue->mdata;
437 struct musb_hdrc_platform_data pdata;
438 void *base = dev_read_addr_ptr(dev);
441 #ifdef CONFIG_USB_MUSB_HOST
442 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
448 glue->cfg = (struct sunxi_musb_config *)dev_get_driver_data(dev);
452 ret = clk_get_by_index(dev, 0, &glue->clk);
454 dev_err(dev, "failed to get clock\n");
458 ret = reset_get_by_index(dev, 0, &glue->rst);
459 if (ret && ret != -ENOENT) {
460 dev_err(dev, "failed to get reset\n");
464 ret = generic_phy_get_by_name(dev, "usb", &glue->phy);
466 pr_err("failed to get usb PHY\n");
470 memset(&pdata, 0, sizeof(pdata));
472 pdata.platform_ops = &sunxi_musb_ops;
473 pdata.config = glue->cfg->config;
475 #ifdef CONFIG_USB_MUSB_HOST
476 priv->desc_before_addr = true;
478 pdata.mode = MUSB_HOST;
479 host->host = musb_init_controller(&pdata, &glue->dev, base);
483 ret = musb_lowlevel_init(host);
485 printf("Allwinner mUSB OTG (Host)\n");
487 pdata.mode = MUSB_PERIPHERAL;
488 host->host = musb_register(&pdata, &glue->dev, base);
492 printf("Allwinner mUSB OTG (Peripheral)\n");
498 static int musb_usb_remove(struct udevice *dev)
500 struct sunxi_glue *glue = dev_get_priv(dev);
501 struct musb_host_data *host = &glue->mdata;
503 musb_stop(host->host);
510 static const struct sunxi_musb_config sun4i_a10_cfg = {
511 .config = &musb_config,
514 static const struct sunxi_musb_config sun6i_a31_cfg = {
515 .config = &musb_config,
518 static const struct sunxi_musb_config sun8i_h3_cfg = {
519 .config = &musb_config_h3,
522 static const struct udevice_id sunxi_musb_ids[] = {
523 { .compatible = "allwinner,sun4i-a10-musb",
524 .data = (ulong)&sun4i_a10_cfg },
525 { .compatible = "allwinner,sun6i-a31-musb",
526 .data = (ulong)&sun6i_a31_cfg },
527 { .compatible = "allwinner,sun8i-a33-musb",
528 .data = (ulong)&sun6i_a31_cfg },
529 { .compatible = "allwinner,sun8i-h3-musb",
530 .data = (ulong)&sun8i_h3_cfg },
534 U_BOOT_DRIVER(usb_musb) = {
535 .name = "sunxi-musb",
536 #ifdef CONFIG_USB_MUSB_HOST
539 .id = UCLASS_USB_GADGET_GENERIC,
541 .of_match = sunxi_musb_ids,
542 .probe = musb_usb_probe,
543 .remove = musb_usb_remove,
544 #ifdef CONFIG_USB_MUSB_HOST
545 .ops = &musb_usb_ops,
547 .plat_auto = sizeof(struct usb_plat),
548 .priv_auto = sizeof(struct sunxi_glue),