2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk;
38 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
39 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * xhci_handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
56 u32 mask, u32 done, int usec)
61 result = xhci_readl(xhci, ptr);
62 if (result == ~(u32)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd *xhci)
83 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
87 cmd = xhci_readl(xhci, &xhci->op_regs->command);
89 xhci_writel(xhci, cmd, &xhci->op_regs->command);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd *xhci)
103 xhci_dbg(xhci, "// Halt the HC\n");
106 ret = xhci_handshake(xhci, &xhci->op_regs->status,
107 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
109 xhci->xhc_state |= XHCI_STATE_HALTED;
110 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
112 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd *xhci)
125 temp = xhci_readl(xhci, &xhci->op_regs->command);
127 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci, temp, &xhci->op_regs->command);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret = xhci_handshake(xhci, &xhci->op_regs->status,
136 STS_HALT, 0, XHCI_MAX_HALT_USEC);
137 if (ret == -ETIMEDOUT)
138 xhci_err(xhci, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci->xhc_state &= ~XHCI_STATE_HALTED;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd *xhci)
159 state = xhci_readl(xhci, &xhci->op_regs->status);
160 if ((state & STS_HALT) == 0) {
161 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci, "// Reset the HC\n");
166 command = xhci_readl(xhci, &xhci->op_regs->command);
167 command |= CMD_RESET;
168 xhci_writel(xhci, command, &xhci->op_regs->command);
170 ret = xhci_handshake(xhci, &xhci->op_regs->command,
171 CMD_RESET, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret = xhci_handshake(xhci, &xhci->op_regs->status,
181 STS_CNR, 0, 10 * 1000 * 1000);
183 for (i = 0; i < 2; ++i) {
184 xhci->bus_state[i].port_c_suspend = 0;
185 xhci->bus_state[i].suspended_ports = 0;
186 xhci->bus_state[i].resuming_ports = 0;
193 static int xhci_free_msi(struct xhci_hcd *xhci)
197 if (!xhci->msix_entries)
200 for (i = 0; i < xhci->msix_count; i++)
201 if (xhci->msix_entries[i].vector)
202 free_irq(xhci->msix_entries[i].vector,
210 static int xhci_setup_msi(struct xhci_hcd *xhci)
213 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
215 ret = pci_enable_msi(pdev);
217 xhci_dbg(xhci, "failed to allocate MSI entry\n");
221 ret = request_irq(pdev->irq, xhci_msi_irq,
222 0, "xhci_hcd", xhci_to_hcd(xhci));
224 xhci_dbg(xhci, "disable MSI interrupt\n");
225 pci_disable_msi(pdev);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd *xhci)
237 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci)->irq > 0)
244 ret = xhci_free_msi(xhci);
248 free_irq(pdev->irq, xhci_to_hcd(xhci));
256 static int xhci_setup_msix(struct xhci_hcd *xhci)
259 struct usb_hcd *hcd = xhci_to_hcd(xhci);
260 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci->msix_count = min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci->hcs_params1));
273 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
275 if (!xhci->msix_entries) {
276 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
280 for (i = 0; i < xhci->msix_count; i++) {
281 xhci->msix_entries[i].entry = i;
282 xhci->msix_entries[i].vector = 0;
285 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
287 xhci_dbg(xhci, "Failed to enable MSI-X\n");
291 for (i = 0; i < xhci->msix_count; i++) {
292 ret = request_irq(xhci->msix_entries[i].vector,
294 0, "xhci_hcd", xhci_to_hcd(xhci));
299 hcd->msix_enabled = 1;
303 xhci_dbg(xhci, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev);
307 kfree(xhci->msix_entries);
308 xhci->msix_entries = NULL;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
315 struct usb_hcd *hcd = xhci_to_hcd(xhci);
316 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
320 if (xhci->msix_entries) {
321 pci_disable_msix(pdev);
322 kfree(xhci->msix_entries);
323 xhci->msix_entries = NULL;
325 pci_disable_msi(pdev);
328 hcd->msix_enabled = 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
336 if (xhci->msix_entries) {
337 for (i = 0; i < xhci->msix_count; i++)
338 synchronize_irq(xhci->msix_entries[i].vector);
342 static int xhci_try_enable_msi(struct usb_hcd *hcd)
344 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
345 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
349 * Some Fresco Logic host controllers advertise MSI, but fail to
350 * generate interrupts. Don't even try to enable MSI.
352 if (xhci->quirks & XHCI_BROKEN_MSI)
355 /* unregister the legacy interrupt */
357 free_irq(hcd->irq, hcd);
360 ret = xhci_setup_msix(xhci);
362 /* fall back to msi*/
363 ret = xhci_setup_msi(xhci);
366 /* hcd->irq is 0, we have MSI */
370 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
375 /* fall back to legacy interrupt*/
376 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
377 hcd->irq_descr, hcd);
379 xhci_err(xhci, "request interrupt %d failed\n",
383 hcd->irq = pdev->irq;
389 static int xhci_try_enable_msi(struct usb_hcd *hcd)
394 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
398 static void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
404 static void compliance_mode_recovery(unsigned long arg)
406 struct xhci_hcd *xhci;
411 xhci = (struct xhci_hcd *)arg;
413 for (i = 0; i < xhci->num_usb3_ports; i++) {
414 temp = xhci_readl(xhci, xhci->usb3_ports[i]);
415 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
417 * Compliance Mode Detected. Letting USB Core
418 * handle the Warm Reset
420 xhci_dbg(xhci, "Compliance mode detected->port %d\n",
422 xhci_dbg(xhci, "Attempting compliance mode recovery\n");
423 hcd = xhci->shared_hcd;
425 if (hcd->state == HC_STATE_SUSPENDED)
426 usb_hcd_resume_root_hub(hcd);
428 usb_hcd_poll_rh_status(hcd);
432 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
433 mod_timer(&xhci->comp_mode_recovery_timer,
434 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
438 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
439 * that causes ports behind that hardware to enter compliance mode sometimes.
440 * The quirk creates a timer that polls every 2 seconds the link state of
441 * each host controller's port and recovers it by issuing a Warm reset
442 * if Compliance mode is detected, otherwise the port will become "dead" (no
443 * device connections or disconnections will be detected anymore). Becasue no
444 * status event is generated when entering compliance mode (per xhci spec),
445 * this quirk is needed on systems that have the failing hardware installed.
447 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
449 xhci->port_status_u0 = 0;
450 init_timer(&xhci->comp_mode_recovery_timer);
452 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
453 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
454 xhci->comp_mode_recovery_timer.expires = jiffies +
455 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
457 set_timer_slack(&xhci->comp_mode_recovery_timer,
458 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
459 add_timer(&xhci->comp_mode_recovery_timer);
460 xhci_dbg(xhci, "Compliance mode recovery timer initialized\n");
464 * This function identifies the systems that have installed the SN65LVPE502CP
465 * USB3.0 re-driver and that need the Compliance Mode Quirk.
467 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
469 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
471 const char *dmi_product_name, *dmi_sys_vendor;
473 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
474 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
475 if (!dmi_product_name || !dmi_sys_vendor)
478 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
481 if (strstr(dmi_product_name, "Z420") ||
482 strstr(dmi_product_name, "Z620") ||
483 strstr(dmi_product_name, "Z820") ||
484 strstr(dmi_product_name, "Z1 Workstation"))
490 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
492 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
497 * Initialize memory for HCD and xHC (one-time init).
499 * Program the PAGESIZE register, initialize the device context array, create
500 * device contexts (?), set up a command ring segment (or two?), create event
501 * ring (one for now).
503 int xhci_init(struct usb_hcd *hcd)
505 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
508 xhci_dbg(xhci, "xhci_init\n");
509 spin_lock_init(&xhci->lock);
510 if (xhci->hci_version == 0x95 && link_quirk) {
511 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
512 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
514 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
516 retval = xhci_mem_init(xhci, GFP_KERNEL);
517 xhci_dbg(xhci, "Finished xhci_init\n");
519 /* Initializing Compliance Mode Recovery Data If Needed */
520 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
521 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
522 compliance_mode_recovery_timer_init(xhci);
528 /*-------------------------------------------------------------------------*/
531 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
532 static void xhci_event_ring_work(unsigned long arg)
537 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
540 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
542 spin_lock_irqsave(&xhci->lock, flags);
543 temp = xhci_readl(xhci, &xhci->op_regs->status);
544 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
545 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
546 (xhci->xhc_state & XHCI_STATE_HALTED)) {
547 xhci_dbg(xhci, "HW died, polling stopped.\n");
548 spin_unlock_irqrestore(&xhci->lock, flags);
552 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
553 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
554 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
555 xhci->error_bitmask = 0;
556 xhci_dbg(xhci, "Event ring:\n");
557 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
558 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
559 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
560 temp_64 &= ~ERST_PTR_MASK;
561 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
562 xhci_dbg(xhci, "Command ring:\n");
563 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
564 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
565 xhci_dbg_cmd_ptrs(xhci);
566 for (i = 0; i < MAX_HC_SLOTS; ++i) {
569 for (j = 0; j < 31; ++j) {
570 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
573 spin_unlock_irqrestore(&xhci->lock, flags);
576 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
578 xhci_dbg(xhci, "Quit polling the event ring.\n");
582 static int xhci_run_finished(struct xhci_hcd *xhci)
584 if (xhci_start(xhci)) {
588 xhci->shared_hcd->state = HC_STATE_RUNNING;
589 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
591 if (xhci->quirks & XHCI_NEC_HOST)
592 xhci_ring_cmd_db(xhci);
594 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
599 * Start the HC after it was halted.
601 * This function is called by the USB core when the HC driver is added.
602 * Its opposite is xhci_stop().
604 * xhci_init() must be called once before this function can be called.
605 * Reset the HC, enable device slot contexts, program DCBAAP, and
606 * set command ring pointer and event ring pointer.
608 * Setup MSI-X vectors and enable interrupts.
610 int xhci_run(struct usb_hcd *hcd)
615 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
617 /* Start the xHCI host controller running only after the USB 2.0 roothub
621 hcd->uses_new_polling = 1;
622 if (!usb_hcd_is_primary_hcd(hcd))
623 return xhci_run_finished(xhci);
625 xhci_dbg(xhci, "xhci_run\n");
627 ret = xhci_try_enable_msi(hcd);
631 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
632 init_timer(&xhci->event_ring_timer);
633 xhci->event_ring_timer.data = (unsigned long) xhci;
634 xhci->event_ring_timer.function = xhci_event_ring_work;
635 /* Poll the event ring */
636 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
638 xhci_dbg(xhci, "Setting event ring polling timer\n");
639 add_timer(&xhci->event_ring_timer);
642 xhci_dbg(xhci, "Command ring memory map follows:\n");
643 xhci_debug_ring(xhci, xhci->cmd_ring);
644 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
645 xhci_dbg_cmd_ptrs(xhci);
647 xhci_dbg(xhci, "ERST memory map follows:\n");
648 xhci_dbg_erst(xhci, &xhci->erst);
649 xhci_dbg(xhci, "Event ring:\n");
650 xhci_debug_ring(xhci, xhci->event_ring);
651 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
652 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
653 temp_64 &= ~ERST_PTR_MASK;
654 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
656 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
657 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
658 temp &= ~ER_IRQ_INTERVAL_MASK;
660 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
662 /* Set the HCD state before we enable the irqs */
663 temp = xhci_readl(xhci, &xhci->op_regs->command);
665 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
667 xhci_writel(xhci, temp, &xhci->op_regs->command);
669 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
670 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
671 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
672 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
673 &xhci->ir_set->irq_pending);
674 xhci_print_ir_set(xhci, 0);
676 if (xhci->quirks & XHCI_NEC_HOST)
677 xhci_queue_vendor_command(xhci, 0, 0, 0,
678 TRB_TYPE(TRB_NEC_GET_FW));
680 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
684 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
686 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
688 spin_lock_irq(&xhci->lock);
691 /* The shared_hcd is going to be deallocated shortly (the USB core only
692 * calls this function when allocation fails in usb_add_hcd(), or
693 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
695 xhci->shared_hcd = NULL;
696 spin_unlock_irq(&xhci->lock);
702 * This function is called by the USB core when the HC driver is removed.
703 * Its opposite is xhci_run().
705 * Disable device contexts, disable IRQs, and quiesce the HC.
706 * Reset the HC, finish any completed transactions, and cleanup memory.
708 void xhci_stop(struct usb_hcd *hcd)
711 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
713 if (!usb_hcd_is_primary_hcd(hcd)) {
714 xhci_only_stop_hcd(xhci->shared_hcd);
718 spin_lock_irq(&xhci->lock);
719 /* Make sure the xHC is halted for a USB3 roothub
720 * (xhci_stop() could be called as part of failed init).
724 spin_unlock_irq(&xhci->lock);
726 xhci_cleanup_msix(xhci);
728 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
729 /* Tell the event ring poll function not to reschedule */
731 del_timer_sync(&xhci->event_ring_timer);
734 /* Deleting Compliance Mode Recovery Timer */
735 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
736 (!(xhci_all_ports_seen_u0(xhci)))) {
737 del_timer_sync(&xhci->comp_mode_recovery_timer);
738 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
742 if (xhci->quirks & XHCI_AMD_PLL_FIX)
745 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
746 temp = xhci_readl(xhci, &xhci->op_regs->status);
747 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
748 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
749 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
750 &xhci->ir_set->irq_pending);
751 xhci_print_ir_set(xhci, 0);
753 xhci_dbg(xhci, "cleaning up memory\n");
754 xhci_mem_cleanup(xhci);
755 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
756 xhci_readl(xhci, &xhci->op_regs->status));
760 * Shutdown HC (not bus-specific)
762 * This is called when the machine is rebooting or halting. We assume that the
763 * machine will be powered off, and the HC's internal state will be reset.
764 * Don't bother to free memory.
766 * This will only ever be called with the main usb_hcd (the USB3 roothub).
768 void xhci_shutdown(struct usb_hcd *hcd)
770 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
772 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
773 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
775 spin_lock_irq(&xhci->lock);
777 spin_unlock_irq(&xhci->lock);
779 xhci_cleanup_msix(xhci);
781 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
782 xhci_readl(xhci, &xhci->op_regs->status));
786 static void xhci_save_registers(struct xhci_hcd *xhci)
788 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
789 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
790 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
791 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
792 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
793 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
794 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
795 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
796 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
799 static void xhci_restore_registers(struct xhci_hcd *xhci)
801 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
802 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
803 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
804 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
805 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
806 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
807 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
808 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
809 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
812 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
816 /* step 2: initialize command ring buffer */
817 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
818 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
819 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
820 xhci->cmd_ring->dequeue) &
821 (u64) ~CMD_RING_RSVD_BITS) |
822 xhci->cmd_ring->cycle_state;
823 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
824 (long unsigned long) val_64);
825 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
829 * The whole command ring must be cleared to zero when we suspend the host.
831 * The host doesn't save the command ring pointer in the suspend well, so we
832 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
833 * aligned, because of the reserved bits in the command ring dequeue pointer
834 * register. Therefore, we can't just set the dequeue pointer back in the
835 * middle of the ring (TRBs are 16-byte aligned).
837 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
839 struct xhci_ring *ring;
840 struct xhci_segment *seg;
842 ring = xhci->cmd_ring;
846 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
847 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
848 cpu_to_le32(~TRB_CYCLE);
850 } while (seg != ring->deq_seg);
852 /* Reset the software enqueue and dequeue pointers */
853 ring->deq_seg = ring->first_seg;
854 ring->dequeue = ring->first_seg->trbs;
855 ring->enq_seg = ring->deq_seg;
856 ring->enqueue = ring->dequeue;
858 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
860 * Ring is now zeroed, so the HW should look for change of ownership
861 * when the cycle bit is set to 1.
863 ring->cycle_state = 1;
866 * Reset the hardware dequeue pointer.
867 * Yes, this will need to be re-written after resume, but we're paranoid
868 * and want to make sure the hardware doesn't access bogus memory
869 * because, say, the BIOS or an SMI started the host without changing
870 * the command ring pointers.
872 xhci_set_cmd_ring_deq(xhci);
876 * Stop HC (not bus-specific)
878 * This is called when the machine transition into S3/S4 mode.
881 int xhci_suspend(struct xhci_hcd *xhci)
884 struct usb_hcd *hcd = xhci_to_hcd(xhci);
887 if (hcd->state != HC_STATE_SUSPENDED ||
888 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
891 /* Don't poll the roothubs on bus suspend. */
892 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
893 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
894 del_timer_sync(&hcd->rh_timer);
896 spin_lock_irq(&xhci->lock);
897 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
898 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
899 /* step 1: stop endpoint */
900 /* skipped assuming that port suspend has done */
902 /* step 2: clear Run/Stop bit */
903 command = xhci_readl(xhci, &xhci->op_regs->command);
905 xhci_writel(xhci, command, &xhci->op_regs->command);
906 if (xhci_handshake(xhci, &xhci->op_regs->status,
907 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC)) {
908 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
909 spin_unlock_irq(&xhci->lock);
912 xhci_clear_command_ring(xhci);
914 /* step 3: save registers */
915 xhci_save_registers(xhci);
917 /* step 4: set CSS flag */
918 command = xhci_readl(xhci, &xhci->op_regs->command);
920 xhci_writel(xhci, command, &xhci->op_regs->command);
921 if (xhci_handshake(xhci, &xhci->op_regs->status,
922 STS_SAVE, 0, 10 * 1000)) {
923 xhci_warn(xhci, "WARN: xHC save state timeout\n");
924 spin_unlock_irq(&xhci->lock);
927 spin_unlock_irq(&xhci->lock);
930 * Deleting Compliance Mode Recovery Timer because the xHCI Host
931 * is about to be suspended.
933 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
934 (!(xhci_all_ports_seen_u0(xhci)))) {
935 del_timer_sync(&xhci->comp_mode_recovery_timer);
936 xhci_dbg(xhci, "%s: compliance mode recovery timer deleted\n",
940 /* step 5: remove core well power */
941 /* synchronize irq when using MSI-X */
942 xhci_msix_sync_irqs(xhci);
948 * start xHC (not bus-specific)
950 * This is called when the machine transition from S3/S4 mode.
953 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
955 u32 command, temp = 0;
956 struct usb_hcd *hcd = xhci_to_hcd(xhci);
957 struct usb_hcd *secondary_hcd;
959 bool comp_timer_running = false;
961 /* Wait a bit if either of the roothubs need to settle from the
962 * transition into bus suspend.
964 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
966 xhci->bus_state[1].next_statechange))
969 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
970 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
972 spin_lock_irq(&xhci->lock);
973 if (xhci->quirks & XHCI_RESET_ON_RESUME)
977 /* step 1: restore register */
978 xhci_restore_registers(xhci);
979 /* step 2: initialize command ring buffer */
980 xhci_set_cmd_ring_deq(xhci);
981 /* step 3: restore state and start state*/
982 /* step 3: set CRS flag */
983 command = xhci_readl(xhci, &xhci->op_regs->command);
985 xhci_writel(xhci, command, &xhci->op_regs->command);
986 if (xhci_handshake(xhci, &xhci->op_regs->status,
987 STS_RESTORE, 0, 10 * 1000)) {
988 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
989 spin_unlock_irq(&xhci->lock);
992 temp = xhci_readl(xhci, &xhci->op_regs->status);
995 /* If restore operation fails, re-initialize the HC during resume */
996 if ((temp & STS_SRE) || hibernated) {
998 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
999 !(xhci_all_ports_seen_u0(xhci))) {
1000 del_timer_sync(&xhci->comp_mode_recovery_timer);
1001 xhci_dbg(xhci, "Compliance Mode Recovery Timer deleted!\n");
1004 /* Let the USB core know _both_ roothubs lost power. */
1005 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1006 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1008 xhci_dbg(xhci, "Stop HCD\n");
1011 spin_unlock_irq(&xhci->lock);
1012 xhci_cleanup_msix(xhci);
1014 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
1015 /* Tell the event ring poll function not to reschedule */
1017 del_timer_sync(&xhci->event_ring_timer);
1020 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1021 temp = xhci_readl(xhci, &xhci->op_regs->status);
1022 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
1023 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
1024 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
1025 &xhci->ir_set->irq_pending);
1026 xhci_print_ir_set(xhci, 0);
1028 xhci_dbg(xhci, "cleaning up memory\n");
1029 xhci_mem_cleanup(xhci);
1030 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1031 xhci_readl(xhci, &xhci->op_regs->status));
1033 /* USB core calls the PCI reinit and start functions twice:
1034 * first with the primary HCD, and then with the secondary HCD.
1035 * If we don't do the same, the host will never be started.
1037 if (!usb_hcd_is_primary_hcd(hcd))
1038 secondary_hcd = hcd;
1040 secondary_hcd = xhci->shared_hcd;
1042 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1043 retval = xhci_init(hcd->primary_hcd);
1046 comp_timer_running = true;
1048 xhci_dbg(xhci, "Start the primary HCD\n");
1049 retval = xhci_run(hcd->primary_hcd);
1051 xhci_dbg(xhci, "Start the secondary HCD\n");
1052 retval = xhci_run(secondary_hcd);
1054 hcd->state = HC_STATE_SUSPENDED;
1055 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1059 /* step 4: set Run/Stop bit */
1060 command = xhci_readl(xhci, &xhci->op_regs->command);
1062 xhci_writel(xhci, command, &xhci->op_regs->command);
1063 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1066 /* step 5: walk topology and initialize portsc,
1067 * portpmsc and portli
1069 /* this is done in bus_resume */
1071 /* step 6: restart each of the previously
1072 * Running endpoints by ringing their doorbells
1075 spin_unlock_irq(&xhci->lock);
1079 usb_hcd_resume_root_hub(hcd);
1080 usb_hcd_resume_root_hub(xhci->shared_hcd);
1084 * If system is subject to the Quirk, Compliance Mode Timer needs to
1085 * be re-initialized Always after a system resume. Ports are subject
1086 * to suffer the Compliance Mode issue again. It doesn't matter if
1087 * ports have entered previously to U0 before system's suspension.
1089 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1090 compliance_mode_recovery_timer_init(xhci);
1092 /* Re-enable port polling. */
1093 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1094 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1095 usb_hcd_poll_rh_status(hcd);
1099 #endif /* CONFIG_PM */
1101 /*-------------------------------------------------------------------------*/
1104 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1105 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1106 * value to right shift 1 for the bitmask.
1108 * Index = (epnum * 2) + direction - 1,
1109 * where direction = 0 for OUT, 1 for IN.
1110 * For control endpoints, the IN index is used (OUT index is unused), so
1111 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1113 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1116 if (usb_endpoint_xfer_control(desc))
1117 index = (unsigned int) (usb_endpoint_num(desc)*2);
1119 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1120 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1124 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1125 * address from the XHCI endpoint index.
1127 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1129 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1130 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1131 return direction | number;
1134 /* Find the flag for this endpoint (for use in the control context). Use the
1135 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1138 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1140 return 1 << (xhci_get_endpoint_index(desc) + 1);
1143 /* Find the flag for this endpoint (for use in the control context). Use the
1144 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1147 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1149 return 1 << (ep_index + 1);
1152 /* Compute the last valid endpoint context index. Basically, this is the
1153 * endpoint index plus one. For slot contexts with more than valid endpoint,
1154 * we find the most significant bit set in the added contexts flags.
1155 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1156 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1158 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1160 return fls(added_ctxs) - 1;
1163 /* Returns 1 if the arguments are OK;
1164 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1166 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1167 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1169 struct xhci_hcd *xhci;
1170 struct xhci_virt_device *virt_dev;
1172 if (!hcd || (check_ep && !ep) || !udev) {
1173 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
1177 if (!udev->parent) {
1178 printk(KERN_DEBUG "xHCI %s called for root hub\n",
1183 xhci = hcd_to_xhci(hcd);
1184 if (check_virt_dev) {
1185 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1186 printk(KERN_DEBUG "xHCI %s called with unaddressed "
1191 virt_dev = xhci->devs[udev->slot_id];
1192 if (virt_dev->udev != udev) {
1193 printk(KERN_DEBUG "xHCI %s called with udev and "
1194 "virt_dev does not match\n", func);
1199 if (xhci->xhc_state & XHCI_STATE_HALTED)
1205 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1206 struct usb_device *udev, struct xhci_command *command,
1207 bool ctx_change, bool must_succeed);
1210 * Full speed devices may have a max packet size greater than 8 bytes, but the
1211 * USB core doesn't know that until it reads the first 8 bytes of the
1212 * descriptor. If the usb_device's max packet size changes after that point,
1213 * we need to issue an evaluate context command and wait on it.
1215 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1216 unsigned int ep_index, struct urb *urb)
1218 struct xhci_container_ctx *in_ctx;
1219 struct xhci_container_ctx *out_ctx;
1220 struct xhci_input_control_ctx *ctrl_ctx;
1221 struct xhci_ep_ctx *ep_ctx;
1222 int max_packet_size;
1223 int hw_max_packet_size;
1226 out_ctx = xhci->devs[slot_id]->out_ctx;
1227 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1228 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1229 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1230 if (hw_max_packet_size != max_packet_size) {
1231 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
1232 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
1234 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
1235 hw_max_packet_size);
1236 xhci_dbg(xhci, "Issuing evaluate context command.\n");
1238 /* Set up the input context flags for the command */
1239 /* FIXME: This won't work if a non-default control endpoint
1240 * changes max packet sizes.
1242 in_ctx = xhci->devs[slot_id]->in_ctx;
1243 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1245 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1249 /* Set up the modified control endpoint 0 */
1250 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1251 xhci->devs[slot_id]->out_ctx, ep_index);
1253 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1254 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1255 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1257 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1258 ctrl_ctx->drop_flags = 0;
1260 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1261 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1262 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1263 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1265 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1268 /* Clean up the input context for later use by bandwidth
1271 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1277 * non-error returns are a promise to giveback() the urb later
1278 * we drop ownership so next owner (or urb unlink) can get it
1280 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1282 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1283 struct xhci_td *buffer;
1284 unsigned long flags;
1286 unsigned int slot_id, ep_index;
1287 struct urb_priv *urb_priv;
1290 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1291 true, true, __func__) <= 0)
1294 slot_id = urb->dev->slot_id;
1295 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1297 if (!HCD_HW_ACCESSIBLE(hcd)) {
1298 if (!in_interrupt())
1299 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1304 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1305 size = urb->number_of_packets;
1309 urb_priv = kzalloc(sizeof(struct urb_priv) +
1310 size * sizeof(struct xhci_td *), mem_flags);
1314 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1320 for (i = 0; i < size; i++) {
1321 urb_priv->td[i] = buffer;
1325 urb_priv->length = size;
1326 urb_priv->td_cnt = 0;
1327 urb->hcpriv = urb_priv;
1329 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1330 /* Check to see if the max packet size for the default control
1331 * endpoint changed during FS device enumeration
1333 if (urb->dev->speed == USB_SPEED_FULL) {
1334 ret = xhci_check_maxpacket(xhci, slot_id,
1337 xhci_urb_free_priv(xhci, urb_priv);
1343 /* We have a spinlock and interrupts disabled, so we must pass
1344 * atomic context to this function, which may allocate memory.
1346 spin_lock_irqsave(&xhci->lock, flags);
1347 if (xhci->xhc_state & XHCI_STATE_DYING)
1349 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1353 spin_unlock_irqrestore(&xhci->lock, flags);
1354 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1355 spin_lock_irqsave(&xhci->lock, flags);
1356 if (xhci->xhc_state & XHCI_STATE_DYING)
1358 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1359 EP_GETTING_STREAMS) {
1360 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1361 "is transitioning to using streams.\n");
1363 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1364 EP_GETTING_NO_STREAMS) {
1365 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1366 "is transitioning to "
1367 "not having streams.\n");
1370 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1375 spin_unlock_irqrestore(&xhci->lock, flags);
1376 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1377 spin_lock_irqsave(&xhci->lock, flags);
1378 if (xhci->xhc_state & XHCI_STATE_DYING)
1380 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1384 spin_unlock_irqrestore(&xhci->lock, flags);
1386 spin_lock_irqsave(&xhci->lock, flags);
1387 if (xhci->xhc_state & XHCI_STATE_DYING)
1389 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1393 spin_unlock_irqrestore(&xhci->lock, flags);
1398 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1399 "non-responsive xHCI host.\n",
1400 urb->ep->desc.bEndpointAddress, urb);
1403 xhci_urb_free_priv(xhci, urb_priv);
1405 spin_unlock_irqrestore(&xhci->lock, flags);
1409 /* Get the right ring for the given URB.
1410 * If the endpoint supports streams, boundary check the URB's stream ID.
1411 * If the endpoint doesn't support streams, return the singular endpoint ring.
1413 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1416 unsigned int slot_id;
1417 unsigned int ep_index;
1418 unsigned int stream_id;
1419 struct xhci_virt_ep *ep;
1421 slot_id = urb->dev->slot_id;
1422 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1423 stream_id = urb->stream_id;
1424 ep = &xhci->devs[slot_id]->eps[ep_index];
1425 /* Common case: no streams */
1426 if (!(ep->ep_state & EP_HAS_STREAMS))
1429 if (stream_id == 0) {
1431 "WARN: Slot ID %u, ep index %u has streams, "
1432 "but URB has no stream ID.\n",
1437 if (stream_id < ep->stream_info->num_streams)
1438 return ep->stream_info->stream_rings[stream_id];
1441 "WARN: Slot ID %u, ep index %u has "
1442 "stream IDs 1 to %u allocated, "
1443 "but stream ID %u is requested.\n",
1445 ep->stream_info->num_streams - 1,
1451 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1452 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1453 * should pick up where it left off in the TD, unless a Set Transfer Ring
1454 * Dequeue Pointer is issued.
1456 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1457 * the ring. Since the ring is a contiguous structure, they can't be physically
1458 * removed. Instead, there are two options:
1460 * 1) If the HC is in the middle of processing the URB to be canceled, we
1461 * simply move the ring's dequeue pointer past those TRBs using the Set
1462 * Transfer Ring Dequeue Pointer command. This will be the common case,
1463 * when drivers timeout on the last submitted URB and attempt to cancel.
1465 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1466 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1467 * HC will need to invalidate the any TRBs it has cached after the stop
1468 * endpoint command, as noted in the xHCI 0.95 errata.
1470 * 3) The TD may have completed by the time the Stop Endpoint Command
1471 * completes, so software needs to handle that case too.
1473 * This function should protect against the TD enqueueing code ringing the
1474 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1475 * It also needs to account for multiple cancellations on happening at the same
1476 * time for the same endpoint.
1478 * Note that this function can be called in any context, or so says
1479 * usb_hcd_unlink_urb()
1481 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1483 unsigned long flags;
1486 struct xhci_hcd *xhci;
1487 struct urb_priv *urb_priv;
1489 unsigned int ep_index;
1490 struct xhci_ring *ep_ring;
1491 struct xhci_virt_ep *ep;
1493 xhci = hcd_to_xhci(hcd);
1494 spin_lock_irqsave(&xhci->lock, flags);
1495 /* Make sure the URB hasn't completed or been unlinked already */
1496 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1497 if (ret || !urb->hcpriv)
1499 temp = xhci_readl(xhci, &xhci->op_regs->status);
1500 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1501 xhci_dbg(xhci, "HW died, freeing TD.\n");
1502 urb_priv = urb->hcpriv;
1503 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1504 td = urb_priv->td[i];
1505 if (!list_empty(&td->td_list))
1506 list_del_init(&td->td_list);
1507 if (!list_empty(&td->cancelled_td_list))
1508 list_del_init(&td->cancelled_td_list);
1511 usb_hcd_unlink_urb_from_ep(hcd, urb);
1512 spin_unlock_irqrestore(&xhci->lock, flags);
1513 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1514 xhci_urb_free_priv(xhci, urb_priv);
1517 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1518 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1519 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1520 "non-responsive xHCI host.\n",
1521 urb->ep->desc.bEndpointAddress, urb);
1522 /* Let the stop endpoint command watchdog timer (which set this
1523 * state) finish cleaning up the endpoint TD lists. We must
1524 * have caught it in the middle of dropping a lock and giving
1530 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1531 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1532 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1538 urb_priv = urb->hcpriv;
1539 i = urb_priv->td_cnt;
1540 if (i < urb_priv->length)
1541 xhci_dbg(xhci, "Cancel URB %p, dev %s, ep 0x%x, "
1542 "starting at offset 0x%llx\n",
1543 urb, urb->dev->devpath,
1544 urb->ep->desc.bEndpointAddress,
1545 (unsigned long long) xhci_trb_virt_to_dma(
1546 urb_priv->td[i]->start_seg,
1547 urb_priv->td[i]->first_trb));
1549 for (; i < urb_priv->length; i++) {
1550 td = urb_priv->td[i];
1551 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1554 /* Queue a stop endpoint command, but only if this is
1555 * the first cancellation to be handled.
1557 if (!(ep->ep_state & EP_HALT_PENDING)) {
1558 ep->ep_state |= EP_HALT_PENDING;
1559 ep->stop_cmds_pending++;
1560 ep->stop_cmd_timer.expires = jiffies +
1561 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1562 add_timer(&ep->stop_cmd_timer);
1563 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1564 xhci_ring_cmd_db(xhci);
1567 spin_unlock_irqrestore(&xhci->lock, flags);
1571 /* Drop an endpoint from a new bandwidth configuration for this device.
1572 * Only one call to this function is allowed per endpoint before
1573 * check_bandwidth() or reset_bandwidth() must be called.
1574 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1575 * add the endpoint to the schedule with possibly new parameters denoted by a
1576 * different endpoint descriptor in usb_host_endpoint.
1577 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1580 * The USB core will not allow URBs to be queued to an endpoint that is being
1581 * disabled, so there's no need for mutual exclusion to protect
1582 * the xhci->devs[slot_id] structure.
1584 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1585 struct usb_host_endpoint *ep)
1587 struct xhci_hcd *xhci;
1588 struct xhci_container_ctx *in_ctx, *out_ctx;
1589 struct xhci_input_control_ctx *ctrl_ctx;
1590 struct xhci_slot_ctx *slot_ctx;
1591 unsigned int last_ctx;
1592 unsigned int ep_index;
1593 struct xhci_ep_ctx *ep_ctx;
1595 u32 new_add_flags, new_drop_flags, new_slot_info;
1598 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1601 xhci = hcd_to_xhci(hcd);
1602 if (xhci->xhc_state & XHCI_STATE_DYING)
1605 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1606 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1607 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1608 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1609 __func__, drop_flag);
1613 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1614 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1615 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1617 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1622 ep_index = xhci_get_endpoint_index(&ep->desc);
1623 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1624 /* If the HC already knows the endpoint is disabled,
1625 * or the HCD has noted it is disabled, ignore this request
1627 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1628 cpu_to_le32(EP_STATE_DISABLED)) ||
1629 le32_to_cpu(ctrl_ctx->drop_flags) &
1630 xhci_get_endpoint_flag(&ep->desc)) {
1631 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1636 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1637 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1639 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1640 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1642 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1643 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1644 /* Update the last valid endpoint context, if we deleted the last one */
1645 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1646 LAST_CTX(last_ctx)) {
1647 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1648 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1650 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1652 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1654 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1655 (unsigned int) ep->desc.bEndpointAddress,
1657 (unsigned int) new_drop_flags,
1658 (unsigned int) new_add_flags,
1659 (unsigned int) new_slot_info);
1663 /* Add an endpoint to a new possible bandwidth configuration for this device.
1664 * Only one call to this function is allowed per endpoint before
1665 * check_bandwidth() or reset_bandwidth() must be called.
1666 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1667 * add the endpoint to the schedule with possibly new parameters denoted by a
1668 * different endpoint descriptor in usb_host_endpoint.
1669 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1672 * The USB core will not allow URBs to be queued to an endpoint until the
1673 * configuration or alt setting is installed in the device, so there's no need
1674 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1676 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1677 struct usb_host_endpoint *ep)
1679 struct xhci_hcd *xhci;
1680 struct xhci_container_ctx *in_ctx, *out_ctx;
1681 unsigned int ep_index;
1682 struct xhci_slot_ctx *slot_ctx;
1683 struct xhci_input_control_ctx *ctrl_ctx;
1685 unsigned int last_ctx;
1686 u32 new_add_flags, new_drop_flags, new_slot_info;
1687 struct xhci_virt_device *virt_dev;
1690 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1692 /* So we won't queue a reset ep command for a root hub */
1696 xhci = hcd_to_xhci(hcd);
1697 if (xhci->xhc_state & XHCI_STATE_DYING)
1700 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1701 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1702 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1703 /* FIXME when we have to issue an evaluate endpoint command to
1704 * deal with ep0 max packet size changing once we get the
1707 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1708 __func__, added_ctxs);
1712 virt_dev = xhci->devs[udev->slot_id];
1713 in_ctx = virt_dev->in_ctx;
1714 out_ctx = virt_dev->out_ctx;
1715 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1717 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1722 ep_index = xhci_get_endpoint_index(&ep->desc);
1723 /* If this endpoint is already in use, and the upper layers are trying
1724 * to add it again without dropping it, reject the addition.
1726 if (virt_dev->eps[ep_index].ring &&
1727 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1728 xhci_get_endpoint_flag(&ep->desc))) {
1729 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1730 "without dropping it.\n",
1731 (unsigned int) ep->desc.bEndpointAddress);
1735 /* If the HCD has already noted the endpoint is enabled,
1736 * ignore this request.
1738 if (le32_to_cpu(ctrl_ctx->add_flags) &
1739 xhci_get_endpoint_flag(&ep->desc)) {
1740 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1746 * Configuration and alternate setting changes must be done in
1747 * process context, not interrupt context (or so documenation
1748 * for usb_set_interface() and usb_set_configuration() claim).
1750 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1751 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1752 __func__, ep->desc.bEndpointAddress);
1756 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1757 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1759 /* If xhci_endpoint_disable() was called for this endpoint, but the
1760 * xHC hasn't been notified yet through the check_bandwidth() call,
1761 * this re-adds a new state for the endpoint from the new endpoint
1762 * descriptors. We must drop and re-add this endpoint, so we leave the
1765 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1767 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1768 /* Update the last valid endpoint context, if we just added one past */
1769 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1770 LAST_CTX(last_ctx)) {
1771 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1772 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1774 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1776 /* Store the usb_device pointer for later use */
1779 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1780 (unsigned int) ep->desc.bEndpointAddress,
1782 (unsigned int) new_drop_flags,
1783 (unsigned int) new_add_flags,
1784 (unsigned int) new_slot_info);
1788 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1790 struct xhci_input_control_ctx *ctrl_ctx;
1791 struct xhci_ep_ctx *ep_ctx;
1792 struct xhci_slot_ctx *slot_ctx;
1795 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1797 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1802 /* When a device's add flag and drop flag are zero, any subsequent
1803 * configure endpoint command will leave that endpoint's state
1804 * untouched. Make sure we don't leave any old state in the input
1805 * endpoint contexts.
1807 ctrl_ctx->drop_flags = 0;
1808 ctrl_ctx->add_flags = 0;
1809 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1810 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1811 /* Endpoint 0 is always valid */
1812 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1813 for (i = 1; i < 31; ++i) {
1814 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1815 ep_ctx->ep_info = 0;
1816 ep_ctx->ep_info2 = 0;
1818 ep_ctx->tx_info = 0;
1822 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1823 struct usb_device *udev, u32 *cmd_status)
1827 switch (*cmd_status) {
1829 dev_warn(&udev->dev, "Not enough host controller resources "
1830 "for new device state.\n");
1832 /* FIXME: can we allocate more resources for the HC? */
1835 case COMP_2ND_BW_ERR:
1836 dev_warn(&udev->dev, "Not enough bandwidth "
1837 "for new device state.\n");
1839 /* FIXME: can we go back to the old state? */
1842 /* the HCD set up something wrong */
1843 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1845 "and endpoint is not disabled.\n");
1849 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1850 "configure command.\n");
1854 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1858 xhci_err(xhci, "ERROR: unexpected command completion "
1859 "code 0x%x.\n", *cmd_status);
1866 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1867 struct usb_device *udev, u32 *cmd_status)
1870 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1872 switch (*cmd_status) {
1874 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1875 "context command.\n");
1879 dev_warn(&udev->dev, "WARN: slot not enabled for"
1880 "evaluate context command.\n");
1883 case COMP_CTX_STATE:
1884 dev_warn(&udev->dev, "WARN: invalid context state for "
1885 "evaluate context command.\n");
1886 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1890 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1891 "context command.\n");
1895 /* Max Exit Latency too large error */
1896 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1900 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1904 xhci_err(xhci, "ERROR: unexpected command completion "
1905 "code 0x%x.\n", *cmd_status);
1912 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1913 struct xhci_input_control_ctx *ctrl_ctx)
1915 u32 valid_add_flags;
1916 u32 valid_drop_flags;
1918 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1919 * (bit 1). The default control endpoint is added during the Address
1920 * Device command and is never removed until the slot is disabled.
1922 valid_add_flags = ctrl_ctx->add_flags >> 2;
1923 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1925 /* Use hweight32 to count the number of ones in the add flags, or
1926 * number of endpoints added. Don't count endpoints that are changed
1927 * (both added and dropped).
1929 return hweight32(valid_add_flags) -
1930 hweight32(valid_add_flags & valid_drop_flags);
1933 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1934 struct xhci_input_control_ctx *ctrl_ctx)
1936 u32 valid_add_flags;
1937 u32 valid_drop_flags;
1939 valid_add_flags = ctrl_ctx->add_flags >> 2;
1940 valid_drop_flags = ctrl_ctx->drop_flags >> 2;
1942 return hweight32(valid_drop_flags) -
1943 hweight32(valid_add_flags & valid_drop_flags);
1947 * We need to reserve the new number of endpoints before the configure endpoint
1948 * command completes. We can't subtract the dropped endpoints from the number
1949 * of active endpoints until the command completes because we can oversubscribe
1950 * the host in this case:
1952 * - the first configure endpoint command drops more endpoints than it adds
1953 * - a second configure endpoint command that adds more endpoints is queued
1954 * - the first configure endpoint command fails, so the config is unchanged
1955 * - the second command may succeed, even though there isn't enough resources
1957 * Must be called with xhci->lock held.
1959 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1960 struct xhci_input_control_ctx *ctrl_ctx)
1964 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1965 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1966 xhci_dbg(xhci, "Not enough ep ctxs: "
1967 "%u active, need to add %u, limit is %u.\n",
1968 xhci->num_active_eps, added_eps,
1969 xhci->limit_active_eps);
1972 xhci->num_active_eps += added_eps;
1973 xhci_dbg(xhci, "Adding %u ep ctxs, %u now active.\n", added_eps,
1974 xhci->num_active_eps);
1979 * The configure endpoint was failed by the xHC for some other reason, so we
1980 * need to revert the resources that failed configuration would have used.
1982 * Must be called with xhci->lock held.
1984 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1985 struct xhci_input_control_ctx *ctrl_ctx)
1989 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1990 xhci->num_active_eps -= num_failed_eps;
1991 xhci_dbg(xhci, "Removing %u failed ep ctxs, %u now active.\n",
1993 xhci->num_active_eps);
1997 * Now that the command has completed, clean up the active endpoint count by
1998 * subtracting out the endpoints that were dropped (but not changed).
2000 * Must be called with xhci->lock held.
2002 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2003 struct xhci_input_control_ctx *ctrl_ctx)
2005 u32 num_dropped_eps;
2007 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2008 xhci->num_active_eps -= num_dropped_eps;
2009 if (num_dropped_eps)
2010 xhci_dbg(xhci, "Removing %u dropped ep ctxs, %u now active.\n",
2012 xhci->num_active_eps);
2015 static unsigned int xhci_get_block_size(struct usb_device *udev)
2017 switch (udev->speed) {
2019 case USB_SPEED_FULL:
2021 case USB_SPEED_HIGH:
2023 case USB_SPEED_SUPER:
2025 case USB_SPEED_UNKNOWN:
2026 case USB_SPEED_WIRELESS:
2028 /* Should never happen */
2034 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2036 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2038 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2043 /* If we are changing a LS/FS device under a HS hub,
2044 * make sure (if we are activating a new TT) that the HS bus has enough
2045 * bandwidth for this new TT.
2047 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2048 struct xhci_virt_device *virt_dev,
2051 struct xhci_interval_bw_table *bw_table;
2052 struct xhci_tt_bw_info *tt_info;
2054 /* Find the bandwidth table for the root port this TT is attached to. */
2055 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2056 tt_info = virt_dev->tt_info;
2057 /* If this TT already had active endpoints, the bandwidth for this TT
2058 * has already been added. Removing all periodic endpoints (and thus
2059 * making the TT enactive) will only decrease the bandwidth used.
2063 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2064 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2068 /* Not sure why we would have no new active endpoints...
2070 * Maybe because of an Evaluate Context change for a hub update or a
2071 * control endpoint 0 max packet size change?
2072 * FIXME: skip the bandwidth calculation in that case.
2077 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2078 struct xhci_virt_device *virt_dev)
2080 unsigned int bw_reserved;
2082 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2083 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2086 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2087 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2094 * This algorithm is a very conservative estimate of the worst-case scheduling
2095 * scenario for any one interval. The hardware dynamically schedules the
2096 * packets, so we can't tell which microframe could be the limiting factor in
2097 * the bandwidth scheduling. This only takes into account periodic endpoints.
2099 * Obviously, we can't solve an NP complete problem to find the minimum worst
2100 * case scenario. Instead, we come up with an estimate that is no less than
2101 * the worst case bandwidth used for any one microframe, but may be an
2104 * We walk the requirements for each endpoint by interval, starting with the
2105 * smallest interval, and place packets in the schedule where there is only one
2106 * possible way to schedule packets for that interval. In order to simplify
2107 * this algorithm, we record the largest max packet size for each interval, and
2108 * assume all packets will be that size.
2110 * For interval 0, we obviously must schedule all packets for each interval.
2111 * The bandwidth for interval 0 is just the amount of data to be transmitted
2112 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2113 * the number of packets).
2115 * For interval 1, we have two possible microframes to schedule those packets
2116 * in. For this algorithm, if we can schedule the same number of packets for
2117 * each possible scheduling opportunity (each microframe), we will do so. The
2118 * remaining number of packets will be saved to be transmitted in the gaps in
2119 * the next interval's scheduling sequence.
2121 * As we move those remaining packets to be scheduled with interval 2 packets,
2122 * we have to double the number of remaining packets to transmit. This is
2123 * because the intervals are actually powers of 2, and we would be transmitting
2124 * the previous interval's packets twice in this interval. We also have to be
2125 * sure that when we look at the largest max packet size for this interval, we
2126 * also look at the largest max packet size for the remaining packets and take
2127 * the greater of the two.
2129 * The algorithm continues to evenly distribute packets in each scheduling
2130 * opportunity, and push the remaining packets out, until we get to the last
2131 * interval. Then those packets and their associated overhead are just added
2132 * to the bandwidth used.
2134 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2135 struct xhci_virt_device *virt_dev,
2138 unsigned int bw_reserved;
2139 unsigned int max_bandwidth;
2140 unsigned int bw_used;
2141 unsigned int block_size;
2142 struct xhci_interval_bw_table *bw_table;
2143 unsigned int packet_size = 0;
2144 unsigned int overhead = 0;
2145 unsigned int packets_transmitted = 0;
2146 unsigned int packets_remaining = 0;
2149 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2150 return xhci_check_ss_bw(xhci, virt_dev);
2152 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2153 max_bandwidth = HS_BW_LIMIT;
2154 /* Convert percent of bus BW reserved to blocks reserved */
2155 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2157 max_bandwidth = FS_BW_LIMIT;
2158 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2161 bw_table = virt_dev->bw_table;
2162 /* We need to translate the max packet size and max ESIT payloads into
2163 * the units the hardware uses.
2165 block_size = xhci_get_block_size(virt_dev->udev);
2167 /* If we are manipulating a LS/FS device under a HS hub, double check
2168 * that the HS bus has enough bandwidth if we are activing a new TT.
2170 if (virt_dev->tt_info) {
2171 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2172 virt_dev->real_port);
2173 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2174 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2175 "newly activated TT.\n");
2178 xhci_dbg(xhci, "Recalculating BW for TT slot %u port %u\n",
2179 virt_dev->tt_info->slot_id,
2180 virt_dev->tt_info->ttport);
2182 xhci_dbg(xhci, "Recalculating BW for rootport %u\n",
2183 virt_dev->real_port);
2186 /* Add in how much bandwidth will be used for interval zero, or the
2187 * rounded max ESIT payload + number of packets * largest overhead.
2189 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2190 bw_table->interval_bw[0].num_packets *
2191 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2193 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2194 unsigned int bw_added;
2195 unsigned int largest_mps;
2196 unsigned int interval_overhead;
2199 * How many packets could we transmit in this interval?
2200 * If packets didn't fit in the previous interval, we will need
2201 * to transmit that many packets twice within this interval.
2203 packets_remaining = 2 * packets_remaining +
2204 bw_table->interval_bw[i].num_packets;
2206 /* Find the largest max packet size of this or the previous
2209 if (list_empty(&bw_table->interval_bw[i].endpoints))
2212 struct xhci_virt_ep *virt_ep;
2213 struct list_head *ep_entry;
2215 ep_entry = bw_table->interval_bw[i].endpoints.next;
2216 virt_ep = list_entry(ep_entry,
2217 struct xhci_virt_ep, bw_endpoint_list);
2218 /* Convert to blocks, rounding up */
2219 largest_mps = DIV_ROUND_UP(
2220 virt_ep->bw_info.max_packet_size,
2223 if (largest_mps > packet_size)
2224 packet_size = largest_mps;
2226 /* Use the larger overhead of this or the previous interval. */
2227 interval_overhead = xhci_get_largest_overhead(
2228 &bw_table->interval_bw[i]);
2229 if (interval_overhead > overhead)
2230 overhead = interval_overhead;
2232 /* How many packets can we evenly distribute across
2233 * (1 << (i + 1)) possible scheduling opportunities?
2235 packets_transmitted = packets_remaining >> (i + 1);
2237 /* Add in the bandwidth used for those scheduled packets */
2238 bw_added = packets_transmitted * (overhead + packet_size);
2240 /* How many packets do we have remaining to transmit? */
2241 packets_remaining = packets_remaining % (1 << (i + 1));
2243 /* What largest max packet size should those packets have? */
2244 /* If we've transmitted all packets, don't carry over the
2245 * largest packet size.
2247 if (packets_remaining == 0) {
2250 } else if (packets_transmitted > 0) {
2251 /* Otherwise if we do have remaining packets, and we've
2252 * scheduled some packets in this interval, take the
2253 * largest max packet size from endpoints with this
2256 packet_size = largest_mps;
2257 overhead = interval_overhead;
2259 /* Otherwise carry over packet_size and overhead from the last
2260 * time we had a remainder.
2262 bw_used += bw_added;
2263 if (bw_used > max_bandwidth) {
2264 xhci_warn(xhci, "Not enough bandwidth. "
2265 "Proposed: %u, Max: %u\n",
2266 bw_used, max_bandwidth);
2271 * Ok, we know we have some packets left over after even-handedly
2272 * scheduling interval 15. We don't know which microframes they will
2273 * fit into, so we over-schedule and say they will be scheduled every
2276 if (packets_remaining > 0)
2277 bw_used += overhead + packet_size;
2279 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2280 unsigned int port_index = virt_dev->real_port - 1;
2282 /* OK, we're manipulating a HS device attached to a
2283 * root port bandwidth domain. Include the number of active TTs
2284 * in the bandwidth used.
2286 bw_used += TT_HS_OVERHEAD *
2287 xhci->rh_bw[port_index].num_active_tts;
2290 xhci_dbg(xhci, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2291 "Available: %u " "percent\n",
2292 bw_used, max_bandwidth, bw_reserved,
2293 (max_bandwidth - bw_used - bw_reserved) * 100 /
2296 bw_used += bw_reserved;
2297 if (bw_used > max_bandwidth) {
2298 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2299 bw_used, max_bandwidth);
2303 bw_table->bw_used = bw_used;
2307 static bool xhci_is_async_ep(unsigned int ep_type)
2309 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2310 ep_type != ISOC_IN_EP &&
2311 ep_type != INT_IN_EP);
2314 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2316 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2319 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2321 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2323 if (ep_bw->ep_interval == 0)
2324 return SS_OVERHEAD_BURST +
2325 (ep_bw->mult * ep_bw->num_packets *
2326 (SS_OVERHEAD + mps));
2327 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2328 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2329 1 << ep_bw->ep_interval);
2333 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2334 struct xhci_bw_info *ep_bw,
2335 struct xhci_interval_bw_table *bw_table,
2336 struct usb_device *udev,
2337 struct xhci_virt_ep *virt_ep,
2338 struct xhci_tt_bw_info *tt_info)
2340 struct xhci_interval_bw *interval_bw;
2341 int normalized_interval;
2343 if (xhci_is_async_ep(ep_bw->type))
2346 if (udev->speed == USB_SPEED_SUPER) {
2347 if (xhci_is_sync_in_ep(ep_bw->type))
2348 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2349 xhci_get_ss_bw_consumed(ep_bw);
2351 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2352 xhci_get_ss_bw_consumed(ep_bw);
2356 /* SuperSpeed endpoints never get added to intervals in the table, so
2357 * this check is only valid for HS/FS/LS devices.
2359 if (list_empty(&virt_ep->bw_endpoint_list))
2361 /* For LS/FS devices, we need to translate the interval expressed in
2362 * microframes to frames.
2364 if (udev->speed == USB_SPEED_HIGH)
2365 normalized_interval = ep_bw->ep_interval;
2367 normalized_interval = ep_bw->ep_interval - 3;
2369 if (normalized_interval == 0)
2370 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2371 interval_bw = &bw_table->interval_bw[normalized_interval];
2372 interval_bw->num_packets -= ep_bw->num_packets;
2373 switch (udev->speed) {
2375 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2377 case USB_SPEED_FULL:
2378 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2380 case USB_SPEED_HIGH:
2381 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2383 case USB_SPEED_SUPER:
2384 case USB_SPEED_UNKNOWN:
2385 case USB_SPEED_WIRELESS:
2386 /* Should never happen because only LS/FS/HS endpoints will get
2387 * added to the endpoint list.
2392 tt_info->active_eps -= 1;
2393 list_del_init(&virt_ep->bw_endpoint_list);
2396 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2397 struct xhci_bw_info *ep_bw,
2398 struct xhci_interval_bw_table *bw_table,
2399 struct usb_device *udev,
2400 struct xhci_virt_ep *virt_ep,
2401 struct xhci_tt_bw_info *tt_info)
2403 struct xhci_interval_bw *interval_bw;
2404 struct xhci_virt_ep *smaller_ep;
2405 int normalized_interval;
2407 if (xhci_is_async_ep(ep_bw->type))
2410 if (udev->speed == USB_SPEED_SUPER) {
2411 if (xhci_is_sync_in_ep(ep_bw->type))
2412 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2413 xhci_get_ss_bw_consumed(ep_bw);
2415 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2416 xhci_get_ss_bw_consumed(ep_bw);
2420 /* For LS/FS devices, we need to translate the interval expressed in
2421 * microframes to frames.
2423 if (udev->speed == USB_SPEED_HIGH)
2424 normalized_interval = ep_bw->ep_interval;
2426 normalized_interval = ep_bw->ep_interval - 3;
2428 if (normalized_interval == 0)
2429 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2430 interval_bw = &bw_table->interval_bw[normalized_interval];
2431 interval_bw->num_packets += ep_bw->num_packets;
2432 switch (udev->speed) {
2434 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2436 case USB_SPEED_FULL:
2437 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2439 case USB_SPEED_HIGH:
2440 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2442 case USB_SPEED_SUPER:
2443 case USB_SPEED_UNKNOWN:
2444 case USB_SPEED_WIRELESS:
2445 /* Should never happen because only LS/FS/HS endpoints will get
2446 * added to the endpoint list.
2452 tt_info->active_eps += 1;
2453 /* Insert the endpoint into the list, largest max packet size first. */
2454 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2456 if (ep_bw->max_packet_size >=
2457 smaller_ep->bw_info.max_packet_size) {
2458 /* Add the new ep before the smaller endpoint */
2459 list_add_tail(&virt_ep->bw_endpoint_list,
2460 &smaller_ep->bw_endpoint_list);
2464 /* Add the new endpoint at the end of the list. */
2465 list_add_tail(&virt_ep->bw_endpoint_list,
2466 &interval_bw->endpoints);
2469 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2470 struct xhci_virt_device *virt_dev,
2473 struct xhci_root_port_bw_info *rh_bw_info;
2474 if (!virt_dev->tt_info)
2477 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2478 if (old_active_eps == 0 &&
2479 virt_dev->tt_info->active_eps != 0) {
2480 rh_bw_info->num_active_tts += 1;
2481 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2482 } else if (old_active_eps != 0 &&
2483 virt_dev->tt_info->active_eps == 0) {
2484 rh_bw_info->num_active_tts -= 1;
2485 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2489 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2490 struct xhci_virt_device *virt_dev,
2491 struct xhci_container_ctx *in_ctx)
2493 struct xhci_bw_info ep_bw_info[31];
2495 struct xhci_input_control_ctx *ctrl_ctx;
2496 int old_active_eps = 0;
2498 if (virt_dev->tt_info)
2499 old_active_eps = virt_dev->tt_info->active_eps;
2501 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2503 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2508 for (i = 0; i < 31; i++) {
2509 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2512 /* Make a copy of the BW info in case we need to revert this */
2513 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2514 sizeof(ep_bw_info[i]));
2515 /* Drop the endpoint from the interval table if the endpoint is
2516 * being dropped or changed.
2518 if (EP_IS_DROPPED(ctrl_ctx, i))
2519 xhci_drop_ep_from_interval_table(xhci,
2520 &virt_dev->eps[i].bw_info,
2526 /* Overwrite the information stored in the endpoints' bw_info */
2527 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2528 for (i = 0; i < 31; i++) {
2529 /* Add any changed or added endpoints to the interval table */
2530 if (EP_IS_ADDED(ctrl_ctx, i))
2531 xhci_add_ep_to_interval_table(xhci,
2532 &virt_dev->eps[i].bw_info,
2539 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2540 /* Ok, this fits in the bandwidth we have.
2541 * Update the number of active TTs.
2543 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2547 /* We don't have enough bandwidth for this, revert the stored info. */
2548 for (i = 0; i < 31; i++) {
2549 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2552 /* Drop the new copies of any added or changed endpoints from
2553 * the interval table.
2555 if (EP_IS_ADDED(ctrl_ctx, i)) {
2556 xhci_drop_ep_from_interval_table(xhci,
2557 &virt_dev->eps[i].bw_info,
2563 /* Revert the endpoint back to its old information */
2564 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2565 sizeof(ep_bw_info[i]));
2566 /* Add any changed or dropped endpoints back into the table */
2567 if (EP_IS_DROPPED(ctrl_ctx, i))
2568 xhci_add_ep_to_interval_table(xhci,
2569 &virt_dev->eps[i].bw_info,
2579 /* Issue a configure endpoint command or evaluate context command
2580 * and wait for it to finish.
2582 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2583 struct usb_device *udev,
2584 struct xhci_command *command,
2585 bool ctx_change, bool must_succeed)
2589 unsigned long flags;
2590 struct xhci_container_ctx *in_ctx;
2591 struct xhci_input_control_ctx *ctrl_ctx;
2592 struct completion *cmd_completion;
2594 struct xhci_virt_device *virt_dev;
2595 union xhci_trb *cmd_trb;
2597 spin_lock_irqsave(&xhci->lock, flags);
2598 virt_dev = xhci->devs[udev->slot_id];
2601 in_ctx = command->in_ctx;
2603 in_ctx = virt_dev->in_ctx;
2604 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2606 spin_unlock_irqrestore(&xhci->lock, flags);
2607 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2612 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2613 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2614 spin_unlock_irqrestore(&xhci->lock, flags);
2615 xhci_warn(xhci, "Not enough host resources, "
2616 "active endpoint contexts = %u\n",
2617 xhci->num_active_eps);
2620 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2621 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2622 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2623 xhci_free_host_resources(xhci, ctrl_ctx);
2624 spin_unlock_irqrestore(&xhci->lock, flags);
2625 xhci_warn(xhci, "Not enough bandwidth\n");
2630 cmd_completion = command->completion;
2631 cmd_status = &command->status;
2632 command->command_trb = xhci->cmd_ring->enqueue;
2634 /* Enqueue pointer can be left pointing to the link TRB,
2635 * we must handle that
2637 if (TRB_TYPE_LINK_LE32(command->command_trb->link.control))
2638 command->command_trb =
2639 xhci->cmd_ring->enq_seg->next->trbs;
2641 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2643 cmd_completion = &virt_dev->cmd_completion;
2644 cmd_status = &virt_dev->cmd_status;
2646 init_completion(cmd_completion);
2648 cmd_trb = xhci->cmd_ring->dequeue;
2650 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2651 udev->slot_id, must_succeed);
2653 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2654 udev->slot_id, must_succeed);
2657 list_del(&command->cmd_list);
2658 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2659 xhci_free_host_resources(xhci, ctrl_ctx);
2660 spin_unlock_irqrestore(&xhci->lock, flags);
2661 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
2664 xhci_ring_cmd_db(xhci);
2665 spin_unlock_irqrestore(&xhci->lock, flags);
2667 /* Wait for the configure endpoint command to complete */
2668 timeleft = wait_for_completion_interruptible_timeout(
2670 XHCI_CMD_DEFAULT_TIMEOUT);
2671 if (timeleft <= 0) {
2672 xhci_warn(xhci, "%s while waiting for %s command\n",
2673 timeleft == 0 ? "Timeout" : "Signal",
2675 "configure endpoint" :
2676 "evaluate context");
2677 /* cancel the configure endpoint command */
2678 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2685 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2687 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2689 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2690 spin_lock_irqsave(&xhci->lock, flags);
2691 /* If the command failed, remove the reserved resources.
2692 * Otherwise, clean up the estimate to include dropped eps.
2695 xhci_free_host_resources(xhci, ctrl_ctx);
2697 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2698 spin_unlock_irqrestore(&xhci->lock, flags);
2703 /* Called after one or more calls to xhci_add_endpoint() or
2704 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2705 * to call xhci_reset_bandwidth().
2707 * Since we are in the middle of changing either configuration or
2708 * installing a new alt setting, the USB core won't allow URBs to be
2709 * enqueued for any endpoint on the old config or interface. Nothing
2710 * else should be touching the xhci->devs[slot_id] structure, so we
2711 * don't need to take the xhci->lock for manipulating that.
2713 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2717 struct xhci_hcd *xhci;
2718 struct xhci_virt_device *virt_dev;
2719 struct xhci_input_control_ctx *ctrl_ctx;
2720 struct xhci_slot_ctx *slot_ctx;
2722 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2725 xhci = hcd_to_xhci(hcd);
2726 if (xhci->xhc_state & XHCI_STATE_DYING)
2729 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2730 virt_dev = xhci->devs[udev->slot_id];
2732 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2733 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2735 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2739 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2740 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2741 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2743 /* Don't issue the command if there's no endpoints to update. */
2744 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2745 ctrl_ctx->drop_flags == 0)
2748 xhci_dbg(xhci, "New Input Control Context:\n");
2749 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2750 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2751 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2753 ret = xhci_configure_endpoint(xhci, udev, NULL,
2756 /* Callee should call reset_bandwidth() */
2760 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2761 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2762 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2764 /* Free any rings that were dropped, but not changed. */
2765 for (i = 1; i < 31; ++i) {
2766 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2767 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2768 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2770 xhci_zero_in_ctx(xhci, virt_dev);
2772 * Install any rings for completely new endpoints or changed endpoints,
2773 * and free or cache any old rings from changed endpoints.
2775 for (i = 1; i < 31; ++i) {
2776 if (!virt_dev->eps[i].new_ring)
2778 /* Only cache or free the old ring if it exists.
2779 * It may not if this is the first add of an endpoint.
2781 if (virt_dev->eps[i].ring) {
2782 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2784 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2785 virt_dev->eps[i].new_ring = NULL;
2791 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2793 struct xhci_hcd *xhci;
2794 struct xhci_virt_device *virt_dev;
2797 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2800 xhci = hcd_to_xhci(hcd);
2802 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2803 virt_dev = xhci->devs[udev->slot_id];
2804 /* Free any rings allocated for added endpoints */
2805 for (i = 0; i < 31; ++i) {
2806 if (virt_dev->eps[i].new_ring) {
2807 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2808 virt_dev->eps[i].new_ring = NULL;
2811 xhci_zero_in_ctx(xhci, virt_dev);
2814 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2815 struct xhci_container_ctx *in_ctx,
2816 struct xhci_container_ctx *out_ctx,
2817 struct xhci_input_control_ctx *ctrl_ctx,
2818 u32 add_flags, u32 drop_flags)
2820 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2821 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2822 xhci_slot_copy(xhci, in_ctx, out_ctx);
2823 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2825 xhci_dbg(xhci, "Input Context:\n");
2826 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2829 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2830 unsigned int slot_id, unsigned int ep_index,
2831 struct xhci_dequeue_state *deq_state)
2833 struct xhci_input_control_ctx *ctrl_ctx;
2834 struct xhci_container_ctx *in_ctx;
2835 struct xhci_ep_ctx *ep_ctx;
2839 in_ctx = xhci->devs[slot_id]->in_ctx;
2840 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2842 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2847 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2848 xhci->devs[slot_id]->out_ctx, ep_index);
2849 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2850 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2851 deq_state->new_deq_ptr);
2853 xhci_warn(xhci, "WARN Cannot submit config ep after "
2854 "reset ep command\n");
2855 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2856 deq_state->new_deq_seg,
2857 deq_state->new_deq_ptr);
2860 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2862 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2863 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2864 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2865 added_ctxs, added_ctxs);
2868 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2869 struct usb_device *udev, unsigned int ep_index)
2871 struct xhci_dequeue_state deq_state;
2872 struct xhci_virt_ep *ep;
2874 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
2875 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2876 /* We need to move the HW's dequeue pointer past this TD,
2877 * or it will attempt to resend it on the next doorbell ring.
2879 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2880 ep_index, ep->stopped_stream, ep->stopped_td,
2883 /* HW with the reset endpoint quirk will use the saved dequeue state to
2884 * issue a configure endpoint command later.
2886 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2887 xhci_dbg(xhci, "Queueing new dequeue state\n");
2888 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2889 ep_index, ep->stopped_stream, &deq_state);
2891 /* Better hope no one uses the input context between now and the
2892 * reset endpoint completion!
2893 * XXX: No idea how this hardware will react when stream rings
2896 xhci_dbg(xhci, "Setting up input context for "
2897 "configure endpoint command\n");
2898 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2899 ep_index, &deq_state);
2903 /* Deal with stalled endpoints. The core should have sent the control message
2904 * to clear the halt condition. However, we need to make the xHCI hardware
2905 * reset its sequence number, since a device will expect a sequence number of
2906 * zero after the halt condition is cleared.
2907 * Context: in_interrupt
2909 void xhci_endpoint_reset(struct usb_hcd *hcd,
2910 struct usb_host_endpoint *ep)
2912 struct xhci_hcd *xhci;
2913 struct usb_device *udev;
2914 unsigned int ep_index;
2915 unsigned long flags;
2917 struct xhci_virt_ep *virt_ep;
2919 xhci = hcd_to_xhci(hcd);
2920 udev = (struct usb_device *) ep->hcpriv;
2921 /* Called with a root hub endpoint (or an endpoint that wasn't added
2922 * with xhci_add_endpoint()
2926 ep_index = xhci_get_endpoint_index(&ep->desc);
2927 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2928 if (!virt_ep->stopped_td) {
2929 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
2930 ep->desc.bEndpointAddress);
2933 if (usb_endpoint_xfer_control(&ep->desc)) {
2934 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
2938 xhci_dbg(xhci, "Queueing reset endpoint command\n");
2939 spin_lock_irqsave(&xhci->lock, flags);
2940 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2942 * Can't change the ring dequeue pointer until it's transitioned to the
2943 * stopped state, which is only upon a successful reset endpoint
2944 * command. Better hope that last command worked!
2947 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2948 kfree(virt_ep->stopped_td);
2949 xhci_ring_cmd_db(xhci);
2951 virt_ep->stopped_td = NULL;
2952 virt_ep->stopped_trb = NULL;
2953 virt_ep->stopped_stream = 0;
2954 spin_unlock_irqrestore(&xhci->lock, flags);
2957 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2960 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2961 struct usb_device *udev, struct usb_host_endpoint *ep,
2962 unsigned int slot_id)
2965 unsigned int ep_index;
2966 unsigned int ep_state;
2970 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2973 if (ep->ss_ep_comp.bmAttributes == 0) {
2974 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2975 " descriptor for ep 0x%x does not support streams\n",
2976 ep->desc.bEndpointAddress);
2980 ep_index = xhci_get_endpoint_index(&ep->desc);
2981 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2982 if (ep_state & EP_HAS_STREAMS ||
2983 ep_state & EP_GETTING_STREAMS) {
2984 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2985 "already has streams set up.\n",
2986 ep->desc.bEndpointAddress);
2987 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2988 "dynamic stream context array reallocation.\n");
2991 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2992 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2993 "endpoint 0x%x; URBs are pending.\n",
2994 ep->desc.bEndpointAddress);
3000 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3001 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3003 unsigned int max_streams;
3005 /* The stream context array size must be a power of two */
3006 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3008 * Find out how many primary stream array entries the host controller
3009 * supports. Later we may use secondary stream arrays (similar to 2nd
3010 * level page entries), but that's an optional feature for xHCI host
3011 * controllers. xHCs must support at least 4 stream IDs.
3013 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3014 if (*num_stream_ctxs > max_streams) {
3015 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3017 *num_stream_ctxs = max_streams;
3018 *num_streams = max_streams;
3022 /* Returns an error code if one of the endpoint already has streams.
3023 * This does not change any data structures, it only checks and gathers
3026 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3027 struct usb_device *udev,
3028 struct usb_host_endpoint **eps, unsigned int num_eps,
3029 unsigned int *num_streams, u32 *changed_ep_bitmask)
3031 unsigned int max_streams;
3032 unsigned int endpoint_flag;
3036 for (i = 0; i < num_eps; i++) {
3037 ret = xhci_check_streams_endpoint(xhci, udev,
3038 eps[i], udev->slot_id);
3042 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3043 if (max_streams < (*num_streams - 1)) {
3044 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3045 eps[i]->desc.bEndpointAddress,
3047 *num_streams = max_streams+1;
3050 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3051 if (*changed_ep_bitmask & endpoint_flag)
3053 *changed_ep_bitmask |= endpoint_flag;
3058 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3059 struct usb_device *udev,
3060 struct usb_host_endpoint **eps, unsigned int num_eps)
3062 u32 changed_ep_bitmask = 0;
3063 unsigned int slot_id;
3064 unsigned int ep_index;
3065 unsigned int ep_state;
3068 slot_id = udev->slot_id;
3069 if (!xhci->devs[slot_id])
3072 for (i = 0; i < num_eps; i++) {
3073 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3074 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3075 /* Are streams already being freed for the endpoint? */
3076 if (ep_state & EP_GETTING_NO_STREAMS) {
3077 xhci_warn(xhci, "WARN Can't disable streams for "
3079 "streams are being disabled already.",
3080 eps[i]->desc.bEndpointAddress);
3083 /* Are there actually any streams to free? */
3084 if (!(ep_state & EP_HAS_STREAMS) &&
3085 !(ep_state & EP_GETTING_STREAMS)) {
3086 xhci_warn(xhci, "WARN Can't disable streams for "
3088 "streams are already disabled!",
3089 eps[i]->desc.bEndpointAddress);
3090 xhci_warn(xhci, "WARN xhci_free_streams() called "
3091 "with non-streams endpoint\n");
3094 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3096 return changed_ep_bitmask;
3100 * The USB device drivers use this function (though the HCD interface in USB
3101 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3102 * coordinate mass storage command queueing across multiple endpoints (basically
3103 * a stream ID == a task ID).
3105 * Setting up streams involves allocating the same size stream context array
3106 * for each endpoint and issuing a configure endpoint command for all endpoints.
3108 * Don't allow the call to succeed if one endpoint only supports one stream
3109 * (which means it doesn't support streams at all).
3111 * Drivers may get less stream IDs than they asked for, if the host controller
3112 * hardware or endpoints claim they can't support the number of requested
3115 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3116 struct usb_host_endpoint **eps, unsigned int num_eps,
3117 unsigned int num_streams, gfp_t mem_flags)
3120 struct xhci_hcd *xhci;
3121 struct xhci_virt_device *vdev;
3122 struct xhci_command *config_cmd;
3123 struct xhci_input_control_ctx *ctrl_ctx;
3124 unsigned int ep_index;
3125 unsigned int num_stream_ctxs;
3126 unsigned long flags;
3127 u32 changed_ep_bitmask = 0;
3132 /* Add one to the number of streams requested to account for
3133 * stream 0 that is reserved for xHCI usage.
3136 xhci = hcd_to_xhci(hcd);
3137 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3140 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3142 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3145 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3147 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3149 xhci_free_command(xhci, config_cmd);
3153 /* Check to make sure all endpoints are not already configured for
3154 * streams. While we're at it, find the maximum number of streams that
3155 * all the endpoints will support and check for duplicate endpoints.
3157 spin_lock_irqsave(&xhci->lock, flags);
3158 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3159 num_eps, &num_streams, &changed_ep_bitmask);
3161 xhci_free_command(xhci, config_cmd);
3162 spin_unlock_irqrestore(&xhci->lock, flags);
3165 if (num_streams <= 1) {
3166 xhci_warn(xhci, "WARN: endpoints can't handle "
3167 "more than one stream.\n");
3168 xhci_free_command(xhci, config_cmd);
3169 spin_unlock_irqrestore(&xhci->lock, flags);
3172 vdev = xhci->devs[udev->slot_id];
3173 /* Mark each endpoint as being in transition, so
3174 * xhci_urb_enqueue() will reject all URBs.
3176 for (i = 0; i < num_eps; i++) {
3177 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3178 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3180 spin_unlock_irqrestore(&xhci->lock, flags);
3182 /* Setup internal data structures and allocate HW data structures for
3183 * streams (but don't install the HW structures in the input context
3184 * until we're sure all memory allocation succeeded).
3186 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3187 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3188 num_stream_ctxs, num_streams);
3190 for (i = 0; i < num_eps; i++) {
3191 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3192 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3194 num_streams, mem_flags);
3195 if (!vdev->eps[ep_index].stream_info)
3197 /* Set maxPstreams in endpoint context and update deq ptr to
3198 * point to stream context array. FIXME
3202 /* Set up the input context for a configure endpoint command. */
3203 for (i = 0; i < num_eps; i++) {
3204 struct xhci_ep_ctx *ep_ctx;
3206 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3207 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3209 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3210 vdev->out_ctx, ep_index);
3211 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3212 vdev->eps[ep_index].stream_info);
3214 /* Tell the HW to drop its old copy of the endpoint context info
3215 * and add the updated copy from the input context.
3217 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3218 vdev->out_ctx, ctrl_ctx,
3219 changed_ep_bitmask, changed_ep_bitmask);
3221 /* Issue and wait for the configure endpoint command */
3222 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3225 /* xHC rejected the configure endpoint command for some reason, so we
3226 * leave the old ring intact and free our internal streams data
3232 spin_lock_irqsave(&xhci->lock, flags);
3233 for (i = 0; i < num_eps; i++) {
3234 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3235 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3236 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3237 udev->slot_id, ep_index);
3238 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3240 xhci_free_command(xhci, config_cmd);
3241 spin_unlock_irqrestore(&xhci->lock, flags);
3243 /* Subtract 1 for stream 0, which drivers can't use */
3244 return num_streams - 1;
3247 /* If it didn't work, free the streams! */
3248 for (i = 0; i < num_eps; i++) {
3249 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3250 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3251 vdev->eps[ep_index].stream_info = NULL;
3252 /* FIXME Unset maxPstreams in endpoint context and
3253 * update deq ptr to point to normal string ring.
3255 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3256 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3257 xhci_endpoint_zero(xhci, vdev, eps[i]);
3259 xhci_free_command(xhci, config_cmd);
3263 /* Transition the endpoint from using streams to being a "normal" endpoint
3266 * Modify the endpoint context state, submit a configure endpoint command,
3267 * and free all endpoint rings for streams if that completes successfully.
3269 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3270 struct usb_host_endpoint **eps, unsigned int num_eps,
3274 struct xhci_hcd *xhci;
3275 struct xhci_virt_device *vdev;
3276 struct xhci_command *command;
3277 struct xhci_input_control_ctx *ctrl_ctx;
3278 unsigned int ep_index;
3279 unsigned long flags;
3280 u32 changed_ep_bitmask;
3282 xhci = hcd_to_xhci(hcd);
3283 vdev = xhci->devs[udev->slot_id];
3285 /* Set up a configure endpoint command to remove the streams rings */
3286 spin_lock_irqsave(&xhci->lock, flags);
3287 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3288 udev, eps, num_eps);
3289 if (changed_ep_bitmask == 0) {
3290 spin_unlock_irqrestore(&xhci->lock, flags);
3294 /* Use the xhci_command structure from the first endpoint. We may have
3295 * allocated too many, but the driver may call xhci_free_streams() for
3296 * each endpoint it grouped into one call to xhci_alloc_streams().
3298 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3299 command = vdev->eps[ep_index].stream_info->free_streams_command;
3300 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3302 spin_unlock_irqrestore(&xhci->lock, flags);
3303 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3308 for (i = 0; i < num_eps; i++) {
3309 struct xhci_ep_ctx *ep_ctx;
3311 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3312 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3313 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3314 EP_GETTING_NO_STREAMS;
3316 xhci_endpoint_copy(xhci, command->in_ctx,
3317 vdev->out_ctx, ep_index);
3318 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3319 &vdev->eps[ep_index]);
3321 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3322 vdev->out_ctx, ctrl_ctx,
3323 changed_ep_bitmask, changed_ep_bitmask);
3324 spin_unlock_irqrestore(&xhci->lock, flags);
3326 /* Issue and wait for the configure endpoint command,
3327 * which must succeed.
3329 ret = xhci_configure_endpoint(xhci, udev, command,
3332 /* xHC rejected the configure endpoint command for some reason, so we
3333 * leave the streams rings intact.
3338 spin_lock_irqsave(&xhci->lock, flags);
3339 for (i = 0; i < num_eps; i++) {
3340 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3341 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3342 vdev->eps[ep_index].stream_info = NULL;
3343 /* FIXME Unset maxPstreams in endpoint context and
3344 * update deq ptr to point to normal string ring.
3346 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3347 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3349 spin_unlock_irqrestore(&xhci->lock, flags);
3355 * Deletes endpoint resources for endpoints that were active before a Reset
3356 * Device command, or a Disable Slot command. The Reset Device command leaves
3357 * the control endpoint intact, whereas the Disable Slot command deletes it.
3359 * Must be called with xhci->lock held.
3361 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3362 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3365 unsigned int num_dropped_eps = 0;
3366 unsigned int drop_flags = 0;
3368 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3369 if (virt_dev->eps[i].ring) {
3370 drop_flags |= 1 << i;
3374 xhci->num_active_eps -= num_dropped_eps;
3375 if (num_dropped_eps)
3376 xhci_dbg(xhci, "Dropped %u ep ctxs, flags = 0x%x, "
3378 num_dropped_eps, drop_flags,
3379 xhci->num_active_eps);
3383 * This submits a Reset Device Command, which will set the device state to 0,
3384 * set the device address to 0, and disable all the endpoints except the default
3385 * control endpoint. The USB core should come back and call
3386 * xhci_address_device(), and then re-set up the configuration. If this is
3387 * called because of a usb_reset_and_verify_device(), then the old alternate
3388 * settings will be re-installed through the normal bandwidth allocation
3391 * Wait for the Reset Device command to finish. Remove all structures
3392 * associated with the endpoints that were disabled. Clear the input device
3393 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3395 * If the virt_dev to be reset does not exist or does not match the udev,
3396 * it means the device is lost, possibly due to the xHC restore error and
3397 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3398 * re-allocate the device.
3400 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3403 unsigned long flags;
3404 struct xhci_hcd *xhci;
3405 unsigned int slot_id;
3406 struct xhci_virt_device *virt_dev;
3407 struct xhci_command *reset_device_cmd;
3409 int last_freed_endpoint;
3410 struct xhci_slot_ctx *slot_ctx;
3411 int old_active_eps = 0;
3413 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3416 xhci = hcd_to_xhci(hcd);
3417 slot_id = udev->slot_id;
3418 virt_dev = xhci->devs[slot_id];
3420 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3421 "not exist. Re-allocate the device\n", slot_id);
3422 ret = xhci_alloc_dev(hcd, udev);
3429 if (virt_dev->udev != udev) {
3430 /* If the virt_dev and the udev does not match, this virt_dev
3431 * may belong to another udev.
3432 * Re-allocate the device.
3434 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3435 "not match the udev. Re-allocate the device\n",
3437 ret = xhci_alloc_dev(hcd, udev);
3444 /* If device is not setup, there is no point in resetting it */
3445 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3446 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3447 SLOT_STATE_DISABLED)
3450 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3451 /* Allocate the command structure that holds the struct completion.
3452 * Assume we're in process context, since the normal device reset
3453 * process has to wait for the device anyway. Storage devices are
3454 * reset as part of error handling, so use GFP_NOIO instead of
3457 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3458 if (!reset_device_cmd) {
3459 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3463 /* Attempt to submit the Reset Device command to the command ring */
3464 spin_lock_irqsave(&xhci->lock, flags);
3465 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
3467 /* Enqueue pointer can be left pointing to the link TRB,
3468 * we must handle that
3470 if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control))
3471 reset_device_cmd->command_trb =
3472 xhci->cmd_ring->enq_seg->next->trbs;
3474 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3475 ret = xhci_queue_reset_device(xhci, slot_id);
3477 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3478 list_del(&reset_device_cmd->cmd_list);
3479 spin_unlock_irqrestore(&xhci->lock, flags);
3480 goto command_cleanup;
3482 xhci_ring_cmd_db(xhci);
3483 spin_unlock_irqrestore(&xhci->lock, flags);
3485 /* Wait for the Reset Device command to finish */
3486 timeleft = wait_for_completion_interruptible_timeout(
3487 reset_device_cmd->completion,
3488 USB_CTRL_SET_TIMEOUT);
3489 if (timeleft <= 0) {
3490 xhci_warn(xhci, "%s while waiting for reset device command\n",
3491 timeleft == 0 ? "Timeout" : "Signal");
3492 spin_lock_irqsave(&xhci->lock, flags);
3493 /* The timeout might have raced with the event ring handler, so
3494 * only delete from the list if the item isn't poisoned.
3496 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3497 list_del(&reset_device_cmd->cmd_list);
3498 spin_unlock_irqrestore(&xhci->lock, flags);
3500 goto command_cleanup;
3503 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3504 * unless we tried to reset a slot ID that wasn't enabled,
3505 * or the device wasn't in the addressed or configured state.
3507 ret = reset_device_cmd->status;
3509 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3510 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3511 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
3513 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3514 xhci_info(xhci, "Not freeing device rings.\n");
3515 /* Don't treat this as an error. May change my mind later. */
3517 goto command_cleanup;
3519 xhci_dbg(xhci, "Successful reset device command.\n");
3522 if (xhci_is_vendor_info_code(xhci, ret))
3524 xhci_warn(xhci, "Unknown completion code %u for "
3525 "reset device command.\n", ret);
3527 goto command_cleanup;
3530 /* Free up host controller endpoint resources */
3531 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3532 spin_lock_irqsave(&xhci->lock, flags);
3533 /* Don't delete the default control endpoint resources */
3534 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3535 spin_unlock_irqrestore(&xhci->lock, flags);
3538 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3539 last_freed_endpoint = 1;
3540 for (i = 1; i < 31; ++i) {
3541 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3543 if (ep->ep_state & EP_HAS_STREAMS) {
3544 xhci_free_stream_info(xhci, ep->stream_info);
3545 ep->stream_info = NULL;
3546 ep->ep_state &= ~EP_HAS_STREAMS;
3550 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3551 last_freed_endpoint = i;
3553 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3554 xhci_drop_ep_from_interval_table(xhci,
3555 &virt_dev->eps[i].bw_info,
3560 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3562 /* If necessary, update the number of active TTs on this root port */
3563 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3565 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3566 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3570 xhci_free_command(xhci, reset_device_cmd);
3575 * At this point, the struct usb_device is about to go away, the device has
3576 * disconnected, and all traffic has been stopped and the endpoints have been
3577 * disabled. Free any HC data structures associated with that device.
3579 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3581 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3582 struct xhci_virt_device *virt_dev;
3583 unsigned long flags;
3587 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3588 /* If the host is halted due to driver unload, we still need to free the
3591 if (ret <= 0 && ret != -ENODEV)
3594 virt_dev = xhci->devs[udev->slot_id];
3596 /* Stop any wayward timer functions (which may grab the lock) */
3597 for (i = 0; i < 31; ++i) {
3598 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3599 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3602 if (udev->usb2_hw_lpm_enabled) {
3603 xhci_set_usb2_hardware_lpm(hcd, udev, 0);
3604 udev->usb2_hw_lpm_enabled = 0;
3607 spin_lock_irqsave(&xhci->lock, flags);
3608 /* Don't disable the slot if the host controller is dead. */
3609 state = xhci_readl(xhci, &xhci->op_regs->status);
3610 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3611 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3612 xhci_free_virt_device(xhci, udev->slot_id);
3613 spin_unlock_irqrestore(&xhci->lock, flags);
3617 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3618 spin_unlock_irqrestore(&xhci->lock, flags);
3619 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3622 xhci_ring_cmd_db(xhci);
3623 spin_unlock_irqrestore(&xhci->lock, flags);
3625 * Event command completion handler will free any data structures
3626 * associated with the slot. XXX Can free sleep?
3631 * Checks if we have enough host controller resources for the default control
3634 * Must be called with xhci->lock held.
3636 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3638 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3639 xhci_dbg(xhci, "Not enough ep ctxs: "
3640 "%u active, need to add 1, limit is %u.\n",
3641 xhci->num_active_eps, xhci->limit_active_eps);
3644 xhci->num_active_eps += 1;
3645 xhci_dbg(xhci, "Adding 1 ep ctx, %u now active.\n",
3646 xhci->num_active_eps);
3652 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3653 * timed out, or allocating memory failed. Returns 1 on success.
3655 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3657 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3658 unsigned long flags;
3661 union xhci_trb *cmd_trb;
3663 spin_lock_irqsave(&xhci->lock, flags);
3664 cmd_trb = xhci->cmd_ring->dequeue;
3665 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3667 spin_unlock_irqrestore(&xhci->lock, flags);
3668 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3671 xhci_ring_cmd_db(xhci);
3672 spin_unlock_irqrestore(&xhci->lock, flags);
3674 /* XXX: how much time for xHC slot assignment? */
3675 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3676 XHCI_CMD_DEFAULT_TIMEOUT);
3677 if (timeleft <= 0) {
3678 xhci_warn(xhci, "%s while waiting for a slot\n",
3679 timeleft == 0 ? "Timeout" : "Signal");
3680 /* cancel the enable slot request */
3681 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3684 if (!xhci->slot_id) {
3685 xhci_err(xhci, "Error while assigning device slot ID\n");
3689 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3690 spin_lock_irqsave(&xhci->lock, flags);
3691 ret = xhci_reserve_host_control_ep_resources(xhci);
3693 spin_unlock_irqrestore(&xhci->lock, flags);
3694 xhci_warn(xhci, "Not enough host resources, "
3695 "active endpoint contexts = %u\n",
3696 xhci->num_active_eps);
3699 spin_unlock_irqrestore(&xhci->lock, flags);
3701 /* Use GFP_NOIO, since this function can be called from
3702 * xhci_discover_or_reset_device(), which may be called as part of
3703 * mass storage driver error handling.
3705 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3706 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3709 udev->slot_id = xhci->slot_id;
3710 /* Is this a LS or FS device under a HS hub? */
3711 /* Hub or peripherial? */
3715 /* Disable slot, if we can do it without mem alloc */
3716 spin_lock_irqsave(&xhci->lock, flags);
3717 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3718 xhci_ring_cmd_db(xhci);
3719 spin_unlock_irqrestore(&xhci->lock, flags);
3724 * Issue an Address Device command (which will issue a SetAddress request to
3726 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3727 * we should only issue and wait on one address command at the same time.
3729 * We add one to the device address issued by the hardware because the USB core
3730 * uses address 1 for the root hubs (even though they're not really devices).
3732 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3734 unsigned long flags;
3736 struct xhci_virt_device *virt_dev;
3738 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3739 struct xhci_slot_ctx *slot_ctx;
3740 struct xhci_input_control_ctx *ctrl_ctx;
3742 union xhci_trb *cmd_trb;
3744 if (!udev->slot_id) {
3745 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
3749 virt_dev = xhci->devs[udev->slot_id];
3751 if (WARN_ON(!virt_dev)) {
3753 * In plug/unplug torture test with an NEC controller,
3754 * a zero-dereference was observed once due to virt_dev = 0.
3755 * Print useful debug rather than crash if it is observed again!
3757 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3762 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3763 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3765 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3770 * If this is the first Set Address since device plug-in or
3771 * virt_device realloaction after a resume with an xHCI power loss,
3772 * then set up the slot context.
3774 if (!slot_ctx->dev_info)
3775 xhci_setup_addressable_virt_dev(xhci, udev);
3776 /* Otherwise, update the control endpoint ring enqueue pointer. */
3778 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3779 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3780 ctrl_ctx->drop_flags = 0;
3782 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3783 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3785 spin_lock_irqsave(&xhci->lock, flags);
3786 cmd_trb = xhci->cmd_ring->dequeue;
3787 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3790 spin_unlock_irqrestore(&xhci->lock, flags);
3791 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3794 xhci_ring_cmd_db(xhci);
3795 spin_unlock_irqrestore(&xhci->lock, flags);
3797 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3798 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3799 XHCI_CMD_DEFAULT_TIMEOUT);
3800 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3801 * the SetAddress() "recovery interval" required by USB and aborting the
3802 * command on a timeout.
3804 if (timeleft <= 0) {
3805 xhci_warn(xhci, "%s while waiting for address device command\n",
3806 timeleft == 0 ? "Timeout" : "Signal");
3807 /* cancel the address device command */
3808 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3814 switch (virt_dev->cmd_status) {
3815 case COMP_CTX_STATE:
3817 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
3822 dev_warn(&udev->dev, "Device not responding to set address.\n");
3826 dev_warn(&udev->dev, "ERROR: Incompatible device for address "
3827 "device command.\n");
3831 xhci_dbg(xhci, "Successful Address Device command\n");
3834 xhci_err(xhci, "ERROR: unexpected command completion "
3835 "code 0x%x.\n", virt_dev->cmd_status);
3836 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3837 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3844 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3845 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
3846 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3848 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3849 (unsigned long long)
3850 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3851 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
3852 (unsigned long long)virt_dev->out_ctx->dma);
3853 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3854 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3855 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3856 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3858 * USB core uses address 1 for the roothubs, so we add one to the
3859 * address given back to us by the HC.
3861 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3862 /* Use kernel assigned address for devices; store xHC assigned
3863 * address locally. */
3864 virt_dev->address = (le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK)
3866 /* Zero the input context control for later use */
3867 ctrl_ctx->add_flags = 0;
3868 ctrl_ctx->drop_flags = 0;
3870 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
3876 * Transfer the port index into real index in the HW port status
3877 * registers. Caculate offset between the port's PORTSC register
3878 * and port status base. Divide the number of per port register
3879 * to get the real index. The raw port number bases 1.
3881 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3883 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3884 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3885 __le32 __iomem *addr;
3888 if (hcd->speed != HCD_USB3)
3889 addr = xhci->usb2_ports[port1 - 1];
3891 addr = xhci->usb3_ports[port1 - 1];
3893 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3898 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3899 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3901 static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3902 struct usb_device *udev, u16 max_exit_latency)
3904 struct xhci_virt_device *virt_dev;
3905 struct xhci_command *command;
3906 struct xhci_input_control_ctx *ctrl_ctx;
3907 struct xhci_slot_ctx *slot_ctx;
3908 unsigned long flags;
3911 spin_lock_irqsave(&xhci->lock, flags);
3912 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3913 spin_unlock_irqrestore(&xhci->lock, flags);
3917 /* Attempt to issue an Evaluate Context command to change the MEL. */
3918 virt_dev = xhci->devs[udev->slot_id];
3919 command = xhci->lpm_command;
3920 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3922 spin_unlock_irqrestore(&xhci->lock, flags);
3923 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3928 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3929 spin_unlock_irqrestore(&xhci->lock, flags);
3931 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3932 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3933 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3934 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3936 xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
3937 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3938 xhci_dbg_ctx(xhci, command->in_ctx, 0);
3940 /* Issue and wait for the evaluate context command. */
3941 ret = xhci_configure_endpoint(xhci, udev, command,
3943 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3944 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3947 spin_lock_irqsave(&xhci->lock, flags);
3948 virt_dev->current_mel = max_exit_latency;
3949 spin_unlock_irqrestore(&xhci->lock, flags);
3954 #ifdef CONFIG_PM_RUNTIME
3956 /* BESL to HIRD Encoding array for USB2 LPM */
3957 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3958 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3960 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3961 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3962 struct usb_device *udev)
3964 int u2del, besl, besl_host;
3965 int besl_device = 0;
3968 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3969 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3971 if (field & USB_BESL_SUPPORT) {
3972 for (besl_host = 0; besl_host < 16; besl_host++) {
3973 if (xhci_besl_encoding[besl_host] >= u2del)
3976 /* Use baseline BESL value as default */
3977 if (field & USB_BESL_BASELINE_VALID)
3978 besl_device = USB_GET_BESL_BASELINE(field);
3979 else if (field & USB_BESL_DEEP_VALID)
3980 besl_device = USB_GET_BESL_DEEP(field);
3985 besl_host = (u2del - 51) / 75 + 1;
3988 besl = besl_host + besl_device;
3995 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3996 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4003 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4005 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4006 l1 = udev->l1_params.timeout / 256;
4008 /* device has preferred BESLD */
4009 if (field & USB_BESL_DEEP_VALID) {
4010 besld = USB_GET_BESL_DEEP(field);
4014 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4017 static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
4018 struct usb_device *udev)
4020 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4021 struct dev_info *dev_info;
4022 __le32 __iomem **port_array;
4023 __le32 __iomem *addr, *pm_addr;
4025 unsigned int port_num;
4026 unsigned long flags;
4030 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4034 /* we only support lpm for non-hub device connected to root hub yet */
4035 if (!udev->parent || udev->parent->parent ||
4036 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4039 spin_lock_irqsave(&xhci->lock, flags);
4041 /* Look for devices in lpm_failed_devs list */
4042 dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
4043 le16_to_cpu(udev->descriptor.idProduct);
4044 list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
4045 if (dev_info->dev_id == dev_id) {
4051 port_array = xhci->usb2_ports;
4052 port_num = udev->portnum - 1;
4054 if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
4055 xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
4061 * Test USB 2.0 software LPM.
4062 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4063 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4064 * in the June 2011 errata release.
4066 xhci_dbg(xhci, "test port %d software LPM\n", port_num);
4068 * Set L1 Device Slot and HIRD/BESL.
4069 * Check device's USB 2.0 extension descriptor to determine whether
4070 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4072 pm_addr = port_array[port_num] + PORTPMSC;
4073 hird = xhci_calculate_hird_besl(xhci, udev);
4074 temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
4075 xhci_writel(xhci, temp, pm_addr);
4077 /* Set port link state to U2(L1) */
4078 addr = port_array[port_num];
4079 xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
4082 spin_unlock_irqrestore(&xhci->lock, flags);
4084 spin_lock_irqsave(&xhci->lock, flags);
4086 /* Check L1 Status */
4087 ret = xhci_handshake(xhci, pm_addr,
4088 PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
4089 if (ret != -ETIMEDOUT) {
4090 /* enter L1 successfully */
4091 temp = xhci_readl(xhci, addr);
4092 xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
4096 temp = xhci_readl(xhci, pm_addr);
4097 xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
4098 port_num, temp & PORT_L1S_MASK);
4102 /* Resume the port */
4103 xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
4105 spin_unlock_irqrestore(&xhci->lock, flags);
4107 spin_lock_irqsave(&xhci->lock, flags);
4110 xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
4112 /* Check PORTSC to make sure the device is in the right state */
4114 temp = xhci_readl(xhci, addr);
4115 xhci_dbg(xhci, "resumed port %d status 0x%x\n", port_num, temp);
4116 if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
4117 (temp & PORT_PLS_MASK) != XDEV_U0) {
4118 xhci_dbg(xhci, "port L1 resume fail\n");
4124 /* Insert dev to lpm_failed_devs list */
4125 xhci_warn(xhci, "device LPM test failed, may disconnect and "
4127 dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
4132 dev_info->dev_id = dev_id;
4133 INIT_LIST_HEAD(&dev_info->list);
4134 list_add(&dev_info->list, &xhci->lpm_failed_devs);
4136 xhci_ring_device(xhci, udev->slot_id);
4140 spin_unlock_irqrestore(&xhci->lock, flags);
4144 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4145 struct usb_device *udev, int enable)
4147 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4148 __le32 __iomem **port_array;
4149 __le32 __iomem *pm_addr, *hlpm_addr;
4150 u32 pm_val, hlpm_val, field;
4151 unsigned int port_num;
4152 unsigned long flags;
4153 int hird, exit_latency;
4156 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4160 if (!udev->parent || udev->parent->parent ||
4161 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4164 if (udev->usb2_hw_lpm_capable != 1)
4167 spin_lock_irqsave(&xhci->lock, flags);
4169 port_array = xhci->usb2_ports;
4170 port_num = udev->portnum - 1;
4171 pm_addr = port_array[port_num] + PORTPMSC;
4172 pm_val = xhci_readl(xhci, pm_addr);
4173 hlpm_addr = port_array[port_num] + PORTHLPMC;
4174 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4176 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4177 enable ? "enable" : "disable", port_num);
4180 /* Host supports BESL timeout instead of HIRD */
4181 if (udev->usb2_hw_lpm_besl_capable) {
4182 /* if device doesn't have a preferred BESL value use a
4183 * default one which works with mixed HIRD and BESL
4184 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4186 if ((field & USB_BESL_SUPPORT) &&
4187 (field & USB_BESL_BASELINE_VALID))
4188 hird = USB_GET_BESL_BASELINE(field);
4190 hird = udev->l1_params.besl;
4192 exit_latency = xhci_besl_encoding[hird];
4193 spin_unlock_irqrestore(&xhci->lock, flags);
4195 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4196 * input context for link powermanagement evaluate
4197 * context commands. It is protected by hcd->bandwidth
4198 * mutex and is shared by all devices. We need to set
4199 * the max ext latency in USB 2 BESL LPM as well, so
4200 * use the same mutex and xhci_change_max_exit_latency()
4202 mutex_lock(hcd->bandwidth_mutex);
4203 ret = xhci_change_max_exit_latency(xhci, udev,
4205 mutex_unlock(hcd->bandwidth_mutex);
4209 spin_lock_irqsave(&xhci->lock, flags);
4211 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4212 xhci_writel(xhci, hlpm_val, hlpm_addr);
4214 xhci_readl(xhci, hlpm_addr);
4216 hird = xhci_calculate_hird_besl(xhci, udev);
4219 pm_val &= ~PORT_HIRD_MASK;
4220 pm_val |= PORT_HIRD(hird) | PORT_RWE;
4221 xhci_writel(xhci, pm_val, pm_addr);
4222 pm_val = xhci_readl(xhci, pm_addr);
4224 xhci_writel(xhci, pm_val, pm_addr);
4226 xhci_readl(xhci, pm_addr);
4228 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
4229 xhci_writel(xhci, pm_val, pm_addr);
4231 xhci_readl(xhci, pm_addr);
4232 if (udev->usb2_hw_lpm_besl_capable) {
4233 spin_unlock_irqrestore(&xhci->lock, flags);
4234 mutex_lock(hcd->bandwidth_mutex);
4235 xhci_change_max_exit_latency(xhci, udev, 0);
4236 mutex_unlock(hcd->bandwidth_mutex);
4241 spin_unlock_irqrestore(&xhci->lock, flags);
4245 /* check if a usb2 port supports a given extened capability protocol
4246 * only USB2 ports extended protocol capability values are cached.
4247 * Return 1 if capability is supported
4249 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4250 unsigned capability)
4252 u32 port_offset, port_count;
4255 for (i = 0; i < xhci->num_ext_caps; i++) {
4256 if (xhci->ext_caps[i] & capability) {
4257 /* port offsets starts at 1 */
4258 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4259 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4260 if (port >= port_offset &&
4261 port < port_offset + port_count)
4268 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4270 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4272 int portnum = udev->portnum - 1;
4274 ret = xhci_usb2_software_lpm_test(hcd, udev);
4276 xhci_dbg(xhci, "software LPM test succeed\n");
4277 if (xhci->hw_lpm_support == 1 &&
4278 xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
4279 udev->usb2_hw_lpm_capable = 1;
4280 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4281 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4282 if (xhci_check_usb2_port_capability(xhci, portnum,
4284 udev->usb2_hw_lpm_besl_capable = 1;
4285 ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
4287 udev->usb2_hw_lpm_enabled = 1;
4296 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4297 struct usb_device *udev, int enable)
4302 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4307 #endif /* CONFIG_PM_RUNTIME */
4309 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4312 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4313 static unsigned long long xhci_service_interval_to_ns(
4314 struct usb_endpoint_descriptor *desc)
4316 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4319 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4320 enum usb3_link_state state)
4322 unsigned long long sel;
4323 unsigned long long pel;
4324 unsigned int max_sel_pel;
4329 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4330 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4331 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4332 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4336 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4337 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4338 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4342 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4344 return USB3_LPM_DISABLED;
4347 if (sel <= max_sel_pel && pel <= max_sel_pel)
4348 return USB3_LPM_DEVICE_INITIATED;
4350 if (sel > max_sel_pel)
4351 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4352 "due to long SEL %llu ms\n",
4355 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4356 "due to long PEL %llu\n ms",
4358 return USB3_LPM_DISABLED;
4361 /* Returns the hub-encoded U1 timeout value.
4362 * The U1 timeout should be the maximum of the following values:
4363 * - For control endpoints, U1 system exit latency (SEL) * 3
4364 * - For bulk endpoints, U1 SEL * 5
4365 * - For interrupt endpoints:
4366 * - Notification EPs, U1 SEL * 3
4367 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4368 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4370 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4371 struct usb_endpoint_descriptor *desc)
4373 unsigned long long timeout_ns;
4377 ep_type = usb_endpoint_type(desc);
4379 case USB_ENDPOINT_XFER_CONTROL:
4380 timeout_ns = udev->u1_params.sel * 3;
4382 case USB_ENDPOINT_XFER_BULK:
4383 timeout_ns = udev->u1_params.sel * 5;
4385 case USB_ENDPOINT_XFER_INT:
4386 intr_type = usb_endpoint_interrupt_type(desc);
4387 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4388 timeout_ns = udev->u1_params.sel * 3;
4391 /* Otherwise the calculation is the same as isoc eps */
4392 case USB_ENDPOINT_XFER_ISOC:
4393 timeout_ns = xhci_service_interval_to_ns(desc);
4394 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4395 if (timeout_ns < udev->u1_params.sel * 2)
4396 timeout_ns = udev->u1_params.sel * 2;
4402 /* The U1 timeout is encoded in 1us intervals. */
4403 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4404 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4405 if (timeout_ns == USB3_LPM_DISABLED)
4408 /* If the necessary timeout value is bigger than what we can set in the
4409 * USB 3.0 hub, we have to disable hub-initiated U1.
4411 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4413 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4414 "due to long timeout %llu ms\n", timeout_ns);
4415 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4418 /* Returns the hub-encoded U2 timeout value.
4419 * The U2 timeout should be the maximum of:
4420 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4421 * - largest bInterval of any active periodic endpoint (to avoid going
4422 * into lower power link states between intervals).
4423 * - the U2 Exit Latency of the device
4425 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4426 struct usb_endpoint_descriptor *desc)
4428 unsigned long long timeout_ns;
4429 unsigned long long u2_del_ns;
4431 timeout_ns = 10 * 1000 * 1000;
4433 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4434 (xhci_service_interval_to_ns(desc) > timeout_ns))
4435 timeout_ns = xhci_service_interval_to_ns(desc);
4437 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4438 if (u2_del_ns > timeout_ns)
4439 timeout_ns = u2_del_ns;
4441 /* The U2 timeout is encoded in 256us intervals */
4442 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4443 /* If the necessary timeout value is bigger than what we can set in the
4444 * USB 3.0 hub, we have to disable hub-initiated U2.
4446 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4448 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4449 "due to long timeout %llu ms\n", timeout_ns);
4450 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4453 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4454 struct usb_device *udev,
4455 struct usb_endpoint_descriptor *desc,
4456 enum usb3_link_state state,
4459 if (state == USB3_LPM_U1) {
4460 if (xhci->quirks & XHCI_INTEL_HOST)
4461 return xhci_calculate_intel_u1_timeout(udev, desc);
4463 if (xhci->quirks & XHCI_INTEL_HOST)
4464 return xhci_calculate_intel_u2_timeout(udev, desc);
4467 return USB3_LPM_DISABLED;
4470 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4471 struct usb_device *udev,
4472 struct usb_endpoint_descriptor *desc,
4473 enum usb3_link_state state,
4478 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4479 desc, state, timeout);
4481 /* If we found we can't enable hub-initiated LPM, or
4482 * the U1 or U2 exit latency was too high to allow
4483 * device-initiated LPM as well, just stop searching.
4485 if (alt_timeout == USB3_LPM_DISABLED ||
4486 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4487 *timeout = alt_timeout;
4490 if (alt_timeout > *timeout)
4491 *timeout = alt_timeout;
4495 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4496 struct usb_device *udev,
4497 struct usb_host_interface *alt,
4498 enum usb3_link_state state,
4503 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4504 if (xhci_update_timeout_for_endpoint(xhci, udev,
4505 &alt->endpoint[j].desc, state, timeout))
4512 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4513 enum usb3_link_state state)
4515 struct usb_device *parent;
4516 unsigned int num_hubs;
4518 if (state == USB3_LPM_U2)
4521 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4522 for (parent = udev->parent, num_hubs = 0; parent->parent;
4523 parent = parent->parent)
4529 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4530 " below second-tier hub.\n");
4531 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4532 "to decrease power consumption.\n");
4536 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4537 struct usb_device *udev,
4538 enum usb3_link_state state)
4540 if (xhci->quirks & XHCI_INTEL_HOST)
4541 return xhci_check_intel_tier_policy(udev, state);
4545 /* Returns the U1 or U2 timeout that should be enabled.
4546 * If the tier check or timeout setting functions return with a non-zero exit
4547 * code, that means the timeout value has been finalized and we shouldn't look
4548 * at any more endpoints.
4550 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4551 struct usb_device *udev, enum usb3_link_state state)
4553 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4554 struct usb_host_config *config;
4557 u16 timeout = USB3_LPM_DISABLED;
4559 if (state == USB3_LPM_U1)
4561 else if (state == USB3_LPM_U2)
4564 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4569 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4572 /* Gather some information about the currently installed configuration
4573 * and alternate interface settings.
4575 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4579 config = udev->actconfig;
4583 for (i = 0; i < USB_MAXINTERFACES; i++) {
4584 struct usb_driver *driver;
4585 struct usb_interface *intf = config->interface[i];
4590 /* Check if any currently bound drivers want hub-initiated LPM
4593 if (intf->dev.driver) {
4594 driver = to_usb_driver(intf->dev.driver);
4595 if (driver && driver->disable_hub_initiated_lpm) {
4596 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4597 "at request of driver %s\n",
4598 state_name, driver->name);
4599 return xhci_get_timeout_no_hub_lpm(udev, state);
4603 /* Not sure how this could happen... */
4604 if (!intf->cur_altsetting)
4607 if (xhci_update_timeout_for_interface(xhci, udev,
4608 intf->cur_altsetting,
4615 static int calculate_max_exit_latency(struct usb_device *udev,
4616 enum usb3_link_state state_changed,
4617 u16 hub_encoded_timeout)
4619 unsigned long long u1_mel_us = 0;
4620 unsigned long long u2_mel_us = 0;
4621 unsigned long long mel_us = 0;
4627 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4628 hub_encoded_timeout == USB3_LPM_DISABLED);
4629 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4630 hub_encoded_timeout == USB3_LPM_DISABLED);
4632 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4633 hub_encoded_timeout != USB3_LPM_DISABLED);
4634 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4635 hub_encoded_timeout != USB3_LPM_DISABLED);
4637 /* If U1 was already enabled and we're not disabling it,
4638 * or we're going to enable U1, account for the U1 max exit latency.
4640 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4642 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4643 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4645 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4647 if (u1_mel_us > u2_mel_us)
4651 /* xHCI host controller max exit latency field is only 16 bits wide. */
4652 if (mel_us > MAX_EXIT) {
4653 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4654 "is too big.\n", mel_us);
4660 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4661 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4662 struct usb_device *udev, enum usb3_link_state state)
4664 struct xhci_hcd *xhci;
4665 u16 hub_encoded_timeout;
4669 xhci = hcd_to_xhci(hcd);
4670 /* The LPM timeout values are pretty host-controller specific, so don't
4671 * enable hub-initiated timeouts unless the vendor has provided
4672 * information about their timeout algorithm.
4674 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4675 !xhci->devs[udev->slot_id])
4676 return USB3_LPM_DISABLED;
4678 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4679 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4681 /* Max Exit Latency is too big, disable LPM. */
4682 hub_encoded_timeout = USB3_LPM_DISABLED;
4686 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4689 return hub_encoded_timeout;
4692 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4693 struct usb_device *udev, enum usb3_link_state state)
4695 struct xhci_hcd *xhci;
4699 xhci = hcd_to_xhci(hcd);
4700 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4701 !xhci->devs[udev->slot_id])
4704 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4705 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4710 #else /* CONFIG_PM */
4712 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4713 struct usb_device *udev, enum usb3_link_state state)
4715 return USB3_LPM_DISABLED;
4718 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4719 struct usb_device *udev, enum usb3_link_state state)
4723 #endif /* CONFIG_PM */
4725 /*-------------------------------------------------------------------------*/
4727 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4728 * internal data structures for the device.
4730 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4731 struct usb_tt *tt, gfp_t mem_flags)
4733 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4734 struct xhci_virt_device *vdev;
4735 struct xhci_command *config_cmd;
4736 struct xhci_input_control_ctx *ctrl_ctx;
4737 struct xhci_slot_ctx *slot_ctx;
4738 unsigned long flags;
4739 unsigned think_time;
4742 /* Ignore root hubs */
4746 vdev = xhci->devs[hdev->slot_id];
4748 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4751 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4753 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4756 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4758 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4760 xhci_free_command(xhci, config_cmd);
4764 spin_lock_irqsave(&xhci->lock, flags);
4765 if (hdev->speed == USB_SPEED_HIGH &&
4766 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4767 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4768 xhci_free_command(xhci, config_cmd);
4769 spin_unlock_irqrestore(&xhci->lock, flags);
4773 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4774 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4775 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4776 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4778 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4779 if (xhci->hci_version > 0x95) {
4780 xhci_dbg(xhci, "xHCI version %x needs hub "
4781 "TT think time and number of ports\n",
4782 (unsigned int) xhci->hci_version);
4783 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4784 /* Set TT think time - convert from ns to FS bit times.
4785 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4786 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4788 * xHCI 1.0: this field shall be 0 if the device is not a
4791 think_time = tt->think_time;
4792 if (think_time != 0)
4793 think_time = (think_time / 666) - 1;
4794 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4795 slot_ctx->tt_info |=
4796 cpu_to_le32(TT_THINK_TIME(think_time));
4798 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4799 "TT think time or number of ports\n",
4800 (unsigned int) xhci->hci_version);
4802 slot_ctx->dev_state = 0;
4803 spin_unlock_irqrestore(&xhci->lock, flags);
4805 xhci_dbg(xhci, "Set up %s for hub device.\n",
4806 (xhci->hci_version > 0x95) ?
4807 "configure endpoint" : "evaluate context");
4808 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4809 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4811 /* Issue and wait for the configure endpoint or
4812 * evaluate context command.
4814 if (xhci->hci_version > 0x95)
4815 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4818 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4821 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4822 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4824 xhci_free_command(xhci, config_cmd);
4828 int xhci_get_frame(struct usb_hcd *hcd)
4830 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4831 /* EHCI mods by the periodic size. Why? */
4832 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
4835 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4837 struct xhci_hcd *xhci;
4838 struct device *dev = hcd->self.controller;
4842 /* Accept arbitrarily long scatter-gather lists */
4843 hcd->self.sg_tablesize = ~0;
4844 /* XHCI controllers don't stop the ep queue on short packets :| */
4845 hcd->self.no_stop_on_short = 1;
4847 if (usb_hcd_is_primary_hcd(hcd)) {
4848 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4851 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4852 xhci->main_hcd = hcd;
4853 /* Mark the first roothub as being USB 2.0.
4854 * The xHCI driver will register the USB 3.0 roothub.
4856 hcd->speed = HCD_USB2;
4857 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4859 * USB 2.0 roothub under xHCI has an integrated TT,
4860 * (rate matching hub) as opposed to having an OHCI/UHCI
4861 * companion controller.
4865 /* xHCI private pointer was set in xhci_pci_probe for the second
4866 * registered roothub.
4868 xhci = hcd_to_xhci(hcd);
4869 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4870 if (HCC_64BIT_ADDR(temp)) {
4871 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4872 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4874 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4879 xhci->cap_regs = hcd->regs;
4880 xhci->op_regs = hcd->regs +
4881 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
4882 xhci->run_regs = hcd->regs +
4883 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4884 /* Cache read-only capability registers */
4885 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
4886 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
4887 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
4888 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
4889 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4890 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4891 xhci_print_registers(xhci);
4893 get_quirks(dev, xhci);
4895 /* Make sure the HC is halted. */
4896 retval = xhci_halt(xhci);
4900 xhci_dbg(xhci, "Resetting HCD\n");
4901 /* Reset the internal HC memory state and registers. */
4902 retval = xhci_reset(xhci);
4905 xhci_dbg(xhci, "Reset complete\n");
4907 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
4908 if (HCC_64BIT_ADDR(temp)) {
4909 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4910 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
4912 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
4915 xhci_dbg(xhci, "Calling HCD init\n");
4916 /* Initialize HCD and host controller data structures. */
4917 retval = xhci_init(hcd);
4920 xhci_dbg(xhci, "Called HCD init\n");
4927 MODULE_DESCRIPTION(DRIVER_DESC);
4928 MODULE_AUTHOR(DRIVER_AUTHOR);
4929 MODULE_LICENSE("GPL");
4931 static int __init xhci_hcd_init(void)
4935 retval = xhci_register_pci();
4937 printk(KERN_DEBUG "Problem registering PCI driver.");
4940 retval = xhci_register_plat();
4942 printk(KERN_DEBUG "Problem registering platform driver.");
4946 * Check the compiler generated sizes of structures that must be laid
4947 * out in specific ways for hardware access.
4949 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4950 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4951 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4952 /* xhci_device_control has eight fields, and also
4953 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4955 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4956 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4957 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4958 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4959 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4960 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4961 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4964 xhci_unregister_pci();
4967 module_init(xhci_hcd_init);
4969 static void __exit xhci_hcd_cleanup(void)
4971 xhci_unregister_pci();
4972 xhci_unregister_plat();
4974 module_exit(xhci_hcd_cleanup);