2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 static unsigned int quirks;
44 module_param(quirks, uint, S_IRUGO);
45 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
47 /* TODO: copied from ehci-hcd.c - can this be refactored? */
49 * xhci_handshake - spin reading hc until handshake completes or fails
50 * @ptr: address of hc register to be read
51 * @mask: bits to look at in result of read
52 * @done: value of those bits when handshake succeeds
53 * @usec: timeout in microseconds
55 * Returns negative errno, or zero on success
57 * Success happens when the "mask" bits have the specified value (hardware
58 * handshake done). There are two failure modes: "usec" have passed (major
59 * hardware flakeout), or the register reads as all-ones (hardware removed).
61 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
62 u32 mask, u32 done, int usec)
68 if (result == ~(u32)0) /* card removed */
80 * Disable interrupts and begin the xHCI halting process.
82 void xhci_quiesce(struct xhci_hcd *xhci)
89 halted = readl(&xhci->op_regs->status) & STS_HALT;
93 cmd = readl(&xhci->op_regs->command);
95 writel(cmd, &xhci->op_regs->command);
99 * Force HC into halt state.
101 * Disable any IRQs and clear the run/stop bit.
102 * HC will complete any current and actively pipelined transactions, and
103 * should halt within 16 ms of the run/stop bit being cleared.
104 * Read HC Halted bit in the status register to see when the HC is finished.
106 int xhci_halt(struct xhci_hcd *xhci)
109 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
112 ret = xhci_handshake(xhci, &xhci->op_regs->status,
113 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
115 xhci->xhc_state |= XHCI_STATE_HALTED;
116 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
118 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
124 * Set the run bit and wait for the host to be running.
126 static int xhci_start(struct xhci_hcd *xhci)
131 temp = readl(&xhci->op_regs->command);
133 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
135 writel(temp, &xhci->op_regs->command);
138 * Wait for the HCHalted Status bit to be 0 to indicate the host is
141 ret = xhci_handshake(xhci, &xhci->op_regs->status,
142 STS_HALT, 0, XHCI_MAX_HALT_USEC);
143 if (ret == -ETIMEDOUT)
144 xhci_err(xhci, "Host took too long to start, "
145 "waited %u microseconds.\n",
148 xhci->xhc_state &= ~XHCI_STATE_HALTED;
155 * This resets pipelines, timers, counters, state machines, etc.
156 * Transactions will be terminated immediately, and operational registers
157 * will be set to their defaults.
159 int xhci_reset(struct xhci_hcd *xhci)
165 state = readl(&xhci->op_regs->status);
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 ret = xhci_handshake(xhci, &xhci->op_regs->command,
177 CMD_RESET, 0, 10 * 1000 * 1000);
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
182 "Wait for controller to be ready for doorbell rings");
184 * xHCI cannot write to any doorbells or operational registers other
185 * than status until the "Controller Not Ready" flag is cleared.
187 ret = xhci_handshake(xhci, &xhci->op_regs->status,
188 STS_CNR, 0, 10 * 1000 * 1000);
190 for (i = 0; i < 2; ++i) {
191 xhci->bus_state[i].port_c_suspend = 0;
192 xhci->bus_state[i].suspended_ports = 0;
193 xhci->bus_state[i].resuming_ports = 0;
200 static int xhci_free_msi(struct xhci_hcd *xhci)
204 if (!xhci->msix_entries)
207 for (i = 0; i < xhci->msix_count; i++)
208 if (xhci->msix_entries[i].vector)
209 free_irq(xhci->msix_entries[i].vector,
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
220 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222 ret = pci_enable_msi(pdev);
224 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
225 "failed to allocate MSI entry");
229 ret = request_irq(pdev->irq, xhci_msi_irq,
230 0, "xhci_hcd", xhci_to_hcd(xhci));
232 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
233 "disable MSI interrupt");
234 pci_disable_msi(pdev);
242 * free all IRQs request
244 static void xhci_free_irq(struct xhci_hcd *xhci)
246 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
249 /* return if using legacy interrupt */
250 if (xhci_to_hcd(xhci)->irq > 0)
253 ret = xhci_free_msi(xhci);
257 free_irq(pdev->irq, xhci_to_hcd(xhci));
265 static int xhci_setup_msix(struct xhci_hcd *xhci)
268 struct usb_hcd *hcd = xhci_to_hcd(xhci);
269 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272 * calculate number of msi-x vectors supported.
273 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
274 * with max number of interrupters based on the xhci HCSPARAMS1.
275 * - num_online_cpus: maximum msi-x vectors per CPUs core.
276 * Add additional 1 vector to ensure always available interrupt.
278 xhci->msix_count = min(num_online_cpus() + 1,
279 HCS_MAX_INTRS(xhci->hcs_params1));
282 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
284 if (!xhci->msix_entries) {
285 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
289 for (i = 0; i < xhci->msix_count; i++) {
290 xhci->msix_entries[i].entry = i;
291 xhci->msix_entries[i].vector = 0;
294 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
296 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
297 "Failed to enable MSI-X");
301 for (i = 0; i < xhci->msix_count; i++) {
302 ret = request_irq(xhci->msix_entries[i].vector,
304 0, "xhci_hcd", xhci_to_hcd(xhci));
309 hcd->msix_enabled = 1;
313 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
315 pci_disable_msix(pdev);
317 kfree(xhci->msix_entries);
318 xhci->msix_entries = NULL;
322 /* Free any IRQs and disable MSI-X */
323 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 struct usb_hcd *hcd = xhci_to_hcd(xhci);
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328 if (xhci->quirks & XHCI_PLAT)
333 if (xhci->msix_entries) {
334 pci_disable_msix(pdev);
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
338 pci_disable_msi(pdev);
341 hcd->msix_enabled = 0;
345 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
349 if (xhci->msix_entries) {
350 for (i = 0; i < xhci->msix_count; i++)
351 synchronize_irq(xhci->msix_entries[i].vector);
355 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358 struct pci_dev *pdev;
361 /* The xhci platform device has set up IRQs through usb_add_hcd. */
362 if (xhci->quirks & XHCI_PLAT)
365 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367 * Some Fresco Logic host controllers advertise MSI, but fail to
368 * generate interrupts. Don't even try to enable MSI.
370 if (xhci->quirks & XHCI_BROKEN_MSI)
373 /* unregister the legacy interrupt */
375 free_irq(hcd->irq, hcd);
378 ret = xhci_setup_msix(xhci);
380 /* fall back to msi*/
381 ret = xhci_setup_msi(xhci);
384 /* hcd->irq is 0, we have MSI */
388 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
393 /* fall back to legacy interrupt*/
394 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
395 hcd->irq_descr, hcd);
397 xhci_err(xhci, "request interrupt %d failed\n",
401 hcd->irq = pdev->irq;
407 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
412 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
416 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
422 static void compliance_mode_recovery(unsigned long arg)
424 struct xhci_hcd *xhci;
429 xhci = (struct xhci_hcd *)arg;
431 for (i = 0; i < xhci->num_usb3_ports; i++) {
432 temp = readl(xhci->usb3_ports[i]);
433 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
435 * Compliance Mode Detected. Letting USB Core
436 * handle the Warm Reset
438 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
439 "Compliance mode detected->port %d",
441 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
442 "Attempting compliance mode recovery");
443 hcd = xhci->shared_hcd;
445 if (hcd->state == HC_STATE_SUSPENDED)
446 usb_hcd_resume_root_hub(hcd);
448 usb_hcd_poll_rh_status(hcd);
452 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
453 mod_timer(&xhci->comp_mode_recovery_timer,
454 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
458 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
459 * that causes ports behind that hardware to enter compliance mode sometimes.
460 * The quirk creates a timer that polls every 2 seconds the link state of
461 * each host controller's port and recovers it by issuing a Warm reset
462 * if Compliance mode is detected, otherwise the port will become "dead" (no
463 * device connections or disconnections will be detected anymore). Becasue no
464 * status event is generated when entering compliance mode (per xhci spec),
465 * this quirk is needed on systems that have the failing hardware installed.
467 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
469 xhci->port_status_u0 = 0;
470 init_timer(&xhci->comp_mode_recovery_timer);
472 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
473 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
474 xhci->comp_mode_recovery_timer.expires = jiffies +
475 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
477 set_timer_slack(&xhci->comp_mode_recovery_timer,
478 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
479 add_timer(&xhci->comp_mode_recovery_timer);
480 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
481 "Compliance mode recovery timer initialized");
485 * This function identifies the systems that have installed the SN65LVPE502CP
486 * USB3.0 re-driver and that need the Compliance Mode Quirk.
488 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
490 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
492 const char *dmi_product_name, *dmi_sys_vendor;
494 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
495 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
496 if (!dmi_product_name || !dmi_sys_vendor)
499 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
502 if (strstr(dmi_product_name, "Z420") ||
503 strstr(dmi_product_name, "Z620") ||
504 strstr(dmi_product_name, "Z820") ||
505 strstr(dmi_product_name, "Z1 Workstation"))
511 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
513 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
518 * Initialize memory for HCD and xHC (one-time init).
520 * Program the PAGESIZE register, initialize the device context array, create
521 * device contexts (?), set up a command ring segment (or two?), create event
522 * ring (one for now).
524 int xhci_init(struct usb_hcd *hcd)
526 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
529 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
530 spin_lock_init(&xhci->lock);
531 if (xhci->hci_version == 0x95 && link_quirk) {
532 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
533 "QUIRK: Not clearing Link TRB chain bits.");
534 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
536 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
537 "xHCI doesn't need link TRB QUIRK");
539 retval = xhci_mem_init(xhci, GFP_KERNEL);
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
542 /* Initializing Compliance Mode Recovery Data If Needed */
543 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
544 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
545 compliance_mode_recovery_timer_init(xhci);
551 /*-------------------------------------------------------------------------*/
554 static int xhci_run_finished(struct xhci_hcd *xhci)
556 if (xhci_start(xhci)) {
560 xhci->shared_hcd->state = HC_STATE_RUNNING;
561 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
563 if (xhci->quirks & XHCI_NEC_HOST)
564 xhci_ring_cmd_db(xhci);
566 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
567 "Finished xhci_run for USB3 roothub");
572 * Start the HC after it was halted.
574 * This function is called by the USB core when the HC driver is added.
575 * Its opposite is xhci_stop().
577 * xhci_init() must be called once before this function can be called.
578 * Reset the HC, enable device slot contexts, program DCBAAP, and
579 * set command ring pointer and event ring pointer.
581 * Setup MSI-X vectors and enable interrupts.
583 int xhci_run(struct usb_hcd *hcd)
588 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
590 /* Start the xHCI host controller running only after the USB 2.0 roothub
594 hcd->uses_new_polling = 1;
595 if (!usb_hcd_is_primary_hcd(hcd))
596 return xhci_run_finished(xhci);
598 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
600 ret = xhci_try_enable_msi(hcd);
604 xhci_dbg(xhci, "Command ring memory map follows:\n");
605 xhci_debug_ring(xhci, xhci->cmd_ring);
606 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
607 xhci_dbg_cmd_ptrs(xhci);
609 xhci_dbg(xhci, "ERST memory map follows:\n");
610 xhci_dbg_erst(xhci, &xhci->erst);
611 xhci_dbg(xhci, "Event ring:\n");
612 xhci_debug_ring(xhci, xhci->event_ring);
613 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
614 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
615 temp_64 &= ~ERST_PTR_MASK;
616 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
617 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
619 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
620 "// Set the interrupt modulation register");
621 temp = readl(&xhci->ir_set->irq_control);
622 temp &= ~ER_IRQ_INTERVAL_MASK;
624 writel(temp, &xhci->ir_set->irq_control);
626 /* Set the HCD state before we enable the irqs */
627 temp = readl(&xhci->op_regs->command);
629 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
630 "// Enable interrupts, cmd = 0x%x.", temp);
631 writel(temp, &xhci->op_regs->command);
633 temp = readl(&xhci->ir_set->irq_pending);
634 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
635 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
636 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
637 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
638 xhci_print_ir_set(xhci, 0);
640 if (xhci->quirks & XHCI_NEC_HOST)
641 xhci_queue_vendor_command(xhci, 0, 0, 0,
642 TRB_TYPE(TRB_NEC_GET_FW));
644 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
645 "Finished xhci_run for USB2 roothub");
649 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
651 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
653 spin_lock_irq(&xhci->lock);
656 /* The shared_hcd is going to be deallocated shortly (the USB core only
657 * calls this function when allocation fails in usb_add_hcd(), or
658 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
660 xhci->shared_hcd = NULL;
661 spin_unlock_irq(&xhci->lock);
667 * This function is called by the USB core when the HC driver is removed.
668 * Its opposite is xhci_run().
670 * Disable device contexts, disable IRQs, and quiesce the HC.
671 * Reset the HC, finish any completed transactions, and cleanup memory.
673 void xhci_stop(struct usb_hcd *hcd)
676 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
678 if (!usb_hcd_is_primary_hcd(hcd)) {
679 xhci_only_stop_hcd(xhci->shared_hcd);
683 spin_lock_irq(&xhci->lock);
684 /* Make sure the xHC is halted for a USB3 roothub
685 * (xhci_stop() could be called as part of failed init).
689 spin_unlock_irq(&xhci->lock);
691 xhci_cleanup_msix(xhci);
693 /* Deleting Compliance Mode Recovery Timer */
694 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
695 (!(xhci_all_ports_seen_u0(xhci)))) {
696 del_timer_sync(&xhci->comp_mode_recovery_timer);
697 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
698 "%s: compliance mode recovery timer deleted",
702 if (xhci->quirks & XHCI_AMD_PLL_FIX)
705 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
706 "// Disabling event ring interrupts");
707 temp = readl(&xhci->op_regs->status);
708 writel(temp & ~STS_EINT, &xhci->op_regs->status);
709 temp = readl(&xhci->ir_set->irq_pending);
710 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
711 xhci_print_ir_set(xhci, 0);
713 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
714 xhci_mem_cleanup(xhci);
715 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
716 "xhci_stop completed - status = %x",
717 readl(&xhci->op_regs->status));
721 * Shutdown HC (not bus-specific)
723 * This is called when the machine is rebooting or halting. We assume that the
724 * machine will be powered off, and the HC's internal state will be reset.
725 * Don't bother to free memory.
727 * This will only ever be called with the main usb_hcd (the USB3 roothub).
729 void xhci_shutdown(struct usb_hcd *hcd)
731 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
733 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
734 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
736 spin_lock_irq(&xhci->lock);
738 /* Workaround for spurious wakeups at shutdown with HSW */
739 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
741 spin_unlock_irq(&xhci->lock);
743 xhci_cleanup_msix(xhci);
745 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
746 "xhci_shutdown completed - status = %x",
747 readl(&xhci->op_regs->status));
749 /* Yet another workaround for spurious wakeups at shutdown with HSW */
750 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
751 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
755 static void xhci_save_registers(struct xhci_hcd *xhci)
757 xhci->s3.command = readl(&xhci->op_regs->command);
758 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
759 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
760 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
761 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
762 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
763 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
764 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
765 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
768 static void xhci_restore_registers(struct xhci_hcd *xhci)
770 writel(xhci->s3.command, &xhci->op_regs->command);
771 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
772 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
773 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
774 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
775 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
776 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
777 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
778 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
781 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
785 /* step 2: initialize command ring buffer */
786 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
787 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
788 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
789 xhci->cmd_ring->dequeue) &
790 (u64) ~CMD_RING_RSVD_BITS) |
791 xhci->cmd_ring->cycle_state;
792 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
793 "// Setting command ring address to 0x%llx",
794 (long unsigned long) val_64);
795 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
799 * The whole command ring must be cleared to zero when we suspend the host.
801 * The host doesn't save the command ring pointer in the suspend well, so we
802 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
803 * aligned, because of the reserved bits in the command ring dequeue pointer
804 * register. Therefore, we can't just set the dequeue pointer back in the
805 * middle of the ring (TRBs are 16-byte aligned).
807 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
809 struct xhci_ring *ring;
810 struct xhci_segment *seg;
812 ring = xhci->cmd_ring;
816 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
817 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
818 cpu_to_le32(~TRB_CYCLE);
820 } while (seg != ring->deq_seg);
822 /* Reset the software enqueue and dequeue pointers */
823 ring->deq_seg = ring->first_seg;
824 ring->dequeue = ring->first_seg->trbs;
825 ring->enq_seg = ring->deq_seg;
826 ring->enqueue = ring->dequeue;
828 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
830 * Ring is now zeroed, so the HW should look for change of ownership
831 * when the cycle bit is set to 1.
833 ring->cycle_state = 1;
836 * Reset the hardware dequeue pointer.
837 * Yes, this will need to be re-written after resume, but we're paranoid
838 * and want to make sure the hardware doesn't access bogus memory
839 * because, say, the BIOS or an SMI started the host without changing
840 * the command ring pointers.
842 xhci_set_cmd_ring_deq(xhci);
846 * Stop HC (not bus-specific)
848 * This is called when the machine transition into S3/S4 mode.
851 int xhci_suspend(struct xhci_hcd *xhci)
854 unsigned int delay = XHCI_MAX_HALT_USEC;
855 struct usb_hcd *hcd = xhci_to_hcd(xhci);
858 if (hcd->state != HC_STATE_SUSPENDED ||
859 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
862 /* Don't poll the roothubs on bus suspend. */
863 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
864 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
865 del_timer_sync(&hcd->rh_timer);
867 spin_lock_irq(&xhci->lock);
868 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
869 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
870 /* step 1: stop endpoint */
871 /* skipped assuming that port suspend has done */
873 /* step 2: clear Run/Stop bit */
874 command = readl(&xhci->op_regs->command);
876 writel(command, &xhci->op_regs->command);
878 /* Some chips from Fresco Logic need an extraordinary delay */
879 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
881 if (xhci_handshake(xhci, &xhci->op_regs->status,
882 STS_HALT, STS_HALT, delay)) {
883 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
884 spin_unlock_irq(&xhci->lock);
887 xhci_clear_command_ring(xhci);
889 /* step 3: save registers */
890 xhci_save_registers(xhci);
892 /* step 4: set CSS flag */
893 command = readl(&xhci->op_regs->command);
895 writel(command, &xhci->op_regs->command);
896 if (xhci_handshake(xhci, &xhci->op_regs->status,
897 STS_SAVE, 0, 10 * 1000)) {
898 xhci_warn(xhci, "WARN: xHC save state timeout\n");
899 spin_unlock_irq(&xhci->lock);
902 spin_unlock_irq(&xhci->lock);
905 * Deleting Compliance Mode Recovery Timer because the xHCI Host
906 * is about to be suspended.
908 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
909 (!(xhci_all_ports_seen_u0(xhci)))) {
910 del_timer_sync(&xhci->comp_mode_recovery_timer);
911 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
912 "%s: compliance mode recovery timer deleted",
916 /* step 5: remove core well power */
917 /* synchronize irq when using MSI-X */
918 xhci_msix_sync_irqs(xhci);
924 * start xHC (not bus-specific)
926 * This is called when the machine transition from S3/S4 mode.
929 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
931 u32 command, temp = 0, status;
932 struct usb_hcd *hcd = xhci_to_hcd(xhci);
933 struct usb_hcd *secondary_hcd;
935 bool comp_timer_running = false;
937 /* Wait a bit if either of the roothubs need to settle from the
938 * transition into bus suspend.
940 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
942 xhci->bus_state[1].next_statechange))
945 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
946 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
948 spin_lock_irq(&xhci->lock);
949 if (xhci->quirks & XHCI_RESET_ON_RESUME)
953 /* step 1: restore register */
954 xhci_restore_registers(xhci);
955 /* step 2: initialize command ring buffer */
956 xhci_set_cmd_ring_deq(xhci);
957 /* step 3: restore state and start state*/
958 /* step 3: set CRS flag */
959 command = readl(&xhci->op_regs->command);
961 writel(command, &xhci->op_regs->command);
962 if (xhci_handshake(xhci, &xhci->op_regs->status,
963 STS_RESTORE, 0, 10 * 1000)) {
964 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
965 spin_unlock_irq(&xhci->lock);
968 temp = readl(&xhci->op_regs->status);
971 /* If restore operation fails, re-initialize the HC during resume */
972 if ((temp & STS_SRE) || hibernated) {
974 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
975 !(xhci_all_ports_seen_u0(xhci))) {
976 del_timer_sync(&xhci->comp_mode_recovery_timer);
977 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
978 "Compliance Mode Recovery Timer deleted!");
981 /* Let the USB core know _both_ roothubs lost power. */
982 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
983 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
985 xhci_dbg(xhci, "Stop HCD\n");
988 spin_unlock_irq(&xhci->lock);
989 xhci_cleanup_msix(xhci);
991 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
992 temp = readl(&xhci->op_regs->status);
993 writel(temp & ~STS_EINT, &xhci->op_regs->status);
994 temp = readl(&xhci->ir_set->irq_pending);
995 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
996 xhci_print_ir_set(xhci, 0);
998 xhci_dbg(xhci, "cleaning up memory\n");
999 xhci_mem_cleanup(xhci);
1000 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1001 readl(&xhci->op_regs->status));
1003 /* USB core calls the PCI reinit and start functions twice:
1004 * first with the primary HCD, and then with the secondary HCD.
1005 * If we don't do the same, the host will never be started.
1007 if (!usb_hcd_is_primary_hcd(hcd))
1008 secondary_hcd = hcd;
1010 secondary_hcd = xhci->shared_hcd;
1012 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1013 retval = xhci_init(hcd->primary_hcd);
1016 comp_timer_running = true;
1018 xhci_dbg(xhci, "Start the primary HCD\n");
1019 retval = xhci_run(hcd->primary_hcd);
1021 xhci_dbg(xhci, "Start the secondary HCD\n");
1022 retval = xhci_run(secondary_hcd);
1024 hcd->state = HC_STATE_SUSPENDED;
1025 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1029 /* step 4: set Run/Stop bit */
1030 command = readl(&xhci->op_regs->command);
1032 writel(command, &xhci->op_regs->command);
1033 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1036 /* step 5: walk topology and initialize portsc,
1037 * portpmsc and portli
1039 /* this is done in bus_resume */
1041 /* step 6: restart each of the previously
1042 * Running endpoints by ringing their doorbells
1045 spin_unlock_irq(&xhci->lock);
1049 /* Resume root hubs only when have pending events. */
1050 status = readl(&xhci->op_regs->status);
1051 if (status & STS_EINT) {
1052 usb_hcd_resume_root_hub(hcd);
1053 usb_hcd_resume_root_hub(xhci->shared_hcd);
1058 * If system is subject to the Quirk, Compliance Mode Timer needs to
1059 * be re-initialized Always after a system resume. Ports are subject
1060 * to suffer the Compliance Mode issue again. It doesn't matter if
1061 * ports have entered previously to U0 before system's suspension.
1063 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1064 compliance_mode_recovery_timer_init(xhci);
1066 /* Re-enable port polling. */
1067 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1068 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1069 usb_hcd_poll_rh_status(hcd);
1073 #endif /* CONFIG_PM */
1075 /*-------------------------------------------------------------------------*/
1078 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1079 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1080 * value to right shift 1 for the bitmask.
1082 * Index = (epnum * 2) + direction - 1,
1083 * where direction = 0 for OUT, 1 for IN.
1084 * For control endpoints, the IN index is used (OUT index is unused), so
1085 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1087 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1090 if (usb_endpoint_xfer_control(desc))
1091 index = (unsigned int) (usb_endpoint_num(desc)*2);
1093 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1094 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1098 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1099 * address from the XHCI endpoint index.
1101 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1103 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1104 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1105 return direction | number;
1108 /* Find the flag for this endpoint (for use in the control context). Use the
1109 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1112 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1114 return 1 << (xhci_get_endpoint_index(desc) + 1);
1117 /* Find the flag for this endpoint (for use in the control context). Use the
1118 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1121 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1123 return 1 << (ep_index + 1);
1126 /* Compute the last valid endpoint context index. Basically, this is the
1127 * endpoint index plus one. For slot contexts with more than valid endpoint,
1128 * we find the most significant bit set in the added contexts flags.
1129 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1130 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1132 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1134 return fls(added_ctxs) - 1;
1137 /* Returns 1 if the arguments are OK;
1138 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1140 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1141 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1143 struct xhci_hcd *xhci;
1144 struct xhci_virt_device *virt_dev;
1146 if (!hcd || (check_ep && !ep) || !udev) {
1147 pr_debug("xHCI %s called with invalid args\n", func);
1150 if (!udev->parent) {
1151 pr_debug("xHCI %s called for root hub\n", func);
1155 xhci = hcd_to_xhci(hcd);
1156 if (check_virt_dev) {
1157 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1158 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1163 virt_dev = xhci->devs[udev->slot_id];
1164 if (virt_dev->udev != udev) {
1165 xhci_dbg(xhci, "xHCI %s called with udev and "
1166 "virt_dev does not match\n", func);
1171 if (xhci->xhc_state & XHCI_STATE_HALTED)
1177 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1178 struct usb_device *udev, struct xhci_command *command,
1179 bool ctx_change, bool must_succeed);
1182 * Full speed devices may have a max packet size greater than 8 bytes, but the
1183 * USB core doesn't know that until it reads the first 8 bytes of the
1184 * descriptor. If the usb_device's max packet size changes after that point,
1185 * we need to issue an evaluate context command and wait on it.
1187 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1188 unsigned int ep_index, struct urb *urb)
1190 struct xhci_container_ctx *in_ctx;
1191 struct xhci_container_ctx *out_ctx;
1192 struct xhci_input_control_ctx *ctrl_ctx;
1193 struct xhci_ep_ctx *ep_ctx;
1194 int max_packet_size;
1195 int hw_max_packet_size;
1198 out_ctx = xhci->devs[slot_id]->out_ctx;
1199 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1200 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1201 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1202 if (hw_max_packet_size != max_packet_size) {
1203 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1204 "Max Packet Size for ep 0 changed.");
1205 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1206 "Max packet size in usb_device = %d",
1208 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1209 "Max packet size in xHCI HW = %d",
1210 hw_max_packet_size);
1211 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1212 "Issuing evaluate context command.");
1214 /* Set up the input context flags for the command */
1215 /* FIXME: This won't work if a non-default control endpoint
1216 * changes max packet sizes.
1218 in_ctx = xhci->devs[slot_id]->in_ctx;
1219 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1221 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1225 /* Set up the modified control endpoint 0 */
1226 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1227 xhci->devs[slot_id]->out_ctx, ep_index);
1229 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1230 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1231 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1233 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1234 ctrl_ctx->drop_flags = 0;
1236 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1237 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1238 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1239 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1241 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1244 /* Clean up the input context for later use by bandwidth
1247 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1253 * non-error returns are a promise to giveback() the urb later
1254 * we drop ownership so next owner (or urb unlink) can get it
1256 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1258 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1259 struct xhci_td *buffer;
1260 unsigned long flags;
1262 unsigned int slot_id, ep_index;
1263 struct urb_priv *urb_priv;
1266 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1267 true, true, __func__) <= 0)
1270 slot_id = urb->dev->slot_id;
1271 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1273 if (!HCD_HW_ACCESSIBLE(hcd)) {
1274 if (!in_interrupt())
1275 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1280 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1281 size = urb->number_of_packets;
1285 urb_priv = kzalloc(sizeof(struct urb_priv) +
1286 size * sizeof(struct xhci_td *), mem_flags);
1290 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1296 for (i = 0; i < size; i++) {
1297 urb_priv->td[i] = buffer;
1301 urb_priv->length = size;
1302 urb_priv->td_cnt = 0;
1303 urb->hcpriv = urb_priv;
1305 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1306 /* Check to see if the max packet size for the default control
1307 * endpoint changed during FS device enumeration
1309 if (urb->dev->speed == USB_SPEED_FULL) {
1310 ret = xhci_check_maxpacket(xhci, slot_id,
1313 xhci_urb_free_priv(xhci, urb_priv);
1319 /* We have a spinlock and interrupts disabled, so we must pass
1320 * atomic context to this function, which may allocate memory.
1322 spin_lock_irqsave(&xhci->lock, flags);
1323 if (xhci->xhc_state & XHCI_STATE_DYING)
1325 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1329 spin_unlock_irqrestore(&xhci->lock, flags);
1330 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1331 spin_lock_irqsave(&xhci->lock, flags);
1332 if (xhci->xhc_state & XHCI_STATE_DYING)
1334 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1335 EP_GETTING_STREAMS) {
1336 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1337 "is transitioning to using streams.\n");
1339 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1340 EP_GETTING_NO_STREAMS) {
1341 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1342 "is transitioning to "
1343 "not having streams.\n");
1346 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1351 spin_unlock_irqrestore(&xhci->lock, flags);
1352 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1353 spin_lock_irqsave(&xhci->lock, flags);
1354 if (xhci->xhc_state & XHCI_STATE_DYING)
1356 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1360 spin_unlock_irqrestore(&xhci->lock, flags);
1362 spin_lock_irqsave(&xhci->lock, flags);
1363 if (xhci->xhc_state & XHCI_STATE_DYING)
1365 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1369 spin_unlock_irqrestore(&xhci->lock, flags);
1374 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1375 "non-responsive xHCI host.\n",
1376 urb->ep->desc.bEndpointAddress, urb);
1379 xhci_urb_free_priv(xhci, urb_priv);
1381 spin_unlock_irqrestore(&xhci->lock, flags);
1385 /* Get the right ring for the given URB.
1386 * If the endpoint supports streams, boundary check the URB's stream ID.
1387 * If the endpoint doesn't support streams, return the singular endpoint ring.
1389 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1392 unsigned int slot_id;
1393 unsigned int ep_index;
1394 unsigned int stream_id;
1395 struct xhci_virt_ep *ep;
1397 slot_id = urb->dev->slot_id;
1398 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1399 stream_id = urb->stream_id;
1400 ep = &xhci->devs[slot_id]->eps[ep_index];
1401 /* Common case: no streams */
1402 if (!(ep->ep_state & EP_HAS_STREAMS))
1405 if (stream_id == 0) {
1407 "WARN: Slot ID %u, ep index %u has streams, "
1408 "but URB has no stream ID.\n",
1413 if (stream_id < ep->stream_info->num_streams)
1414 return ep->stream_info->stream_rings[stream_id];
1417 "WARN: Slot ID %u, ep index %u has "
1418 "stream IDs 1 to %u allocated, "
1419 "but stream ID %u is requested.\n",
1421 ep->stream_info->num_streams - 1,
1427 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1428 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1429 * should pick up where it left off in the TD, unless a Set Transfer Ring
1430 * Dequeue Pointer is issued.
1432 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1433 * the ring. Since the ring is a contiguous structure, they can't be physically
1434 * removed. Instead, there are two options:
1436 * 1) If the HC is in the middle of processing the URB to be canceled, we
1437 * simply move the ring's dequeue pointer past those TRBs using the Set
1438 * Transfer Ring Dequeue Pointer command. This will be the common case,
1439 * when drivers timeout on the last submitted URB and attempt to cancel.
1441 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1442 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1443 * HC will need to invalidate the any TRBs it has cached after the stop
1444 * endpoint command, as noted in the xHCI 0.95 errata.
1446 * 3) The TD may have completed by the time the Stop Endpoint Command
1447 * completes, so software needs to handle that case too.
1449 * This function should protect against the TD enqueueing code ringing the
1450 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1451 * It also needs to account for multiple cancellations on happening at the same
1452 * time for the same endpoint.
1454 * Note that this function can be called in any context, or so says
1455 * usb_hcd_unlink_urb()
1457 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1459 unsigned long flags;
1462 struct xhci_hcd *xhci;
1463 struct urb_priv *urb_priv;
1465 unsigned int ep_index;
1466 struct xhci_ring *ep_ring;
1467 struct xhci_virt_ep *ep;
1469 xhci = hcd_to_xhci(hcd);
1470 spin_lock_irqsave(&xhci->lock, flags);
1471 /* Make sure the URB hasn't completed or been unlinked already */
1472 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1473 if (ret || !urb->hcpriv)
1475 temp = readl(&xhci->op_regs->status);
1476 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1477 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1478 "HW died, freeing TD.");
1479 urb_priv = urb->hcpriv;
1480 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1481 td = urb_priv->td[i];
1482 if (!list_empty(&td->td_list))
1483 list_del_init(&td->td_list);
1484 if (!list_empty(&td->cancelled_td_list))
1485 list_del_init(&td->cancelled_td_list);
1488 usb_hcd_unlink_urb_from_ep(hcd, urb);
1489 spin_unlock_irqrestore(&xhci->lock, flags);
1490 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1491 xhci_urb_free_priv(xhci, urb_priv);
1494 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1495 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1496 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1497 "Ep 0x%x: URB %p to be canceled on "
1498 "non-responsive xHCI host.",
1499 urb->ep->desc.bEndpointAddress, urb);
1500 /* Let the stop endpoint command watchdog timer (which set this
1501 * state) finish cleaning up the endpoint TD lists. We must
1502 * have caught it in the middle of dropping a lock and giving
1508 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1509 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1510 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1516 urb_priv = urb->hcpriv;
1517 i = urb_priv->td_cnt;
1518 if (i < urb_priv->length)
1519 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1520 "Cancel URB %p, dev %s, ep 0x%x, "
1521 "starting at offset 0x%llx",
1522 urb, urb->dev->devpath,
1523 urb->ep->desc.bEndpointAddress,
1524 (unsigned long long) xhci_trb_virt_to_dma(
1525 urb_priv->td[i]->start_seg,
1526 urb_priv->td[i]->first_trb));
1528 for (; i < urb_priv->length; i++) {
1529 td = urb_priv->td[i];
1530 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1533 /* Queue a stop endpoint command, but only if this is
1534 * the first cancellation to be handled.
1536 if (!(ep->ep_state & EP_HALT_PENDING)) {
1537 ep->ep_state |= EP_HALT_PENDING;
1538 ep->stop_cmds_pending++;
1539 ep->stop_cmd_timer.expires = jiffies +
1540 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1541 add_timer(&ep->stop_cmd_timer);
1542 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1543 xhci_ring_cmd_db(xhci);
1546 spin_unlock_irqrestore(&xhci->lock, flags);
1550 /* Drop an endpoint from a new bandwidth configuration for this device.
1551 * Only one call to this function is allowed per endpoint before
1552 * check_bandwidth() or reset_bandwidth() must be called.
1553 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1554 * add the endpoint to the schedule with possibly new parameters denoted by a
1555 * different endpoint descriptor in usb_host_endpoint.
1556 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1559 * The USB core will not allow URBs to be queued to an endpoint that is being
1560 * disabled, so there's no need for mutual exclusion to protect
1561 * the xhci->devs[slot_id] structure.
1563 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1564 struct usb_host_endpoint *ep)
1566 struct xhci_hcd *xhci;
1567 struct xhci_container_ctx *in_ctx, *out_ctx;
1568 struct xhci_input_control_ctx *ctrl_ctx;
1569 struct xhci_slot_ctx *slot_ctx;
1570 unsigned int last_ctx;
1571 unsigned int ep_index;
1572 struct xhci_ep_ctx *ep_ctx;
1574 u32 new_add_flags, new_drop_flags, new_slot_info;
1577 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1580 xhci = hcd_to_xhci(hcd);
1581 if (xhci->xhc_state & XHCI_STATE_DYING)
1584 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1585 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1586 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1587 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1588 __func__, drop_flag);
1592 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1593 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1594 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1596 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1601 ep_index = xhci_get_endpoint_index(&ep->desc);
1602 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1603 /* If the HC already knows the endpoint is disabled,
1604 * or the HCD has noted it is disabled, ignore this request
1606 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1607 cpu_to_le32(EP_STATE_DISABLED)) ||
1608 le32_to_cpu(ctrl_ctx->drop_flags) &
1609 xhci_get_endpoint_flag(&ep->desc)) {
1610 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1615 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1616 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1618 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1619 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1621 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1622 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1623 /* Update the last valid endpoint context, if we deleted the last one */
1624 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1625 LAST_CTX(last_ctx)) {
1626 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1627 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1629 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1631 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1633 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1634 (unsigned int) ep->desc.bEndpointAddress,
1636 (unsigned int) new_drop_flags,
1637 (unsigned int) new_add_flags,
1638 (unsigned int) new_slot_info);
1642 /* Add an endpoint to a new possible bandwidth configuration for this device.
1643 * Only one call to this function is allowed per endpoint before
1644 * check_bandwidth() or reset_bandwidth() must be called.
1645 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1646 * add the endpoint to the schedule with possibly new parameters denoted by a
1647 * different endpoint descriptor in usb_host_endpoint.
1648 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1651 * The USB core will not allow URBs to be queued to an endpoint until the
1652 * configuration or alt setting is installed in the device, so there's no need
1653 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1655 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1656 struct usb_host_endpoint *ep)
1658 struct xhci_hcd *xhci;
1659 struct xhci_container_ctx *in_ctx, *out_ctx;
1660 unsigned int ep_index;
1661 struct xhci_slot_ctx *slot_ctx;
1662 struct xhci_input_control_ctx *ctrl_ctx;
1664 unsigned int last_ctx;
1665 u32 new_add_flags, new_drop_flags, new_slot_info;
1666 struct xhci_virt_device *virt_dev;
1669 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1671 /* So we won't queue a reset ep command for a root hub */
1675 xhci = hcd_to_xhci(hcd);
1676 if (xhci->xhc_state & XHCI_STATE_DYING)
1679 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1680 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1681 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1682 /* FIXME when we have to issue an evaluate endpoint command to
1683 * deal with ep0 max packet size changing once we get the
1686 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1687 __func__, added_ctxs);
1691 virt_dev = xhci->devs[udev->slot_id];
1692 in_ctx = virt_dev->in_ctx;
1693 out_ctx = virt_dev->out_ctx;
1694 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1696 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1701 ep_index = xhci_get_endpoint_index(&ep->desc);
1702 /* If this endpoint is already in use, and the upper layers are trying
1703 * to add it again without dropping it, reject the addition.
1705 if (virt_dev->eps[ep_index].ring &&
1706 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1707 xhci_get_endpoint_flag(&ep->desc))) {
1708 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1709 "without dropping it.\n",
1710 (unsigned int) ep->desc.bEndpointAddress);
1714 /* If the HCD has already noted the endpoint is enabled,
1715 * ignore this request.
1717 if (le32_to_cpu(ctrl_ctx->add_flags) &
1718 xhci_get_endpoint_flag(&ep->desc)) {
1719 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1725 * Configuration and alternate setting changes must be done in
1726 * process context, not interrupt context (or so documenation
1727 * for usb_set_interface() and usb_set_configuration() claim).
1729 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1730 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1731 __func__, ep->desc.bEndpointAddress);
1735 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1736 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1738 /* If xhci_endpoint_disable() was called for this endpoint, but the
1739 * xHC hasn't been notified yet through the check_bandwidth() call,
1740 * this re-adds a new state for the endpoint from the new endpoint
1741 * descriptors. We must drop and re-add this endpoint, so we leave the
1744 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1746 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1747 /* Update the last valid endpoint context, if we just added one past */
1748 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1749 LAST_CTX(last_ctx)) {
1750 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1751 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1753 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1755 /* Store the usb_device pointer for later use */
1758 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1759 (unsigned int) ep->desc.bEndpointAddress,
1761 (unsigned int) new_drop_flags,
1762 (unsigned int) new_add_flags,
1763 (unsigned int) new_slot_info);
1767 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1769 struct xhci_input_control_ctx *ctrl_ctx;
1770 struct xhci_ep_ctx *ep_ctx;
1771 struct xhci_slot_ctx *slot_ctx;
1774 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1776 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1781 /* When a device's add flag and drop flag are zero, any subsequent
1782 * configure endpoint command will leave that endpoint's state
1783 * untouched. Make sure we don't leave any old state in the input
1784 * endpoint contexts.
1786 ctrl_ctx->drop_flags = 0;
1787 ctrl_ctx->add_flags = 0;
1788 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1789 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1790 /* Endpoint 0 is always valid */
1791 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1792 for (i = 1; i < 31; ++i) {
1793 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1794 ep_ctx->ep_info = 0;
1795 ep_ctx->ep_info2 = 0;
1797 ep_ctx->tx_info = 0;
1801 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1802 struct usb_device *udev, u32 *cmd_status)
1806 switch (*cmd_status) {
1808 dev_warn(&udev->dev, "Not enough host controller resources "
1809 "for new device state.\n");
1811 /* FIXME: can we allocate more resources for the HC? */
1814 case COMP_2ND_BW_ERR:
1815 dev_warn(&udev->dev, "Not enough bandwidth "
1816 "for new device state.\n");
1818 /* FIXME: can we go back to the old state? */
1821 /* the HCD set up something wrong */
1822 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1824 "and endpoint is not disabled.\n");
1828 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1829 "configure command.\n");
1833 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1834 "Successful Endpoint Configure command");
1838 xhci_err(xhci, "ERROR: unexpected command completion "
1839 "code 0x%x.\n", *cmd_status);
1846 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1847 struct usb_device *udev, u32 *cmd_status)
1850 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1852 switch (*cmd_status) {
1854 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1855 "context command.\n");
1859 dev_warn(&udev->dev, "WARN: slot not enabled for"
1860 "evaluate context command.\n");
1863 case COMP_CTX_STATE:
1864 dev_warn(&udev->dev, "WARN: invalid context state for "
1865 "evaluate context command.\n");
1866 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1870 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1871 "context command.\n");
1875 /* Max Exit Latency too large error */
1876 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1880 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1881 "Successful evaluate context command");
1885 xhci_err(xhci, "ERROR: unexpected command completion "
1886 "code 0x%x.\n", *cmd_status);
1893 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1894 struct xhci_input_control_ctx *ctrl_ctx)
1896 u32 valid_add_flags;
1897 u32 valid_drop_flags;
1899 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1900 * (bit 1). The default control endpoint is added during the Address
1901 * Device command and is never removed until the slot is disabled.
1903 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1904 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1906 /* Use hweight32 to count the number of ones in the add flags, or
1907 * number of endpoints added. Don't count endpoints that are changed
1908 * (both added and dropped).
1910 return hweight32(valid_add_flags) -
1911 hweight32(valid_add_flags & valid_drop_flags);
1914 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1915 struct xhci_input_control_ctx *ctrl_ctx)
1917 u32 valid_add_flags;
1918 u32 valid_drop_flags;
1920 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1921 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1923 return hweight32(valid_drop_flags) -
1924 hweight32(valid_add_flags & valid_drop_flags);
1928 * We need to reserve the new number of endpoints before the configure endpoint
1929 * command completes. We can't subtract the dropped endpoints from the number
1930 * of active endpoints until the command completes because we can oversubscribe
1931 * the host in this case:
1933 * - the first configure endpoint command drops more endpoints than it adds
1934 * - a second configure endpoint command that adds more endpoints is queued
1935 * - the first configure endpoint command fails, so the config is unchanged
1936 * - the second command may succeed, even though there isn't enough resources
1938 * Must be called with xhci->lock held.
1940 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1941 struct xhci_input_control_ctx *ctrl_ctx)
1945 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1946 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1947 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1948 "Not enough ep ctxs: "
1949 "%u active, need to add %u, limit is %u.",
1950 xhci->num_active_eps, added_eps,
1951 xhci->limit_active_eps);
1954 xhci->num_active_eps += added_eps;
1955 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1956 "Adding %u ep ctxs, %u now active.", added_eps,
1957 xhci->num_active_eps);
1962 * The configure endpoint was failed by the xHC for some other reason, so we
1963 * need to revert the resources that failed configuration would have used.
1965 * Must be called with xhci->lock held.
1967 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1968 struct xhci_input_control_ctx *ctrl_ctx)
1972 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1973 xhci->num_active_eps -= num_failed_eps;
1974 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1975 "Removing %u failed ep ctxs, %u now active.",
1977 xhci->num_active_eps);
1981 * Now that the command has completed, clean up the active endpoint count by
1982 * subtracting out the endpoints that were dropped (but not changed).
1984 * Must be called with xhci->lock held.
1986 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
1987 struct xhci_input_control_ctx *ctrl_ctx)
1989 u32 num_dropped_eps;
1991 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
1992 xhci->num_active_eps -= num_dropped_eps;
1993 if (num_dropped_eps)
1994 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1995 "Removing %u dropped ep ctxs, %u now active.",
1997 xhci->num_active_eps);
2000 static unsigned int xhci_get_block_size(struct usb_device *udev)
2002 switch (udev->speed) {
2004 case USB_SPEED_FULL:
2006 case USB_SPEED_HIGH:
2008 case USB_SPEED_SUPER:
2010 case USB_SPEED_UNKNOWN:
2011 case USB_SPEED_WIRELESS:
2013 /* Should never happen */
2019 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2021 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2023 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2028 /* If we are changing a LS/FS device under a HS hub,
2029 * make sure (if we are activating a new TT) that the HS bus has enough
2030 * bandwidth for this new TT.
2032 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2033 struct xhci_virt_device *virt_dev,
2036 struct xhci_interval_bw_table *bw_table;
2037 struct xhci_tt_bw_info *tt_info;
2039 /* Find the bandwidth table for the root port this TT is attached to. */
2040 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2041 tt_info = virt_dev->tt_info;
2042 /* If this TT already had active endpoints, the bandwidth for this TT
2043 * has already been added. Removing all periodic endpoints (and thus
2044 * making the TT enactive) will only decrease the bandwidth used.
2048 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2049 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2053 /* Not sure why we would have no new active endpoints...
2055 * Maybe because of an Evaluate Context change for a hub update or a
2056 * control endpoint 0 max packet size change?
2057 * FIXME: skip the bandwidth calculation in that case.
2062 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2063 struct xhci_virt_device *virt_dev)
2065 unsigned int bw_reserved;
2067 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2068 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2071 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2072 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2079 * This algorithm is a very conservative estimate of the worst-case scheduling
2080 * scenario for any one interval. The hardware dynamically schedules the
2081 * packets, so we can't tell which microframe could be the limiting factor in
2082 * the bandwidth scheduling. This only takes into account periodic endpoints.
2084 * Obviously, we can't solve an NP complete problem to find the minimum worst
2085 * case scenario. Instead, we come up with an estimate that is no less than
2086 * the worst case bandwidth used for any one microframe, but may be an
2089 * We walk the requirements for each endpoint by interval, starting with the
2090 * smallest interval, and place packets in the schedule where there is only one
2091 * possible way to schedule packets for that interval. In order to simplify
2092 * this algorithm, we record the largest max packet size for each interval, and
2093 * assume all packets will be that size.
2095 * For interval 0, we obviously must schedule all packets for each interval.
2096 * The bandwidth for interval 0 is just the amount of data to be transmitted
2097 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2098 * the number of packets).
2100 * For interval 1, we have two possible microframes to schedule those packets
2101 * in. For this algorithm, if we can schedule the same number of packets for
2102 * each possible scheduling opportunity (each microframe), we will do so. The
2103 * remaining number of packets will be saved to be transmitted in the gaps in
2104 * the next interval's scheduling sequence.
2106 * As we move those remaining packets to be scheduled with interval 2 packets,
2107 * we have to double the number of remaining packets to transmit. This is
2108 * because the intervals are actually powers of 2, and we would be transmitting
2109 * the previous interval's packets twice in this interval. We also have to be
2110 * sure that when we look at the largest max packet size for this interval, we
2111 * also look at the largest max packet size for the remaining packets and take
2112 * the greater of the two.
2114 * The algorithm continues to evenly distribute packets in each scheduling
2115 * opportunity, and push the remaining packets out, until we get to the last
2116 * interval. Then those packets and their associated overhead are just added
2117 * to the bandwidth used.
2119 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2120 struct xhci_virt_device *virt_dev,
2123 unsigned int bw_reserved;
2124 unsigned int max_bandwidth;
2125 unsigned int bw_used;
2126 unsigned int block_size;
2127 struct xhci_interval_bw_table *bw_table;
2128 unsigned int packet_size = 0;
2129 unsigned int overhead = 0;
2130 unsigned int packets_transmitted = 0;
2131 unsigned int packets_remaining = 0;
2134 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2135 return xhci_check_ss_bw(xhci, virt_dev);
2137 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2138 max_bandwidth = HS_BW_LIMIT;
2139 /* Convert percent of bus BW reserved to blocks reserved */
2140 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2142 max_bandwidth = FS_BW_LIMIT;
2143 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2146 bw_table = virt_dev->bw_table;
2147 /* We need to translate the max packet size and max ESIT payloads into
2148 * the units the hardware uses.
2150 block_size = xhci_get_block_size(virt_dev->udev);
2152 /* If we are manipulating a LS/FS device under a HS hub, double check
2153 * that the HS bus has enough bandwidth if we are activing a new TT.
2155 if (virt_dev->tt_info) {
2156 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2157 "Recalculating BW for rootport %u",
2158 virt_dev->real_port);
2159 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2160 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2161 "newly activated TT.\n");
2164 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2165 "Recalculating BW for TT slot %u port %u",
2166 virt_dev->tt_info->slot_id,
2167 virt_dev->tt_info->ttport);
2169 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2170 "Recalculating BW for rootport %u",
2171 virt_dev->real_port);
2174 /* Add in how much bandwidth will be used for interval zero, or the
2175 * rounded max ESIT payload + number of packets * largest overhead.
2177 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2178 bw_table->interval_bw[0].num_packets *
2179 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2181 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2182 unsigned int bw_added;
2183 unsigned int largest_mps;
2184 unsigned int interval_overhead;
2187 * How many packets could we transmit in this interval?
2188 * If packets didn't fit in the previous interval, we will need
2189 * to transmit that many packets twice within this interval.
2191 packets_remaining = 2 * packets_remaining +
2192 bw_table->interval_bw[i].num_packets;
2194 /* Find the largest max packet size of this or the previous
2197 if (list_empty(&bw_table->interval_bw[i].endpoints))
2200 struct xhci_virt_ep *virt_ep;
2201 struct list_head *ep_entry;
2203 ep_entry = bw_table->interval_bw[i].endpoints.next;
2204 virt_ep = list_entry(ep_entry,
2205 struct xhci_virt_ep, bw_endpoint_list);
2206 /* Convert to blocks, rounding up */
2207 largest_mps = DIV_ROUND_UP(
2208 virt_ep->bw_info.max_packet_size,
2211 if (largest_mps > packet_size)
2212 packet_size = largest_mps;
2214 /* Use the larger overhead of this or the previous interval. */
2215 interval_overhead = xhci_get_largest_overhead(
2216 &bw_table->interval_bw[i]);
2217 if (interval_overhead > overhead)
2218 overhead = interval_overhead;
2220 /* How many packets can we evenly distribute across
2221 * (1 << (i + 1)) possible scheduling opportunities?
2223 packets_transmitted = packets_remaining >> (i + 1);
2225 /* Add in the bandwidth used for those scheduled packets */
2226 bw_added = packets_transmitted * (overhead + packet_size);
2228 /* How many packets do we have remaining to transmit? */
2229 packets_remaining = packets_remaining % (1 << (i + 1));
2231 /* What largest max packet size should those packets have? */
2232 /* If we've transmitted all packets, don't carry over the
2233 * largest packet size.
2235 if (packets_remaining == 0) {
2238 } else if (packets_transmitted > 0) {
2239 /* Otherwise if we do have remaining packets, and we've
2240 * scheduled some packets in this interval, take the
2241 * largest max packet size from endpoints with this
2244 packet_size = largest_mps;
2245 overhead = interval_overhead;
2247 /* Otherwise carry over packet_size and overhead from the last
2248 * time we had a remainder.
2250 bw_used += bw_added;
2251 if (bw_used > max_bandwidth) {
2252 xhci_warn(xhci, "Not enough bandwidth. "
2253 "Proposed: %u, Max: %u\n",
2254 bw_used, max_bandwidth);
2259 * Ok, we know we have some packets left over after even-handedly
2260 * scheduling interval 15. We don't know which microframes they will
2261 * fit into, so we over-schedule and say they will be scheduled every
2264 if (packets_remaining > 0)
2265 bw_used += overhead + packet_size;
2267 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2268 unsigned int port_index = virt_dev->real_port - 1;
2270 /* OK, we're manipulating a HS device attached to a
2271 * root port bandwidth domain. Include the number of active TTs
2272 * in the bandwidth used.
2274 bw_used += TT_HS_OVERHEAD *
2275 xhci->rh_bw[port_index].num_active_tts;
2278 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2279 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2280 "Available: %u " "percent",
2281 bw_used, max_bandwidth, bw_reserved,
2282 (max_bandwidth - bw_used - bw_reserved) * 100 /
2285 bw_used += bw_reserved;
2286 if (bw_used > max_bandwidth) {
2287 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2288 bw_used, max_bandwidth);
2292 bw_table->bw_used = bw_used;
2296 static bool xhci_is_async_ep(unsigned int ep_type)
2298 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2299 ep_type != ISOC_IN_EP &&
2300 ep_type != INT_IN_EP);
2303 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2305 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2308 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2310 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2312 if (ep_bw->ep_interval == 0)
2313 return SS_OVERHEAD_BURST +
2314 (ep_bw->mult * ep_bw->num_packets *
2315 (SS_OVERHEAD + mps));
2316 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2317 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2318 1 << ep_bw->ep_interval);
2322 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2323 struct xhci_bw_info *ep_bw,
2324 struct xhci_interval_bw_table *bw_table,
2325 struct usb_device *udev,
2326 struct xhci_virt_ep *virt_ep,
2327 struct xhci_tt_bw_info *tt_info)
2329 struct xhci_interval_bw *interval_bw;
2330 int normalized_interval;
2332 if (xhci_is_async_ep(ep_bw->type))
2335 if (udev->speed == USB_SPEED_SUPER) {
2336 if (xhci_is_sync_in_ep(ep_bw->type))
2337 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2338 xhci_get_ss_bw_consumed(ep_bw);
2340 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2341 xhci_get_ss_bw_consumed(ep_bw);
2345 /* SuperSpeed endpoints never get added to intervals in the table, so
2346 * this check is only valid for HS/FS/LS devices.
2348 if (list_empty(&virt_ep->bw_endpoint_list))
2350 /* For LS/FS devices, we need to translate the interval expressed in
2351 * microframes to frames.
2353 if (udev->speed == USB_SPEED_HIGH)
2354 normalized_interval = ep_bw->ep_interval;
2356 normalized_interval = ep_bw->ep_interval - 3;
2358 if (normalized_interval == 0)
2359 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2360 interval_bw = &bw_table->interval_bw[normalized_interval];
2361 interval_bw->num_packets -= ep_bw->num_packets;
2362 switch (udev->speed) {
2364 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2366 case USB_SPEED_FULL:
2367 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2369 case USB_SPEED_HIGH:
2370 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2372 case USB_SPEED_SUPER:
2373 case USB_SPEED_UNKNOWN:
2374 case USB_SPEED_WIRELESS:
2375 /* Should never happen because only LS/FS/HS endpoints will get
2376 * added to the endpoint list.
2381 tt_info->active_eps -= 1;
2382 list_del_init(&virt_ep->bw_endpoint_list);
2385 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2386 struct xhci_bw_info *ep_bw,
2387 struct xhci_interval_bw_table *bw_table,
2388 struct usb_device *udev,
2389 struct xhci_virt_ep *virt_ep,
2390 struct xhci_tt_bw_info *tt_info)
2392 struct xhci_interval_bw *interval_bw;
2393 struct xhci_virt_ep *smaller_ep;
2394 int normalized_interval;
2396 if (xhci_is_async_ep(ep_bw->type))
2399 if (udev->speed == USB_SPEED_SUPER) {
2400 if (xhci_is_sync_in_ep(ep_bw->type))
2401 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2402 xhci_get_ss_bw_consumed(ep_bw);
2404 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2405 xhci_get_ss_bw_consumed(ep_bw);
2409 /* For LS/FS devices, we need to translate the interval expressed in
2410 * microframes to frames.
2412 if (udev->speed == USB_SPEED_HIGH)
2413 normalized_interval = ep_bw->ep_interval;
2415 normalized_interval = ep_bw->ep_interval - 3;
2417 if (normalized_interval == 0)
2418 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2419 interval_bw = &bw_table->interval_bw[normalized_interval];
2420 interval_bw->num_packets += ep_bw->num_packets;
2421 switch (udev->speed) {
2423 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2425 case USB_SPEED_FULL:
2426 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2428 case USB_SPEED_HIGH:
2429 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2431 case USB_SPEED_SUPER:
2432 case USB_SPEED_UNKNOWN:
2433 case USB_SPEED_WIRELESS:
2434 /* Should never happen because only LS/FS/HS endpoints will get
2435 * added to the endpoint list.
2441 tt_info->active_eps += 1;
2442 /* Insert the endpoint into the list, largest max packet size first. */
2443 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2445 if (ep_bw->max_packet_size >=
2446 smaller_ep->bw_info.max_packet_size) {
2447 /* Add the new ep before the smaller endpoint */
2448 list_add_tail(&virt_ep->bw_endpoint_list,
2449 &smaller_ep->bw_endpoint_list);
2453 /* Add the new endpoint at the end of the list. */
2454 list_add_tail(&virt_ep->bw_endpoint_list,
2455 &interval_bw->endpoints);
2458 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2459 struct xhci_virt_device *virt_dev,
2462 struct xhci_root_port_bw_info *rh_bw_info;
2463 if (!virt_dev->tt_info)
2466 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2467 if (old_active_eps == 0 &&
2468 virt_dev->tt_info->active_eps != 0) {
2469 rh_bw_info->num_active_tts += 1;
2470 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2471 } else if (old_active_eps != 0 &&
2472 virt_dev->tt_info->active_eps == 0) {
2473 rh_bw_info->num_active_tts -= 1;
2474 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2478 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2479 struct xhci_virt_device *virt_dev,
2480 struct xhci_container_ctx *in_ctx)
2482 struct xhci_bw_info ep_bw_info[31];
2484 struct xhci_input_control_ctx *ctrl_ctx;
2485 int old_active_eps = 0;
2487 if (virt_dev->tt_info)
2488 old_active_eps = virt_dev->tt_info->active_eps;
2490 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2492 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2497 for (i = 0; i < 31; i++) {
2498 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2501 /* Make a copy of the BW info in case we need to revert this */
2502 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2503 sizeof(ep_bw_info[i]));
2504 /* Drop the endpoint from the interval table if the endpoint is
2505 * being dropped or changed.
2507 if (EP_IS_DROPPED(ctrl_ctx, i))
2508 xhci_drop_ep_from_interval_table(xhci,
2509 &virt_dev->eps[i].bw_info,
2515 /* Overwrite the information stored in the endpoints' bw_info */
2516 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2517 for (i = 0; i < 31; i++) {
2518 /* Add any changed or added endpoints to the interval table */
2519 if (EP_IS_ADDED(ctrl_ctx, i))
2520 xhci_add_ep_to_interval_table(xhci,
2521 &virt_dev->eps[i].bw_info,
2528 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2529 /* Ok, this fits in the bandwidth we have.
2530 * Update the number of active TTs.
2532 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2536 /* We don't have enough bandwidth for this, revert the stored info. */
2537 for (i = 0; i < 31; i++) {
2538 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2541 /* Drop the new copies of any added or changed endpoints from
2542 * the interval table.
2544 if (EP_IS_ADDED(ctrl_ctx, i)) {
2545 xhci_drop_ep_from_interval_table(xhci,
2546 &virt_dev->eps[i].bw_info,
2552 /* Revert the endpoint back to its old information */
2553 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2554 sizeof(ep_bw_info[i]));
2555 /* Add any changed or dropped endpoints back into the table */
2556 if (EP_IS_DROPPED(ctrl_ctx, i))
2557 xhci_add_ep_to_interval_table(xhci,
2558 &virt_dev->eps[i].bw_info,
2568 /* Issue a configure endpoint command or evaluate context command
2569 * and wait for it to finish.
2571 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2572 struct usb_device *udev,
2573 struct xhci_command *command,
2574 bool ctx_change, bool must_succeed)
2578 unsigned long flags;
2579 struct xhci_container_ctx *in_ctx;
2580 struct xhci_input_control_ctx *ctrl_ctx;
2581 struct completion *cmd_completion;
2583 struct xhci_virt_device *virt_dev;
2584 union xhci_trb *cmd_trb;
2586 spin_lock_irqsave(&xhci->lock, flags);
2587 virt_dev = xhci->devs[udev->slot_id];
2590 in_ctx = command->in_ctx;
2592 in_ctx = virt_dev->in_ctx;
2593 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2595 spin_unlock_irqrestore(&xhci->lock, flags);
2596 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2601 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2602 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2603 spin_unlock_irqrestore(&xhci->lock, flags);
2604 xhci_warn(xhci, "Not enough host resources, "
2605 "active endpoint contexts = %u\n",
2606 xhci->num_active_eps);
2609 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2610 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2611 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2612 xhci_free_host_resources(xhci, ctrl_ctx);
2613 spin_unlock_irqrestore(&xhci->lock, flags);
2614 xhci_warn(xhci, "Not enough bandwidth\n");
2619 cmd_completion = command->completion;
2620 cmd_status = &command->status;
2621 command->command_trb = xhci_find_next_enqueue(xhci->cmd_ring);
2622 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2624 cmd_completion = &virt_dev->cmd_completion;
2625 cmd_status = &virt_dev->cmd_status;
2627 init_completion(cmd_completion);
2629 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
2631 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2632 udev->slot_id, must_succeed);
2634 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2635 udev->slot_id, must_succeed);
2638 list_del(&command->cmd_list);
2639 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2640 xhci_free_host_resources(xhci, ctrl_ctx);
2641 spin_unlock_irqrestore(&xhci->lock, flags);
2642 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2643 "FIXME allocate a new ring segment");
2646 xhci_ring_cmd_db(xhci);
2647 spin_unlock_irqrestore(&xhci->lock, flags);
2649 /* Wait for the configure endpoint command to complete */
2650 timeleft = wait_for_completion_interruptible_timeout(
2652 XHCI_CMD_DEFAULT_TIMEOUT);
2653 if (timeleft <= 0) {
2654 xhci_warn(xhci, "%s while waiting for %s command\n",
2655 timeleft == 0 ? "Timeout" : "Signal",
2657 "configure endpoint" :
2658 "evaluate context");
2659 /* cancel the configure endpoint command */
2660 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2667 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2669 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2671 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2672 spin_lock_irqsave(&xhci->lock, flags);
2673 /* If the command failed, remove the reserved resources.
2674 * Otherwise, clean up the estimate to include dropped eps.
2677 xhci_free_host_resources(xhci, ctrl_ctx);
2679 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2680 spin_unlock_irqrestore(&xhci->lock, flags);
2685 /* Called after one or more calls to xhci_add_endpoint() or
2686 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2687 * to call xhci_reset_bandwidth().
2689 * Since we are in the middle of changing either configuration or
2690 * installing a new alt setting, the USB core won't allow URBs to be
2691 * enqueued for any endpoint on the old config or interface. Nothing
2692 * else should be touching the xhci->devs[slot_id] structure, so we
2693 * don't need to take the xhci->lock for manipulating that.
2695 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2699 struct xhci_hcd *xhci;
2700 struct xhci_virt_device *virt_dev;
2701 struct xhci_input_control_ctx *ctrl_ctx;
2702 struct xhci_slot_ctx *slot_ctx;
2704 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2707 xhci = hcd_to_xhci(hcd);
2708 if (xhci->xhc_state & XHCI_STATE_DYING)
2711 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2712 virt_dev = xhci->devs[udev->slot_id];
2714 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2715 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2717 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2721 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2722 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2723 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2725 /* Don't issue the command if there's no endpoints to update. */
2726 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2727 ctrl_ctx->drop_flags == 0)
2730 xhci_dbg(xhci, "New Input Control Context:\n");
2731 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2732 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2733 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2735 ret = xhci_configure_endpoint(xhci, udev, NULL,
2738 /* Callee should call reset_bandwidth() */
2742 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2743 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2744 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2746 /* Free any rings that were dropped, but not changed. */
2747 for (i = 1; i < 31; ++i) {
2748 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2749 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2750 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2752 xhci_zero_in_ctx(xhci, virt_dev);
2754 * Install any rings for completely new endpoints or changed endpoints,
2755 * and free or cache any old rings from changed endpoints.
2757 for (i = 1; i < 31; ++i) {
2758 if (!virt_dev->eps[i].new_ring)
2760 /* Only cache or free the old ring if it exists.
2761 * It may not if this is the first add of an endpoint.
2763 if (virt_dev->eps[i].ring) {
2764 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2766 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2767 virt_dev->eps[i].new_ring = NULL;
2773 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2775 struct xhci_hcd *xhci;
2776 struct xhci_virt_device *virt_dev;
2779 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2782 xhci = hcd_to_xhci(hcd);
2784 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2785 virt_dev = xhci->devs[udev->slot_id];
2786 /* Free any rings allocated for added endpoints */
2787 for (i = 0; i < 31; ++i) {
2788 if (virt_dev->eps[i].new_ring) {
2789 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2790 virt_dev->eps[i].new_ring = NULL;
2793 xhci_zero_in_ctx(xhci, virt_dev);
2796 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2797 struct xhci_container_ctx *in_ctx,
2798 struct xhci_container_ctx *out_ctx,
2799 struct xhci_input_control_ctx *ctrl_ctx,
2800 u32 add_flags, u32 drop_flags)
2802 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2803 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2804 xhci_slot_copy(xhci, in_ctx, out_ctx);
2805 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2807 xhci_dbg(xhci, "Input Context:\n");
2808 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2811 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2812 unsigned int slot_id, unsigned int ep_index,
2813 struct xhci_dequeue_state *deq_state)
2815 struct xhci_input_control_ctx *ctrl_ctx;
2816 struct xhci_container_ctx *in_ctx;
2817 struct xhci_ep_ctx *ep_ctx;
2821 in_ctx = xhci->devs[slot_id]->in_ctx;
2822 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2824 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2829 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2830 xhci->devs[slot_id]->out_ctx, ep_index);
2831 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2832 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2833 deq_state->new_deq_ptr);
2835 xhci_warn(xhci, "WARN Cannot submit config ep after "
2836 "reset ep command\n");
2837 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2838 deq_state->new_deq_seg,
2839 deq_state->new_deq_ptr);
2842 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2844 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2845 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2846 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2847 added_ctxs, added_ctxs);
2850 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2851 struct usb_device *udev, unsigned int ep_index)
2853 struct xhci_dequeue_state deq_state;
2854 struct xhci_virt_ep *ep;
2856 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2857 "Cleaning up stalled endpoint ring");
2858 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2859 /* We need to move the HW's dequeue pointer past this TD,
2860 * or it will attempt to resend it on the next doorbell ring.
2862 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2863 ep_index, ep->stopped_stream, ep->stopped_td,
2866 /* HW with the reset endpoint quirk will use the saved dequeue state to
2867 * issue a configure endpoint command later.
2869 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2870 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2871 "Queueing new dequeue state");
2872 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2873 ep_index, ep->stopped_stream, &deq_state);
2875 /* Better hope no one uses the input context between now and the
2876 * reset endpoint completion!
2877 * XXX: No idea how this hardware will react when stream rings
2880 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2881 "Setting up input context for "
2882 "configure endpoint command");
2883 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2884 ep_index, &deq_state);
2888 /* Deal with stalled endpoints. The core should have sent the control message
2889 * to clear the halt condition. However, we need to make the xHCI hardware
2890 * reset its sequence number, since a device will expect a sequence number of
2891 * zero after the halt condition is cleared.
2892 * Context: in_interrupt
2894 void xhci_endpoint_reset(struct usb_hcd *hcd,
2895 struct usb_host_endpoint *ep)
2897 struct xhci_hcd *xhci;
2898 struct usb_device *udev;
2899 unsigned int ep_index;
2900 unsigned long flags;
2902 struct xhci_virt_ep *virt_ep;
2904 xhci = hcd_to_xhci(hcd);
2905 udev = (struct usb_device *) ep->hcpriv;
2906 /* Called with a root hub endpoint (or an endpoint that wasn't added
2907 * with xhci_add_endpoint()
2911 ep_index = xhci_get_endpoint_index(&ep->desc);
2912 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2913 if (!virt_ep->stopped_td) {
2914 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2915 "Endpoint 0x%x not halted, refusing to reset.",
2916 ep->desc.bEndpointAddress);
2919 if (usb_endpoint_xfer_control(&ep->desc)) {
2920 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2921 "Control endpoint stall already handled.");
2925 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2926 "Queueing reset endpoint command");
2927 spin_lock_irqsave(&xhci->lock, flags);
2928 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2930 * Can't change the ring dequeue pointer until it's transitioned to the
2931 * stopped state, which is only upon a successful reset endpoint
2932 * command. Better hope that last command worked!
2935 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2936 kfree(virt_ep->stopped_td);
2937 xhci_ring_cmd_db(xhci);
2939 virt_ep->stopped_td = NULL;
2940 virt_ep->stopped_stream = 0;
2941 spin_unlock_irqrestore(&xhci->lock, flags);
2944 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2947 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2948 struct usb_device *udev, struct usb_host_endpoint *ep,
2949 unsigned int slot_id)
2952 unsigned int ep_index;
2953 unsigned int ep_state;
2957 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2960 if (ep->ss_ep_comp.bmAttributes == 0) {
2961 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2962 " descriptor for ep 0x%x does not support streams\n",
2963 ep->desc.bEndpointAddress);
2967 ep_index = xhci_get_endpoint_index(&ep->desc);
2968 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
2969 if (ep_state & EP_HAS_STREAMS ||
2970 ep_state & EP_GETTING_STREAMS) {
2971 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
2972 "already has streams set up.\n",
2973 ep->desc.bEndpointAddress);
2974 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
2975 "dynamic stream context array reallocation.\n");
2978 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
2979 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
2980 "endpoint 0x%x; URBs are pending.\n",
2981 ep->desc.bEndpointAddress);
2987 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
2988 unsigned int *num_streams, unsigned int *num_stream_ctxs)
2990 unsigned int max_streams;
2992 /* The stream context array size must be a power of two */
2993 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
2995 * Find out how many primary stream array entries the host controller
2996 * supports. Later we may use secondary stream arrays (similar to 2nd
2997 * level page entries), but that's an optional feature for xHCI host
2998 * controllers. xHCs must support at least 4 stream IDs.
3000 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3001 if (*num_stream_ctxs > max_streams) {
3002 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3004 *num_stream_ctxs = max_streams;
3005 *num_streams = max_streams;
3009 /* Returns an error code if one of the endpoint already has streams.
3010 * This does not change any data structures, it only checks and gathers
3013 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3014 struct usb_device *udev,
3015 struct usb_host_endpoint **eps, unsigned int num_eps,
3016 unsigned int *num_streams, u32 *changed_ep_bitmask)
3018 unsigned int max_streams;
3019 unsigned int endpoint_flag;
3023 for (i = 0; i < num_eps; i++) {
3024 ret = xhci_check_streams_endpoint(xhci, udev,
3025 eps[i], udev->slot_id);
3029 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3030 if (max_streams < (*num_streams - 1)) {
3031 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3032 eps[i]->desc.bEndpointAddress,
3034 *num_streams = max_streams+1;
3037 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3038 if (*changed_ep_bitmask & endpoint_flag)
3040 *changed_ep_bitmask |= endpoint_flag;
3045 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3046 struct usb_device *udev,
3047 struct usb_host_endpoint **eps, unsigned int num_eps)
3049 u32 changed_ep_bitmask = 0;
3050 unsigned int slot_id;
3051 unsigned int ep_index;
3052 unsigned int ep_state;
3055 slot_id = udev->slot_id;
3056 if (!xhci->devs[slot_id])
3059 for (i = 0; i < num_eps; i++) {
3060 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3061 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3062 /* Are streams already being freed for the endpoint? */
3063 if (ep_state & EP_GETTING_NO_STREAMS) {
3064 xhci_warn(xhci, "WARN Can't disable streams for "
3066 "streams are being disabled already\n",
3067 eps[i]->desc.bEndpointAddress);
3070 /* Are there actually any streams to free? */
3071 if (!(ep_state & EP_HAS_STREAMS) &&
3072 !(ep_state & EP_GETTING_STREAMS)) {
3073 xhci_warn(xhci, "WARN Can't disable streams for "
3075 "streams are already disabled!\n",
3076 eps[i]->desc.bEndpointAddress);
3077 xhci_warn(xhci, "WARN xhci_free_streams() called "
3078 "with non-streams endpoint\n");
3081 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3083 return changed_ep_bitmask;
3087 * The USB device drivers use this function (though the HCD interface in USB
3088 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3089 * coordinate mass storage command queueing across multiple endpoints (basically
3090 * a stream ID == a task ID).
3092 * Setting up streams involves allocating the same size stream context array
3093 * for each endpoint and issuing a configure endpoint command for all endpoints.
3095 * Don't allow the call to succeed if one endpoint only supports one stream
3096 * (which means it doesn't support streams at all).
3098 * Drivers may get less stream IDs than they asked for, if the host controller
3099 * hardware or endpoints claim they can't support the number of requested
3102 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3103 struct usb_host_endpoint **eps, unsigned int num_eps,
3104 unsigned int num_streams, gfp_t mem_flags)
3107 struct xhci_hcd *xhci;
3108 struct xhci_virt_device *vdev;
3109 struct xhci_command *config_cmd;
3110 struct xhci_input_control_ctx *ctrl_ctx;
3111 unsigned int ep_index;
3112 unsigned int num_stream_ctxs;
3113 unsigned long flags;
3114 u32 changed_ep_bitmask = 0;
3119 /* Add one to the number of streams requested to account for
3120 * stream 0 that is reserved for xHCI usage.
3123 xhci = hcd_to_xhci(hcd);
3124 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3127 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3129 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3132 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3134 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3136 xhci_free_command(xhci, config_cmd);
3140 /* Check to make sure all endpoints are not already configured for
3141 * streams. While we're at it, find the maximum number of streams that
3142 * all the endpoints will support and check for duplicate endpoints.
3144 spin_lock_irqsave(&xhci->lock, flags);
3145 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3146 num_eps, &num_streams, &changed_ep_bitmask);
3148 xhci_free_command(xhci, config_cmd);
3149 spin_unlock_irqrestore(&xhci->lock, flags);
3152 if (num_streams <= 1) {
3153 xhci_warn(xhci, "WARN: endpoints can't handle "
3154 "more than one stream.\n");
3155 xhci_free_command(xhci, config_cmd);
3156 spin_unlock_irqrestore(&xhci->lock, flags);
3159 vdev = xhci->devs[udev->slot_id];
3160 /* Mark each endpoint as being in transition, so
3161 * xhci_urb_enqueue() will reject all URBs.
3163 for (i = 0; i < num_eps; i++) {
3164 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3165 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3167 spin_unlock_irqrestore(&xhci->lock, flags);
3169 /* Setup internal data structures and allocate HW data structures for
3170 * streams (but don't install the HW structures in the input context
3171 * until we're sure all memory allocation succeeded).
3173 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3174 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3175 num_stream_ctxs, num_streams);
3177 for (i = 0; i < num_eps; i++) {
3178 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3179 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3181 num_streams, mem_flags);
3182 if (!vdev->eps[ep_index].stream_info)
3184 /* Set maxPstreams in endpoint context and update deq ptr to
3185 * point to stream context array. FIXME
3189 /* Set up the input context for a configure endpoint command. */
3190 for (i = 0; i < num_eps; i++) {
3191 struct xhci_ep_ctx *ep_ctx;
3193 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3194 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3196 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3197 vdev->out_ctx, ep_index);
3198 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3199 vdev->eps[ep_index].stream_info);
3201 /* Tell the HW to drop its old copy of the endpoint context info
3202 * and add the updated copy from the input context.
3204 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3205 vdev->out_ctx, ctrl_ctx,
3206 changed_ep_bitmask, changed_ep_bitmask);
3208 /* Issue and wait for the configure endpoint command */
3209 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3212 /* xHC rejected the configure endpoint command for some reason, so we
3213 * leave the old ring intact and free our internal streams data
3219 spin_lock_irqsave(&xhci->lock, flags);
3220 for (i = 0; i < num_eps; i++) {
3221 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3222 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3223 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3224 udev->slot_id, ep_index);
3225 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3227 xhci_free_command(xhci, config_cmd);
3228 spin_unlock_irqrestore(&xhci->lock, flags);
3230 /* Subtract 1 for stream 0, which drivers can't use */
3231 return num_streams - 1;
3234 /* If it didn't work, free the streams! */
3235 for (i = 0; i < num_eps; i++) {
3236 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3237 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3238 vdev->eps[ep_index].stream_info = NULL;
3239 /* FIXME Unset maxPstreams in endpoint context and
3240 * update deq ptr to point to normal string ring.
3242 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3243 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3244 xhci_endpoint_zero(xhci, vdev, eps[i]);
3246 xhci_free_command(xhci, config_cmd);
3250 /* Transition the endpoint from using streams to being a "normal" endpoint
3253 * Modify the endpoint context state, submit a configure endpoint command,
3254 * and free all endpoint rings for streams if that completes successfully.
3256 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3257 struct usb_host_endpoint **eps, unsigned int num_eps,
3261 struct xhci_hcd *xhci;
3262 struct xhci_virt_device *vdev;
3263 struct xhci_command *command;
3264 struct xhci_input_control_ctx *ctrl_ctx;
3265 unsigned int ep_index;
3266 unsigned long flags;
3267 u32 changed_ep_bitmask;
3269 xhci = hcd_to_xhci(hcd);
3270 vdev = xhci->devs[udev->slot_id];
3272 /* Set up a configure endpoint command to remove the streams rings */
3273 spin_lock_irqsave(&xhci->lock, flags);
3274 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3275 udev, eps, num_eps);
3276 if (changed_ep_bitmask == 0) {
3277 spin_unlock_irqrestore(&xhci->lock, flags);
3281 /* Use the xhci_command structure from the first endpoint. We may have
3282 * allocated too many, but the driver may call xhci_free_streams() for
3283 * each endpoint it grouped into one call to xhci_alloc_streams().
3285 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3286 command = vdev->eps[ep_index].stream_info->free_streams_command;
3287 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3289 spin_unlock_irqrestore(&xhci->lock, flags);
3290 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3295 for (i = 0; i < num_eps; i++) {
3296 struct xhci_ep_ctx *ep_ctx;
3298 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3299 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3300 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3301 EP_GETTING_NO_STREAMS;
3303 xhci_endpoint_copy(xhci, command->in_ctx,
3304 vdev->out_ctx, ep_index);
3305 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3306 &vdev->eps[ep_index]);
3308 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3309 vdev->out_ctx, ctrl_ctx,
3310 changed_ep_bitmask, changed_ep_bitmask);
3311 spin_unlock_irqrestore(&xhci->lock, flags);
3313 /* Issue and wait for the configure endpoint command,
3314 * which must succeed.
3316 ret = xhci_configure_endpoint(xhci, udev, command,
3319 /* xHC rejected the configure endpoint command for some reason, so we
3320 * leave the streams rings intact.
3325 spin_lock_irqsave(&xhci->lock, flags);
3326 for (i = 0; i < num_eps; i++) {
3327 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3328 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3329 vdev->eps[ep_index].stream_info = NULL;
3330 /* FIXME Unset maxPstreams in endpoint context and
3331 * update deq ptr to point to normal string ring.
3333 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3334 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3336 spin_unlock_irqrestore(&xhci->lock, flags);
3342 * Deletes endpoint resources for endpoints that were active before a Reset
3343 * Device command, or a Disable Slot command. The Reset Device command leaves
3344 * the control endpoint intact, whereas the Disable Slot command deletes it.
3346 * Must be called with xhci->lock held.
3348 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3349 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3352 unsigned int num_dropped_eps = 0;
3353 unsigned int drop_flags = 0;
3355 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3356 if (virt_dev->eps[i].ring) {
3357 drop_flags |= 1 << i;
3361 xhci->num_active_eps -= num_dropped_eps;
3362 if (num_dropped_eps)
3363 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3364 "Dropped %u ep ctxs, flags = 0x%x, "
3366 num_dropped_eps, drop_flags,
3367 xhci->num_active_eps);
3371 * This submits a Reset Device Command, which will set the device state to 0,
3372 * set the device address to 0, and disable all the endpoints except the default
3373 * control endpoint. The USB core should come back and call
3374 * xhci_address_device(), and then re-set up the configuration. If this is
3375 * called because of a usb_reset_and_verify_device(), then the old alternate
3376 * settings will be re-installed through the normal bandwidth allocation
3379 * Wait for the Reset Device command to finish. Remove all structures
3380 * associated with the endpoints that were disabled. Clear the input device
3381 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3383 * If the virt_dev to be reset does not exist or does not match the udev,
3384 * it means the device is lost, possibly due to the xHC restore error and
3385 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3386 * re-allocate the device.
3388 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3391 unsigned long flags;
3392 struct xhci_hcd *xhci;
3393 unsigned int slot_id;
3394 struct xhci_virt_device *virt_dev;
3395 struct xhci_command *reset_device_cmd;
3397 int last_freed_endpoint;
3398 struct xhci_slot_ctx *slot_ctx;
3399 int old_active_eps = 0;
3401 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3404 xhci = hcd_to_xhci(hcd);
3405 slot_id = udev->slot_id;
3406 virt_dev = xhci->devs[slot_id];
3408 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3409 "not exist. Re-allocate the device\n", slot_id);
3410 ret = xhci_alloc_dev(hcd, udev);
3417 if (virt_dev->udev != udev) {
3418 /* If the virt_dev and the udev does not match, this virt_dev
3419 * may belong to another udev.
3420 * Re-allocate the device.
3422 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3423 "not match the udev. Re-allocate the device\n",
3425 ret = xhci_alloc_dev(hcd, udev);
3432 /* If device is not setup, there is no point in resetting it */
3433 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3434 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3435 SLOT_STATE_DISABLED)
3438 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3439 /* Allocate the command structure that holds the struct completion.
3440 * Assume we're in process context, since the normal device reset
3441 * process has to wait for the device anyway. Storage devices are
3442 * reset as part of error handling, so use GFP_NOIO instead of
3445 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3446 if (!reset_device_cmd) {
3447 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3451 /* Attempt to submit the Reset Device command to the command ring */
3452 spin_lock_irqsave(&xhci->lock, flags);
3453 reset_device_cmd->command_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3455 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3456 ret = xhci_queue_reset_device(xhci, slot_id);
3458 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3459 list_del(&reset_device_cmd->cmd_list);
3460 spin_unlock_irqrestore(&xhci->lock, flags);
3461 goto command_cleanup;
3463 xhci_ring_cmd_db(xhci);
3464 spin_unlock_irqrestore(&xhci->lock, flags);
3466 /* Wait for the Reset Device command to finish */
3467 timeleft = wait_for_completion_interruptible_timeout(
3468 reset_device_cmd->completion,
3469 XHCI_CMD_DEFAULT_TIMEOUT);
3470 if (timeleft <= 0) {
3471 xhci_warn(xhci, "%s while waiting for reset device command\n",
3472 timeleft == 0 ? "Timeout" : "Signal");
3473 spin_lock_irqsave(&xhci->lock, flags);
3474 /* The timeout might have raced with the event ring handler, so
3475 * only delete from the list if the item isn't poisoned.
3477 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3478 list_del(&reset_device_cmd->cmd_list);
3479 spin_unlock_irqrestore(&xhci->lock, flags);
3481 goto command_cleanup;
3484 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3485 * unless we tried to reset a slot ID that wasn't enabled,
3486 * or the device wasn't in the addressed or configured state.
3488 ret = reset_device_cmd->status;
3490 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3491 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3492 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3494 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3495 xhci_dbg(xhci, "Not freeing device rings.\n");
3496 /* Don't treat this as an error. May change my mind later. */
3498 goto command_cleanup;
3500 xhci_dbg(xhci, "Successful reset device command.\n");
3503 if (xhci_is_vendor_info_code(xhci, ret))
3505 xhci_warn(xhci, "Unknown completion code %u for "
3506 "reset device command.\n", ret);
3508 goto command_cleanup;
3511 /* Free up host controller endpoint resources */
3512 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3513 spin_lock_irqsave(&xhci->lock, flags);
3514 /* Don't delete the default control endpoint resources */
3515 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3516 spin_unlock_irqrestore(&xhci->lock, flags);
3519 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3520 last_freed_endpoint = 1;
3521 for (i = 1; i < 31; ++i) {
3522 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3524 if (ep->ep_state & EP_HAS_STREAMS) {
3525 xhci_free_stream_info(xhci, ep->stream_info);
3526 ep->stream_info = NULL;
3527 ep->ep_state &= ~EP_HAS_STREAMS;
3531 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3532 last_freed_endpoint = i;
3534 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3535 xhci_drop_ep_from_interval_table(xhci,
3536 &virt_dev->eps[i].bw_info,
3541 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3543 /* If necessary, update the number of active TTs on this root port */
3544 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3546 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3547 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3551 xhci_free_command(xhci, reset_device_cmd);
3556 * At this point, the struct usb_device is about to go away, the device has
3557 * disconnected, and all traffic has been stopped and the endpoints have been
3558 * disabled. Free any HC data structures associated with that device.
3560 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3562 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3563 struct xhci_virt_device *virt_dev;
3564 unsigned long flags;
3568 #ifndef CONFIG_USB_DEFAULT_PERSIST
3570 * We called pm_runtime_get_noresume when the device was attached.
3571 * Decrement the counter here to allow controller to runtime suspend
3572 * if no devices remain.
3574 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3575 pm_runtime_put_noidle(hcd->self.controller);
3578 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3579 /* If the host is halted due to driver unload, we still need to free the
3582 if (ret <= 0 && ret != -ENODEV)
3585 virt_dev = xhci->devs[udev->slot_id];
3587 /* Stop any wayward timer functions (which may grab the lock) */
3588 for (i = 0; i < 31; ++i) {
3589 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3590 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3593 spin_lock_irqsave(&xhci->lock, flags);
3594 /* Don't disable the slot if the host controller is dead. */
3595 state = readl(&xhci->op_regs->status);
3596 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3597 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3598 xhci_free_virt_device(xhci, udev->slot_id);
3599 spin_unlock_irqrestore(&xhci->lock, flags);
3603 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3604 spin_unlock_irqrestore(&xhci->lock, flags);
3605 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3608 xhci_ring_cmd_db(xhci);
3609 spin_unlock_irqrestore(&xhci->lock, flags);
3611 * Event command completion handler will free any data structures
3612 * associated with the slot. XXX Can free sleep?
3617 * Checks if we have enough host controller resources for the default control
3620 * Must be called with xhci->lock held.
3622 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3624 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3625 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3626 "Not enough ep ctxs: "
3627 "%u active, need to add 1, limit is %u.",
3628 xhci->num_active_eps, xhci->limit_active_eps);
3631 xhci->num_active_eps += 1;
3632 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3633 "Adding 1 ep ctx, %u now active.",
3634 xhci->num_active_eps);
3640 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3641 * timed out, or allocating memory failed. Returns 1 on success.
3643 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3645 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3646 unsigned long flags;
3649 union xhci_trb *cmd_trb;
3651 spin_lock_irqsave(&xhci->lock, flags);
3652 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3653 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3655 spin_unlock_irqrestore(&xhci->lock, flags);
3656 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3659 xhci_ring_cmd_db(xhci);
3660 spin_unlock_irqrestore(&xhci->lock, flags);
3662 /* XXX: how much time for xHC slot assignment? */
3663 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3664 XHCI_CMD_DEFAULT_TIMEOUT);
3665 if (timeleft <= 0) {
3666 xhci_warn(xhci, "%s while waiting for a slot\n",
3667 timeleft == 0 ? "Timeout" : "Signal");
3668 /* cancel the enable slot request */
3669 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3672 if (!xhci->slot_id) {
3673 xhci_err(xhci, "Error while assigning device slot ID\n");
3677 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3678 spin_lock_irqsave(&xhci->lock, flags);
3679 ret = xhci_reserve_host_control_ep_resources(xhci);
3681 spin_unlock_irqrestore(&xhci->lock, flags);
3682 xhci_warn(xhci, "Not enough host resources, "
3683 "active endpoint contexts = %u\n",
3684 xhci->num_active_eps);
3687 spin_unlock_irqrestore(&xhci->lock, flags);
3689 /* Use GFP_NOIO, since this function can be called from
3690 * xhci_discover_or_reset_device(), which may be called as part of
3691 * mass storage driver error handling.
3693 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3694 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3697 udev->slot_id = xhci->slot_id;
3699 #ifndef CONFIG_USB_DEFAULT_PERSIST
3701 * If resetting upon resume, we can't put the controller into runtime
3702 * suspend if there is a device attached.
3704 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3705 pm_runtime_get_noresume(hcd->self.controller);
3708 /* Is this a LS or FS device under a HS hub? */
3709 /* Hub or peripherial? */
3713 /* Disable slot, if we can do it without mem alloc */
3714 spin_lock_irqsave(&xhci->lock, flags);
3715 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3716 xhci_ring_cmd_db(xhci);
3717 spin_unlock_irqrestore(&xhci->lock, flags);
3722 * Issue an Address Device command and optionally send a corresponding
3723 * SetAddress request to the device.
3724 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3725 * we should only issue and wait on one address command at the same time.
3727 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3728 enum xhci_setup_dev setup)
3730 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3731 unsigned long flags;
3733 struct xhci_virt_device *virt_dev;
3735 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3736 struct xhci_slot_ctx *slot_ctx;
3737 struct xhci_input_control_ctx *ctrl_ctx;
3739 union xhci_trb *cmd_trb;
3741 if (!udev->slot_id) {
3742 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3743 "Bad Slot ID %d", udev->slot_id);
3747 virt_dev = xhci->devs[udev->slot_id];
3749 if (WARN_ON(!virt_dev)) {
3751 * In plug/unplug torture test with an NEC controller,
3752 * a zero-dereference was observed once due to virt_dev = 0.
3753 * Print useful debug rather than crash if it is observed again!
3755 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3760 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3761 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3763 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3768 * If this is the first Set Address since device plug-in or
3769 * virt_device realloaction after a resume with an xHCI power loss,
3770 * then set up the slot context.
3772 if (!slot_ctx->dev_info)
3773 xhci_setup_addressable_virt_dev(xhci, udev);
3774 /* Otherwise, update the control endpoint ring enqueue pointer. */
3776 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3777 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3778 ctrl_ctx->drop_flags = 0;
3780 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3781 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3782 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3783 le32_to_cpu(slot_ctx->dev_info) >> 27);
3785 spin_lock_irqsave(&xhci->lock, flags);
3786 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3787 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3788 udev->slot_id, setup);
3790 spin_unlock_irqrestore(&xhci->lock, flags);
3791 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3792 "FIXME: allocate a command ring segment");
3795 xhci_ring_cmd_db(xhci);
3796 spin_unlock_irqrestore(&xhci->lock, flags);
3798 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3799 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3800 XHCI_CMD_DEFAULT_TIMEOUT);
3801 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3802 * the SetAddress() "recovery interval" required by USB and aborting the
3803 * command on a timeout.
3805 if (timeleft <= 0) {
3806 xhci_warn(xhci, "%s while waiting for setup %s command\n",
3807 timeleft == 0 ? "Timeout" : "Signal", act);
3808 /* cancel the address device command */
3809 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3815 switch (virt_dev->cmd_status) {
3816 case COMP_CTX_STATE:
3818 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3819 act, udev->slot_id);
3823 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3827 dev_warn(&udev->dev,
3828 "ERROR: Incompatible device for setup %s command\n", act);
3832 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3833 "Successful setup %s command", act);
3837 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3838 act, virt_dev->cmd_status);
3839 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3840 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3841 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3848 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3849 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3850 "Op regs DCBAA ptr = %#016llx", temp_64);
3851 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3852 "Slot ID %d dcbaa entry @%p = %#016llx",
3854 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3855 (unsigned long long)
3856 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3857 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3858 "Output Context DMA address = %#08llx",
3859 (unsigned long long)virt_dev->out_ctx->dma);
3860 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3861 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3862 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3863 le32_to_cpu(slot_ctx->dev_info) >> 27);
3864 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3865 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3867 * USB core uses address 1 for the roothubs, so we add one to the
3868 * address given back to us by the HC.
3870 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3871 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3872 le32_to_cpu(slot_ctx->dev_info) >> 27);
3873 /* Zero the input context control for later use */
3874 ctrl_ctx->add_flags = 0;
3875 ctrl_ctx->drop_flags = 0;
3877 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3878 "Internal device address = %d",
3879 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3884 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3886 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3889 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3891 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3895 * Transfer the port index into real index in the HW port status
3896 * registers. Caculate offset between the port's PORTSC register
3897 * and port status base. Divide the number of per port register
3898 * to get the real index. The raw port number bases 1.
3900 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3902 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3903 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3904 __le32 __iomem *addr;
3907 if (hcd->speed != HCD_USB3)
3908 addr = xhci->usb2_ports[port1 - 1];
3910 addr = xhci->usb3_ports[port1 - 1];
3912 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3917 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3918 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3920 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3921 struct usb_device *udev, u16 max_exit_latency)
3923 struct xhci_virt_device *virt_dev;
3924 struct xhci_command *command;
3925 struct xhci_input_control_ctx *ctrl_ctx;
3926 struct xhci_slot_ctx *slot_ctx;
3927 unsigned long flags;
3930 spin_lock_irqsave(&xhci->lock, flags);
3932 virt_dev = xhci->devs[udev->slot_id];
3935 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3936 * xHC was re-initialized. Exit latency will be set later after
3937 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3940 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3941 spin_unlock_irqrestore(&xhci->lock, flags);
3945 /* Attempt to issue an Evaluate Context command to change the MEL. */
3946 command = xhci->lpm_command;
3947 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3949 spin_unlock_irqrestore(&xhci->lock, flags);
3950 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3955 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3956 spin_unlock_irqrestore(&xhci->lock, flags);
3958 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3959 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3960 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3961 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
3963 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
3964 "Set up evaluate context for LPM MEL change.");
3965 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
3966 xhci_dbg_ctx(xhci, command->in_ctx, 0);
3968 /* Issue and wait for the evaluate context command. */
3969 ret = xhci_configure_endpoint(xhci, udev, command,
3971 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
3972 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
3975 spin_lock_irqsave(&xhci->lock, flags);
3976 virt_dev->current_mel = max_exit_latency;
3977 spin_unlock_irqrestore(&xhci->lock, flags);
3982 #ifdef CONFIG_PM_RUNTIME
3984 /* BESL to HIRD Encoding array for USB2 LPM */
3985 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3986 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3988 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3989 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
3990 struct usb_device *udev)
3992 int u2del, besl, besl_host;
3993 int besl_device = 0;
3996 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
3997 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
3999 if (field & USB_BESL_SUPPORT) {
4000 for (besl_host = 0; besl_host < 16; besl_host++) {
4001 if (xhci_besl_encoding[besl_host] >= u2del)
4004 /* Use baseline BESL value as default */
4005 if (field & USB_BESL_BASELINE_VALID)
4006 besl_device = USB_GET_BESL_BASELINE(field);
4007 else if (field & USB_BESL_DEEP_VALID)
4008 besl_device = USB_GET_BESL_DEEP(field);
4013 besl_host = (u2del - 51) / 75 + 1;
4016 besl = besl_host + besl_device;
4023 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4024 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4031 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4033 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4034 l1 = udev->l1_params.timeout / 256;
4036 /* device has preferred BESLD */
4037 if (field & USB_BESL_DEEP_VALID) {
4038 besld = USB_GET_BESL_DEEP(field);
4042 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4045 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4046 struct usb_device *udev, int enable)
4048 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4049 __le32 __iomem **port_array;
4050 __le32 __iomem *pm_addr, *hlpm_addr;
4051 u32 pm_val, hlpm_val, field;
4052 unsigned int port_num;
4053 unsigned long flags;
4054 int hird, exit_latency;
4057 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4061 if (!udev->parent || udev->parent->parent ||
4062 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4065 if (udev->usb2_hw_lpm_capable != 1)
4068 spin_lock_irqsave(&xhci->lock, flags);
4070 port_array = xhci->usb2_ports;
4071 port_num = udev->portnum - 1;
4072 pm_addr = port_array[port_num] + PORTPMSC;
4073 pm_val = readl(pm_addr);
4074 hlpm_addr = port_array[port_num] + PORTHLPMC;
4075 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4077 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4078 enable ? "enable" : "disable", port_num);
4081 /* Host supports BESL timeout instead of HIRD */
4082 if (udev->usb2_hw_lpm_besl_capable) {
4083 /* if device doesn't have a preferred BESL value use a
4084 * default one which works with mixed HIRD and BESL
4085 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4087 if ((field & USB_BESL_SUPPORT) &&
4088 (field & USB_BESL_BASELINE_VALID))
4089 hird = USB_GET_BESL_BASELINE(field);
4091 hird = udev->l1_params.besl;
4093 exit_latency = xhci_besl_encoding[hird];
4094 spin_unlock_irqrestore(&xhci->lock, flags);
4096 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4097 * input context for link powermanagement evaluate
4098 * context commands. It is protected by hcd->bandwidth
4099 * mutex and is shared by all devices. We need to set
4100 * the max ext latency in USB 2 BESL LPM as well, so
4101 * use the same mutex and xhci_change_max_exit_latency()
4103 mutex_lock(hcd->bandwidth_mutex);
4104 ret = xhci_change_max_exit_latency(xhci, udev,
4106 mutex_unlock(hcd->bandwidth_mutex);
4110 spin_lock_irqsave(&xhci->lock, flags);
4112 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4113 writel(hlpm_val, hlpm_addr);
4117 hird = xhci_calculate_hird_besl(xhci, udev);
4120 pm_val &= ~PORT_HIRD_MASK;
4121 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4122 writel(pm_val, pm_addr);
4123 pm_val = readl(pm_addr);
4125 writel(pm_val, pm_addr);
4129 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4130 writel(pm_val, pm_addr);
4133 if (udev->usb2_hw_lpm_besl_capable) {
4134 spin_unlock_irqrestore(&xhci->lock, flags);
4135 mutex_lock(hcd->bandwidth_mutex);
4136 xhci_change_max_exit_latency(xhci, udev, 0);
4137 mutex_unlock(hcd->bandwidth_mutex);
4142 spin_unlock_irqrestore(&xhci->lock, flags);
4146 /* check if a usb2 port supports a given extened capability protocol
4147 * only USB2 ports extended protocol capability values are cached.
4148 * Return 1 if capability is supported
4150 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4151 unsigned capability)
4153 u32 port_offset, port_count;
4156 for (i = 0; i < xhci->num_ext_caps; i++) {
4157 if (xhci->ext_caps[i] & capability) {
4158 /* port offsets starts at 1 */
4159 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4160 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4161 if (port >= port_offset &&
4162 port < port_offset + port_count)
4169 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4171 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4172 int portnum = udev->portnum - 1;
4174 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4178 /* we only support lpm for non-hub device connected to root hub yet */
4179 if (!udev->parent || udev->parent->parent ||
4180 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4183 if (xhci->hw_lpm_support == 1 &&
4184 xhci_check_usb2_port_capability(
4185 xhci, portnum, XHCI_HLC)) {
4186 udev->usb2_hw_lpm_capable = 1;
4187 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4188 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4189 if (xhci_check_usb2_port_capability(xhci, portnum,
4191 udev->usb2_hw_lpm_besl_capable = 1;
4199 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4200 struct usb_device *udev, int enable)
4205 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4210 #endif /* CONFIG_PM_RUNTIME */
4212 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4215 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4216 static unsigned long long xhci_service_interval_to_ns(
4217 struct usb_endpoint_descriptor *desc)
4219 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4222 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4223 enum usb3_link_state state)
4225 unsigned long long sel;
4226 unsigned long long pel;
4227 unsigned int max_sel_pel;
4232 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4233 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4234 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4235 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4239 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4240 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4241 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4245 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4247 return USB3_LPM_DISABLED;
4250 if (sel <= max_sel_pel && pel <= max_sel_pel)
4251 return USB3_LPM_DEVICE_INITIATED;
4253 if (sel > max_sel_pel)
4254 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4255 "due to long SEL %llu ms\n",
4258 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4259 "due to long PEL %llu ms\n",
4261 return USB3_LPM_DISABLED;
4264 /* Returns the hub-encoded U1 timeout value.
4265 * The U1 timeout should be the maximum of the following values:
4266 * - For control endpoints, U1 system exit latency (SEL) * 3
4267 * - For bulk endpoints, U1 SEL * 5
4268 * - For interrupt endpoints:
4269 * - Notification EPs, U1 SEL * 3
4270 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4271 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4273 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4274 struct usb_endpoint_descriptor *desc)
4276 unsigned long long timeout_ns;
4280 ep_type = usb_endpoint_type(desc);
4282 case USB_ENDPOINT_XFER_CONTROL:
4283 timeout_ns = udev->u1_params.sel * 3;
4285 case USB_ENDPOINT_XFER_BULK:
4286 timeout_ns = udev->u1_params.sel * 5;
4288 case USB_ENDPOINT_XFER_INT:
4289 intr_type = usb_endpoint_interrupt_type(desc);
4290 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4291 timeout_ns = udev->u1_params.sel * 3;
4294 /* Otherwise the calculation is the same as isoc eps */
4295 case USB_ENDPOINT_XFER_ISOC:
4296 timeout_ns = xhci_service_interval_to_ns(desc);
4297 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4298 if (timeout_ns < udev->u1_params.sel * 2)
4299 timeout_ns = udev->u1_params.sel * 2;
4305 /* The U1 timeout is encoded in 1us intervals. */
4306 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4307 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4308 if (timeout_ns == USB3_LPM_DISABLED)
4311 /* If the necessary timeout value is bigger than what we can set in the
4312 * USB 3.0 hub, we have to disable hub-initiated U1.
4314 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4316 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4317 "due to long timeout %llu ms\n", timeout_ns);
4318 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4321 /* Returns the hub-encoded U2 timeout value.
4322 * The U2 timeout should be the maximum of:
4323 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4324 * - largest bInterval of any active periodic endpoint (to avoid going
4325 * into lower power link states between intervals).
4326 * - the U2 Exit Latency of the device
4328 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4329 struct usb_endpoint_descriptor *desc)
4331 unsigned long long timeout_ns;
4332 unsigned long long u2_del_ns;
4334 timeout_ns = 10 * 1000 * 1000;
4336 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4337 (xhci_service_interval_to_ns(desc) > timeout_ns))
4338 timeout_ns = xhci_service_interval_to_ns(desc);
4340 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4341 if (u2_del_ns > timeout_ns)
4342 timeout_ns = u2_del_ns;
4344 /* The U2 timeout is encoded in 256us intervals */
4345 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4346 /* If the necessary timeout value is bigger than what we can set in the
4347 * USB 3.0 hub, we have to disable hub-initiated U2.
4349 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4351 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4352 "due to long timeout %llu ms\n", timeout_ns);
4353 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4356 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4357 struct usb_device *udev,
4358 struct usb_endpoint_descriptor *desc,
4359 enum usb3_link_state state,
4362 if (state == USB3_LPM_U1) {
4363 if (xhci->quirks & XHCI_INTEL_HOST)
4364 return xhci_calculate_intel_u1_timeout(udev, desc);
4366 if (xhci->quirks & XHCI_INTEL_HOST)
4367 return xhci_calculate_intel_u2_timeout(udev, desc);
4370 return USB3_LPM_DISABLED;
4373 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4374 struct usb_device *udev,
4375 struct usb_endpoint_descriptor *desc,
4376 enum usb3_link_state state,
4381 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4382 desc, state, timeout);
4384 /* If we found we can't enable hub-initiated LPM, or
4385 * the U1 or U2 exit latency was too high to allow
4386 * device-initiated LPM as well, just stop searching.
4388 if (alt_timeout == USB3_LPM_DISABLED ||
4389 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4390 *timeout = alt_timeout;
4393 if (alt_timeout > *timeout)
4394 *timeout = alt_timeout;
4398 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4399 struct usb_device *udev,
4400 struct usb_host_interface *alt,
4401 enum usb3_link_state state,
4406 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4407 if (xhci_update_timeout_for_endpoint(xhci, udev,
4408 &alt->endpoint[j].desc, state, timeout))
4415 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4416 enum usb3_link_state state)
4418 struct usb_device *parent;
4419 unsigned int num_hubs;
4421 if (state == USB3_LPM_U2)
4424 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4425 for (parent = udev->parent, num_hubs = 0; parent->parent;
4426 parent = parent->parent)
4432 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4433 " below second-tier hub.\n");
4434 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4435 "to decrease power consumption.\n");
4439 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4440 struct usb_device *udev,
4441 enum usb3_link_state state)
4443 if (xhci->quirks & XHCI_INTEL_HOST)
4444 return xhci_check_intel_tier_policy(udev, state);
4448 /* Returns the U1 or U2 timeout that should be enabled.
4449 * If the tier check or timeout setting functions return with a non-zero exit
4450 * code, that means the timeout value has been finalized and we shouldn't look
4451 * at any more endpoints.
4453 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4454 struct usb_device *udev, enum usb3_link_state state)
4456 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4457 struct usb_host_config *config;
4460 u16 timeout = USB3_LPM_DISABLED;
4462 if (state == USB3_LPM_U1)
4464 else if (state == USB3_LPM_U2)
4467 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4472 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4475 /* Gather some information about the currently installed configuration
4476 * and alternate interface settings.
4478 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4482 config = udev->actconfig;
4486 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4487 struct usb_driver *driver;
4488 struct usb_interface *intf = config->interface[i];
4493 /* Check if any currently bound drivers want hub-initiated LPM
4496 if (intf->dev.driver) {
4497 driver = to_usb_driver(intf->dev.driver);
4498 if (driver && driver->disable_hub_initiated_lpm) {
4499 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4500 "at request of driver %s\n",
4501 state_name, driver->name);
4502 return xhci_get_timeout_no_hub_lpm(udev, state);
4506 /* Not sure how this could happen... */
4507 if (!intf->cur_altsetting)
4510 if (xhci_update_timeout_for_interface(xhci, udev,
4511 intf->cur_altsetting,
4518 static int calculate_max_exit_latency(struct usb_device *udev,
4519 enum usb3_link_state state_changed,
4520 u16 hub_encoded_timeout)
4522 unsigned long long u1_mel_us = 0;
4523 unsigned long long u2_mel_us = 0;
4524 unsigned long long mel_us = 0;
4530 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4531 hub_encoded_timeout == USB3_LPM_DISABLED);
4532 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4533 hub_encoded_timeout == USB3_LPM_DISABLED);
4535 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4536 hub_encoded_timeout != USB3_LPM_DISABLED);
4537 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4538 hub_encoded_timeout != USB3_LPM_DISABLED);
4540 /* If U1 was already enabled and we're not disabling it,
4541 * or we're going to enable U1, account for the U1 max exit latency.
4543 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4545 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4546 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4548 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4550 if (u1_mel_us > u2_mel_us)
4554 /* xHCI host controller max exit latency field is only 16 bits wide. */
4555 if (mel_us > MAX_EXIT) {
4556 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4557 "is too big.\n", mel_us);
4563 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4564 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4565 struct usb_device *udev, enum usb3_link_state state)
4567 struct xhci_hcd *xhci;
4568 u16 hub_encoded_timeout;
4572 xhci = hcd_to_xhci(hcd);
4573 /* The LPM timeout values are pretty host-controller specific, so don't
4574 * enable hub-initiated timeouts unless the vendor has provided
4575 * information about their timeout algorithm.
4577 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4578 !xhci->devs[udev->slot_id])
4579 return USB3_LPM_DISABLED;
4581 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4582 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4584 /* Max Exit Latency is too big, disable LPM. */
4585 hub_encoded_timeout = USB3_LPM_DISABLED;
4589 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4592 return hub_encoded_timeout;
4595 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4596 struct usb_device *udev, enum usb3_link_state state)
4598 struct xhci_hcd *xhci;
4602 xhci = hcd_to_xhci(hcd);
4603 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4604 !xhci->devs[udev->slot_id])
4607 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4608 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4613 #else /* CONFIG_PM */
4615 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4616 struct usb_device *udev, enum usb3_link_state state)
4618 return USB3_LPM_DISABLED;
4621 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4622 struct usb_device *udev, enum usb3_link_state state)
4626 #endif /* CONFIG_PM */
4628 /*-------------------------------------------------------------------------*/
4630 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4631 * internal data structures for the device.
4633 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4634 struct usb_tt *tt, gfp_t mem_flags)
4636 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4637 struct xhci_virt_device *vdev;
4638 struct xhci_command *config_cmd;
4639 struct xhci_input_control_ctx *ctrl_ctx;
4640 struct xhci_slot_ctx *slot_ctx;
4641 unsigned long flags;
4642 unsigned think_time;
4645 /* Ignore root hubs */
4649 vdev = xhci->devs[hdev->slot_id];
4651 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4654 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4656 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4659 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4661 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4663 xhci_free_command(xhci, config_cmd);
4667 spin_lock_irqsave(&xhci->lock, flags);
4668 if (hdev->speed == USB_SPEED_HIGH &&
4669 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4670 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4671 xhci_free_command(xhci, config_cmd);
4672 spin_unlock_irqrestore(&xhci->lock, flags);
4676 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4677 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4678 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4679 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4681 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4682 if (xhci->hci_version > 0x95) {
4683 xhci_dbg(xhci, "xHCI version %x needs hub "
4684 "TT think time and number of ports\n",
4685 (unsigned int) xhci->hci_version);
4686 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4687 /* Set TT think time - convert from ns to FS bit times.
4688 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4689 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4691 * xHCI 1.0: this field shall be 0 if the device is not a
4694 think_time = tt->think_time;
4695 if (think_time != 0)
4696 think_time = (think_time / 666) - 1;
4697 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4698 slot_ctx->tt_info |=
4699 cpu_to_le32(TT_THINK_TIME(think_time));
4701 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4702 "TT think time or number of ports\n",
4703 (unsigned int) xhci->hci_version);
4705 slot_ctx->dev_state = 0;
4706 spin_unlock_irqrestore(&xhci->lock, flags);
4708 xhci_dbg(xhci, "Set up %s for hub device.\n",
4709 (xhci->hci_version > 0x95) ?
4710 "configure endpoint" : "evaluate context");
4711 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4712 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4714 /* Issue and wait for the configure endpoint or
4715 * evaluate context command.
4717 if (xhci->hci_version > 0x95)
4718 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4721 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4724 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4725 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4727 xhci_free_command(xhci, config_cmd);
4731 int xhci_get_frame(struct usb_hcd *hcd)
4733 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4734 /* EHCI mods by the periodic size. Why? */
4735 return readl(&xhci->run_regs->microframe_index) >> 3;
4738 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4740 struct xhci_hcd *xhci;
4741 struct device *dev = hcd->self.controller;
4744 /* Accept arbitrarily long scatter-gather lists */
4745 hcd->self.sg_tablesize = ~0;
4747 /* support to build packet from discontinuous buffers */
4748 hcd->self.no_sg_constraint = 1;
4750 /* XHCI controllers don't stop the ep queue on short packets :| */
4751 hcd->self.no_stop_on_short = 1;
4753 if (usb_hcd_is_primary_hcd(hcd)) {
4754 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4757 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4758 xhci->main_hcd = hcd;
4759 /* Mark the first roothub as being USB 2.0.
4760 * The xHCI driver will register the USB 3.0 roothub.
4762 hcd->speed = HCD_USB2;
4763 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4765 * USB 2.0 roothub under xHCI has an integrated TT,
4766 * (rate matching hub) as opposed to having an OHCI/UHCI
4767 * companion controller.
4771 /* xHCI private pointer was set in xhci_pci_probe for the second
4772 * registered roothub.
4777 xhci->cap_regs = hcd->regs;
4778 xhci->op_regs = hcd->regs +
4779 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4780 xhci->run_regs = hcd->regs +
4781 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4782 /* Cache read-only capability registers */
4783 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4784 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4785 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4786 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4787 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4788 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4789 xhci_print_registers(xhci);
4791 xhci->quirks = quirks;
4793 get_quirks(dev, xhci);
4795 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4796 * success event after a short transfer. This quirk will ignore such
4799 if (xhci->hci_version > 0x96)
4800 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4802 /* Make sure the HC is halted. */
4803 retval = xhci_halt(xhci);
4807 xhci_dbg(xhci, "Resetting HCD\n");
4808 /* Reset the internal HC memory state and registers. */
4809 retval = xhci_reset(xhci);
4812 xhci_dbg(xhci, "Reset complete\n");
4814 /* Set dma_mask and coherent_dma_mask to 64-bits,
4815 * if xHC supports 64-bit addressing */
4816 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4817 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4818 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4819 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4822 xhci_dbg(xhci, "Calling HCD init\n");
4823 /* Initialize HCD and host controller data structures. */
4824 retval = xhci_init(hcd);
4827 xhci_dbg(xhci, "Called HCD init\n");
4834 static const struct hc_driver xhci_hc_driver = {
4835 .description = "xhci-hcd",
4836 .product_desc = "xHCI Host Controller",
4837 .hcd_priv_size = sizeof(struct xhci_hcd *),
4840 * generic hardware linkage
4843 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4846 * basic lifecycle operations
4848 .reset = NULL, /* set in xhci_init_driver() */
4851 .shutdown = xhci_shutdown,
4854 * managing i/o requests and associated device resources
4856 .urb_enqueue = xhci_urb_enqueue,
4857 .urb_dequeue = xhci_urb_dequeue,
4858 .alloc_dev = xhci_alloc_dev,
4859 .free_dev = xhci_free_dev,
4860 .alloc_streams = xhci_alloc_streams,
4861 .free_streams = xhci_free_streams,
4862 .add_endpoint = xhci_add_endpoint,
4863 .drop_endpoint = xhci_drop_endpoint,
4864 .endpoint_reset = xhci_endpoint_reset,
4865 .check_bandwidth = xhci_check_bandwidth,
4866 .reset_bandwidth = xhci_reset_bandwidth,
4867 .address_device = xhci_address_device,
4868 .enable_device = xhci_enable_device,
4869 .update_hub_device = xhci_update_hub_device,
4870 .reset_device = xhci_discover_or_reset_device,
4873 * scheduling support
4875 .get_frame_number = xhci_get_frame,
4880 .hub_control = xhci_hub_control,
4881 .hub_status_data = xhci_hub_status_data,
4882 .bus_suspend = xhci_bus_suspend,
4883 .bus_resume = xhci_bus_resume,
4886 * call back when device connected and addressed
4888 .update_device = xhci_update_device,
4889 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4890 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4891 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4892 .find_raw_port_number = xhci_find_raw_port_number,
4895 void xhci_init_driver(struct hc_driver *drv, int (*setup_fn)(struct usb_hcd *))
4898 *drv = xhci_hc_driver;
4899 drv->reset = setup_fn;
4901 EXPORT_SYMBOL_GPL(xhci_init_driver);
4903 MODULE_DESCRIPTION(DRIVER_DESC);
4904 MODULE_AUTHOR(DRIVER_AUTHOR);
4905 MODULE_LICENSE("GPL");
4907 static int __init xhci_hcd_init(void)
4911 retval = xhci_register_pci();
4913 pr_debug("Problem registering PCI driver.\n");
4916 retval = xhci_register_plat();
4918 pr_debug("Problem registering platform driver.\n");
4922 * Check the compiler generated sizes of structures that must be laid
4923 * out in specific ways for hardware access.
4925 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4926 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4927 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4928 /* xhci_device_control has eight fields, and also
4929 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4931 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4932 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4933 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4934 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4935 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4936 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4937 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4940 xhci_unregister_pci();
4943 module_init(xhci_hcd_init);
4945 static void __exit xhci_hcd_cleanup(void)
4947 xhci_unregister_pci();
4948 xhci_unregister_plat();
4950 module_exit(xhci_hcd_cleanup);